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source: vbox/trunk/src/recompiler/target-i386/ops_sse.h@ 36171

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1/*
2 * MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4/PNI support
3 *
4 * Copyright (c) 2005 Fabrice Bellard
5 * Copyright (c) 2008 Intel Corporation <[email protected]>
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA
20 */
21
22/*
23 * Oracle LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
24 * other than GPL or LGPL is available it will apply instead, Oracle elects to use only
25 * the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
26 * a choice of LGPL license versions is made available with the language indicating
27 * that LGPLv2 or any later version may be used, or where a choice of which version
28 * of the LGPL is applied is otherwise unspecified.
29 */
30
31#if SHIFT == 0
32#define Reg MMXReg
33#define XMM_ONLY(x...)
34#define B(n) MMX_B(n)
35#define W(n) MMX_W(n)
36#define L(n) MMX_L(n)
37#define Q(n) q
38#define SUFFIX _mmx
39#else
40#define Reg XMMReg
41#define XMM_ONLY(x...) x
42#define B(n) XMM_B(n)
43#define W(n) XMM_W(n)
44#define L(n) XMM_L(n)
45#define Q(n) XMM_Q(n)
46#define SUFFIX _xmm
47#endif
48
49void glue(helper_psrlw, SUFFIX)(Reg *d, Reg *s)
50{
51 int shift;
52
53 if (s->Q(0) > 15) {
54 d->Q(0) = 0;
55#if SHIFT == 1
56 d->Q(1) = 0;
57#endif
58 } else {
59 shift = s->B(0);
60 d->W(0) >>= shift;
61 d->W(1) >>= shift;
62 d->W(2) >>= shift;
63 d->W(3) >>= shift;
64#if SHIFT == 1
65 d->W(4) >>= shift;
66 d->W(5) >>= shift;
67 d->W(6) >>= shift;
68 d->W(7) >>= shift;
69#endif
70 }
71}
72
73void glue(helper_psraw, SUFFIX)(Reg *d, Reg *s)
74{
75 int shift;
76
77 if (s->Q(0) > 15) {
78 shift = 15;
79 } else {
80 shift = s->B(0);
81 }
82 d->W(0) = (int16_t)d->W(0) >> shift;
83 d->W(1) = (int16_t)d->W(1) >> shift;
84 d->W(2) = (int16_t)d->W(2) >> shift;
85 d->W(3) = (int16_t)d->W(3) >> shift;
86#if SHIFT == 1
87 d->W(4) = (int16_t)d->W(4) >> shift;
88 d->W(5) = (int16_t)d->W(5) >> shift;
89 d->W(6) = (int16_t)d->W(6) >> shift;
90 d->W(7) = (int16_t)d->W(7) >> shift;
91#endif
92}
93
94void glue(helper_psllw, SUFFIX)(Reg *d, Reg *s)
95{
96 int shift;
97
98 if (s->Q(0) > 15) {
99 d->Q(0) = 0;
100#if SHIFT == 1
101 d->Q(1) = 0;
102#endif
103 } else {
104 shift = s->B(0);
105 d->W(0) <<= shift;
106 d->W(1) <<= shift;
107 d->W(2) <<= shift;
108 d->W(3) <<= shift;
109#if SHIFT == 1
110 d->W(4) <<= shift;
111 d->W(5) <<= shift;
112 d->W(6) <<= shift;
113 d->W(7) <<= shift;
114#endif
115 }
116}
117
118void glue(helper_psrld, SUFFIX)(Reg *d, Reg *s)
119{
120 int shift;
121
122 if (s->Q(0) > 31) {
123 d->Q(0) = 0;
124#if SHIFT == 1
125 d->Q(1) = 0;
126#endif
127 } else {
128 shift = s->B(0);
129 d->L(0) >>= shift;
130 d->L(1) >>= shift;
131#if SHIFT == 1
132 d->L(2) >>= shift;
133 d->L(3) >>= shift;
134#endif
135 }
136}
137
138void glue(helper_psrad, SUFFIX)(Reg *d, Reg *s)
139{
140 int shift;
141
142 if (s->Q(0) > 31) {
143 shift = 31;
144 } else {
145 shift = s->B(0);
146 }
147 d->L(0) = (int32_t)d->L(0) >> shift;
148 d->L(1) = (int32_t)d->L(1) >> shift;
149#if SHIFT == 1
150 d->L(2) = (int32_t)d->L(2) >> shift;
151 d->L(3) = (int32_t)d->L(3) >> shift;
152#endif
153}
154
155void glue(helper_pslld, SUFFIX)(Reg *d, Reg *s)
156{
157 int shift;
158
159 if (s->Q(0) > 31) {
160 d->Q(0) = 0;
161#if SHIFT == 1
162 d->Q(1) = 0;
163#endif
164 } else {
165 shift = s->B(0);
166 d->L(0) <<= shift;
167 d->L(1) <<= shift;
168#if SHIFT == 1
169 d->L(2) <<= shift;
170 d->L(3) <<= shift;
171#endif
172 }
173}
174
175void glue(helper_psrlq, SUFFIX)(Reg *d, Reg *s)
176{
177 int shift;
178
179 if (s->Q(0) > 63) {
180 d->Q(0) = 0;
181#if SHIFT == 1
182 d->Q(1) = 0;
183#endif
184 } else {
185 shift = s->B(0);
186 d->Q(0) >>= shift;
187#if SHIFT == 1
188 d->Q(1) >>= shift;
189#endif
190 }
191}
192
193void glue(helper_psllq, SUFFIX)(Reg *d, Reg *s)
194{
195 int shift;
196
197 if (s->Q(0) > 63) {
198 d->Q(0) = 0;
199#if SHIFT == 1
200 d->Q(1) = 0;
201#endif
202 } else {
203 shift = s->B(0);
204 d->Q(0) <<= shift;
205#if SHIFT == 1
206 d->Q(1) <<= shift;
207#endif
208 }
209}
210
211#if SHIFT == 1
212void glue(helper_psrldq, SUFFIX)(Reg *d, Reg *s)
213{
214 int shift, i;
215
216 shift = s->L(0);
217 if (shift > 16)
218 shift = 16;
219 for(i = 0; i < 16 - shift; i++)
220 d->B(i) = d->B(i + shift);
221 for(i = 16 - shift; i < 16; i++)
222 d->B(i) = 0;
223}
224
225void glue(helper_pslldq, SUFFIX)(Reg *d, Reg *s)
226{
227 int shift, i;
228
229 shift = s->L(0);
230 if (shift > 16)
231 shift = 16;
232 for(i = 15; i >= shift; i--)
233 d->B(i) = d->B(i - shift);
234 for(i = 0; i < shift; i++)
235 d->B(i) = 0;
236}
237#endif
238
239#define SSE_HELPER_B(name, F)\
240void glue(name, SUFFIX) (Reg *d, Reg *s)\
241{\
242 d->B(0) = F(d->B(0), s->B(0));\
243 d->B(1) = F(d->B(1), s->B(1));\
244 d->B(2) = F(d->B(2), s->B(2));\
245 d->B(3) = F(d->B(3), s->B(3));\
246 d->B(4) = F(d->B(4), s->B(4));\
247 d->B(5) = F(d->B(5), s->B(5));\
248 d->B(6) = F(d->B(6), s->B(6));\
249 d->B(7) = F(d->B(7), s->B(7));\
250 XMM_ONLY(\
251 d->B(8) = F(d->B(8), s->B(8));\
252 d->B(9) = F(d->B(9), s->B(9));\
253 d->B(10) = F(d->B(10), s->B(10));\
254 d->B(11) = F(d->B(11), s->B(11));\
255 d->B(12) = F(d->B(12), s->B(12));\
256 d->B(13) = F(d->B(13), s->B(13));\
257 d->B(14) = F(d->B(14), s->B(14));\
258 d->B(15) = F(d->B(15), s->B(15));\
259 )\
260}
261
262#define SSE_HELPER_W(name, F)\
263void glue(name, SUFFIX) (Reg *d, Reg *s)\
264{\
265 d->W(0) = F(d->W(0), s->W(0));\
266 d->W(1) = F(d->W(1), s->W(1));\
267 d->W(2) = F(d->W(2), s->W(2));\
268 d->W(3) = F(d->W(3), s->W(3));\
269 XMM_ONLY(\
270 d->W(4) = F(d->W(4), s->W(4));\
271 d->W(5) = F(d->W(5), s->W(5));\
272 d->W(6) = F(d->W(6), s->W(6));\
273 d->W(7) = F(d->W(7), s->W(7));\
274 )\
275}
276
277#define SSE_HELPER_L(name, F)\
278void glue(name, SUFFIX) (Reg *d, Reg *s)\
279{\
280 d->L(0) = F(d->L(0), s->L(0));\
281 d->L(1) = F(d->L(1), s->L(1));\
282 XMM_ONLY(\
283 d->L(2) = F(d->L(2), s->L(2));\
284 d->L(3) = F(d->L(3), s->L(3));\
285 )\
286}
287
288#define SSE_HELPER_Q(name, F)\
289void glue(name, SUFFIX) (Reg *d, Reg *s)\
290{\
291 d->Q(0) = F(d->Q(0), s->Q(0));\
292 XMM_ONLY(\
293 d->Q(1) = F(d->Q(1), s->Q(1));\
294 )\
295}
296
297#if SHIFT == 0
298static inline int satub(int x)
299{
300 if (x < 0)
301 return 0;
302 else if (x > 255)
303 return 255;
304 else
305 return x;
306}
307
308static inline int satuw(int x)
309{
310 if (x < 0)
311 return 0;
312 else if (x > 65535)
313 return 65535;
314 else
315 return x;
316}
317
318static inline int satsb(int x)
319{
320 if (x < -128)
321 return -128;
322 else if (x > 127)
323 return 127;
324 else
325 return x;
326}
327
328static inline int satsw(int x)
329{
330 if (x < -32768)
331 return -32768;
332 else if (x > 32767)
333 return 32767;
334 else
335 return x;
336}
337
338#define FADD(a, b) ((a) + (b))
339#define FADDUB(a, b) satub((a) + (b))
340#define FADDUW(a, b) satuw((a) + (b))
341#define FADDSB(a, b) satsb((int8_t)(a) + (int8_t)(b))
342#define FADDSW(a, b) satsw((int16_t)(a) + (int16_t)(b))
343
344#define FSUB(a, b) ((a) - (b))
345#define FSUBUB(a, b) satub((a) - (b))
346#define FSUBUW(a, b) satuw((a) - (b))
347#define FSUBSB(a, b) satsb((int8_t)(a) - (int8_t)(b))
348#define FSUBSW(a, b) satsw((int16_t)(a) - (int16_t)(b))
349#define FMINUB(a, b) ((a) < (b)) ? (a) : (b)
350#define FMINSW(a, b) ((int16_t)(a) < (int16_t)(b)) ? (a) : (b)
351#define FMAXUB(a, b) ((a) > (b)) ? (a) : (b)
352#define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b)
353
354#define FAND(a, b) (a) & (b)
355#define FANDN(a, b) ((~(a)) & (b))
356#define FOR(a, b) (a) | (b)
357#define FXOR(a, b) (a) ^ (b)
358
359#define FCMPGTB(a, b) (int8_t)(a) > (int8_t)(b) ? -1 : 0
360#define FCMPGTW(a, b) (int16_t)(a) > (int16_t)(b) ? -1 : 0
361#define FCMPGTL(a, b) (int32_t)(a) > (int32_t)(b) ? -1 : 0
362#define FCMPEQ(a, b) (a) == (b) ? -1 : 0
363
364#define FMULLW(a, b) (a) * (b)
365#define FMULHRW(a, b) ((int16_t)(a) * (int16_t)(b) + 0x8000) >> 16
366#define FMULHUW(a, b) (a) * (b) >> 16
367#define FMULHW(a, b) (int16_t)(a) * (int16_t)(b) >> 16
368
369#define FAVG(a, b) ((a) + (b) + 1) >> 1
370#endif
371
372SSE_HELPER_B(helper_paddb, FADD)
373SSE_HELPER_W(helper_paddw, FADD)
374SSE_HELPER_L(helper_paddl, FADD)
375SSE_HELPER_Q(helper_paddq, FADD)
376
377SSE_HELPER_B(helper_psubb, FSUB)
378SSE_HELPER_W(helper_psubw, FSUB)
379SSE_HELPER_L(helper_psubl, FSUB)
380SSE_HELPER_Q(helper_psubq, FSUB)
381
382SSE_HELPER_B(helper_paddusb, FADDUB)
383SSE_HELPER_B(helper_paddsb, FADDSB)
384SSE_HELPER_B(helper_psubusb, FSUBUB)
385SSE_HELPER_B(helper_psubsb, FSUBSB)
386
387SSE_HELPER_W(helper_paddusw, FADDUW)
388SSE_HELPER_W(helper_paddsw, FADDSW)
389SSE_HELPER_W(helper_psubusw, FSUBUW)
390SSE_HELPER_W(helper_psubsw, FSUBSW)
391
392SSE_HELPER_B(helper_pminub, FMINUB)
393SSE_HELPER_B(helper_pmaxub, FMAXUB)
394
395SSE_HELPER_W(helper_pminsw, FMINSW)
396SSE_HELPER_W(helper_pmaxsw, FMAXSW)
397
398SSE_HELPER_Q(helper_pand, FAND)
399SSE_HELPER_Q(helper_pandn, FANDN)
400SSE_HELPER_Q(helper_por, FOR)
401SSE_HELPER_Q(helper_pxor, FXOR)
402
403SSE_HELPER_B(helper_pcmpgtb, FCMPGTB)
404SSE_HELPER_W(helper_pcmpgtw, FCMPGTW)
405SSE_HELPER_L(helper_pcmpgtl, FCMPGTL)
406
407SSE_HELPER_B(helper_pcmpeqb, FCMPEQ)
408SSE_HELPER_W(helper_pcmpeqw, FCMPEQ)
409SSE_HELPER_L(helper_pcmpeql, FCMPEQ)
410
411SSE_HELPER_W(helper_pmullw, FMULLW)
412#if SHIFT == 0
413SSE_HELPER_W(helper_pmulhrw, FMULHRW)
414#endif
415SSE_HELPER_W(helper_pmulhuw, FMULHUW)
416SSE_HELPER_W(helper_pmulhw, FMULHW)
417
418SSE_HELPER_B(helper_pavgb, FAVG)
419SSE_HELPER_W(helper_pavgw, FAVG)
420
421void glue(helper_pmuludq, SUFFIX) (Reg *d, Reg *s)
422{
423 d->Q(0) = (uint64_t)s->L(0) * (uint64_t)d->L(0);
424#if SHIFT == 1
425 d->Q(1) = (uint64_t)s->L(2) * (uint64_t)d->L(2);
426#endif
427}
428
429void glue(helper_pmaddwd, SUFFIX) (Reg *d, Reg *s)
430{
431 int i;
432
433 for(i = 0; i < (2 << SHIFT); i++) {
434 d->L(i) = (int16_t)s->W(2*i) * (int16_t)d->W(2*i) +
435 (int16_t)s->W(2*i+1) * (int16_t)d->W(2*i+1);
436 }
437}
438
439#if SHIFT == 0
440static inline int abs1(int a)
441{
442 if (a < 0)
443 return -a;
444 else
445 return a;
446}
447#endif
448void glue(helper_psadbw, SUFFIX) (Reg *d, Reg *s)
449{
450 unsigned int val;
451
452 val = 0;
453 val += abs1(d->B(0) - s->B(0));
454 val += abs1(d->B(1) - s->B(1));
455 val += abs1(d->B(2) - s->B(2));
456 val += abs1(d->B(3) - s->B(3));
457 val += abs1(d->B(4) - s->B(4));
458 val += abs1(d->B(5) - s->B(5));
459 val += abs1(d->B(6) - s->B(6));
460 val += abs1(d->B(7) - s->B(7));
461 d->Q(0) = val;
462#if SHIFT == 1
463 val = 0;
464 val += abs1(d->B(8) - s->B(8));
465 val += abs1(d->B(9) - s->B(9));
466 val += abs1(d->B(10) - s->B(10));
467 val += abs1(d->B(11) - s->B(11));
468 val += abs1(d->B(12) - s->B(12));
469 val += abs1(d->B(13) - s->B(13));
470 val += abs1(d->B(14) - s->B(14));
471 val += abs1(d->B(15) - s->B(15));
472 d->Q(1) = val;
473#endif
474}
475
476void glue(helper_maskmov, SUFFIX) (Reg *d, Reg *s, target_ulong a0)
477{
478 int i;
479 for(i = 0; i < (8 << SHIFT); i++) {
480 if (s->B(i) & 0x80)
481 stb(a0 + i, d->B(i));
482 }
483}
484
485void glue(helper_movl_mm_T0, SUFFIX) (Reg *d, uint32_t val)
486{
487 d->L(0) = val;
488 d->L(1) = 0;
489#if SHIFT == 1
490 d->Q(1) = 0;
491#endif
492}
493
494#ifdef TARGET_X86_64
495void glue(helper_movq_mm_T0, SUFFIX) (Reg *d, uint64_t val)
496{
497 d->Q(0) = val;
498#if SHIFT == 1
499 d->Q(1) = 0;
500#endif
501}
502#endif
503
504#if SHIFT == 0
505void glue(helper_pshufw, SUFFIX) (Reg *d, Reg *s, int order)
506{
507 Reg r;
508 r.W(0) = s->W(order & 3);
509 r.W(1) = s->W((order >> 2) & 3);
510 r.W(2) = s->W((order >> 4) & 3);
511 r.W(3) = s->W((order >> 6) & 3);
512 *d = r;
513}
514#else
515void helper_shufps(Reg *d, Reg *s, int order)
516{
517 Reg r;
518 r.L(0) = d->L(order & 3);
519 r.L(1) = d->L((order >> 2) & 3);
520 r.L(2) = s->L((order >> 4) & 3);
521 r.L(3) = s->L((order >> 6) & 3);
522 *d = r;
523}
524
525void helper_shufpd(Reg *d, Reg *s, int order)
526{
527 Reg r;
528 r.Q(0) = d->Q(order & 1);
529 r.Q(1) = s->Q((order >> 1) & 1);
530 *d = r;
531}
532
533void glue(helper_pshufd, SUFFIX) (Reg *d, Reg *s, int order)
534{
535 Reg r;
536 r.L(0) = s->L(order & 3);
537 r.L(1) = s->L((order >> 2) & 3);
538 r.L(2) = s->L((order >> 4) & 3);
539 r.L(3) = s->L((order >> 6) & 3);
540 *d = r;
541}
542
543void glue(helper_pshuflw, SUFFIX) (Reg *d, Reg *s, int order)
544{
545 Reg r;
546 r.W(0) = s->W(order & 3);
547 r.W(1) = s->W((order >> 2) & 3);
548 r.W(2) = s->W((order >> 4) & 3);
549 r.W(3) = s->W((order >> 6) & 3);
550 r.Q(1) = s->Q(1);
551 *d = r;
552}
553
554void glue(helper_pshufhw, SUFFIX) (Reg *d, Reg *s, int order)
555{
556 Reg r;
557 r.Q(0) = s->Q(0);
558 r.W(4) = s->W(4 + (order & 3));
559 r.W(5) = s->W(4 + ((order >> 2) & 3));
560 r.W(6) = s->W(4 + ((order >> 4) & 3));
561 r.W(7) = s->W(4 + ((order >> 6) & 3));
562 *d = r;
563}
564#endif
565
566#if SHIFT == 1
567/* FPU ops */
568/* XXX: not accurate */
569
570#define SSE_HELPER_S(name, F)\
571void helper_ ## name ## ps (Reg *d, Reg *s)\
572{\
573 d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
574 d->XMM_S(1) = F(32, d->XMM_S(1), s->XMM_S(1));\
575 d->XMM_S(2) = F(32, d->XMM_S(2), s->XMM_S(2));\
576 d->XMM_S(3) = F(32, d->XMM_S(3), s->XMM_S(3));\
577}\
578\
579void helper_ ## name ## ss (Reg *d, Reg *s)\
580{\
581 d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
582}\
583void helper_ ## name ## pd (Reg *d, Reg *s)\
584{\
585 d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
586 d->XMM_D(1) = F(64, d->XMM_D(1), s->XMM_D(1));\
587}\
588\
589void helper_ ## name ## sd (Reg *d, Reg *s)\
590{\
591 d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
592}
593
594#define FPU_ADD(size, a, b) float ## size ## _add(a, b, &env->sse_status)
595#define FPU_SUB(size, a, b) float ## size ## _sub(a, b, &env->sse_status)
596#define FPU_MUL(size, a, b) float ## size ## _mul(a, b, &env->sse_status)
597#define FPU_DIV(size, a, b) float ## size ## _div(a, b, &env->sse_status)
598#define FPU_MIN(size, a, b) (a) < (b) ? (a) : (b)
599#define FPU_MAX(size, a, b) (a) > (b) ? (a) : (b)
600#define FPU_SQRT(size, a, b) float ## size ## _sqrt(b, &env->sse_status)
601
602SSE_HELPER_S(add, FPU_ADD)
603SSE_HELPER_S(sub, FPU_SUB)
604SSE_HELPER_S(mul, FPU_MUL)
605SSE_HELPER_S(div, FPU_DIV)
606SSE_HELPER_S(min, FPU_MIN)
607SSE_HELPER_S(max, FPU_MAX)
608SSE_HELPER_S(sqrt, FPU_SQRT)
609
610
611/* float to float conversions */
612void helper_cvtps2pd(Reg *d, Reg *s)
613{
614 float32 s0, s1;
615 s0 = s->XMM_S(0);
616 s1 = s->XMM_S(1);
617 d->XMM_D(0) = float32_to_float64(s0, &env->sse_status);
618 d->XMM_D(1) = float32_to_float64(s1, &env->sse_status);
619}
620
621void helper_cvtpd2ps(Reg *d, Reg *s)
622{
623 d->XMM_S(0) = float64_to_float32(s->XMM_D(0), &env->sse_status);
624 d->XMM_S(1) = float64_to_float32(s->XMM_D(1), &env->sse_status);
625 d->Q(1) = 0;
626}
627
628void helper_cvtss2sd(Reg *d, Reg *s)
629{
630 d->XMM_D(0) = float32_to_float64(s->XMM_S(0), &env->sse_status);
631}
632
633void helper_cvtsd2ss(Reg *d, Reg *s)
634{
635 d->XMM_S(0) = float64_to_float32(s->XMM_D(0), &env->sse_status);
636}
637
638/* integer to float */
639void helper_cvtdq2ps(Reg *d, Reg *s)
640{
641 d->XMM_S(0) = int32_to_float32(s->XMM_L(0), &env->sse_status);
642 d->XMM_S(1) = int32_to_float32(s->XMM_L(1), &env->sse_status);
643 d->XMM_S(2) = int32_to_float32(s->XMM_L(2), &env->sse_status);
644 d->XMM_S(3) = int32_to_float32(s->XMM_L(3), &env->sse_status);
645}
646
647void helper_cvtdq2pd(Reg *d, Reg *s)
648{
649 int32_t l0, l1;
650 l0 = (int32_t)s->XMM_L(0);
651 l1 = (int32_t)s->XMM_L(1);
652 d->XMM_D(0) = int32_to_float64(l0, &env->sse_status);
653 d->XMM_D(1) = int32_to_float64(l1, &env->sse_status);
654}
655
656void helper_cvtpi2ps(XMMReg *d, MMXReg *s)
657{
658 d->XMM_S(0) = int32_to_float32(s->MMX_L(0), &env->sse_status);
659 d->XMM_S(1) = int32_to_float32(s->MMX_L(1), &env->sse_status);
660}
661
662void helper_cvtpi2pd(XMMReg *d, MMXReg *s)
663{
664 d->XMM_D(0) = int32_to_float64(s->MMX_L(0), &env->sse_status);
665 d->XMM_D(1) = int32_to_float64(s->MMX_L(1), &env->sse_status);
666}
667
668void helper_cvtsi2ss(XMMReg *d, uint32_t val)
669{
670 d->XMM_S(0) = int32_to_float32(val, &env->sse_status);
671}
672
673void helper_cvtsi2sd(XMMReg *d, uint32_t val)
674{
675 d->XMM_D(0) = int32_to_float64(val, &env->sse_status);
676}
677
678#ifdef TARGET_X86_64
679void helper_cvtsq2ss(XMMReg *d, uint64_t val)
680{
681 d->XMM_S(0) = int64_to_float32(val, &env->sse_status);
682}
683
684void helper_cvtsq2sd(XMMReg *d, uint64_t val)
685{
686 d->XMM_D(0) = int64_to_float64(val, &env->sse_status);
687}
688#endif
689
690/* float to integer */
691void helper_cvtps2dq(XMMReg *d, XMMReg *s)
692{
693 d->XMM_L(0) = float32_to_int32(s->XMM_S(0), &env->sse_status);
694 d->XMM_L(1) = float32_to_int32(s->XMM_S(1), &env->sse_status);
695 d->XMM_L(2) = float32_to_int32(s->XMM_S(2), &env->sse_status);
696 d->XMM_L(3) = float32_to_int32(s->XMM_S(3), &env->sse_status);
697}
698
699void helper_cvtpd2dq(XMMReg *d, XMMReg *s)
700{
701 d->XMM_L(0) = float64_to_int32(s->XMM_D(0), &env->sse_status);
702 d->XMM_L(1) = float64_to_int32(s->XMM_D(1), &env->sse_status);
703 d->XMM_Q(1) = 0;
704}
705
706void helper_cvtps2pi(MMXReg *d, XMMReg *s)
707{
708 d->MMX_L(0) = float32_to_int32(s->XMM_S(0), &env->sse_status);
709 d->MMX_L(1) = float32_to_int32(s->XMM_S(1), &env->sse_status);
710}
711
712void helper_cvtpd2pi(MMXReg *d, XMMReg *s)
713{
714 d->MMX_L(0) = float64_to_int32(s->XMM_D(0), &env->sse_status);
715 d->MMX_L(1) = float64_to_int32(s->XMM_D(1), &env->sse_status);
716}
717
718int32_t helper_cvtss2si(XMMReg *s)
719{
720 return float32_to_int32(s->XMM_S(0), &env->sse_status);
721}
722
723int32_t helper_cvtsd2si(XMMReg *s)
724{
725 return float64_to_int32(s->XMM_D(0), &env->sse_status);
726}
727
728#ifdef TARGET_X86_64
729int64_t helper_cvtss2sq(XMMReg *s)
730{
731 return float32_to_int64(s->XMM_S(0), &env->sse_status);
732}
733
734int64_t helper_cvtsd2sq(XMMReg *s)
735{
736 return float64_to_int64(s->XMM_D(0), &env->sse_status);
737}
738#endif
739
740/* float to integer truncated */
741void helper_cvttps2dq(XMMReg *d, XMMReg *s)
742{
743 d->XMM_L(0) = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
744 d->XMM_L(1) = float32_to_int32_round_to_zero(s->XMM_S(1), &env->sse_status);
745 d->XMM_L(2) = float32_to_int32_round_to_zero(s->XMM_S(2), &env->sse_status);
746 d->XMM_L(3) = float32_to_int32_round_to_zero(s->XMM_S(3), &env->sse_status);
747}
748
749void helper_cvttpd2dq(XMMReg *d, XMMReg *s)
750{
751 d->XMM_L(0) = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
752 d->XMM_L(1) = float64_to_int32_round_to_zero(s->XMM_D(1), &env->sse_status);
753 d->XMM_Q(1) = 0;
754}
755
756void helper_cvttps2pi(MMXReg *d, XMMReg *s)
757{
758 d->MMX_L(0) = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
759 d->MMX_L(1) = float32_to_int32_round_to_zero(s->XMM_S(1), &env->sse_status);
760}
761
762void helper_cvttpd2pi(MMXReg *d, XMMReg *s)
763{
764 d->MMX_L(0) = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
765 d->MMX_L(1) = float64_to_int32_round_to_zero(s->XMM_D(1), &env->sse_status);
766}
767
768int32_t helper_cvttss2si(XMMReg *s)
769{
770 return float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
771}
772
773int32_t helper_cvttsd2si(XMMReg *s)
774{
775 return float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
776}
777
778#ifdef TARGET_X86_64
779int64_t helper_cvttss2sq(XMMReg *s)
780{
781 return float32_to_int64_round_to_zero(s->XMM_S(0), &env->sse_status);
782}
783
784int64_t helper_cvttsd2sq(XMMReg *s)
785{
786 return float64_to_int64_round_to_zero(s->XMM_D(0), &env->sse_status);
787}
788#endif
789
790void helper_rsqrtps(XMMReg *d, XMMReg *s)
791{
792 d->XMM_S(0) = approx_rsqrt(s->XMM_S(0));
793 d->XMM_S(1) = approx_rsqrt(s->XMM_S(1));
794 d->XMM_S(2) = approx_rsqrt(s->XMM_S(2));
795 d->XMM_S(3) = approx_rsqrt(s->XMM_S(3));
796}
797
798void helper_rsqrtss(XMMReg *d, XMMReg *s)
799{
800 d->XMM_S(0) = approx_rsqrt(s->XMM_S(0));
801}
802
803void helper_rcpps(XMMReg *d, XMMReg *s)
804{
805 d->XMM_S(0) = approx_rcp(s->XMM_S(0));
806 d->XMM_S(1) = approx_rcp(s->XMM_S(1));
807 d->XMM_S(2) = approx_rcp(s->XMM_S(2));
808 d->XMM_S(3) = approx_rcp(s->XMM_S(3));
809}
810
811void helper_rcpss(XMMReg *d, XMMReg *s)
812{
813 d->XMM_S(0) = approx_rcp(s->XMM_S(0));
814}
815
816void helper_haddps(XMMReg *d, XMMReg *s)
817{
818 XMMReg r;
819 r.XMM_S(0) = d->XMM_S(0) + d->XMM_S(1);
820 r.XMM_S(1) = d->XMM_S(2) + d->XMM_S(3);
821 r.XMM_S(2) = s->XMM_S(0) + s->XMM_S(1);
822 r.XMM_S(3) = s->XMM_S(2) + s->XMM_S(3);
823 *d = r;
824}
825
826void helper_haddpd(XMMReg *d, XMMReg *s)
827{
828 XMMReg r;
829 r.XMM_D(0) = d->XMM_D(0) + d->XMM_D(1);
830 r.XMM_D(1) = s->XMM_D(0) + s->XMM_D(1);
831 *d = r;
832}
833
834void helper_hsubps(XMMReg *d, XMMReg *s)
835{
836 XMMReg r;
837 r.XMM_S(0) = d->XMM_S(0) - d->XMM_S(1);
838 r.XMM_S(1) = d->XMM_S(2) - d->XMM_S(3);
839 r.XMM_S(2) = s->XMM_S(0) - s->XMM_S(1);
840 r.XMM_S(3) = s->XMM_S(2) - s->XMM_S(3);
841 *d = r;
842}
843
844void helper_hsubpd(XMMReg *d, XMMReg *s)
845{
846 XMMReg r;
847 r.XMM_D(0) = d->XMM_D(0) - d->XMM_D(1);
848 r.XMM_D(1) = s->XMM_D(0) - s->XMM_D(1);
849 *d = r;
850}
851
852void helper_addsubps(XMMReg *d, XMMReg *s)
853{
854 d->XMM_S(0) = d->XMM_S(0) - s->XMM_S(0);
855 d->XMM_S(1) = d->XMM_S(1) + s->XMM_S(1);
856 d->XMM_S(2) = d->XMM_S(2) - s->XMM_S(2);
857 d->XMM_S(3) = d->XMM_S(3) + s->XMM_S(3);
858}
859
860void helper_addsubpd(XMMReg *d, XMMReg *s)
861{
862 d->XMM_D(0) = d->XMM_D(0) - s->XMM_D(0);
863 d->XMM_D(1) = d->XMM_D(1) + s->XMM_D(1);
864}
865
866/* XXX: unordered */
867#define SSE_HELPER_CMP(name, F)\
868void helper_ ## name ## ps (Reg *d, Reg *s)\
869{\
870 d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
871 d->XMM_L(1) = F(32, d->XMM_S(1), s->XMM_S(1));\
872 d->XMM_L(2) = F(32, d->XMM_S(2), s->XMM_S(2));\
873 d->XMM_L(3) = F(32, d->XMM_S(3), s->XMM_S(3));\
874}\
875\
876void helper_ ## name ## ss (Reg *d, Reg *s)\
877{\
878 d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
879}\
880void helper_ ## name ## pd (Reg *d, Reg *s)\
881{\
882 d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
883 d->XMM_Q(1) = F(64, d->XMM_D(1), s->XMM_D(1));\
884}\
885\
886void helper_ ## name ## sd (Reg *d, Reg *s)\
887{\
888 d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
889}
890
891#define FPU_CMPEQ(size, a, b) float ## size ## _eq(a, b, &env->sse_status) ? -1 : 0
892#define FPU_CMPLT(size, a, b) float ## size ## _lt(a, b, &env->sse_status) ? -1 : 0
893#define FPU_CMPLE(size, a, b) float ## size ## _le(a, b, &env->sse_status) ? -1 : 0
894#define FPU_CMPUNORD(size, a, b) float ## size ## _unordered(a, b, &env->sse_status) ? - 1 : 0
895#define FPU_CMPNEQ(size, a, b) float ## size ## _eq(a, b, &env->sse_status) ? 0 : -1
896#define FPU_CMPNLT(size, a, b) float ## size ## _lt(a, b, &env->sse_status) ? 0 : -1
897#define FPU_CMPNLE(size, a, b) float ## size ## _le(a, b, &env->sse_status) ? 0 : -1
898#define FPU_CMPORD(size, a, b) float ## size ## _unordered(a, b, &env->sse_status) ? 0 : -1
899
900SSE_HELPER_CMP(cmpeq, FPU_CMPEQ)
901SSE_HELPER_CMP(cmplt, FPU_CMPLT)
902SSE_HELPER_CMP(cmple, FPU_CMPLE)
903SSE_HELPER_CMP(cmpunord, FPU_CMPUNORD)
904SSE_HELPER_CMP(cmpneq, FPU_CMPNEQ)
905SSE_HELPER_CMP(cmpnlt, FPU_CMPNLT)
906SSE_HELPER_CMP(cmpnle, FPU_CMPNLE)
907SSE_HELPER_CMP(cmpord, FPU_CMPORD)
908
909const int comis_eflags[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C};
910
911void helper_ucomiss(Reg *d, Reg *s)
912{
913 int ret;
914 float32 s0, s1;
915
916 s0 = d->XMM_S(0);
917 s1 = s->XMM_S(0);
918 ret = float32_compare_quiet(s0, s1, &env->sse_status);
919 CC_SRC = comis_eflags[ret + 1];
920}
921
922void helper_comiss(Reg *d, Reg *s)
923{
924 int ret;
925 float32 s0, s1;
926
927 s0 = d->XMM_S(0);
928 s1 = s->XMM_S(0);
929 ret = float32_compare(s0, s1, &env->sse_status);
930 CC_SRC = comis_eflags[ret + 1];
931}
932
933void helper_ucomisd(Reg *d, Reg *s)
934{
935 int ret;
936 float64 d0, d1;
937
938 d0 = d->XMM_D(0);
939 d1 = s->XMM_D(0);
940 ret = float64_compare_quiet(d0, d1, &env->sse_status);
941 CC_SRC = comis_eflags[ret + 1];
942}
943
944void helper_comisd(Reg *d, Reg *s)
945{
946 int ret;
947 float64 d0, d1;
948
949 d0 = d->XMM_D(0);
950 d1 = s->XMM_D(0);
951 ret = float64_compare(d0, d1, &env->sse_status);
952 CC_SRC = comis_eflags[ret + 1];
953}
954
955uint32_t helper_movmskps(Reg *s)
956{
957 int b0, b1, b2, b3;
958 b0 = s->XMM_L(0) >> 31;
959 b1 = s->XMM_L(1) >> 31;
960 b2 = s->XMM_L(2) >> 31;
961 b3 = s->XMM_L(3) >> 31;
962 return b0 | (b1 << 1) | (b2 << 2) | (b3 << 3);
963}
964
965uint32_t helper_movmskpd(Reg *s)
966{
967 int b0, b1;
968 b0 = s->XMM_L(1) >> 31;
969 b1 = s->XMM_L(3) >> 31;
970 return b0 | (b1 << 1);
971}
972
973#endif
974
975uint32_t glue(helper_pmovmskb, SUFFIX)(Reg *s)
976{
977 uint32_t val;
978 val = 0;
979 val |= (s->B(0) >> 7);
980 val |= (s->B(1) >> 6) & 0x02;
981 val |= (s->B(2) >> 5) & 0x04;
982 val |= (s->B(3) >> 4) & 0x08;
983 val |= (s->B(4) >> 3) & 0x10;
984 val |= (s->B(5) >> 2) & 0x20;
985 val |= (s->B(6) >> 1) & 0x40;
986 val |= (s->B(7)) & 0x80;
987#if SHIFT == 1
988 val |= (s->B(8) << 1) & 0x0100;
989 val |= (s->B(9) << 2) & 0x0200;
990 val |= (s->B(10) << 3) & 0x0400;
991 val |= (s->B(11) << 4) & 0x0800;
992 val |= (s->B(12) << 5) & 0x1000;
993 val |= (s->B(13) << 6) & 0x2000;
994 val |= (s->B(14) << 7) & 0x4000;
995 val |= (s->B(15) << 8) & 0x8000;
996#endif
997 return val;
998}
999
1000void glue(helper_packsswb, SUFFIX) (Reg *d, Reg *s)
1001{
1002 Reg r;
1003
1004 r.B(0) = satsb((int16_t)d->W(0));
1005 r.B(1) = satsb((int16_t)d->W(1));
1006 r.B(2) = satsb((int16_t)d->W(2));
1007 r.B(3) = satsb((int16_t)d->W(3));
1008#if SHIFT == 1
1009 r.B(4) = satsb((int16_t)d->W(4));
1010 r.B(5) = satsb((int16_t)d->W(5));
1011 r.B(6) = satsb((int16_t)d->W(6));
1012 r.B(7) = satsb((int16_t)d->W(7));
1013#endif
1014 r.B((4 << SHIFT) + 0) = satsb((int16_t)s->W(0));
1015 r.B((4 << SHIFT) + 1) = satsb((int16_t)s->W(1));
1016 r.B((4 << SHIFT) + 2) = satsb((int16_t)s->W(2));
1017 r.B((4 << SHIFT) + 3) = satsb((int16_t)s->W(3));
1018#if SHIFT == 1
1019 r.B(12) = satsb((int16_t)s->W(4));
1020 r.B(13) = satsb((int16_t)s->W(5));
1021 r.B(14) = satsb((int16_t)s->W(6));
1022 r.B(15) = satsb((int16_t)s->W(7));
1023#endif
1024 *d = r;
1025}
1026
1027void glue(helper_packuswb, SUFFIX) (Reg *d, Reg *s)
1028{
1029 Reg r;
1030
1031 r.B(0) = satub((int16_t)d->W(0));
1032 r.B(1) = satub((int16_t)d->W(1));
1033 r.B(2) = satub((int16_t)d->W(2));
1034 r.B(3) = satub((int16_t)d->W(3));
1035#if SHIFT == 1
1036 r.B(4) = satub((int16_t)d->W(4));
1037 r.B(5) = satub((int16_t)d->W(5));
1038 r.B(6) = satub((int16_t)d->W(6));
1039 r.B(7) = satub((int16_t)d->W(7));
1040#endif
1041 r.B((4 << SHIFT) + 0) = satub((int16_t)s->W(0));
1042 r.B((4 << SHIFT) + 1) = satub((int16_t)s->W(1));
1043 r.B((4 << SHIFT) + 2) = satub((int16_t)s->W(2));
1044 r.B((4 << SHIFT) + 3) = satub((int16_t)s->W(3));
1045#if SHIFT == 1
1046 r.B(12) = satub((int16_t)s->W(4));
1047 r.B(13) = satub((int16_t)s->W(5));
1048 r.B(14) = satub((int16_t)s->W(6));
1049 r.B(15) = satub((int16_t)s->W(7));
1050#endif
1051 *d = r;
1052}
1053
1054void glue(helper_packssdw, SUFFIX) (Reg *d, Reg *s)
1055{
1056 Reg r;
1057
1058 r.W(0) = satsw(d->L(0));
1059 r.W(1) = satsw(d->L(1));
1060#if SHIFT == 1
1061 r.W(2) = satsw(d->L(2));
1062 r.W(3) = satsw(d->L(3));
1063#endif
1064 r.W((2 << SHIFT) + 0) = satsw(s->L(0));
1065 r.W((2 << SHIFT) + 1) = satsw(s->L(1));
1066#if SHIFT == 1
1067 r.W(6) = satsw(s->L(2));
1068 r.W(7) = satsw(s->L(3));
1069#endif
1070 *d = r;
1071}
1072
1073#define UNPCK_OP(base_name, base) \
1074 \
1075void glue(helper_punpck ## base_name ## bw, SUFFIX) (Reg *d, Reg *s) \
1076{ \
1077 Reg r; \
1078 \
1079 r.B(0) = d->B((base << (SHIFT + 2)) + 0); \
1080 r.B(1) = s->B((base << (SHIFT + 2)) + 0); \
1081 r.B(2) = d->B((base << (SHIFT + 2)) + 1); \
1082 r.B(3) = s->B((base << (SHIFT + 2)) + 1); \
1083 r.B(4) = d->B((base << (SHIFT + 2)) + 2); \
1084 r.B(5) = s->B((base << (SHIFT + 2)) + 2); \
1085 r.B(6) = d->B((base << (SHIFT + 2)) + 3); \
1086 r.B(7) = s->B((base << (SHIFT + 2)) + 3); \
1087XMM_ONLY( \
1088 r.B(8) = d->B((base << (SHIFT + 2)) + 4); \
1089 r.B(9) = s->B((base << (SHIFT + 2)) + 4); \
1090 r.B(10) = d->B((base << (SHIFT + 2)) + 5); \
1091 r.B(11) = s->B((base << (SHIFT + 2)) + 5); \
1092 r.B(12) = d->B((base << (SHIFT + 2)) + 6); \
1093 r.B(13) = s->B((base << (SHIFT + 2)) + 6); \
1094 r.B(14) = d->B((base << (SHIFT + 2)) + 7); \
1095 r.B(15) = s->B((base << (SHIFT + 2)) + 7); \
1096) \
1097 *d = r; \
1098} \
1099 \
1100void glue(helper_punpck ## base_name ## wd, SUFFIX) (Reg *d, Reg *s) \
1101{ \
1102 Reg r; \
1103 \
1104 r.W(0) = d->W((base << (SHIFT + 1)) + 0); \
1105 r.W(1) = s->W((base << (SHIFT + 1)) + 0); \
1106 r.W(2) = d->W((base << (SHIFT + 1)) + 1); \
1107 r.W(3) = s->W((base << (SHIFT + 1)) + 1); \
1108XMM_ONLY( \
1109 r.W(4) = d->W((base << (SHIFT + 1)) + 2); \
1110 r.W(5) = s->W((base << (SHIFT + 1)) + 2); \
1111 r.W(6) = d->W((base << (SHIFT + 1)) + 3); \
1112 r.W(7) = s->W((base << (SHIFT + 1)) + 3); \
1113) \
1114 *d = r; \
1115} \
1116 \
1117void glue(helper_punpck ## base_name ## dq, SUFFIX) (Reg *d, Reg *s) \
1118{ \
1119 Reg r; \
1120 \
1121 r.L(0) = d->L((base << SHIFT) + 0); \
1122 r.L(1) = s->L((base << SHIFT) + 0); \
1123XMM_ONLY( \
1124 r.L(2) = d->L((base << SHIFT) + 1); \
1125 r.L(3) = s->L((base << SHIFT) + 1); \
1126) \
1127 *d = r; \
1128} \
1129 \
1130XMM_ONLY( \
1131void glue(helper_punpck ## base_name ## qdq, SUFFIX) (Reg *d, Reg *s) \
1132{ \
1133 Reg r; \
1134 \
1135 r.Q(0) = d->Q(base); \
1136 r.Q(1) = s->Q(base); \
1137 *d = r; \
1138} \
1139)
1140
1141UNPCK_OP(l, 0)
1142UNPCK_OP(h, 1)
1143
1144/* 3DNow! float ops */
1145#if SHIFT == 0
1146void helper_pi2fd(MMXReg *d, MMXReg *s)
1147{
1148 d->MMX_S(0) = int32_to_float32(s->MMX_L(0), &env->mmx_status);
1149 d->MMX_S(1) = int32_to_float32(s->MMX_L(1), &env->mmx_status);
1150}
1151
1152void helper_pi2fw(MMXReg *d, MMXReg *s)
1153{
1154 d->MMX_S(0) = int32_to_float32((int16_t)s->MMX_W(0), &env->mmx_status);
1155 d->MMX_S(1) = int32_to_float32((int16_t)s->MMX_W(2), &env->mmx_status);
1156}
1157
1158void helper_pf2id(MMXReg *d, MMXReg *s)
1159{
1160 d->MMX_L(0) = float32_to_int32_round_to_zero(s->MMX_S(0), &env->mmx_status);
1161 d->MMX_L(1) = float32_to_int32_round_to_zero(s->MMX_S(1), &env->mmx_status);
1162}
1163
1164void helper_pf2iw(MMXReg *d, MMXReg *s)
1165{
1166 d->MMX_L(0) = satsw(float32_to_int32_round_to_zero(s->MMX_S(0), &env->mmx_status));
1167 d->MMX_L(1) = satsw(float32_to_int32_round_to_zero(s->MMX_S(1), &env->mmx_status));
1168}
1169
1170void helper_pfacc(MMXReg *d, MMXReg *s)
1171{
1172 MMXReg r;
1173 r.MMX_S(0) = float32_add(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1174 r.MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1175 *d = r;
1176}
1177
1178void helper_pfadd(MMXReg *d, MMXReg *s)
1179{
1180 d->MMX_S(0) = float32_add(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1181 d->MMX_S(1) = float32_add(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1182}
1183
1184void helper_pfcmpeq(MMXReg *d, MMXReg *s)
1185{
1186 d->MMX_L(0) = float32_eq(d->MMX_S(0), s->MMX_S(0), &env->mmx_status) ? -1 : 0;
1187 d->MMX_L(1) = float32_eq(d->MMX_S(1), s->MMX_S(1), &env->mmx_status) ? -1 : 0;
1188}
1189
1190void helper_pfcmpge(MMXReg *d, MMXReg *s)
1191{
1192 d->MMX_L(0) = float32_le(s->MMX_S(0), d->MMX_S(0), &env->mmx_status) ? -1 : 0;
1193 d->MMX_L(1) = float32_le(s->MMX_S(1), d->MMX_S(1), &env->mmx_status) ? -1 : 0;
1194}
1195
1196void helper_pfcmpgt(MMXReg *d, MMXReg *s)
1197{
1198 d->MMX_L(0) = float32_lt(s->MMX_S(0), d->MMX_S(0), &env->mmx_status) ? -1 : 0;
1199 d->MMX_L(1) = float32_lt(s->MMX_S(1), d->MMX_S(1), &env->mmx_status) ? -1 : 0;
1200}
1201
1202void helper_pfmax(MMXReg *d, MMXReg *s)
1203{
1204 if (float32_lt(d->MMX_S(0), s->MMX_S(0), &env->mmx_status))
1205 d->MMX_S(0) = s->MMX_S(0);
1206 if (float32_lt(d->MMX_S(1), s->MMX_S(1), &env->mmx_status))
1207 d->MMX_S(1) = s->MMX_S(1);
1208}
1209
1210void helper_pfmin(MMXReg *d, MMXReg *s)
1211{
1212 if (float32_lt(s->MMX_S(0), d->MMX_S(0), &env->mmx_status))
1213 d->MMX_S(0) = s->MMX_S(0);
1214 if (float32_lt(s->MMX_S(1), d->MMX_S(1), &env->mmx_status))
1215 d->MMX_S(1) = s->MMX_S(1);
1216}
1217
1218void helper_pfmul(MMXReg *d, MMXReg *s)
1219{
1220 d->MMX_S(0) = float32_mul(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1221 d->MMX_S(1) = float32_mul(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1222}
1223
1224void helper_pfnacc(MMXReg *d, MMXReg *s)
1225{
1226 MMXReg r;
1227 r.MMX_S(0) = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1228 r.MMX_S(1) = float32_sub(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1229 *d = r;
1230}
1231
1232void helper_pfpnacc(MMXReg *d, MMXReg *s)
1233{
1234 MMXReg r;
1235 r.MMX_S(0) = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1236 r.MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1237 *d = r;
1238}
1239
1240void helper_pfrcp(MMXReg *d, MMXReg *s)
1241{
1242 d->MMX_S(0) = approx_rcp(s->MMX_S(0));
1243 d->MMX_S(1) = d->MMX_S(0);
1244}
1245
1246void helper_pfrsqrt(MMXReg *d, MMXReg *s)
1247{
1248 d->MMX_L(1) = s->MMX_L(0) & 0x7fffffff;
1249 d->MMX_S(1) = approx_rsqrt(d->MMX_S(1));
1250 d->MMX_L(1) |= s->MMX_L(0) & 0x80000000;
1251 d->MMX_L(0) = d->MMX_L(1);
1252}
1253
1254void helper_pfsub(MMXReg *d, MMXReg *s)
1255{
1256 d->MMX_S(0) = float32_sub(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1257 d->MMX_S(1) = float32_sub(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1258}
1259
1260void helper_pfsubr(MMXReg *d, MMXReg *s)
1261{
1262 d->MMX_S(0) = float32_sub(s->MMX_S(0), d->MMX_S(0), &env->mmx_status);
1263 d->MMX_S(1) = float32_sub(s->MMX_S(1), d->MMX_S(1), &env->mmx_status);
1264}
1265
1266void helper_pswapd(MMXReg *d, MMXReg *s)
1267{
1268 MMXReg r;
1269 r.MMX_L(0) = s->MMX_L(1);
1270 r.MMX_L(1) = s->MMX_L(0);
1271 *d = r;
1272}
1273#endif
1274
1275/* SSSE3 op helpers */
1276void glue(helper_pshufb, SUFFIX) (Reg *d, Reg *s)
1277{
1278 int i;
1279 Reg r;
1280
1281 for (i = 0; i < (8 << SHIFT); i++)
1282 r.B(i) = (s->B(i) & 0x80) ? 0 : (d->B(s->B(i) & ((8 << SHIFT) - 1)));
1283
1284 *d = r;
1285}
1286
1287void glue(helper_phaddw, SUFFIX) (Reg *d, Reg *s)
1288{
1289 d->W(0) = (int16_t)d->W(0) + (int16_t)d->W(1);
1290 d->W(1) = (int16_t)d->W(2) + (int16_t)d->W(3);
1291 XMM_ONLY(d->W(2) = (int16_t)d->W(4) + (int16_t)d->W(5));
1292 XMM_ONLY(d->W(3) = (int16_t)d->W(6) + (int16_t)d->W(7));
1293 d->W((2 << SHIFT) + 0) = (int16_t)s->W(0) + (int16_t)s->W(1);
1294 d->W((2 << SHIFT) + 1) = (int16_t)s->W(2) + (int16_t)s->W(3);
1295 XMM_ONLY(d->W(6) = (int16_t)s->W(4) + (int16_t)s->W(5));
1296 XMM_ONLY(d->W(7) = (int16_t)s->W(6) + (int16_t)s->W(7));
1297}
1298
1299void glue(helper_phaddd, SUFFIX) (Reg *d, Reg *s)
1300{
1301 d->L(0) = (int32_t)d->L(0) + (int32_t)d->L(1);
1302 XMM_ONLY(d->L(1) = (int32_t)d->L(2) + (int32_t)d->L(3));
1303 d->L((1 << SHIFT) + 0) = (int32_t)s->L(0) + (int32_t)s->L(1);
1304 XMM_ONLY(d->L(3) = (int32_t)s->L(2) + (int32_t)s->L(3));
1305}
1306
1307void glue(helper_phaddsw, SUFFIX) (Reg *d, Reg *s)
1308{
1309 d->W(0) = satsw((int16_t)d->W(0) + (int16_t)d->W(1));
1310 d->W(1) = satsw((int16_t)d->W(2) + (int16_t)d->W(3));
1311 XMM_ONLY(d->W(2) = satsw((int16_t)d->W(4) + (int16_t)d->W(5)));
1312 XMM_ONLY(d->W(3) = satsw((int16_t)d->W(6) + (int16_t)d->W(7)));
1313 d->W((2 << SHIFT) + 0) = satsw((int16_t)s->W(0) + (int16_t)s->W(1));
1314 d->W((2 << SHIFT) + 1) = satsw((int16_t)s->W(2) + (int16_t)s->W(3));
1315 XMM_ONLY(d->W(6) = satsw((int16_t)s->W(4) + (int16_t)s->W(5)));
1316 XMM_ONLY(d->W(7) = satsw((int16_t)s->W(6) + (int16_t)s->W(7)));
1317}
1318
1319void glue(helper_pmaddubsw, SUFFIX) (Reg *d, Reg *s)
1320{
1321 d->W(0) = satsw((int8_t)s->B( 0) * (uint8_t)d->B( 0) +
1322 (int8_t)s->B( 1) * (uint8_t)d->B( 1));
1323 d->W(1) = satsw((int8_t)s->B( 2) * (uint8_t)d->B( 2) +
1324 (int8_t)s->B( 3) * (uint8_t)d->B( 3));
1325 d->W(2) = satsw((int8_t)s->B( 4) * (uint8_t)d->B( 4) +
1326 (int8_t)s->B( 5) * (uint8_t)d->B( 5));
1327 d->W(3) = satsw((int8_t)s->B( 6) * (uint8_t)d->B( 6) +
1328 (int8_t)s->B( 7) * (uint8_t)d->B( 7));
1329#if SHIFT == 1
1330 d->W(4) = satsw((int8_t)s->B( 8) * (uint8_t)d->B( 8) +
1331 (int8_t)s->B( 9) * (uint8_t)d->B( 9));
1332 d->W(5) = satsw((int8_t)s->B(10) * (uint8_t)d->B(10) +
1333 (int8_t)s->B(11) * (uint8_t)d->B(11));
1334 d->W(6) = satsw((int8_t)s->B(12) * (uint8_t)d->B(12) +
1335 (int8_t)s->B(13) * (uint8_t)d->B(13));
1336 d->W(7) = satsw((int8_t)s->B(14) * (uint8_t)d->B(14) +
1337 (int8_t)s->B(15) * (uint8_t)d->B(15));
1338#endif
1339}
1340
1341void glue(helper_phsubw, SUFFIX) (Reg *d, Reg *s)
1342{
1343 d->W(0) = (int16_t)d->W(0) - (int16_t)d->W(1);
1344 d->W(1) = (int16_t)d->W(2) - (int16_t)d->W(3);
1345 XMM_ONLY(d->W(2) = (int16_t)d->W(4) - (int16_t)d->W(5));
1346 XMM_ONLY(d->W(3) = (int16_t)d->W(6) - (int16_t)d->W(7));
1347 d->W((2 << SHIFT) + 0) = (int16_t)s->W(0) - (int16_t)s->W(1);
1348 d->W((2 << SHIFT) + 1) = (int16_t)s->W(2) - (int16_t)s->W(3);
1349 XMM_ONLY(d->W(6) = (int16_t)s->W(4) - (int16_t)s->W(5));
1350 XMM_ONLY(d->W(7) = (int16_t)s->W(6) - (int16_t)s->W(7));
1351}
1352
1353void glue(helper_phsubd, SUFFIX) (Reg *d, Reg *s)
1354{
1355 d->L(0) = (int32_t)d->L(0) - (int32_t)d->L(1);
1356 XMM_ONLY(d->L(1) = (int32_t)d->L(2) - (int32_t)d->L(3));
1357 d->L((1 << SHIFT) + 0) = (int32_t)s->L(0) - (int32_t)s->L(1);
1358 XMM_ONLY(d->L(3) = (int32_t)s->L(2) - (int32_t)s->L(3));
1359}
1360
1361void glue(helper_phsubsw, SUFFIX) (Reg *d, Reg *s)
1362{
1363 d->W(0) = satsw((int16_t)d->W(0) - (int16_t)d->W(1));
1364 d->W(1) = satsw((int16_t)d->W(2) - (int16_t)d->W(3));
1365 XMM_ONLY(d->W(2) = satsw((int16_t)d->W(4) - (int16_t)d->W(5)));
1366 XMM_ONLY(d->W(3) = satsw((int16_t)d->W(6) - (int16_t)d->W(7)));
1367 d->W((2 << SHIFT) + 0) = satsw((int16_t)s->W(0) - (int16_t)s->W(1));
1368 d->W((2 << SHIFT) + 1) = satsw((int16_t)s->W(2) - (int16_t)s->W(3));
1369 XMM_ONLY(d->W(6) = satsw((int16_t)s->W(4) - (int16_t)s->W(5)));
1370 XMM_ONLY(d->W(7) = satsw((int16_t)s->W(6) - (int16_t)s->W(7)));
1371}
1372
1373#define FABSB(_, x) x > INT8_MAX ? -(int8_t ) x : x
1374#define FABSW(_, x) x > INT16_MAX ? -(int16_t) x : x
1375#define FABSL(_, x) x > INT32_MAX ? -(int32_t) x : x
1376SSE_HELPER_B(helper_pabsb, FABSB)
1377SSE_HELPER_W(helper_pabsw, FABSW)
1378SSE_HELPER_L(helper_pabsd, FABSL)
1379
1380#define FMULHRSW(d, s) ((int16_t) d * (int16_t) s + 0x4000) >> 15
1381SSE_HELPER_W(helper_pmulhrsw, FMULHRSW)
1382
1383#define FSIGNB(d, s) s <= INT8_MAX ? s ? d : 0 : -(int8_t ) d
1384#define FSIGNW(d, s) s <= INT16_MAX ? s ? d : 0 : -(int16_t) d
1385#define FSIGNL(d, s) s <= INT32_MAX ? s ? d : 0 : -(int32_t) d
1386SSE_HELPER_B(helper_psignb, FSIGNB)
1387SSE_HELPER_W(helper_psignw, FSIGNW)
1388SSE_HELPER_L(helper_psignd, FSIGNL)
1389
1390void glue(helper_palignr, SUFFIX) (Reg *d, Reg *s, int32_t shift)
1391{
1392 Reg r;
1393
1394 /* XXX could be checked during translation */
1395 if (shift >= (16 << SHIFT)) {
1396 r.Q(0) = 0;
1397 XMM_ONLY(r.Q(1) = 0);
1398 } else {
1399 shift <<= 3;
1400#define SHR(v, i) (i < 64 && i > -64 ? i > 0 ? v >> (i) : (v << -(i)) : 0)
1401#if SHIFT == 0
1402 r.Q(0) = SHR(s->Q(0), shift - 0) |
1403 SHR(d->Q(0), shift - 64);
1404#else
1405 r.Q(0) = SHR(s->Q(0), shift - 0) |
1406 SHR(s->Q(1), shift - 64) |
1407 SHR(d->Q(0), shift - 128) |
1408 SHR(d->Q(1), shift - 192);
1409 r.Q(1) = SHR(s->Q(0), shift + 64) |
1410 SHR(s->Q(1), shift - 0) |
1411 SHR(d->Q(0), shift - 64) |
1412 SHR(d->Q(1), shift - 128);
1413#endif
1414#undef SHR
1415 }
1416
1417 *d = r;
1418}
1419
1420#define XMM0 env->xmm_regs[0]
1421
1422#if SHIFT == 1
1423#define SSE_HELPER_V(name, elem, num, F)\
1424void glue(name, SUFFIX) (Reg *d, Reg *s)\
1425{\
1426 d->elem(0) = F(d->elem(0), s->elem(0), XMM0.elem(0));\
1427 d->elem(1) = F(d->elem(1), s->elem(1), XMM0.elem(1));\
1428 if (num > 2) {\
1429 d->elem(2) = F(d->elem(2), s->elem(2), XMM0.elem(2));\
1430 d->elem(3) = F(d->elem(3), s->elem(3), XMM0.elem(3));\
1431 if (num > 4) {\
1432 d->elem(4) = F(d->elem(4), s->elem(4), XMM0.elem(4));\
1433 d->elem(5) = F(d->elem(5), s->elem(5), XMM0.elem(5));\
1434 d->elem(6) = F(d->elem(6), s->elem(6), XMM0.elem(6));\
1435 d->elem(7) = F(d->elem(7), s->elem(7), XMM0.elem(7));\
1436 if (num > 8) {\
1437 d->elem(8) = F(d->elem(8), s->elem(8), XMM0.elem(8));\
1438 d->elem(9) = F(d->elem(9), s->elem(9), XMM0.elem(9));\
1439 d->elem(10) = F(d->elem(10), s->elem(10), XMM0.elem(10));\
1440 d->elem(11) = F(d->elem(11), s->elem(11), XMM0.elem(11));\
1441 d->elem(12) = F(d->elem(12), s->elem(12), XMM0.elem(12));\
1442 d->elem(13) = F(d->elem(13), s->elem(13), XMM0.elem(13));\
1443 d->elem(14) = F(d->elem(14), s->elem(14), XMM0.elem(14));\
1444 d->elem(15) = F(d->elem(15), s->elem(15), XMM0.elem(15));\
1445 }\
1446 }\
1447 }\
1448}
1449
1450#define SSE_HELPER_I(name, elem, num, F)\
1451void glue(name, SUFFIX) (Reg *d, Reg *s, uint32_t imm)\
1452{\
1453 d->elem(0) = F(d->elem(0), s->elem(0), ((imm >> 0) & 1));\
1454 d->elem(1) = F(d->elem(1), s->elem(1), ((imm >> 1) & 1));\
1455 if (num > 2) {\
1456 d->elem(2) = F(d->elem(2), s->elem(2), ((imm >> 2) & 1));\
1457 d->elem(3) = F(d->elem(3), s->elem(3), ((imm >> 3) & 1));\
1458 if (num > 4) {\
1459 d->elem(4) = F(d->elem(4), s->elem(4), ((imm >> 4) & 1));\
1460 d->elem(5) = F(d->elem(5), s->elem(5), ((imm >> 5) & 1));\
1461 d->elem(6) = F(d->elem(6), s->elem(6), ((imm >> 6) & 1));\
1462 d->elem(7) = F(d->elem(7), s->elem(7), ((imm >> 7) & 1));\
1463 if (num > 8) {\
1464 d->elem(8) = F(d->elem(8), s->elem(8), ((imm >> 8) & 1));\
1465 d->elem(9) = F(d->elem(9), s->elem(9), ((imm >> 9) & 1));\
1466 d->elem(10) = F(d->elem(10), s->elem(10), ((imm >> 10) & 1));\
1467 d->elem(11) = F(d->elem(11), s->elem(11), ((imm >> 11) & 1));\
1468 d->elem(12) = F(d->elem(12), s->elem(12), ((imm >> 12) & 1));\
1469 d->elem(13) = F(d->elem(13), s->elem(13), ((imm >> 13) & 1));\
1470 d->elem(14) = F(d->elem(14), s->elem(14), ((imm >> 14) & 1));\
1471 d->elem(15) = F(d->elem(15), s->elem(15), ((imm >> 15) & 1));\
1472 }\
1473 }\
1474 }\
1475}
1476
1477/* SSE4.1 op helpers */
1478#define FBLENDVB(d, s, m) (m & 0x80) ? s : d
1479#define FBLENDVPS(d, s, m) (m & 0x80000000) ? s : d
1480#define FBLENDVPD(d, s, m) (m & 0x8000000000000000LL) ? s : d
1481SSE_HELPER_V(helper_pblendvb, B, 16, FBLENDVB)
1482SSE_HELPER_V(helper_blendvps, L, 4, FBLENDVPS)
1483SSE_HELPER_V(helper_blendvpd, Q, 2, FBLENDVPD)
1484
1485void glue(helper_ptest, SUFFIX) (Reg *d, Reg *s)
1486{
1487 uint64_t zf = (s->Q(0) & d->Q(0)) | (s->Q(1) & d->Q(1));
1488 uint64_t cf = (s->Q(0) & ~d->Q(0)) | (s->Q(1) & ~d->Q(1));
1489
1490 CC_SRC = (zf ? 0 : CC_Z) | (cf ? 0 : CC_C);
1491}
1492
1493#define SSE_HELPER_F(name, elem, num, F)\
1494void glue(name, SUFFIX) (Reg *d, Reg *s)\
1495{\
1496 d->elem(0) = F(0);\
1497 d->elem(1) = F(1);\
1498 if (num > 2) {\
1499 d->elem(2) = F(2);\
1500 d->elem(3) = F(3);\
1501 if (num > 4) {\
1502 d->elem(4) = F(4);\
1503 d->elem(5) = F(5);\
1504 d->elem(6) = F(6);\
1505 d->elem(7) = F(7);\
1506 }\
1507 }\
1508}
1509
1510SSE_HELPER_F(helper_pmovsxbw, W, 8, (int8_t) s->B)
1511SSE_HELPER_F(helper_pmovsxbd, L, 4, (int8_t) s->B)
1512SSE_HELPER_F(helper_pmovsxbq, Q, 2, (int8_t) s->B)
1513SSE_HELPER_F(helper_pmovsxwd, L, 4, (int16_t) s->W)
1514SSE_HELPER_F(helper_pmovsxwq, Q, 2, (int16_t) s->W)
1515SSE_HELPER_F(helper_pmovsxdq, Q, 2, (int32_t) s->L)
1516SSE_HELPER_F(helper_pmovzxbw, W, 8, s->B)
1517SSE_HELPER_F(helper_pmovzxbd, L, 4, s->B)
1518SSE_HELPER_F(helper_pmovzxbq, Q, 2, s->B)
1519SSE_HELPER_F(helper_pmovzxwd, L, 4, s->W)
1520SSE_HELPER_F(helper_pmovzxwq, Q, 2, s->W)
1521SSE_HELPER_F(helper_pmovzxdq, Q, 2, s->L)
1522
1523void glue(helper_pmuldq, SUFFIX) (Reg *d, Reg *s)
1524{
1525 d->Q(0) = (int64_t) (int32_t) d->L(0) * (int32_t) s->L(0);
1526 d->Q(1) = (int64_t) (int32_t) d->L(2) * (int32_t) s->L(2);
1527}
1528
1529#define FCMPEQQ(d, s) d == s ? -1 : 0
1530SSE_HELPER_Q(helper_pcmpeqq, FCMPEQQ)
1531
1532void glue(helper_packusdw, SUFFIX) (Reg *d, Reg *s)
1533{
1534 d->W(0) = satuw((int32_t) d->L(0));
1535 d->W(1) = satuw((int32_t) d->L(1));
1536 d->W(2) = satuw((int32_t) d->L(2));
1537 d->W(3) = satuw((int32_t) d->L(3));
1538 d->W(4) = satuw((int32_t) s->L(0));
1539 d->W(5) = satuw((int32_t) s->L(1));
1540 d->W(6) = satuw((int32_t) s->L(2));
1541 d->W(7) = satuw((int32_t) s->L(3));
1542}
1543
1544#define FMINSB(d, s) MIN((int8_t) d, (int8_t) s)
1545#define FMINSD(d, s) MIN((int32_t) d, (int32_t) s)
1546#define FMAXSB(d, s) MAX((int8_t) d, (int8_t) s)
1547#define FMAXSD(d, s) MAX((int32_t) d, (int32_t) s)
1548SSE_HELPER_B(helper_pminsb, FMINSB)
1549SSE_HELPER_L(helper_pminsd, FMINSD)
1550SSE_HELPER_W(helper_pminuw, MIN)
1551SSE_HELPER_L(helper_pminud, MIN)
1552SSE_HELPER_B(helper_pmaxsb, FMAXSB)
1553SSE_HELPER_L(helper_pmaxsd, FMAXSD)
1554SSE_HELPER_W(helper_pmaxuw, MAX)
1555SSE_HELPER_L(helper_pmaxud, MAX)
1556
1557#define FMULLD(d, s) (int32_t) d * (int32_t) s
1558SSE_HELPER_L(helper_pmulld, FMULLD)
1559
1560void glue(helper_phminposuw, SUFFIX) (Reg *d, Reg *s)
1561{
1562 int idx = 0;
1563
1564 if (s->W(1) < s->W(idx))
1565 idx = 1;
1566 if (s->W(2) < s->W(idx))
1567 idx = 2;
1568 if (s->W(3) < s->W(idx))
1569 idx = 3;
1570 if (s->W(4) < s->W(idx))
1571 idx = 4;
1572 if (s->W(5) < s->W(idx))
1573 idx = 5;
1574 if (s->W(6) < s->W(idx))
1575 idx = 6;
1576 if (s->W(7) < s->W(idx))
1577 idx = 7;
1578
1579 d->Q(1) = 0;
1580 d->L(1) = 0;
1581 d->W(1) = idx;
1582 d->W(0) = s->W(idx);
1583}
1584
1585void glue(helper_roundps, SUFFIX) (Reg *d, Reg *s, uint32_t mode)
1586{
1587 signed char prev_rounding_mode;
1588
1589 prev_rounding_mode = env->sse_status.float_rounding_mode;
1590 if (!(mode & (1 << 2)))
1591 switch (mode & 3) {
1592 case 0:
1593 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1594 break;
1595 case 1:
1596 set_float_rounding_mode(float_round_down, &env->sse_status);
1597 break;
1598 case 2:
1599 set_float_rounding_mode(float_round_up, &env->sse_status);
1600 break;
1601 case 3:
1602 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1603 break;
1604 }
1605
1606 d->L(0) = float64_round_to_int(s->L(0), &env->sse_status);
1607 d->L(1) = float64_round_to_int(s->L(1), &env->sse_status);
1608 d->L(2) = float64_round_to_int(s->L(2), &env->sse_status);
1609 d->L(3) = float64_round_to_int(s->L(3), &env->sse_status);
1610
1611#if 0 /* TODO */
1612 if (mode & (1 << 3))
1613 set_float_exception_flags(
1614 get_float_exception_flags(&env->sse_status) &
1615 ~float_flag_inexact,
1616 &env->sse_status);
1617#endif
1618 env->sse_status.float_rounding_mode = prev_rounding_mode;
1619}
1620
1621void glue(helper_roundpd, SUFFIX) (Reg *d, Reg *s, uint32_t mode)
1622{
1623 signed char prev_rounding_mode;
1624
1625 prev_rounding_mode = env->sse_status.float_rounding_mode;
1626 if (!(mode & (1 << 2)))
1627 switch (mode & 3) {
1628 case 0:
1629 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1630 break;
1631 case 1:
1632 set_float_rounding_mode(float_round_down, &env->sse_status);
1633 break;
1634 case 2:
1635 set_float_rounding_mode(float_round_up, &env->sse_status);
1636 break;
1637 case 3:
1638 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1639 break;
1640 }
1641
1642 d->Q(0) = float64_round_to_int(s->Q(0), &env->sse_status);
1643 d->Q(1) = float64_round_to_int(s->Q(1), &env->sse_status);
1644
1645#if 0 /* TODO */
1646 if (mode & (1 << 3))
1647 set_float_exception_flags(
1648 get_float_exception_flags(&env->sse_status) &
1649 ~float_flag_inexact,
1650 &env->sse_status);
1651#endif
1652 env->sse_status.float_rounding_mode = prev_rounding_mode;
1653}
1654
1655void glue(helper_roundss, SUFFIX) (Reg *d, Reg *s, uint32_t mode)
1656{
1657 signed char prev_rounding_mode;
1658
1659 prev_rounding_mode = env->sse_status.float_rounding_mode;
1660 if (!(mode & (1 << 2)))
1661 switch (mode & 3) {
1662 case 0:
1663 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1664 break;
1665 case 1:
1666 set_float_rounding_mode(float_round_down, &env->sse_status);
1667 break;
1668 case 2:
1669 set_float_rounding_mode(float_round_up, &env->sse_status);
1670 break;
1671 case 3:
1672 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1673 break;
1674 }
1675
1676 d->L(0) = float64_round_to_int(s->L(0), &env->sse_status);
1677
1678#if 0 /* TODO */
1679 if (mode & (1 << 3))
1680 set_float_exception_flags(
1681 get_float_exception_flags(&env->sse_status) &
1682 ~float_flag_inexact,
1683 &env->sse_status);
1684#endif
1685 env->sse_status.float_rounding_mode = prev_rounding_mode;
1686}
1687
1688void glue(helper_roundsd, SUFFIX) (Reg *d, Reg *s, uint32_t mode)
1689{
1690 signed char prev_rounding_mode;
1691
1692 prev_rounding_mode = env->sse_status.float_rounding_mode;
1693 if (!(mode & (1 << 2)))
1694 switch (mode & 3) {
1695 case 0:
1696 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1697 break;
1698 case 1:
1699 set_float_rounding_mode(float_round_down, &env->sse_status);
1700 break;
1701 case 2:
1702 set_float_rounding_mode(float_round_up, &env->sse_status);
1703 break;
1704 case 3:
1705 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1706 break;
1707 }
1708
1709 d->Q(0) = float64_round_to_int(s->Q(0), &env->sse_status);
1710
1711#if 0 /* TODO */
1712 if (mode & (1 << 3))
1713 set_float_exception_flags(
1714 get_float_exception_flags(&env->sse_status) &
1715 ~float_flag_inexact,
1716 &env->sse_status);
1717#endif
1718 env->sse_status.float_rounding_mode = prev_rounding_mode;
1719}
1720
1721#define FBLENDP(d, s, m) m ? s : d
1722SSE_HELPER_I(helper_blendps, L, 4, FBLENDP)
1723SSE_HELPER_I(helper_blendpd, Q, 2, FBLENDP)
1724SSE_HELPER_I(helper_pblendw, W, 8, FBLENDP)
1725
1726void glue(helper_dpps, SUFFIX) (Reg *d, Reg *s, uint32_t mask)
1727{
1728 float32 iresult = 0 /*float32_zero*/;
1729
1730 if (mask & (1 << 4))
1731 iresult = float32_add(iresult,
1732 float32_mul(d->L(0), s->L(0), &env->sse_status),
1733 &env->sse_status);
1734 if (mask & (1 << 5))
1735 iresult = float32_add(iresult,
1736 float32_mul(d->L(1), s->L(1), &env->sse_status),
1737 &env->sse_status);
1738 if (mask & (1 << 6))
1739 iresult = float32_add(iresult,
1740 float32_mul(d->L(2), s->L(2), &env->sse_status),
1741 &env->sse_status);
1742 if (mask & (1 << 7))
1743 iresult = float32_add(iresult,
1744 float32_mul(d->L(3), s->L(3), &env->sse_status),
1745 &env->sse_status);
1746 d->L(0) = (mask & (1 << 0)) ? iresult : 0 /*float32_zero*/;
1747 d->L(1) = (mask & (1 << 1)) ? iresult : 0 /*float32_zero*/;
1748 d->L(2) = (mask & (1 << 2)) ? iresult : 0 /*float32_zero*/;
1749 d->L(3) = (mask & (1 << 3)) ? iresult : 0 /*float32_zero*/;
1750}
1751
1752void glue(helper_dppd, SUFFIX) (Reg *d, Reg *s, uint32_t mask)
1753{
1754 float64 iresult = 0 /*float64_zero*/;
1755
1756 if (mask & (1 << 4))
1757 iresult = float64_add(iresult,
1758 float64_mul(d->Q(0), s->Q(0), &env->sse_status),
1759 &env->sse_status);
1760 if (mask & (1 << 5))
1761 iresult = float64_add(iresult,
1762 float64_mul(d->Q(1), s->Q(1), &env->sse_status),
1763 &env->sse_status);
1764 d->Q(0) = (mask & (1 << 0)) ? iresult : 0 /*float64_zero*/;
1765 d->Q(1) = (mask & (1 << 1)) ? iresult : 0 /*float64_zero*/;
1766}
1767
1768void glue(helper_mpsadbw, SUFFIX) (Reg *d, Reg *s, uint32_t offset)
1769{
1770 int s0 = (offset & 3) << 2;
1771 int d0 = (offset & 4) << 0;
1772 int i;
1773 Reg r;
1774
1775 for (i = 0; i < 8; i++, d0++) {
1776 r.W(i) = 0;
1777 r.W(i) += abs1(d->B(d0 + 0) - s->B(s0 + 0));
1778 r.W(i) += abs1(d->B(d0 + 1) - s->B(s0 + 1));
1779 r.W(i) += abs1(d->B(d0 + 2) - s->B(s0 + 2));
1780 r.W(i) += abs1(d->B(d0 + 3) - s->B(s0 + 3));
1781 }
1782
1783 *d = r;
1784}
1785
1786/* SSE4.2 op helpers */
1787/* it's unclear whether signed or unsigned */
1788#define FCMPGTQ(d, s) d > s ? -1 : 0
1789SSE_HELPER_Q(helper_pcmpgtq, FCMPGTQ)
1790
1791static inline int pcmp_elen(int reg, uint32_t ctrl)
1792{
1793 int val;
1794
1795 /* Presence of REX.W is indicated by a bit higher than 7 set */
1796 if (ctrl >> 8)
1797 val = abs1((int64_t) env->regs[reg]);
1798 else
1799 val = abs1((int32_t) env->regs[reg]);
1800
1801 if (ctrl & 1) {
1802 if (val > 8)
1803 return 8;
1804 } else
1805 if (val > 16)
1806 return 16;
1807
1808 return val;
1809}
1810
1811static inline int pcmp_ilen(Reg *r, uint8_t ctrl)
1812{
1813 int val = 0;
1814
1815 if (ctrl & 1) {
1816 while (val < 8 && r->W(val))
1817 val++;
1818 } else
1819 while (val < 16 && r->B(val))
1820 val++;
1821
1822 return val;
1823}
1824
1825static inline int pcmp_val(Reg *r, uint8_t ctrl, int i)
1826{
1827 switch ((ctrl >> 0) & 3) {
1828 case 0:
1829 return r->B(i);
1830 case 1:
1831 return r->W(i);
1832 case 2:
1833 return (int8_t) r->B(i);
1834 case 3:
1835 default:
1836 return (int16_t) r->W(i);
1837 }
1838}
1839
1840static inline unsigned pcmpxstrx(Reg *d, Reg *s,
1841 int8_t ctrl, int valids, int validd)
1842{
1843 unsigned int res = 0;
1844 int v;
1845 int j, i;
1846 int upper = (ctrl & 1) ? 7 : 15;
1847
1848 valids--;
1849 validd--;
1850
1851 CC_SRC = (valids < upper ? CC_Z : 0) | (validd < upper ? CC_S : 0);
1852
1853 switch ((ctrl >> 2) & 3) {
1854 case 0:
1855 for (j = valids; j >= 0; j--) {
1856 res <<= 1;
1857 v = pcmp_val(s, ctrl, j);
1858 for (i = validd; i >= 0; i--)
1859 res |= (v == pcmp_val(d, ctrl, i));
1860 }
1861 break;
1862 case 1:
1863 for (j = valids; j >= 0; j--) {
1864 res <<= 1;
1865 v = pcmp_val(s, ctrl, j);
1866 for (i = ((validd - 1) | 1); i >= 0; i -= 2)
1867 res |= (pcmp_val(d, ctrl, i - 0) <= v &&
1868 pcmp_val(d, ctrl, i - 1) >= v);
1869 }
1870 break;
1871 case 2:
1872 res = (2 << (upper - MAX(valids, validd))) - 1;
1873 res <<= MAX(valids, validd) - MIN(valids, validd);
1874 for (i = MIN(valids, validd); i >= 0; i--) {
1875 res <<= 1;
1876 v = pcmp_val(s, ctrl, i);
1877 res |= (v == pcmp_val(d, ctrl, i));
1878 }
1879 break;
1880 case 3:
1881 for (j = valids - validd; j >= 0; j--) {
1882 res <<= 1;
1883 res |= 1;
1884 for (i = MIN(upper - j, validd); i >= 0; i--)
1885 res &= (pcmp_val(s, ctrl, i + j) == pcmp_val(d, ctrl, i));
1886 }
1887 break;
1888 }
1889
1890 switch ((ctrl >> 4) & 3) {
1891 case 1:
1892 res ^= (2 << upper) - 1;
1893 break;
1894 case 3:
1895 res ^= (2 << valids) - 1;
1896 break;
1897 }
1898
1899 if (res)
1900 CC_SRC |= CC_C;
1901 if (res & 1)
1902 CC_SRC |= CC_O;
1903
1904 return res;
1905}
1906
1907static inline int rffs1(unsigned int val)
1908{
1909 int ret = 1, hi;
1910
1911 for (hi = sizeof(val) * 4; hi; hi /= 2)
1912 if (val >> hi) {
1913 val >>= hi;
1914 ret += hi;
1915 }
1916
1917 return ret;
1918}
1919
1920static inline int ffs1(unsigned int val)
1921{
1922 int ret = 1, hi;
1923
1924 for (hi = sizeof(val) * 4; hi; hi /= 2)
1925 if (val << hi) {
1926 val <<= hi;
1927 ret += hi;
1928 }
1929
1930 return ret;
1931}
1932
1933void glue(helper_pcmpestri, SUFFIX) (Reg *d, Reg *s, uint32_t ctrl)
1934{
1935 unsigned int res = pcmpxstrx(d, s, ctrl,
1936 pcmp_elen(R_EDX, ctrl),
1937 pcmp_elen(R_EAX, ctrl));
1938
1939 if (res)
1940#ifndef VBOX
1941 env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1 : ffs1)(res) - 1;
1942#else
1943 env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1(res) : ffs1(res)) - 1;
1944#endif
1945 else
1946 env->regs[R_ECX] = 16 >> (ctrl & (1 << 0));
1947}
1948
1949void glue(helper_pcmpestrm, SUFFIX) (Reg *d, Reg *s, uint32_t ctrl)
1950{
1951 int i;
1952 unsigned int res = pcmpxstrx(d, s, ctrl,
1953 pcmp_elen(R_EDX, ctrl),
1954 pcmp_elen(R_EAX, ctrl));
1955
1956 if ((ctrl >> 6) & 1) {
1957 if (ctrl & 1)
1958 for (i = 0; i <= 8; i--, res >>= 1)
1959 d->W(i) = (res & 1) ? ~0 : 0;
1960 else
1961 for (i = 0; i <= 16; i--, res >>= 1)
1962 d->B(i) = (res & 1) ? ~0 : 0;
1963 } else {
1964 d->Q(1) = 0;
1965 d->Q(0) = res;
1966 }
1967}
1968
1969void glue(helper_pcmpistri, SUFFIX) (Reg *d, Reg *s, uint32_t ctrl)
1970{
1971 unsigned int res = pcmpxstrx(d, s, ctrl,
1972 pcmp_ilen(s, ctrl),
1973 pcmp_ilen(d, ctrl));
1974
1975 if (res)
1976 env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1 : ffs1)(res) - 1;
1977 else
1978 env->regs[R_ECX] = 16 >> (ctrl & (1 << 0));
1979}
1980
1981void glue(helper_pcmpistrm, SUFFIX) (Reg *d, Reg *s, uint32_t ctrl)
1982{
1983 int i;
1984 unsigned int res = pcmpxstrx(d, s, ctrl,
1985 pcmp_ilen(s, ctrl),
1986 pcmp_ilen(d, ctrl));
1987
1988 if ((ctrl >> 6) & 1) {
1989 if (ctrl & 1)
1990 for (i = 0; i <= 8; i--, res >>= 1)
1991 d->W(i) = (res & 1) ? ~0 : 0;
1992 else
1993 for (i = 0; i <= 16; i--, res >>= 1)
1994 d->B(i) = (res & 1) ? ~0 : 0;
1995 } else {
1996 d->Q(1) = 0;
1997 d->Q(0) = res;
1998 }
1999}
2000
2001#define CRCPOLY 0x1edc6f41
2002#define CRCPOLY_BITREV 0x82f63b78
2003target_ulong helper_crc32(uint32_t crc1, target_ulong msg, uint32_t len)
2004{
2005 target_ulong crc = (msg & ((target_ulong) -1 >>
2006 (TARGET_LONG_BITS - len))) ^ crc1;
2007
2008 while (len--)
2009 crc = (crc >> 1) ^ ((crc & 1) ? CRCPOLY_BITREV : 0);
2010
2011 return crc;
2012}
2013
2014#define POPMASK(i) ((target_ulong) -1 / ((1LL << (1 << i)) + 1))
2015#define POPCOUNT(n, i) (n & POPMASK(i)) + ((n >> (1 << i)) & POPMASK(i))
2016target_ulong helper_popcnt(target_ulong n, uint32_t type)
2017{
2018 CC_SRC = n ? 0 : CC_Z;
2019
2020 n = POPCOUNT(n, 0);
2021 n = POPCOUNT(n, 1);
2022 n = POPCOUNT(n, 2);
2023 n = POPCOUNT(n, 3);
2024 if (type == 1)
2025 return n & 0xff;
2026
2027 n = POPCOUNT(n, 4);
2028#ifndef TARGET_X86_64
2029 return n;
2030#else
2031 if (type == 2)
2032 return n & 0xff;
2033
2034 return POPCOUNT(n, 5);
2035#endif
2036}
2037#endif
2038
2039#undef SHIFT
2040#undef XMM_ONLY
2041#undef Reg
2042#undef B
2043#undef W
2044#undef L
2045#undef Q
2046#undef SUFFIX
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