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source: vbox/trunk/src/libs/openssl-3.3.2/include/crypto/riscv_arch.h@ 108403

最後變更 在這個檔案從108403是 108206,由 vboxsync 提交於 5 週 前

openssl-3.3.2: Exported all files to OSE and removed .scm-settings ​bugref:10757

  • 屬性 svn:eol-style 設為 native
  • 屬性 svn:keywords 設為 Author Date Id Revision
檔案大小: 2.6 KB
 
1/*
2 * Copyright 2022-2023 The OpenSSL Project Authors. All Rights Reserved.
3 *
4 * Licensed under the Apache License 2.0 (the "License"). You may not use
5 * this file except in compliance with the License. You can obtain a copy
6 * in the file LICENSE in the source distribution or at
7 * https://www.openssl.org/source/license.html
8 */
9
10#ifndef OSSL_CRYPTO_RISCV_ARCH_H
11# define OSSL_CRYPTO_RISCV_ARCH_H
12
13# include <ctype.h>
14# include <stdint.h>
15
16# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX) +1
17extern uint32_t OPENSSL_riscvcap_P[ ((
18# include "riscv_arch.def"
19) + sizeof(uint32_t) - 1) / sizeof(uint32_t) ];
20
21# ifdef OPENSSL_RISCVCAP_IMPL
22# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX) +1
23uint32_t OPENSSL_riscvcap_P[ ((
24# include "riscv_arch.def"
25) + sizeof(uint32_t) - 1) / sizeof(uint32_t) ];
26# endif
27
28# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX) \
29 static inline int RISCV_HAS_##NAME(void) \
30 { \
31 return (OPENSSL_riscvcap_P[INDEX] & (1 << BIT_INDEX)) != 0; \
32 }
33# include "riscv_arch.def"
34
35struct RISCV_capability_s {
36 const char *name;
37 size_t index;
38 size_t bit_offset;
39};
40
41# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX) +1
42extern const struct RISCV_capability_s RISCV_capabilities[
43# include "riscv_arch.def"
44];
45
46# ifdef OPENSSL_RISCVCAP_IMPL
47# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX) \
48 { #NAME, INDEX, BIT_INDEX },
49const struct RISCV_capability_s RISCV_capabilities[] = {
50# include "riscv_arch.def"
51};
52# endif
53
54# define RISCV_DEFINE_CAP(NAME, INDEX, BIT_INDEX) +1
55static const size_t kRISCVNumCaps =
56# include "riscv_arch.def"
57;
58
59/* Extension combination tests. */
60#define RISCV_HAS_ZBB_AND_ZBC() (RISCV_HAS_ZBB() && RISCV_HAS_ZBC())
61#define RISCV_HAS_ZBKB_AND_ZKND_AND_ZKNE() (RISCV_HAS_ZBKB() && RISCV_HAS_ZKND() && RISCV_HAS_ZKNE())
62#define RISCV_HAS_ZKND_AND_ZKNE() (RISCV_HAS_ZKND() && RISCV_HAS_ZKNE())
63/*
64 * The ZVBB is the superset of ZVKB extension. We use macro here to replace the
65 * `RISCV_HAS_ZVKB()` with `RISCV_HAS_ZVBB() || RISCV_HAS_ZVKB()`.
66 */
67#define RISCV_HAS_ZVKB() (RISCV_HAS_ZVBB() || RISCV_HAS_ZVKB())
68#define RISCV_HAS_ZVKB_AND_ZVKNHA() (RISCV_HAS_ZVKB() && RISCV_HAS_ZVKNHA())
69#define RISCV_HAS_ZVKB_AND_ZVKNHB() (RISCV_HAS_ZVKB() && RISCV_HAS_ZVKNHB())
70#define RISCV_HAS_ZVKB_AND_ZVKSED() (RISCV_HAS_ZVKB() && RISCV_HAS_ZVKSED())
71#define RISCV_HAS_ZVKB_AND_ZVKSH() (RISCV_HAS_ZVKB() && RISCV_HAS_ZVKSH())
72
73/*
74 * Get the size of a vector register in bits (VLEN).
75 * If RISCV_HAS_V() is false, then this returns 0.
76 */
77size_t riscv_vlen(void);
78
79#endif
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