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source: vbox/trunk/src/libs/openssl-1.1.1l/crypto/sha/asm/sha512-armv8.pl@ 94467

最後變更 在這個檔案從94467是 91772,由 vboxsync 提交於 3 年 前

openssl-1.1.1l: Applied and adjusted our OpenSSL changes to 1.1.1l. bugref:10126
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1#! /usr/bin/env perl
2# Copyright 2014-2020 The OpenSSL Project Authors. All Rights Reserved.
3#
4# Licensed under the OpenSSL license (the "License"). You may not use
5# this file except in compliance with the License. You can obtain a copy
6# in the file LICENSE in the source distribution or at
7# https://www.openssl.org/source/license.html
8
9# ====================================================================
10# Written by Andy Polyakov <[email protected]> for the OpenSSL
11# project. The module is, however, dual licensed under OpenSSL and
12# CRYPTOGAMS licenses depending on where you obtain it. For further
13# details see http://www.openssl.org/~appro/cryptogams/.
14#
15# Permission to use under GPLv2 terms is granted.
16# ====================================================================
17#
18# SHA256/512 for ARMv8.
19#
20# Performance in cycles per processed byte and improvement coefficient
21# over code generated with "default" compiler:
22#
23# SHA256-hw SHA256(*) SHA512
24# Apple A7 1.97 10.5 (+33%) 6.73 (-1%(**))
25# Cortex-A53 2.38 15.5 (+115%) 10.0 (+150%(***))
26# Cortex-A57 2.31 11.6 (+86%) 7.51 (+260%(***))
27# Denver 2.01 10.5 (+26%) 6.70 (+8%)
28# X-Gene 20.0 (+100%) 12.8 (+300%(***))
29# Mongoose 2.36 13.0 (+50%) 8.36 (+33%)
30# Kryo 1.92 17.4 (+30%) 11.2 (+8%)
31#
32# (*) Software SHA256 results are of lesser relevance, presented
33# mostly for informational purposes.
34# (**) The result is a trade-off: it's possible to improve it by
35# 10% (or by 1 cycle per round), but at the cost of 20% loss
36# on Cortex-A53 (or by 4 cycles per round).
37# (***) Super-impressive coefficients over gcc-generated code are
38# indication of some compiler "pathology", most notably code
39# generated with -mgeneral-regs-only is significantly faster
40# and the gap is only 40-90%.
41#
42# October 2016.
43#
44# Originally it was reckoned that it makes no sense to implement NEON
45# version of SHA256 for 64-bit processors. This is because performance
46# improvement on most wide-spread Cortex-A5x processors was observed
47# to be marginal, same on Cortex-A53 and ~10% on A57. But then it was
48# observed that 32-bit NEON SHA256 performs significantly better than
49# 64-bit scalar version on *some* of the more recent processors. As
50# result 64-bit NEON version of SHA256 was added to provide best
51# all-round performance. For example it executes ~30% faster on X-Gene
52# and Mongoose. [For reference, NEON version of SHA512 is bound to
53# deliver much less improvement, likely *negative* on Cortex-A5x.
54# Which is why NEON support is limited to SHA256.]
55
56$output=pop;
57$flavour=pop;
58
59if ($flavour && $flavour ne "void") {
60 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
61 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
62 ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
63 die "can't locate arm-xlate.pl";
64
65 open OUT,"| \"$^X\" $xlate $flavour $output";
66 *STDOUT=*OUT;
67} else {
68 open STDOUT,">$output";
69}
70
71if ($output =~ /512/) {
72 $BITS=512;
73 $SZ=8;
74 @Sigma0=(28,34,39);
75 @Sigma1=(14,18,41);
76 @sigma0=(1, 8, 7);
77 @sigma1=(19,61, 6);
78 $rounds=80;
79 $reg_t="x";
80} else {
81 $BITS=256;
82 $SZ=4;
83 @Sigma0=( 2,13,22);
84 @Sigma1=( 6,11,25);
85 @sigma0=( 7,18, 3);
86 @sigma1=(17,19,10);
87 $rounds=64;
88 $reg_t="w";
89}
90
91$func="sha${BITS}_block_data_order";
92
93($ctx,$inp,$num,$Ktbl)=map("x$_",(0..2,30));
94
95@X=map("$reg_t$_",(3..15,0..2));
96@V=($A,$B,$C,$D,$E,$F,$G,$H)=map("$reg_t$_",(20..27));
97($t0,$t1,$t2,$t3)=map("$reg_t$_",(16,17,19,28));
98
99sub BODY_00_xx {
100my ($i,$a,$b,$c,$d,$e,$f,$g,$h)=@_;
101my $j=($i+1)&15;
102my ($T0,$T1,$T2)=(@X[($i-8)&15],@X[($i-9)&15],@X[($i-10)&15]);
103 $T0=@X[$i+3] if ($i<11);
104
105$code.=<<___ if ($i<16);
106#ifndef __AARCH64EB__
107 rev @X[$i],@X[$i] // $i
108#endif
109___
110$code.=<<___ if ($i<13 && ($i&1));
111 ldp @X[$i+1],@X[$i+2],[$inp],#2*$SZ
112___
113$code.=<<___ if ($i==13);
114 ldp @X[14],@X[15],[$inp]
115___
116$code.=<<___ if ($i>=14);
117 ldr @X[($i-11)&15],[sp,#`$SZ*(($i-11)%4)`]
118___
119$code.=<<___ if ($i>0 && $i<16);
120 add $a,$a,$t1 // h+=Sigma0(a)
121___
122$code.=<<___ if ($i>=11);
123 str @X[($i-8)&15],[sp,#`$SZ*(($i-8)%4)`]
124___
125# While ARMv8 specifies merged rotate-n-logical operation such as
126# 'eor x,y,z,ror#n', it was found to negatively affect performance
127# on Apple A7. The reason seems to be that it requires even 'y' to
128# be available earlier. This means that such merged instruction is
129# not necessarily best choice on critical path... On the other hand
130# Cortex-A5x handles merged instructions much better than disjoint
131# rotate and logical... See (**) footnote above.
132$code.=<<___ if ($i<15);
133 ror $t0,$e,#$Sigma1[0]
134 add $h,$h,$t2 // h+=K[i]
135 eor $T0,$e,$e,ror#`$Sigma1[2]-$Sigma1[1]`
136 and $t1,$f,$e
137 bic $t2,$g,$e
138 add $h,$h,@X[$i&15] // h+=X[i]
139 orr $t1,$t1,$t2 // Ch(e,f,g)
140 eor $t2,$a,$b // a^b, b^c in next round
141 eor $t0,$t0,$T0,ror#$Sigma1[1] // Sigma1(e)
142 ror $T0,$a,#$Sigma0[0]
143 add $h,$h,$t1 // h+=Ch(e,f,g)
144 eor $t1,$a,$a,ror#`$Sigma0[2]-$Sigma0[1]`
145 add $h,$h,$t0 // h+=Sigma1(e)
146 and $t3,$t3,$t2 // (b^c)&=(a^b)
147 add $d,$d,$h // d+=h
148 eor $t3,$t3,$b // Maj(a,b,c)
149 eor $t1,$T0,$t1,ror#$Sigma0[1] // Sigma0(a)
150 add $h,$h,$t3 // h+=Maj(a,b,c)
151 ldr $t3,[$Ktbl],#$SZ // *K++, $t2 in next round
152 //add $h,$h,$t1 // h+=Sigma0(a)
153___
154$code.=<<___ if ($i>=15);
155 ror $t0,$e,#$Sigma1[0]
156 add $h,$h,$t2 // h+=K[i]
157 ror $T1,@X[($j+1)&15],#$sigma0[0]
158 and $t1,$f,$e
159 ror $T2,@X[($j+14)&15],#$sigma1[0]
160 bic $t2,$g,$e
161 ror $T0,$a,#$Sigma0[0]
162 add $h,$h,@X[$i&15] // h+=X[i]
163 eor $t0,$t0,$e,ror#$Sigma1[1]
164 eor $T1,$T1,@X[($j+1)&15],ror#$sigma0[1]
165 orr $t1,$t1,$t2 // Ch(e,f,g)
166 eor $t2,$a,$b // a^b, b^c in next round
167 eor $t0,$t0,$e,ror#$Sigma1[2] // Sigma1(e)
168 eor $T0,$T0,$a,ror#$Sigma0[1]
169 add $h,$h,$t1 // h+=Ch(e,f,g)
170 and $t3,$t3,$t2 // (b^c)&=(a^b)
171 eor $T2,$T2,@X[($j+14)&15],ror#$sigma1[1]
172 eor $T1,$T1,@X[($j+1)&15],lsr#$sigma0[2] // sigma0(X[i+1])
173 add $h,$h,$t0 // h+=Sigma1(e)
174 eor $t3,$t3,$b // Maj(a,b,c)
175 eor $t1,$T0,$a,ror#$Sigma0[2] // Sigma0(a)
176 eor $T2,$T2,@X[($j+14)&15],lsr#$sigma1[2] // sigma1(X[i+14])
177 add @X[$j],@X[$j],@X[($j+9)&15]
178 add $d,$d,$h // d+=h
179 add $h,$h,$t3 // h+=Maj(a,b,c)
180 ldr $t3,[$Ktbl],#$SZ // *K++, $t2 in next round
181 add @X[$j],@X[$j],$T1
182 add $h,$h,$t1 // h+=Sigma0(a)
183 add @X[$j],@X[$j],$T2
184___
185 ($t2,$t3)=($t3,$t2);
186}
187
188$code.=<<___;
189#ifndef __KERNEL__
190# include "arm_arch.h"
191#endif
192
193.text
194
195.extern OPENSSL_armcap_P
196.hidden OPENSSL_armcap_P
197.globl $func
198.type $func,%function
199.align 6
200$func:
201#ifndef __KERNEL__
202# ifdef __ILP32__
203 ldrsw x16,.LOPENSSL_armcap_P
204# else
205 ldr x16,.LOPENSSL_armcap_P
206# endif
207 adr x17,.LOPENSSL_armcap_P
208 add x16,x16,x17
209 ldr w16,[x16]
210___
211$code.=<<___ if ($SZ==4);
212 tst w16,#ARMV8_SHA256
213 b.ne .Lv8_entry
214 tst w16,#ARMV7_NEON
215 b.ne .Lneon_entry
216___
217$code.=<<___ if ($SZ==8);
218 tst w16,#ARMV8_SHA512
219 b.ne .Lv8_entry
220___
221$code.=<<___;
222#endif
223 .inst 0xd503233f // paciasp
224 stp x29,x30,[sp,#-128]!
225 add x29,sp,#0
226
227 stp x19,x20,[sp,#16]
228 stp x21,x22,[sp,#32]
229 stp x23,x24,[sp,#48]
230 stp x25,x26,[sp,#64]
231 stp x27,x28,[sp,#80]
232 sub sp,sp,#4*$SZ
233
234 ldp $A,$B,[$ctx] // load context
235 ldp $C,$D,[$ctx,#2*$SZ]
236 ldp $E,$F,[$ctx,#4*$SZ]
237 add $num,$inp,$num,lsl#`log(16*$SZ)/log(2)` // end of input
238 ldp $G,$H,[$ctx,#6*$SZ]
239 adr $Ktbl,.LK$BITS
240 stp $ctx,$num,[x29,#96]
241
242.Loop:
243 ldp @X[0],@X[1],[$inp],#2*$SZ
244 ldr $t2,[$Ktbl],#$SZ // *K++
245 eor $t3,$B,$C // magic seed
246 str $inp,[x29,#112]
247___
248for ($i=0;$i<16;$i++) { &BODY_00_xx($i,@V); unshift(@V,pop(@V)); }
249$code.=".Loop_16_xx:\n";
250for (;$i<32;$i++) { &BODY_00_xx($i,@V); unshift(@V,pop(@V)); }
251$code.=<<___;
252 cbnz $t2,.Loop_16_xx
253
254 ldp $ctx,$num,[x29,#96]
255 ldr $inp,[x29,#112]
256 sub $Ktbl,$Ktbl,#`$SZ*($rounds+1)` // rewind
257
258 ldp @X[0],@X[1],[$ctx]
259 ldp @X[2],@X[3],[$ctx,#2*$SZ]
260 add $inp,$inp,#14*$SZ // advance input pointer
261 ldp @X[4],@X[5],[$ctx,#4*$SZ]
262 add $A,$A,@X[0]
263 ldp @X[6],@X[7],[$ctx,#6*$SZ]
264 add $B,$B,@X[1]
265 add $C,$C,@X[2]
266 add $D,$D,@X[3]
267 stp $A,$B,[$ctx]
268 add $E,$E,@X[4]
269 add $F,$F,@X[5]
270 stp $C,$D,[$ctx,#2*$SZ]
271 add $G,$G,@X[6]
272 add $H,$H,@X[7]
273 cmp $inp,$num
274 stp $E,$F,[$ctx,#4*$SZ]
275 stp $G,$H,[$ctx,#6*$SZ]
276 b.ne .Loop
277
278 ldp x19,x20,[x29,#16]
279 add sp,sp,#4*$SZ
280 ldp x21,x22,[x29,#32]
281 ldp x23,x24,[x29,#48]
282 ldp x25,x26,[x29,#64]
283 ldp x27,x28,[x29,#80]
284 ldp x29,x30,[sp],#128
285 .inst 0xd50323bf // autiasp
286 ret
287.size $func,.-$func
288
289.align 6
290.type .LK$BITS,%object
291.LK$BITS:
292___
293$code.=<<___ if ($SZ==8);
294 .quad 0x428a2f98d728ae22,0x7137449123ef65cd
295 .quad 0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc
296 .quad 0x3956c25bf348b538,0x59f111f1b605d019
297 .quad 0x923f82a4af194f9b,0xab1c5ed5da6d8118
298 .quad 0xd807aa98a3030242,0x12835b0145706fbe
299 .quad 0x243185be4ee4b28c,0x550c7dc3d5ffb4e2
300 .quad 0x72be5d74f27b896f,0x80deb1fe3b1696b1
301 .quad 0x9bdc06a725c71235,0xc19bf174cf692694
302 .quad 0xe49b69c19ef14ad2,0xefbe4786384f25e3
303 .quad 0x0fc19dc68b8cd5b5,0x240ca1cc77ac9c65
304 .quad 0x2de92c6f592b0275,0x4a7484aa6ea6e483
305 .quad 0x5cb0a9dcbd41fbd4,0x76f988da831153b5
306 .quad 0x983e5152ee66dfab,0xa831c66d2db43210
307 .quad 0xb00327c898fb213f,0xbf597fc7beef0ee4
308 .quad 0xc6e00bf33da88fc2,0xd5a79147930aa725
309 .quad 0x06ca6351e003826f,0x142929670a0e6e70
310 .quad 0x27b70a8546d22ffc,0x2e1b21385c26c926
311 .quad 0x4d2c6dfc5ac42aed,0x53380d139d95b3df
312 .quad 0x650a73548baf63de,0x766a0abb3c77b2a8
313 .quad 0x81c2c92e47edaee6,0x92722c851482353b
314 .quad 0xa2bfe8a14cf10364,0xa81a664bbc423001
315 .quad 0xc24b8b70d0f89791,0xc76c51a30654be30
316 .quad 0xd192e819d6ef5218,0xd69906245565a910
317 .quad 0xf40e35855771202a,0x106aa07032bbd1b8
318 .quad 0x19a4c116b8d2d0c8,0x1e376c085141ab53
319 .quad 0x2748774cdf8eeb99,0x34b0bcb5e19b48a8
320 .quad 0x391c0cb3c5c95a63,0x4ed8aa4ae3418acb
321 .quad 0x5b9cca4f7763e373,0x682e6ff3d6b2b8a3
322 .quad 0x748f82ee5defb2fc,0x78a5636f43172f60
323 .quad 0x84c87814a1f0ab72,0x8cc702081a6439ec
324 .quad 0x90befffa23631e28,0xa4506cebde82bde9
325 .quad 0xbef9a3f7b2c67915,0xc67178f2e372532b
326 .quad 0xca273eceea26619c,0xd186b8c721c0c207
327 .quad 0xeada7dd6cde0eb1e,0xf57d4f7fee6ed178
328 .quad 0x06f067aa72176fba,0x0a637dc5a2c898a6
329 .quad 0x113f9804bef90dae,0x1b710b35131c471b
330 .quad 0x28db77f523047d84,0x32caab7b40c72493
331 .quad 0x3c9ebe0a15c9bebc,0x431d67c49c100d4c
332 .quad 0x4cc5d4becb3e42b6,0x597f299cfc657e2a
333 .quad 0x5fcb6fab3ad6faec,0x6c44198c4a475817
334 .quad 0 // terminator
335___
336$code.=<<___ if ($SZ==4);
337 .long 0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5
338 .long 0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5
339 .long 0xd807aa98,0x12835b01,0x243185be,0x550c7dc3
340 .long 0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174
341 .long 0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc
342 .long 0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da
343 .long 0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7
344 .long 0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967
345 .long 0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13
346 .long 0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85
347 .long 0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3
348 .long 0xd192e819,0xd6990624,0xf40e3585,0x106aa070
349 .long 0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5
350 .long 0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3
351 .long 0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208
352 .long 0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2
353 .long 0 //terminator
354___
355$code.=<<___;
356.size .LK$BITS,.-.LK$BITS
357#ifndef __KERNEL__
358.align 3
359.LOPENSSL_armcap_P:
360# ifdef __ILP32__
361 .long OPENSSL_armcap_P-.
362# else
363 .quad OPENSSL_armcap_P-.
364# endif
365#endif
366.asciz "SHA$BITS block transform for ARMv8, CRYPTOGAMS by <appro\@openssl.org>"
367.align 2
368___
369
370if ($SZ==4) {
371my $Ktbl="x3";
372
373my ($ABCD,$EFGH,$abcd)=map("v$_.16b",(0..2));
374my @MSG=map("v$_.16b",(4..7));
375my ($W0,$W1)=("v16.4s","v17.4s");
376my ($ABCD_SAVE,$EFGH_SAVE)=("v18.16b","v19.16b");
377
378$code.=<<___;
379#ifndef __KERNEL__
380.type sha256_block_armv8,%function
381.align 6
382sha256_block_armv8:
383.Lv8_entry:
384 stp x29,x30,[sp,#-16]!
385 add x29,sp,#0
386
387 ld1.32 {$ABCD,$EFGH},[$ctx]
388 adr $Ktbl,.LK256
389
390.Loop_hw:
391 ld1 {@MSG[0]-@MSG[3]},[$inp],#64
392 sub $num,$num,#1
393 ld1.32 {$W0},[$Ktbl],#16
394 rev32 @MSG[0],@MSG[0]
395 rev32 @MSG[1],@MSG[1]
396 rev32 @MSG[2],@MSG[2]
397 rev32 @MSG[3],@MSG[3]
398 orr $ABCD_SAVE,$ABCD,$ABCD // offload
399 orr $EFGH_SAVE,$EFGH,$EFGH
400___
401for($i=0;$i<12;$i++) {
402$code.=<<___;
403 ld1.32 {$W1},[$Ktbl],#16
404 add.i32 $W0,$W0,@MSG[0]
405 sha256su0 @MSG[0],@MSG[1]
406 orr $abcd,$ABCD,$ABCD
407 sha256h $ABCD,$EFGH,$W0
408 sha256h2 $EFGH,$abcd,$W0
409 sha256su1 @MSG[0],@MSG[2],@MSG[3]
410___
411 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG));
412}
413$code.=<<___;
414 ld1.32 {$W1},[$Ktbl],#16
415 add.i32 $W0,$W0,@MSG[0]
416 orr $abcd,$ABCD,$ABCD
417 sha256h $ABCD,$EFGH,$W0
418 sha256h2 $EFGH,$abcd,$W0
419
420 ld1.32 {$W0},[$Ktbl],#16
421 add.i32 $W1,$W1,@MSG[1]
422 orr $abcd,$ABCD,$ABCD
423 sha256h $ABCD,$EFGH,$W1
424 sha256h2 $EFGH,$abcd,$W1
425
426 ld1.32 {$W1},[$Ktbl]
427 add.i32 $W0,$W0,@MSG[2]
428 sub $Ktbl,$Ktbl,#$rounds*$SZ-16 // rewind
429 orr $abcd,$ABCD,$ABCD
430 sha256h $ABCD,$EFGH,$W0
431 sha256h2 $EFGH,$abcd,$W0
432
433 add.i32 $W1,$W1,@MSG[3]
434 orr $abcd,$ABCD,$ABCD
435 sha256h $ABCD,$EFGH,$W1
436 sha256h2 $EFGH,$abcd,$W1
437
438 add.i32 $ABCD,$ABCD,$ABCD_SAVE
439 add.i32 $EFGH,$EFGH,$EFGH_SAVE
440
441 cbnz $num,.Loop_hw
442
443 st1.32 {$ABCD,$EFGH},[$ctx]
444
445 ldr x29,[sp],#16
446 ret
447.size sha256_block_armv8,.-sha256_block_armv8
448#endif
449___
450}
451
452if ($SZ==4) { ######################################### NEON stuff #
453# You'll surely note a lot of similarities with sha256-armv4 module,
454# and of course it's not a coincidence. sha256-armv4 was used as
455# initial template, but was adapted for ARMv8 instruction set and
456# extensively re-tuned for all-round performance.
457
458my @V = ($A,$B,$C,$D,$E,$F,$G,$H) = map("w$_",(3..10));
459my ($t0,$t1,$t2,$t3,$t4) = map("w$_",(11..15));
460my $Ktbl="x16";
461my $Xfer="x17";
462my @X = map("q$_",(0..3));
463my ($T0,$T1,$T2,$T3,$T4,$T5,$T6,$T7) = map("q$_",(4..7,16..19));
464my $j=0;
465
466sub AUTOLOAD() # thunk [simplified] x86-style perlasm
467{ my $opcode = $AUTOLOAD; $opcode =~ s/.*:://; $opcode =~ s/_/\./;
468 my $arg = pop;
469 $arg = "#$arg" if ($arg*1 eq $arg);
470 $code .= "\t$opcode\t".join(',',@_,$arg)."\n";
471}
472
473sub Dscalar { shift =~ m|[qv]([0-9]+)|?"d$1":""; }
474sub Dlo { shift =~ m|[qv]([0-9]+)|?"v$1.d[0]":""; }
475sub Dhi { shift =~ m|[qv]([0-9]+)|?"v$1.d[1]":""; }
476
477sub Xupdate()
478{ use integer;
479 my $body = shift;
480 my @insns = (&$body,&$body,&$body,&$body);
481 my ($a,$b,$c,$d,$e,$f,$g,$h);
482
483 &ext_8 ($T0,@X[0],@X[1],4); # X[1..4]
484 eval(shift(@insns));
485 eval(shift(@insns));
486 eval(shift(@insns));
487 &ext_8 ($T3,@X[2],@X[3],4); # X[9..12]
488 eval(shift(@insns));
489 eval(shift(@insns));
490 &mov (&Dscalar($T7),&Dhi(@X[3])); # X[14..15]
491 eval(shift(@insns));
492 eval(shift(@insns));
493 &ushr_32 ($T2,$T0,$sigma0[0]);
494 eval(shift(@insns));
495 &ushr_32 ($T1,$T0,$sigma0[2]);
496 eval(shift(@insns));
497 &add_32 (@X[0],@X[0],$T3); # X[0..3] += X[9..12]
498 eval(shift(@insns));
499 &sli_32 ($T2,$T0,32-$sigma0[0]);
500 eval(shift(@insns));
501 eval(shift(@insns));
502 &ushr_32 ($T3,$T0,$sigma0[1]);
503 eval(shift(@insns));
504 eval(shift(@insns));
505 &eor_8 ($T1,$T1,$T2);
506 eval(shift(@insns));
507 eval(shift(@insns));
508 &sli_32 ($T3,$T0,32-$sigma0[1]);
509 eval(shift(@insns));
510 eval(shift(@insns));
511 &ushr_32 ($T4,$T7,$sigma1[0]);
512 eval(shift(@insns));
513 eval(shift(@insns));
514 &eor_8 ($T1,$T1,$T3); # sigma0(X[1..4])
515 eval(shift(@insns));
516 eval(shift(@insns));
517 &sli_32 ($T4,$T7,32-$sigma1[0]);
518 eval(shift(@insns));
519 eval(shift(@insns));
520 &ushr_32 ($T5,$T7,$sigma1[2]);
521 eval(shift(@insns));
522 eval(shift(@insns));
523 &ushr_32 ($T3,$T7,$sigma1[1]);
524 eval(shift(@insns));
525 eval(shift(@insns));
526 &add_32 (@X[0],@X[0],$T1); # X[0..3] += sigma0(X[1..4])
527 eval(shift(@insns));
528 eval(shift(@insns));
529 &sli_u32 ($T3,$T7,32-$sigma1[1]);
530 eval(shift(@insns));
531 eval(shift(@insns));
532 &eor_8 ($T5,$T5,$T4);
533 eval(shift(@insns));
534 eval(shift(@insns));
535 eval(shift(@insns));
536 &eor_8 ($T5,$T5,$T3); # sigma1(X[14..15])
537 eval(shift(@insns));
538 eval(shift(@insns));
539 eval(shift(@insns));
540 &add_32 (@X[0],@X[0],$T5); # X[0..1] += sigma1(X[14..15])
541 eval(shift(@insns));
542 eval(shift(@insns));
543 eval(shift(@insns));
544 &ushr_32 ($T6,@X[0],$sigma1[0]);
545 eval(shift(@insns));
546 &ushr_32 ($T7,@X[0],$sigma1[2]);
547 eval(shift(@insns));
548 eval(shift(@insns));
549 &sli_32 ($T6,@X[0],32-$sigma1[0]);
550 eval(shift(@insns));
551 &ushr_32 ($T5,@X[0],$sigma1[1]);
552 eval(shift(@insns));
553 eval(shift(@insns));
554 &eor_8 ($T7,$T7,$T6);
555 eval(shift(@insns));
556 eval(shift(@insns));
557 &sli_32 ($T5,@X[0],32-$sigma1[1]);
558 eval(shift(@insns));
559 eval(shift(@insns));
560 &ld1_32 ("{$T0}","[$Ktbl], #16");
561 eval(shift(@insns));
562 &eor_8 ($T7,$T7,$T5); # sigma1(X[16..17])
563 eval(shift(@insns));
564 eval(shift(@insns));
565 &eor_8 ($T5,$T5,$T5);
566 eval(shift(@insns));
567 eval(shift(@insns));
568 &mov (&Dhi($T5), &Dlo($T7));
569 eval(shift(@insns));
570 eval(shift(@insns));
571 eval(shift(@insns));
572 &add_32 (@X[0],@X[0],$T5); # X[2..3] += sigma1(X[16..17])
573 eval(shift(@insns));
574 eval(shift(@insns));
575 eval(shift(@insns));
576 &add_32 ($T0,$T0,@X[0]);
577 while($#insns>=1) { eval(shift(@insns)); }
578 &st1_32 ("{$T0}","[$Xfer], #16");
579 eval(shift(@insns));
580
581 push(@X,shift(@X)); # "rotate" X[]
582}
583
584sub Xpreload()
585{ use integer;
586 my $body = shift;
587 my @insns = (&$body,&$body,&$body,&$body);
588 my ($a,$b,$c,$d,$e,$f,$g,$h);
589
590 eval(shift(@insns));
591 eval(shift(@insns));
592 &ld1_8 ("{@X[0]}","[$inp],#16");
593 eval(shift(@insns));
594 eval(shift(@insns));
595 &ld1_32 ("{$T0}","[$Ktbl],#16");
596 eval(shift(@insns));
597 eval(shift(@insns));
598 eval(shift(@insns));
599 eval(shift(@insns));
600 &rev32 (@X[0],@X[0]);
601 eval(shift(@insns));
602 eval(shift(@insns));
603 eval(shift(@insns));
604 eval(shift(@insns));
605 &add_32 ($T0,$T0,@X[0]);
606 foreach (@insns) { eval; } # remaining instructions
607 &st1_32 ("{$T0}","[$Xfer], #16");
608
609 push(@X,shift(@X)); # "rotate" X[]
610}
611
612sub body_00_15 () {
613 (
614 '($a,$b,$c,$d,$e,$f,$g,$h)=@V;'.
615 '&add ($h,$h,$t1)', # h+=X[i]+K[i]
616 '&add ($a,$a,$t4);'. # h+=Sigma0(a) from the past
617 '&and ($t1,$f,$e)',
618 '&bic ($t4,$g,$e)',
619 '&eor ($t0,$e,$e,"ror#".($Sigma1[1]-$Sigma1[0]))',
620 '&add ($a,$a,$t2)', # h+=Maj(a,b,c) from the past
621 '&orr ($t1,$t1,$t4)', # Ch(e,f,g)
622 '&eor ($t0,$t0,$e,"ror#".($Sigma1[2]-$Sigma1[0]))', # Sigma1(e)
623 '&eor ($t4,$a,$a,"ror#".($Sigma0[1]-$Sigma0[0]))',
624 '&add ($h,$h,$t1)', # h+=Ch(e,f,g)
625 '&ror ($t0,$t0,"#$Sigma1[0]")',
626 '&eor ($t2,$a,$b)', # a^b, b^c in next round
627 '&eor ($t4,$t4,$a,"ror#".($Sigma0[2]-$Sigma0[0]))', # Sigma0(a)
628 '&add ($h,$h,$t0)', # h+=Sigma1(e)
629 '&ldr ($t1,sprintf "[sp,#%d]",4*(($j+1)&15)) if (($j&15)!=15);'.
630 '&ldr ($t1,"[$Ktbl]") if ($j==15);'.
631 '&and ($t3,$t3,$t2)', # (b^c)&=(a^b)
632 '&ror ($t4,$t4,"#$Sigma0[0]")',
633 '&add ($d,$d,$h)', # d+=h
634 '&eor ($t3,$t3,$b)', # Maj(a,b,c)
635 '$j++; unshift(@V,pop(@V)); ($t2,$t3)=($t3,$t2);'
636 )
637}
638
639$code.=<<___;
640#ifdef __KERNEL__
641.globl sha256_block_neon
642#endif
643.type sha256_block_neon,%function
644.align 4
645sha256_block_neon:
646.Lneon_entry:
647 stp x29, x30, [sp, #-16]!
648 mov x29, sp
649 sub sp,sp,#16*4
650
651 adr $Ktbl,.LK256
652 add $num,$inp,$num,lsl#6 // len to point at the end of inp
653
654 ld1.8 {@X[0]},[$inp], #16
655 ld1.8 {@X[1]},[$inp], #16
656 ld1.8 {@X[2]},[$inp], #16
657 ld1.8 {@X[3]},[$inp], #16
658 ld1.32 {$T0},[$Ktbl], #16
659 ld1.32 {$T1},[$Ktbl], #16
660 ld1.32 {$T2},[$Ktbl], #16
661 ld1.32 {$T3},[$Ktbl], #16
662 rev32 @X[0],@X[0] // yes, even on
663 rev32 @X[1],@X[1] // big-endian
664 rev32 @X[2],@X[2]
665 rev32 @X[3],@X[3]
666 mov $Xfer,sp
667 add.32 $T0,$T0,@X[0]
668 add.32 $T1,$T1,@X[1]
669 add.32 $T2,$T2,@X[2]
670 st1.32 {$T0-$T1},[$Xfer], #32
671 add.32 $T3,$T3,@X[3]
672 st1.32 {$T2-$T3},[$Xfer]
673 sub $Xfer,$Xfer,#32
674
675 ldp $A,$B,[$ctx]
676 ldp $C,$D,[$ctx,#8]
677 ldp $E,$F,[$ctx,#16]
678 ldp $G,$H,[$ctx,#24]
679 ldr $t1,[sp,#0]
680 mov $t2,wzr
681 eor $t3,$B,$C
682 mov $t4,wzr
683 b .L_00_48
684
685.align 4
686.L_00_48:
687___
688 &Xupdate(\&body_00_15);
689 &Xupdate(\&body_00_15);
690 &Xupdate(\&body_00_15);
691 &Xupdate(\&body_00_15);
692$code.=<<___;
693 cmp $t1,#0 // check for K256 terminator
694 ldr $t1,[sp,#0]
695 sub $Xfer,$Xfer,#64
696 bne .L_00_48
697
698 sub $Ktbl,$Ktbl,#256 // rewind $Ktbl
699 cmp $inp,$num
700 mov $Xfer, #64
701 csel $Xfer, $Xfer, xzr, eq
702 sub $inp,$inp,$Xfer // avoid SEGV
703 mov $Xfer,sp
704___
705 &Xpreload(\&body_00_15);
706 &Xpreload(\&body_00_15);
707 &Xpreload(\&body_00_15);
708 &Xpreload(\&body_00_15);
709$code.=<<___;
710 add $A,$A,$t4 // h+=Sigma0(a) from the past
711 ldp $t0,$t1,[$ctx,#0]
712 add $A,$A,$t2 // h+=Maj(a,b,c) from the past
713 ldp $t2,$t3,[$ctx,#8]
714 add $A,$A,$t0 // accumulate
715 add $B,$B,$t1
716 ldp $t0,$t1,[$ctx,#16]
717 add $C,$C,$t2
718 add $D,$D,$t3
719 ldp $t2,$t3,[$ctx,#24]
720 add $E,$E,$t0
721 add $F,$F,$t1
722 ldr $t1,[sp,#0]
723 stp $A,$B,[$ctx,#0]
724 add $G,$G,$t2
725 mov $t2,wzr
726 stp $C,$D,[$ctx,#8]
727 add $H,$H,$t3
728 stp $E,$F,[$ctx,#16]
729 eor $t3,$B,$C
730 stp $G,$H,[$ctx,#24]
731 mov $t4,wzr
732 mov $Xfer,sp
733 b.ne .L_00_48
734
735 ldr x29,[x29]
736 add sp,sp,#16*4+16
737 ret
738.size sha256_block_neon,.-sha256_block_neon
739___
740}
741
742if ($SZ==8) {
743my $Ktbl="x3";
744
745my @H = map("v$_.16b",(0..4));
746my ($fg,$de,$m9_10)=map("v$_.16b",(5..7));
747my @MSG=map("v$_.16b",(16..23));
748my ($W0,$W1)=("v24.2d","v25.2d");
749my ($AB,$CD,$EF,$GH)=map("v$_.16b",(26..29));
750
751$code.=<<___;
752#ifndef __KERNEL__
753.type sha512_block_armv8,%function
754.align 6
755sha512_block_armv8:
756.Lv8_entry:
757 stp x29,x30,[sp,#-16]!
758 add x29,sp,#0
759
760 ld1 {@MSG[0]-@MSG[3]},[$inp],#64 // load input
761 ld1 {@MSG[4]-@MSG[7]},[$inp],#64
762
763 ld1.64 {@H[0]-@H[3]},[$ctx] // load context
764 adr $Ktbl,.LK512
765
766 rev64 @MSG[0],@MSG[0]
767 rev64 @MSG[1],@MSG[1]
768 rev64 @MSG[2],@MSG[2]
769 rev64 @MSG[3],@MSG[3]
770 rev64 @MSG[4],@MSG[4]
771 rev64 @MSG[5],@MSG[5]
772 rev64 @MSG[6],@MSG[6]
773 rev64 @MSG[7],@MSG[7]
774 b .Loop_hw
775
776.align 4
777.Loop_hw:
778 ld1.64 {$W0},[$Ktbl],#16
779 subs $num,$num,#1
780 sub x4,$inp,#128
781 orr $AB,@H[0],@H[0] // offload
782 orr $CD,@H[1],@H[1]
783 orr $EF,@H[2],@H[2]
784 orr $GH,@H[3],@H[3]
785 csel $inp,$inp,x4,ne // conditional rewind
786___
787for($i=0;$i<32;$i++) {
788$code.=<<___;
789 add.i64 $W0,$W0,@MSG[0]
790 ld1.64 {$W1},[$Ktbl],#16
791 ext $W0,$W0,$W0,#8
792 ext $fg,@H[2],@H[3],#8
793 ext $de,@H[1],@H[2],#8
794 add.i64 @H[3],@H[3],$W0 // "T1 + H + K512[i]"
795 sha512su0 @MSG[0],@MSG[1]
796 ext $m9_10,@MSG[4],@MSG[5],#8
797 sha512h @H[3],$fg,$de
798 sha512su1 @MSG[0],@MSG[7],$m9_10
799 add.i64 @H[4],@H[1],@H[3] // "D + T1"
800 sha512h2 @H[3],$H[1],@H[0]
801___
802 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG));
803 @H = (@H[3],@H[0],@H[4],@H[2],@H[1]);
804}
805for(;$i<40;$i++) {
806$code.=<<___ if ($i<39);
807 ld1.64 {$W1},[$Ktbl],#16
808___
809$code.=<<___ if ($i==39);
810 sub $Ktbl,$Ktbl,#$rounds*$SZ // rewind
811___
812$code.=<<___;
813 add.i64 $W0,$W0,@MSG[0]
814 ld1 {@MSG[0]},[$inp],#16 // load next input
815 ext $W0,$W0,$W0,#8
816 ext $fg,@H[2],@H[3],#8
817 ext $de,@H[1],@H[2],#8
818 add.i64 @H[3],@H[3],$W0 // "T1 + H + K512[i]"
819 sha512h @H[3],$fg,$de
820 rev64 @MSG[0],@MSG[0]
821 add.i64 @H[4],@H[1],@H[3] // "D + T1"
822 sha512h2 @H[3],$H[1],@H[0]
823___
824 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG));
825 @H = (@H[3],@H[0],@H[4],@H[2],@H[1]);
826}
827$code.=<<___;
828 add.i64 @H[0],@H[0],$AB // accumulate
829 add.i64 @H[1],@H[1],$CD
830 add.i64 @H[2],@H[2],$EF
831 add.i64 @H[3],@H[3],$GH
832
833 cbnz $num,.Loop_hw
834
835 st1.64 {@H[0]-@H[3]},[$ctx] // store context
836
837 ldr x29,[sp],#16
838 ret
839.size sha512_block_armv8,.-sha512_block_armv8
840#endif
841___
842}
843
844{ my %opcode = (
845 "sha256h" => 0x5e004000, "sha256h2" => 0x5e005000,
846 "sha256su0" => 0x5e282800, "sha256su1" => 0x5e006000 );
847
848 sub unsha256 {
849 my ($mnemonic,$arg)=@_;
850
851 $arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)[^,]*(?:,\s*[qv]([0-9]+))?/o
852 &&
853 sprintf ".inst\t0x%08x\t//%s %s",
854 $opcode{$mnemonic}|$1|($2<<5)|($3<<16),
855 $mnemonic,$arg;
856 }
857}
858
859{ my %opcode = (
860 "sha512h" => 0xce608000, "sha512h2" => 0xce608400,
861 "sha512su0" => 0xcec08000, "sha512su1" => 0xce608800 );
862
863 sub unsha512 {
864 my ($mnemonic,$arg)=@_;
865
866 $arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)[^,]*(?:,\s*[qv]([0-9]+))?/o
867 &&
868 sprintf ".inst\t0x%08x\t//%s %s",
869 $opcode{$mnemonic}|$1|($2<<5)|($3<<16),
870 $mnemonic,$arg;
871 }
872}
873
874open SELF,$0;
875while(<SELF>) {
876 next if (/^#!/);
877 last if (!s/^#/\/\// and !/^$/);
878 print;
879}
880close SELF;
881
882foreach(split("\n",$code)) {
883
884 s/\`([^\`]*)\`/eval($1)/ge;
885
886 s/\b(sha512\w+)\s+([qv].*)/unsha512($1,$2)/ge or
887 s/\b(sha256\w+)\s+([qv].*)/unsha256($1,$2)/ge;
888
889 s/\bq([0-9]+)\b/v$1.16b/g; # old->new registers
890
891 s/\.[ui]?8(\s)/$1/;
892 s/\.\w?64\b// and s/\.16b/\.2d/g or
893 s/\.\w?32\b// and s/\.16b/\.4s/g;
894 m/\bext\b/ and s/\.2d/\.16b/g or
895 m/(ld|st)1[^\[]+\[0\]/ and s/\.4s/\.s/g;
896
897 print $_,"\n";
898}
899
900close STDOUT or die "error closing STDOUT: $!";
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