bs3-fpustate-1-template.c@ 92530

最後變更在這個檔案從92530是 92530,由 vboxsync 提交於 3 年前
ValKit/bs3-fpustate-1: Skip the SIDT test, doesn't work for KVM. bugref:9044
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1	/* $Id: bs3-fpustate-1-template.c 92530 2021-11-21 02:47:19Z vboxsync $ */
2	/** @file
3	* BS3Kit - bs3-fpustate-1, C code template.
4	*/
5
6	/*
7	* Copyright (C) 2007-2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.alldomusa.eu.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* The contents of this file may alternatively be used under the terms
18	* of the Common Development and Distribution License Version 1.0
19	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20	* VirtualBox OSE distribution, in which case the provisions of the
21	* CDDL are applicable instead of those of the GPL.
22	*
23	* You may elect to license modified versions of this file under the
24	* terms and conditions of either the GPL or the CDDL or both.
25	*/
26
27
28	/*********************************************************************************************************************************
29	* Header Files *
30	*********************************************************************************************************************************/
31	#include <iprt/asm.h>
32	#include <iprt/asm-amd64-x86.h>
33	#include <VBox/VMMDevTesting.h>
34
35
36	/*********************************************************************************************************************************
37	* Defined Constants And Macros *
38	*********************************************************************************************************************************/
39
40
41	#ifdef BS3_INSTANTIATING_CMN
42
43	/**
44	* Displays the differences between the two states.
45	*/
46	# define bs3FpuState1_Diff BS3_CMN_NM(bs3FpuState1_Diff)
47	BS3_DECL_NEAR(void) bs3FpuState1_Diff(X86FXSTATE const BS3_FAR pExpected, X86FXSTATE const BS3_FAR pChecking)
48	{
49	unsigned i;
50
51	# define CHECK(a_Member, a_Fmt) \
52	if (pExpected->a_Member != pChecking->a_Member) \
53	Bs3TestPrintf(" " #a_Member ": " a_Fmt ", expected " a_Fmt "\n", pChecking->a_Member, pExpected->a_Member); \
54	else do { } while (0)
55	CHECK(FCW, "%#RX16");
56	CHECK(FSW, "%#RX16");
57	CHECK(FTW, "%#RX16");
58	CHECK(FOP, "%#RX16");
59	CHECK(FPUIP, "%#RX32");
60	CHECK(CS, "%#RX16");
61	CHECK(Rsrvd1, "%#RX16");
62	CHECK(FPUDP, "%#RX32");
63	CHECK(DS, "%#RX16");
64	CHECK(Rsrvd2, "%#RX16");
65	CHECK(MXCSR, "%#RX32");
66	CHECK(MXCSR_MASK, "%#RX32");
67	# undef CHECK
68	for (i = 0; i < RT_ELEMENTS(pExpected->aRegs); i++)
69	if ( pChecking->aRegs[i].au64[0] != pExpected->aRegs[i].au64[0]
70	\|\| pChecking->aRegs[i].au64[1] != pExpected->aRegs[i].au64[1])
71	Bs3TestPrintf("st%u: %.16Rhxs\n"
72	"exp: %.16Rhxs\n",
73	i, &pChecking->aRegs[i], &pExpected->aRegs[i]);
74	for (i = 0; i < RT_ELEMENTS(pExpected->aXMM); i++)
75	if ( pChecking->aXMM[i].au64[0] != pExpected->aXMM[i].au64[0]
76	\|\| pChecking->aXMM[i].au64[1] != pExpected->aXMM[i].au64[1])
77	Bs3TestPrintf("xmm%u: %.16Rhxs\n"
78	" %sexp: %.16Rhxs\n",
79	i, &pChecking->aRegs[i], &pExpected->aRegs[i], i >= 10 ? " " : "");
80	}
81
82
83	#endif /* BS3_INSTANTIATING_CMN */
84
85
86	/*
87	* Mode specific code.
88	* Mode specific code.
89	* Mode specific code.
90	*/
91	#ifdef BS3_INSTANTIATING_MODE
92	# if TMPL_MODE == BS3_MODE_PE32 \
93	\|\| TMPL_MODE == BS3_MODE_PP32 \
94	\|\| TMPL_MODE == BS3_MODE_PAE32 \
95	\|\| TMPL_MODE == BS3_MODE_LM64 \
96	\|\| TMPL_MODE == BS3_MODE_RM
97
98	/* Assembly helpers: */
99	BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_InitState)(X86FXSTATE BS3_FAR pFxState, void BS3_FAR pvMmioReg);
100	BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_Restore)(X86FXSTATE const BS3_FAR *pFxState);
101	BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_Save)(X86FXSTATE BS3_FAR *pFxState);
102
103	BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_FNStEnv)(void BS3_FAR *pvMmioReg);
104	BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovDQU_Read)(void BS3_FAR pvMmioReg, void BS3_FAR pvResult);
105	BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovDQU_Write)(void BS3_FAR *pvMmioReg);
106	BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovUPS_Read)(void BS3_FAR pvMmioReg, void BS3_FAR pvResult);
107	BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovUPS_Write)(void BS3_FAR *pvMmioReg);
108	BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_FMul)(void BS3_FAR pvMmioReg, void BS3_FAR pvNoResult);
109
110
111	/**
112	* Tests for FPU state corruption.
113	*
114	* First we don't do anything to quit guest context for a while.
115	* Then we start testing weird MMIO accesses, some which amonger other things
116	* forces the use of the FPU state or host FPU to do the emulation. Both are a
117	* little complicated in raw-mode and ring-0 contexts.
118	*
119	* We ASSUME FXSAVE/FXRSTOR support here.
120	*/
121	BS3_DECL_FAR(uint8_t) TMPL_NM(bs3FpuState1_Corruption)(uint8_t bMode)
122	{
123	/* We don't need to test that many modes, probably. */
124
125	uint8_t abBuf[sizeof(X86FXSTATE)*2 + 32];
126	uint8_t BS3_FAR *pbTmp = &abBuf[0x10 - (((uintptr_t)abBuf) & 0x0f)];
127	X86FXSTATE BS3_FAR pExpected = (X86FXSTATE BS3_FAR )pbTmp;
128	X86FXSTATE BS3_FAR *pChecking = pExpected + 1;
129	uint32_t iLoop;
130	uint32_t uStartTick;
131	bool fMmioReadback;
132	bool fReadBackError = false;
133	bool fReadError = false;
134	BS3PTRUNION MmioReg;
135	BS3CPUVENDOR const enmCpuVendor = Bs3GetCpuVendor();
136	bool const fSkipStorIdt = Bs3TestQueryCfgBool(VMMDEV_TESTING_CFG_IS_NEM_LINUX);
137	bool const fFastFxSaveRestore = RT_BOOL(ASMCpuId_EDX(0x80000001) & X86_CPUID_AMD_FEATURE_EDX_FFXSR);
138	//bool const fFdpXcptOnly = (ASMCpuIdEx_EBX(7, 0) & X86_CPUID_STEXT_FEATURE_EBX_FDP_EXCPTN_ONLY)
139	// && ASMCpuId_EAX(0) >= 7;
140
141	if (fSkipStorIdt)
142	Bs3TestPrintf("NEM/linux - skipping SIDT\n");
143
144	# undef CHECK_STATE
145	# define CHECK_STATE(a_Instr) \
146	do { \
147	TMPL_NM(bs3FpuState1_Save)(pChecking); \
148	if (Bs3MemCmp(pExpected, pChecking, sizeof(*pExpected)) != 0) \
149	{ \
150	Bs3TestFailedF("State differs after " #a_Instr " (write) in loop #%RU32\n", iLoop); \
151	bs3FpuState1_Diff(pExpected, pChecking); \
152	Bs3PitDisable(); \
153	return 1; \
154	} \
155	} while (0)
156
157
158	/* Make this code executable in raw-mode. A bit tricky. */
159	ASMSetCR0(ASMGetCR0() \| X86_CR0_WP);
160	Bs3PitSetupAndEnablePeriodTimer(20);
161	ASMIntEnable();
162	# if ARCH_BITS != 64
163	ASMHalt();
164	# endif
165
166	/* Figure out which MMIO region we'll be using so we can correctly initialize FPUDS. */
167	# if BS3_MODE_IS_RM_OR_V86(TMPL_MODE)
168	MmioReg.pv = BS3_FP_MAKE(VMMDEV_TESTING_MMIO_RM_SEL, VMMDEV_TESTING_MMIO_RM_OFF2(0));
169	# elif BS3_MODE_IS_16BIT_CODE(TMPL_MODE)
170	MmioReg.pv = BS3_FP_MAKE(BS3_SEL_VMMDEV_MMIO16, 0);
171	# else
172	MmioReg.pv = (uint8_t *)VMMDEV_TESTING_MMIO_BASE;
173	# endif
174	if (MmioReg.pu32[VMMDEV_TESTING_MMIO_OFF_NOP / sizeof(uint32_t)] == VMMDEV_TESTING_NOP_RET)
175	{
176	fMmioReadback = true;
177	MmioReg.pb += VMMDEV_TESTING_MMIO_OFF_READBACK;
178	}
179	else
180	{
181	Bs3TestPrintf("VMMDev MMIO not found, using VGA instead\n");
182	fMmioReadback = false;
183	MmioReg.pv = Bs3XptrFlatToCurrent(0xa7800);
184	}
185
186	/* Make 100% sure we don't trap accessing the FPU state and that we can use fxsave/fxrstor. */
187	g_usBs3TestStep = 1;
188	ASMSetCR0((ASMGetCR0() & ~(X86_CR0_TS \| X86_CR0_EM)) \| X86_CR0_MP);
189	ASMSetCR4(ASMGetCR4() \| X86_CR4_OSFXSR /\| X86_CR4_OSXMMEEXCPT/);
190
191	/* Come up with a distinct state. We do that from assembly (will do FPU in R0/RC). */
192	g_usBs3TestStep = 2;
193	Bs3MemSet(abBuf, 0x42, sizeof(abBuf));
194	TMPL_NM(bs3FpuState1_InitState)(pExpected, MmioReg.pb);
195
196
197	/*
198	* Test #1: Check that we can keep it consistent for a while.
199	*/
200	g_usBs3TestStep = 3;
201	uStartTick = g_cBs3PitTicks;
202	for (iLoop = 0; iLoop < _16M; iLoop++)
203	{
204	CHECK_STATE(nop);
205	if ( (iLoop & 0xffff) == 0xffff
206	&& g_cBs3PitTicks - uStartTick >= 20 * 20) /* 20 seconds*/
207	break;
208	}
209
210	/*
211	* Test #2: Use various FPU, SSE and weird instructions to do MMIO writes.
212	*
213	* We'll use the VMMDev readback register if possible, but make do
214	* with VGA if not configured.
215	*/
216	g_usBs3TestStep = 4;
217	uStartTick = g_cBs3PitTicks;
218	for (iLoop = 0; iLoop < _1M; iLoop++)
219	{
220	unsigned off;
221	uint8_t abCompare[64];
222	uint8_t abReadback[64];
223
224	/* Macros */
225	# undef CHECK_READBACK_WRITE_RUN
226	# define CHECK_READBACK_WRITE_RUN(a_Instr, a_Worker, a_Type) \
227	do { \
228	off = (unsigned)(iLoop & (VMMDEV_TESTING_READBACK_SIZE / 2 - 1)); \
229	if (off + sizeof(a_Type) > VMMDEV_TESTING_READBACK_SIZE) \
230	off = VMMDEV_TESTING_READBACK_SIZE - sizeof(a_Type); \
231	a_Worker((a_Type *)&MmioReg.pb[off]); \
232	if (fMmioReadback && (!fReadBackError \|\| iLoop == 0)) \
233	{ \
234	a_Worker((a_Type *)&abCompare[0]); \
235	Bs3MemCpy(abReadback, &MmioReg.pb[off], sizeof(a_Type)); \
236	if (Bs3MemCmp(abReadback, abCompare, sizeof(a_Type)) != 0) \
237	{ \
238	Bs3TestFailedF("Read back error for " #a_Instr " in loop #%RU32:\n%.Rhxs expected:\n%.Rhxs\n", \
239	iLoop, sizeof(a_Type), abReadback, sizeof(a_Type), abCompare); \
240	fReadBackError = true; \
241	} \
242	} \
243	} while (0)
244
245	# undef CHECK_READBACK_WRITE
246	# define CHECK_READBACK_WRITE(a_Instr, a_Worker, a_Type) \
247	CHECK_READBACK_WRITE_RUN(a_Instr, a_Worker, a_Type); \
248	CHECK_STATE(a_Instr)
249	# undef CHECK_READBACK_WRITE_Z
250	# define CHECK_READBACK_WRITE_Z(a_Instr, a_Worker, a_Type) \
251	do { \
252	if (fMmioReadback && (!fReadBackError \|\| iLoop == 0)) \
253	{ \
254	Bs3MemZero(&abCompare[0], sizeof(a_Type)); \
255	off = (unsigned)(iLoop & (VMMDEV_TESTING_READBACK_SIZE / 2 - 1)); \
256	if (off + sizeof(a_Type) > VMMDEV_TESTING_READBACK_SIZE) \
257	off = VMMDEV_TESTING_READBACK_SIZE - sizeof(a_Type); \
258	Bs3MemZero(&MmioReg.pb[off], sizeof(a_Type)); \
259	} \
260	CHECK_READBACK_WRITE(a_Instr, a_Worker, a_Type); \
261	} while (0)
262
263	# undef CHECK_READBACK_READ_RUN
264	#define CHECK_READBACK_READ_RUN(a_Instr, a_Worker, a_Type) \
265	do { \
266	off = (unsigned)(iLoop & (VMMDEV_TESTING_READBACK_SIZE / 2 - 1)); \
267	if (off + sizeof(a_Type) > VMMDEV_TESTING_READBACK_SIZE) \
268	off = VMMDEV_TESTING_READBACK_SIZE - sizeof(a_Type); \
269	a_Worker((a_Type )&MmioReg.pb[off], (a_Type )&abReadback[0]); \
270	TMPL_NM(bs3FpuState1_Save)(pChecking); \
271	} while (0)
272	# undef CHECK_READBACK_READ
273	# define CHECK_READBACK_READ(a_Instr, a_Worker, a_Type) \
274	do { \
275	Bs3MemSet(&abReadback[0], 0xcc, sizeof(abReadback)); \
276	CHECK_READBACK_READ_RUN(a_Instr, a_Worker, a_Type); \
277	CHECK_STATE(a_Instr); \
278	if (!fReadError \|\| iLoop == 0) \
279	{ \
280	Bs3MemZero(&abCompare[0], sizeof(abCompare)); \
281	Bs3MemCpy(&abCompare[0], &MmioReg.pb[off], sizeof(a_Type)); \
282	if (Bs3MemCmp(abReadback, abCompare, sizeof(a_Type)) != 0) \
283	{ \
284	Bs3TestFailedF("Read result check for " #a_Instr " in loop #%RU32:\n%.Rhxs expected:\n%.Rhxs\n", \
285	iLoop, sizeof(a_Type), abReadback, sizeof(a_Type), abCompare); \
286	fReadError = true; \
287	} \
288	} \
289	} while (0)
290
291	/* The tests. */
292	if (!fSkipStorIdt) /* KVM doesn't advance RIP executing a SIDT [MMIO-memory], it seems. (Linux 5.13.1) */
293	CHECK_READBACK_WRITE_Z(SIDT, ASMGetIDTR, RTIDTR);
294	CHECK_READBACK_WRITE_Z(FNSTENV, TMPL_NM(bs3FpuState1_FNStEnv), X86FSTENV32P); /** @todo x86.h is missing types */
295	CHECK_READBACK_WRITE( MOVDQU, TMPL_NM(bs3FpuState1_MovDQU_Write), X86XMMREG);
296	CHECK_READBACK_READ( MOVDQU, TMPL_NM(bs3FpuState1_MovDQU_Read), X86XMMREG);
297	CHECK_READBACK_WRITE( MOVUPS, TMPL_NM(bs3FpuState1_MovUPS_Write), X86XMMREG);
298	CHECK_READBACK_READ( MOVUPS, TMPL_NM(bs3FpuState1_MovUPS_Read), X86XMMREG);
299
300	/* Using the FPU is a little complicated, but we really need to check these things. */
301	CHECK_READBACK_READ_RUN(FMUL, TMPL_NM(bs3FpuState1_FMul), uint64_t);
302	if (enmCpuVendor == BS3CPUVENDOR_INTEL)
303	# if BS3_MODE_IS_16BIT_CODE(TMPL_MODE)
304	pExpected->FOP = 0x040f; // skylake 6700k
305	# else
306	pExpected->FOP = 0x040b; // skylake 6700k
307	# endif
308	else if (enmCpuVendor == BS3CPUVENDOR_AMD && fFastFxSaveRestore)
309	pExpected->FOP = 0x0000; // Zen2 (3990x)
310	else
311	pExpected->FOP = 0x07dc; // dunno where we got this.
312	# if ARCH_BITS == 64
313	pExpected->FPUDP = (uint32_t) (uintptr_t)&MmioReg.pb[off];
314	pExpected->DS = (uint16_t)((uintptr_t)&MmioReg.pb[off] >> 32);
315	pExpected->Rsrvd2 = (uint16_t)((uintptr_t)&MmioReg.pb[off] >> 48);
316	# elif BS3_MODE_IS_RM_OR_V86(TMPL_MODE)
317	pExpected->FPUDP = Bs3SelPtrToFlat(&MmioReg.pb[off]);
318	# else
319	pExpected->FPUDP = BS3_FP_OFF(&MmioReg.pb[off]);
320	# endif
321	if (enmCpuVendor == BS3CPUVENDOR_AMD && fFastFxSaveRestore)
322	pExpected->FPUDP = 0; // Zen2 (3990x)
323	CHECK_STATE(FMUL);
324
325	/* check for timeout every now an then. */
326	if ( (iLoop & 0xfff) == 0xfff
327	&& g_cBs3PitTicks - uStartTick >= 20 * 20) /* 20 seconds*/
328	break;
329	}
330
331	Bs3PitDisable();
332	return 0;
333	}
334	# endif
335	#endif /* BS3_INSTANTIATING_MODE */
336

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