IEMInternal.h@ 42407

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1	/* $Id: IEMInternal.h 42193 2012-07-17 14:34:30Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.alldomusa.eu.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/stam.h>
22	#include <VBox/vmm/cpum.h>
23	#include <VBox/param.h>
24
25
26	RT_C_DECLS_BEGIN
27
28
29	/** @defgroup grp_iem_int Internals
30	* @ingroup grp_iem
31	* @internal
32	* @{
33	*/
34
35
36	/** Finish and move to types.h */
37	typedef union
38	{
39	uint32_t u32;
40	} RTFLOAT32U;
41	typedef RTFLOAT32U *PRTFLOAT32U;
42	typedef RTFLOAT32U const *PCRTFLOAT32U;
43
44
45	/**
46	* Operand or addressing mode.
47	*/
48	typedef enum IEMMODE
49	{
50	IEMMODE_16BIT = 0,
51	IEMMODE_32BIT,
52	IEMMODE_64BIT
53	} IEMMODE;
54	AssertCompileSize(IEMMODE, 4);
55
56	/**
57	* Extended operand mode that includes a representation of 8-bit.
58	*
59	* This is used for packing down modes when invoking some C instruction
60	* implementations.
61	*/
62	typedef enum IEMMODEX
63	{
64	IEMMODEX_16BIT = IEMMODE_16BIT,
65	IEMMODEX_32BIT = IEMMODE_32BIT,
66	IEMMODEX_64BIT = IEMMODE_64BIT,
67	IEMMODEX_8BIT
68	} IEMMODEX;
69	AssertCompileSize(IEMMODEX, 4);
70
71
72	/**
73	* Branch types.
74	*/
75	typedef enum IEMBRANCH
76	{
77	IEMBRANCH_JUMP = 1,
78	IEMBRANCH_CALL,
79	IEMBRANCH_TRAP,
80	IEMBRANCH_SOFTWARE_INT,
81	IEMBRANCH_HARDWARE_INT
82	} IEMBRANCH;
83	AssertCompileSize(IEMBRANCH, 4);
84
85
86	/**
87	* A FPU result.
88	*/
89	typedef struct IEMFPURESULT
90	{
91	/** The output value. */
92	RTFLOAT80U r80Result;
93	/** The output status. */
94	uint16_t FSW;
95	} IEMFPURESULT;
96	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
97	/** Pointer to a FPU result. */
98	typedef IEMFPURESULT *PIEMFPURESULT;
99	/** Pointer to a const FPU result. */
100	typedef IEMFPURESULT const *PCIEMFPURESULT;
101
102
103	/**
104	* A FPU result consisting of two output values and FSW.
105	*/
106	typedef struct IEMFPURESULTTWO
107	{
108	/** The first output value. */
109	RTFLOAT80U r80Result1;
110	/** The output status. */
111	uint16_t FSW;
112	/** The second output value. */
113	RTFLOAT80U r80Result2;
114	} IEMFPURESULTTWO;
115	AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
116	AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
117	/** Pointer to a FPU result consisting of two output values and FSW. */
118	typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
119	/** Pointer to a const FPU result consisting of two output values and FSW. */
120	typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
121
122
123	#ifdef IEM_VERIFICATION_MODE
124
125	/**
126	* Verification event type.
127	*/
128	typedef enum IEMVERIFYEVENT
129	{
130	IEMVERIFYEVENT_INVALID = 0,
131	IEMVERIFYEVENT_IOPORT_READ,
132	IEMVERIFYEVENT_IOPORT_WRITE,
133	IEMVERIFYEVENT_RAM_WRITE,
134	IEMVERIFYEVENT_RAM_READ
135	} IEMVERIFYEVENT;
136
137	/** Checks if the event type is a RAM read or write. */
138	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
139
140	/**
141	* Verification event record.
142	*/
143	typedef struct IEMVERIFYEVTREC
144	{
145	/** Pointer to the next record in the list. */
146	struct IEMVERIFYEVTREC *pNext;
147	/** The event type. */
148	IEMVERIFYEVENT enmEvent;
149	/** The event data. */
150	union
151	{
152	/** IEMVERIFYEVENT_IOPORT_READ */
153	struct
154	{
155	RTIOPORT Port;
156	uint32_t cbValue;
157	} IOPortRead;
158
159	/** IEMVERIFYEVENT_IOPORT_WRITE */
160	struct
161	{
162	RTIOPORT Port;
163	uint32_t cbValue;
164	uint32_t u32Value;
165	} IOPortWrite;
166
167	/** IEMVERIFYEVENT_RAM_READ */
168	struct
169	{
170	RTGCPHYS GCPhys;
171	uint32_t cb;
172	} RamRead;
173
174	/** IEMVERIFYEVENT_RAM_WRITE */
175	struct
176	{
177	RTGCPHYS GCPhys;
178	uint32_t cb;
179	uint8_t ab[512];
180	} RamWrite;
181	} u;
182	} IEMVERIFYEVTREC;
183	/** Pointer to an IEM event verification records. */
184	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
185
186	#endif /* IEM_VERIFICATION_MODE */
187
188
189	/**
190	* The per-CPU IEM state.
191	*/
192	typedef struct IEMCPU
193	{
194	/** Pointer to the CPU context - ring-3 contex. */
195	R3PTRTYPE(PCPUMCTX) pCtxR3;
196	/** Pointer to the CPU context - ring-0 contex. */
197	R0PTRTYPE(PCPUMCTX) pCtxR0;
198	/** Pointer to the CPU context - raw-mode contex. */
199	RCPTRTYPE(PCPUMCTX) pCtxRC;
200
201	/** Offset of the VMCPU structure relative to this structure (negative). */
202	int32_t offVMCpu;
203	/** Offset of the VM structure relative to this structure (negative). */
204	int32_t offVM;
205
206	/** Whether to bypass access handlers or not. */
207	bool fByPassHandlers;
208	/** Explicit alignment padding. */
209	bool afAlignment0[3];
210
211	/** The flags of the current exception / interrupt. */
212	uint32_t fCurXcpt;
213	/** The current exception / interrupt. */
214	uint8_t uCurXcpt;
215	/** Exception / interrupt recursion depth. */
216	int8_t cXcptRecursions;
217	/** Explicit alignment padding. */
218	bool afAlignment1[1];
219	/** The CPL. */
220	uint8_t uCpl;
221	/** The current CPU execution mode (CS). */
222	IEMMODE enmCpuMode;
223
224	/** @name Statistics
225	* @{ */
226	/** The number of instructions we've executed. */
227	uint32_t cInstructions;
228	/** The number of potential exits. */
229	uint32_t cPotentialExits;
230	/** The number of bytes data or stack written (mostly for IEMExecOneEx).
231	* This may contain uncommitted writes. */
232	uint32_t cbWritten;
233	#ifdef IEM_VERIFICATION_MODE
234	/** The Number of I/O port reads that has been performed. */
235	uint32_t cIOReads;
236	/** The Number of I/O port writes that has been performed. */
237	uint32_t cIOWrites;
238	/** Set if no comparison to REM is currently performed.
239	* This is used to skip past really slow bits. */
240	bool fNoRem;
241	/** Indicates that RAX and RDX differences should be ignored since RDTSC
242	* and RDTSCP are timing sensitive. */
243	bool fIgnoreRaxRdx;
244	bool afAlignment2[2];
245	/** Mask of undefined eflags.
246	* The verifier will any difference in these flags. */
247	uint32_t fUndefinedEFlags;
248	/** The physical address corresponding to abOpcodes[0]. */
249	RTGCPHYS GCPhysOpcodes;
250	#endif
251	/** @} */
252
253	/** @name Decoder state.
254	* @{ */
255
256	/** The default addressing mode . */
257	IEMMODE enmDefAddrMode;
258	/** The effective addressing mode . */
259	IEMMODE enmEffAddrMode;
260	/** The default operand mode . */
261	IEMMODE enmDefOpSize;
262	/** The effective operand mode . */
263	IEMMODE enmEffOpSize;
264
265	/** The prefix mask (IEM_OP_PRF_XXX). */
266	uint32_t fPrefixes;
267	/** The extra REX ModR/M register field bit (REX.R << 3). */
268	uint8_t uRexReg;
269	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
270	* (REX.B << 3). */
271	uint8_t uRexB;
272	/** The extra REX SIB index field bit (REX.X << 3). */
273	uint8_t uRexIndex;
274	/** The effective segment register (X86_SREG_XXX). */
275	uint8_t iEffSeg;
276
277	/** The current offset into abOpcodes. */
278	uint8_t offOpcode;
279	/** The size of what has currently been fetched into abOpcodes. */
280	uint8_t cbOpcode;
281	/** The opcode bytes. */
282	uint8_t abOpcode[15];
283	/** Offset into abOpcodes where the FPU instruction starts.
284	* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
285	* instruction result is committed. */
286	uint8_t offFpuOpcode;
287
288	/** @}*/
289
290	/** Alignment padding for aMemMappings. */
291	uint8_t abAlignment2[4];
292
293	/** The number of active guest memory mappings. */
294	uint8_t cActiveMappings;
295	/** The next unused mapping index. */
296	uint8_t iNextMapping;
297	/** Records for tracking guest memory mappings. */
298	struct
299	{
300	/** The address of the mapped bytes. */
301	void *pv;
302	#if defined(IN_RC) && HC_ARCH_BITS == 64
303	uint32_t u32Alignment3; /*< Alignment padding. /
304	#endif
305	/** The access flags (IEM_ACCESS_XXX).
306	* IEM_ACCESS_INVALID if the entry is unused. */
307	uint32_t fAccess;
308	#if HC_ARCH_BITS == 64
309	uint32_t u32Alignment4; /*< Alignment padding. /
310	#endif
311	} aMemMappings[3];
312
313	/** Locking records for the mapped memory. */
314	union
315	{
316	PGMPAGEMAPLOCK Lock;
317	uint64_t au64Padding[2];
318	} aMemMappingLocks[3];
319
320	/** Bounce buffer info.
321	* This runs in parallel to aMemMappings. */
322	struct
323	{
324	/** The physical address of the first byte. */
325	RTGCPHYS GCPhysFirst;
326	/** The physical address of the second page. */
327	RTGCPHYS GCPhysSecond;
328	/** The number of bytes in the first page. */
329	uint16_t cbFirst;
330	/** The number of bytes in the second page. */
331	uint16_t cbSecond;
332	/** Whether it's unassigned memory. */
333	bool fUnassigned;
334	/** Explicit alignment padding. */
335	bool afAlignment5[3];
336	} aMemBbMappings[3];
337
338	/** Bounce buffer storage.
339	* This runs in parallel to aMemMappings and aMemBbMappings. */
340	struct
341	{
342	uint8_t ab[512];
343	} aBounceBuffers[3];
344
345	#ifdef IEM_VERIFICATION_MODE
346	/** The event verification records for what IEM did (LIFO). */
347	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
348	/** Insertion point for pIemEvtRecHead. */
349	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
350	/** The event verification records for what the other party did (FIFO). */
351	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
352	/** Insertion point for pOtherEvtRecHead. */
353	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
354	/** List of free event records. */
355	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
356	#endif
357	} IEMCPU;
358	/** Pointer to the per-CPU IEM state. */
359	typedef IEMCPU *PIEMCPU;
360
361	/** Converts a IEMCPU pointer to a VMCPU pointer.
362	* @returns VMCPU pointer.
363	* @param a_pIemCpu The IEM per CPU instance data.
364	*/
365	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
366
367	/** Converts a IEMCPU pointer to a VM pointer.
368	* @returns VM pointer.
369	* @param a_pIemCpu The IEM per CPU instance data.
370	*/
371	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
372
373	/** @name IEM_ACCESS_XXX - Access details.
374	* @{ */
375	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
376	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
377	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
378	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
379	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
380	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
381	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
382	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
383	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
384	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
385	/** The writes are partial, so if initialize the bounce buffer with the
386	* orignal RAM content. */
387	#define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
388	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
389	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
390	/** Read+write data alias. */
391	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
392	/** Write data alias. */
393	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
394	/** Read data alias. */
395	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
396	/** Instruction fetch alias. */
397	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
398	/** Stack write alias. */
399	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
400	/** Stack read alias. */
401	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
402	/** Stack read+write alias. */
403	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
404	/** Read system table alias. */
405	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
406	/** Read+write system table alias. */
407	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
408	/** @} */
409
410	/** @name Prefix constants (IEMCPU::fPrefixes)
411	* @{ */
412	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
413	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
414	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
415	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
416	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
417	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
418	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
419
420	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
421	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
422	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
423
424	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
425	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
426	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
427
428	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
429	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
430	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
431	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
432	/** @} */
433
434	/**
435	* Tests if verification mode is enabled.
436	*
437	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
438	* should therefore cause the compiler to eliminate the verification branch
439	* of an if statement. */
440	#ifdef IEM_VERIFICATION_MODE
441	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
442	#else
443	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
444	#endif
445
446	/**
447	* Indicates to the verifier that the given flag set is undefined.
448	*
449	* Can be invoked again to add more flags.
450	*
451	* This is a NOOP if the verifier isn't compiled in.
452	*/
453	#ifdef IEM_VERIFICATION_MODE
454	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
455	#else
456	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
457	#endif
458
459
460	/** @def IEM_DECL_IMPL_TYPE
461	* For typedef'ing an instruction implementation function.
462	*
463	* @param a_RetType The return type.
464	* @param a_Name The name of the type.
465	* @param a_ArgList The argument list enclosed in parentheses.
466	*/
467
468	/** @def IEM_DECL_IMPL_DEF
469	* For defining an instruction implementation function.
470	*
471	* @param a_RetType The return type.
472	* @param a_Name The name of the type.
473	* @param a_ArgList The argument list enclosed in parentheses.
474	*/
475
476	#if defined(__GNUC__) && defined(RT_ARCH_X86)
477	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
478	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
479	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
480	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
481
482	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
483	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
484	a_RetType (__fastcall a_Name) a_ArgList
485	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
486	a_RetType __fastcall a_Name a_ArgList
487
488	#else
489	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
490	a_RetType (VBOXCALL a_Name) a_ArgList
491	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
492	a_RetType VBOXCALL a_Name a_ArgList
493
494	#endif
495
496	/** @name Arithmetic assignment operations on bytes (binary).
497	* @{ */
498	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
499	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
500	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
501	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
502	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
503	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
504	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
505	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
506	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
507	/** @} */
508
509	/** @name Arithmetic assignment operations on words (binary).
510	* @{ */
511	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
512	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
513	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
514	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
515	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
516	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
517	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
518	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
519	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
520	/** @} */
521
522	/** @name Arithmetic assignment operations on double words (binary).
523	* @{ */
524	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
525	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
526	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
527	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
528	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
529	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
530	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
531	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
532	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
533	/** @} */
534
535	/** @name Arithmetic assignment operations on quad words (binary).
536	* @{ */
537	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
538	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
539	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
540	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
541	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
542	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
543	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
544	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
545	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
546	/** @} */
547
548	/** @name Compare operations (thrown in with the binary ops).
549	* @{ */
550	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
551	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
552	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
553	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
554	/** @} */
555
556	/** @name Test operations (thrown in with the binary ops).
557	* @{ */
558	FNIEMAIMPLBINU8 iemAImpl_test_u8;
559	FNIEMAIMPLBINU16 iemAImpl_test_u16;
560	FNIEMAIMPLBINU32 iemAImpl_test_u32;
561	FNIEMAIMPLBINU64 iemAImpl_test_u64;
562	/** @} */
563
564	/** @name Bit operations operations (thrown in with the binary ops).
565	* @{ */
566	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
567	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
568	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
569	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
570	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
571	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
572	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
573	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
574	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
575	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
576	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
577	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
578	/** @} */
579
580	/** @name Exchange memory with register operations.
581	* @{ */
582	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
583	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
584	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
585	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
586	/** @} */
587
588	/** @name Exchange and add operations.
589	* @{ */
590	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
591	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
592	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
593	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
594	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
595	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
596	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
597	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
598	/** @} */
599
600	/** @name Double precision shifts
601	* @{ */
602	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
603	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
604	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
605	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
606	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
607	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
608	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
609	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
610	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
611	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
612	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
613	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
614	/** @} */
615
616
617	/** @name Bit search operations (thrown in with the binary ops).
618	* @{ */
619	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
620	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
621	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
622	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
623	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
624	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
625	/** @} */
626
627	/** @name Signed multiplication operations (thrown in with the binary ops).
628	* @{ */
629	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
630	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
631	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
632	/** @} */
633
634	/** @name Arithmetic assignment operations on bytes (unary).
635	* @{ */
636	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
637	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
638	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
639	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
640	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
641	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
642	/** @} */
643
644	/** @name Arithmetic assignment operations on words (unary).
645	* @{ */
646	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
647	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
648	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
649	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
650	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
651	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
652	/** @} */
653
654	/** @name Arithmetic assignment operations on double words (unary).
655	* @{ */
656	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
657	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
658	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
659	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
660	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
661	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
662	/** @} */
663
664	/** @name Arithmetic assignment operations on quad words (unary).
665	* @{ */
666	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
667	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
668	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
669	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
670	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
671	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
672	/** @} */
673
674
675	/** @name Shift operations on bytes (Group 2).
676	* @{ */
677	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
678	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
679	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
680	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
681	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
682	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
683	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
684	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
685	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
686	/** @} */
687
688	/** @name Shift operations on words (Group 2).
689	* @{ */
690	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
691	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
692	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
693	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
694	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
695	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
696	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
697	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
698	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
699	/** @} */
700
701	/** @name Shift operations on double words (Group 2).
702	* @{ */
703	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
704	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
705	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
706	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
707	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
708	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
709	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
710	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
711	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
712	/** @} */
713
714	/** @name Shift operations on words (Group 2).
715	* @{ */
716	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
717	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
718	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
719	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
720	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
721	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
722	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
723	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
724	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
725	/** @} */
726
727	/** @name Multiplication and division operations.
728	* @{ */
729	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
730	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
731	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
732	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
733
734	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
735	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
736	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
737	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
738
739	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
740	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
741	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
742	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
743
744	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
745	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
746	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
747	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
748	/** @} */
749
750	/** @name Byte Swap.
751	* @{ */
752	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
753	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
754	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
755	/** @} */
756
757
758	/** @name FPU operations taking a 32-bit float argument
759	* @{ */
760	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
761	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
762	typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
763
764	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
765	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
766	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
767
768	FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
769	FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
770	FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
771	FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
772	FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
773	FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
774	FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
775
776	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
777	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
778	PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
779	/** @} */
780
781	/** @name FPU operations taking a 64-bit float argument
782	* @{ */
783	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
784	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
785	typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
786
787	FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
788	FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
789	FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
790	FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
791	FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
792	FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
793
794	IEM_DECL_IMPL_DEF(void, iemAImpl_fcom_r80_by_r64,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
795	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
796	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
797	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
798	PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
799	/** @} */
800
801	/** @name FPU operations taking a 80-bit float argument
802	* @{ */
803	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
804	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
805	typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
806	FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
807	FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
808	FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
809	FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
810	FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
811	FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
812	FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
813	FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
814	FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
815
816	FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80;
817	FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80;
818
819	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
820	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
821	typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
822	FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
823	FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
824
825	typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
826	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
827	typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
828	FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
829	FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
830
831	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
832	typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
833	FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
834	FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
835	FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80;
836	FNIEMAIMPLFPUR80UNARY iemAImpl_fyl2x_r80;
837	FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
838	FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
839	FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80;
840	FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80;
841
842	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
843	typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
844	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
845	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
846
847	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
848	typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
849	FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
850	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
851	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
852	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
853	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
854	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
855	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
856
857	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
858	PCRTFLOAT80U pr80Val));
859	typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
860	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80;
861	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
862	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80;
863
864	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
865	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
866	PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
867
868	/** @} */
869
870	/** @name FPU operations taking a 16-bit signed integer argument
871	* @{ */
872	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
873	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
874	typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
875
876	FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
877	FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
878	FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
879	FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
880	FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
881	FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
882
883	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
884	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
885
886	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i16_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
887	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
888	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
889	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
890	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
891	/** @} */
892
893	/** @name FPU operations taking a 32-bit signed integer argument
894	* @{ */
895	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
896	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
897	typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
898
899	FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
900	FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
901	FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
902	FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
903	FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
904	FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
905
906	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
907	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
908
909	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
910	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
911	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
912	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
913	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
914	/** @} */
915
916	/** @name FPU operations taking a 64-bit signed integer argument
917	* @{ */
918	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
919	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
920	typedef FNIEMAIMPLFPUI64 *PFNIEMAIMPLFPUI64;
921
922	FNIEMAIMPLFPUI64 iemAImpl_fiadd_r80_by_i64;
923	FNIEMAIMPLFPUI64 iemAImpl_fimul_r80_by_i64;
924	FNIEMAIMPLFPUI64 iemAImpl_fisub_r80_by_i64;
925	FNIEMAIMPLFPUI64 iemAImpl_fisubr_r80_by_i64;
926	FNIEMAIMPLFPUI64 iemAImpl_fidiv_r80_by_i64;
927	FNIEMAIMPLFPUI64 iemAImpl_fidivr_r80_by_i64;
928
929	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
930	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
931
932	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
933	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
934	int64_t *pi64Val, PCRTFLOAT80U pr80Val));
935	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
936	int64_t *pi32Val, PCRTFLOAT80U pr80Val));
937	/** @} */
938
939
940	/** @name Function tables.
941	* @{
942	*/
943
944	/**
945	* Function table for a binary operator providing implementation based on
946	* operand size.
947	*/
948	typedef struct IEMOPBINSIZES
949	{
950	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
951	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
952	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
953	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
954	} IEMOPBINSIZES;
955	/** Pointer to a binary operator function table. */
956	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
957
958
959	/**
960	* Function table for a unary operator providing implementation based on
961	* operand size.
962	*/
963	typedef struct IEMOPUNARYSIZES
964	{
965	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
966	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
967	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
968	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
969	} IEMOPUNARYSIZES;
970	/** Pointer to a unary operator function table. */
971	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
972
973
974	/**
975	* Function table for a shift operator providing implementation based on
976	* operand size.
977	*/
978	typedef struct IEMOPSHIFTSIZES
979	{
980	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
981	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
982	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
983	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
984	} IEMOPSHIFTSIZES;
985	/** Pointer to a shift operator function table. */
986	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
987
988
989	/**
990	* Function table for a multiplication or division operation.
991	*/
992	typedef struct IEMOPMULDIVSIZES
993	{
994	PFNIEMAIMPLMULDIVU8 pfnU8;
995	PFNIEMAIMPLMULDIVU16 pfnU16;
996	PFNIEMAIMPLMULDIVU32 pfnU32;
997	PFNIEMAIMPLMULDIVU64 pfnU64;
998	} IEMOPMULDIVSIZES;
999	/** Pointer to a multiplication or division operation function table. */
1000	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
1001
1002
1003	/**
1004	* Function table for a double precision shift operator providing implementation
1005	* based on operand size.
1006	*/
1007	typedef struct IEMOPSHIFTDBLSIZES
1008	{
1009	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
1010	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
1011	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
1012	} IEMOPSHIFTDBLSIZES;
1013	/** Pointer to a double precision shift function table. */
1014	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
1015
1016
1017	/** @} */
1018
1019
1020	/** @name C instruction implementations for anything slightly complicated.
1021	* @{ */
1022
1023	/**
1024	* For typedef'ing or declaring a C instruction implementation function taking
1025	* no extra arguments.
1026	*
1027	* @param a_Name The name of the type.
1028	*/
1029	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
1030	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1031	/**
1032	* For defining a C instruction implementation function taking no extra
1033	* arguments.
1034	*
1035	* @param a_Name The name of the function
1036	*/
1037	# define IEM_CIMPL_DEF_0(a_Name) \
1038	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1039	/**
1040	* For calling a C instruction implementation function taking no extra
1041	* arguments.
1042	*
1043	* This special call macro adds default arguments to the call and allow us to
1044	* change these later.
1045	*
1046	* @param a_fn The name of the function.
1047	*/
1048	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
1049
1050	/**
1051	* For typedef'ing or declaring a C instruction implementation function taking
1052	* one extra argument.
1053	*
1054	* @param a_Name The name of the type.
1055	* @param a_Type0 The argument type.
1056	* @param a_Arg0 The argument name.
1057	*/
1058	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
1059	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1060	/**
1061	* For defining a C instruction implementation function taking one extra
1062	* argument.
1063	*
1064	* @param a_Name The name of the function
1065	* @param a_Type0 The argument type.
1066	* @param a_Arg0 The argument name.
1067	*/
1068	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
1069	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1070	/**
1071	* For calling a C instruction implementation function taking one extra
1072	* argument.
1073	*
1074	* This special call macro adds default arguments to the call and allow us to
1075	* change these later.
1076	*
1077	* @param a_fn The name of the function.
1078	* @param a0 The name of the 1st argument.
1079	*/
1080	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
1081
1082	/**
1083	* For typedef'ing or declaring a C instruction implementation function taking
1084	* two extra arguments.
1085	*
1086	* @param a_Name The name of the type.
1087	* @param a_Type0 The type of the 1st argument
1088	* @param a_Arg0 The name of the 1st argument.
1089	* @param a_Type1 The type of the 2nd argument.
1090	* @param a_Arg1 The name of the 2nd argument.
1091	*/
1092	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1093	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1094	/**
1095	* For defining a C instruction implementation function taking two extra
1096	* arguments.
1097	*
1098	* @param a_Name The name of the function.
1099	* @param a_Type0 The type of the 1st argument
1100	* @param a_Arg0 The name of the 1st argument.
1101	* @param a_Type1 The type of the 2nd argument.
1102	* @param a_Arg1 The name of the 2nd argument.
1103	*/
1104	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1105	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1106	/**
1107	* For calling a C instruction implementation function taking two extra
1108	* arguments.
1109	*
1110	* This special call macro adds default arguments to the call and allow us to
1111	* change these later.
1112	*
1113	* @param a_fn The name of the function.
1114	* @param a0 The name of the 1st argument.
1115	* @param a1 The name of the 2nd argument.
1116	*/
1117	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
1118
1119	/**
1120	* For typedef'ing or declaring a C instruction implementation function taking
1121	* three extra arguments.
1122	*
1123	* @param a_Name The name of the type.
1124	* @param a_Type0 The type of the 1st argument
1125	* @param a_Arg0 The name of the 1st argument.
1126	* @param a_Type1 The type of the 2nd argument.
1127	* @param a_Arg1 The name of the 2nd argument.
1128	* @param a_Type2 The type of the 3rd argument.
1129	* @param a_Arg2 The name of the 3rd argument.
1130	*/
1131	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1132	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1133	/**
1134	* For defining a C instruction implementation function taking three extra
1135	* arguments.
1136	*
1137	* @param a_Name The name of the function.
1138	* @param a_Type0 The type of the 1st argument
1139	* @param a_Arg0 The name of the 1st argument.
1140	* @param a_Type1 The type of the 2nd argument.
1141	* @param a_Arg1 The name of the 2nd argument.
1142	* @param a_Type2 The type of the 3rd argument.
1143	* @param a_Arg2 The name of the 3rd argument.
1144	*/
1145	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1146	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1147	/**
1148	* For calling a C instruction implementation function taking three extra
1149	* arguments.
1150	*
1151	* This special call macro adds default arguments to the call and allow us to
1152	* change these later.
1153	*
1154	* @param a_fn The name of the function.
1155	* @param a0 The name of the 1st argument.
1156	* @param a1 The name of the 2nd argument.
1157	* @param a2 The name of the 3rd argument.
1158	*/
1159	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
1160
1161
1162	/**
1163	* For typedef'ing or declaring a C instruction implementation function taking
1164	* four extra arguments.
1165	*
1166	* @param a_Name The name of the type.
1167	* @param a_Type0 The type of the 1st argument
1168	* @param a_Arg0 The name of the 1st argument.
1169	* @param a_Type1 The type of the 2nd argument.
1170	* @param a_Arg1 The name of the 2nd argument.
1171	* @param a_Type2 The type of the 3rd argument.
1172	* @param a_Arg2 The name of the 3rd argument.
1173	* @param a_Type3 The type of the 4th argument.
1174	* @param a_Arg3 The name of the 4th argument.
1175	*/
1176	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1177	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1178	/**
1179	* For defining a C instruction implementation function taking four extra
1180	* arguments.
1181	*
1182	* @param a_Name The name of the function.
1183	* @param a_Type0 The type of the 1st argument
1184	* @param a_Arg0 The name of the 1st argument.
1185	* @param a_Type1 The type of the 2nd argument.
1186	* @param a_Arg1 The name of the 2nd argument.
1187	* @param a_Type2 The type of the 3rd argument.
1188	* @param a_Arg2 The name of the 3rd argument.
1189	* @param a_Type3 The type of the 4th argument.
1190	* @param a_Arg3 The name of the 4th argument.
1191	*/
1192	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1193	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
1194	a_Type2 a_Arg2, a_Type3 a_Arg3))
1195	/**
1196	* For calling a C instruction implementation function taking four extra
1197	* arguments.
1198	*
1199	* This special call macro adds default arguments to the call and allow us to
1200	* change these later.
1201	*
1202	* @param a_fn The name of the function.
1203	* @param a0 The name of the 1st argument.
1204	* @param a1 The name of the 2nd argument.
1205	* @param a2 The name of the 3rd argument.
1206	* @param a3 The name of the 4th argument.
1207	*/
1208	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1209
1210
1211	/**
1212	* For typedef'ing or declaring a C instruction implementation function taking
1213	* five extra arguments.
1214	*
1215	* @param a_Name The name of the type.
1216	* @param a_Type0 The type of the 1st argument
1217	* @param a_Arg0 The name of the 1st argument.
1218	* @param a_Type1 The type of the 2nd argument.
1219	* @param a_Arg1 The name of the 2nd argument.
1220	* @param a_Type2 The type of the 3rd argument.
1221	* @param a_Arg2 The name of the 3rd argument.
1222	* @param a_Type3 The type of the 4th argument.
1223	* @param a_Arg3 The name of the 4th argument.
1224	* @param a_Type4 The type of the 5th argument.
1225	* @param a_Arg4 The name of the 5th argument.
1226	*/
1227	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1228	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1229	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1230	a_Type3 a_Arg3, a_Type4 a_Arg4))
1231	/**
1232	* For defining a C instruction implementation function taking five extra
1233	* arguments.
1234	*
1235	* @param a_Name The name of the function.
1236	* @param a_Type0 The type of the 1st argument
1237	* @param a_Arg0 The name of the 1st argument.
1238	* @param a_Type1 The type of the 2nd argument.
1239	* @param a_Arg1 The name of the 2nd argument.
1240	* @param a_Type2 The type of the 3rd argument.
1241	* @param a_Arg2 The name of the 3rd argument.
1242	* @param a_Type3 The type of the 4th argument.
1243	* @param a_Arg3 The name of the 4th argument.
1244	* @param a_Type4 The type of the 5th argument.
1245	* @param a_Arg4 The name of the 5th argument.
1246	*/
1247	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1248	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1249	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1250	a_Type3 a_Arg3, a_Type4 a_Arg4))
1251	/**
1252	* For calling a C instruction implementation function taking five extra
1253	* arguments.
1254	*
1255	* This special call macro adds default arguments to the call and allow us to
1256	* change these later.
1257	*
1258	* @param a_fn The name of the function.
1259	* @param a0 The name of the 1st argument.
1260	* @param a1 The name of the 2nd argument.
1261	* @param a2 The name of the 3rd argument.
1262	* @param a3 The name of the 4th argument.
1263	* @param a4 The name of the 5th argument.
1264	*/
1265	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1266
1267	/** @} */
1268
1269
1270	/** @} */
1271
1272	RT_C_DECLS_END
1273
1274	#endif
1275

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