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source: vbox/trunk/src/VBox/VMM/VMMR3/EMR3Nem.cpp@ 99212

最後變更 在這個檔案從99212是 98980,由 vboxsync 提交於 2 年 前

VMM: More ARMv8 x86/amd64 separation work, get past IEM, bugref:10385
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1/* $Id: EMR3Nem.cpp 98980 2023-03-15 11:46:48Z vboxsync $ */
2/** @file
3 * EM - Execution Monitor / Manager - NEM interface.
4 */
5
6/*
7 * Copyright (C) 2006-2023 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.alldomusa.eu.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_EM
33#define VMCPU_INCL_CPUM_GST_CTX
34#include <VBox/vmm/em.h>
35#include <VBox/vmm/vmm.h>
36#include <VBox/vmm/selm.h>
37#include <VBox/vmm/trpm.h>
38#include <VBox/vmm/iem.h>
39#include <VBox/vmm/iom.h>
40#include <VBox/vmm/nem.h>
41#include <VBox/vmm/dbgf.h>
42#include <VBox/vmm/pgm.h>
43#include <VBox/vmm/tm.h>
44#include <VBox/vmm/mm.h>
45#include <VBox/vmm/ssm.h>
46#include <VBox/vmm/pdmapi.h>
47#include <VBox/vmm/pdmcritsect.h>
48#include <VBox/vmm/pdmqueue.h>
49#include "EMInternal.h"
50#include <VBox/vmm/vm.h>
51#include <VBox/vmm/gim.h>
52#include <VBox/vmm/cpumdis.h>
53#include <VBox/dis.h>
54#include <VBox/disopcode.h>
55#include <VBox/err.h>
56#include <VBox/vmm/dbgf.h>
57#include "VMMTracing.h"
58
59#include <iprt/asm.h>
60
61
62/*********************************************************************************************************************************
63* Internal Functions *
64*********************************************************************************************************************************/
65static int emR3NemHandleRC(PVM pVM, PVMCPU pVCpu, int rc);
66DECLINLINE(int) emR3NemExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
67static int emR3NemExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
68static int emR3NemForcedActions(PVM pVM, PVMCPU pVCpu);
69
70#define EMHANDLERC_WITH_NEM
71#define emR3ExecuteInstruction emR3NemExecuteInstruction
72#define emR3ExecuteIOInstruction emR3NemExecuteIOInstruction
73#include "EMHandleRCTmpl.h"
74
75
76/**
77 * Executes instruction in NEM mode if we can.
78 *
79 * This is somewhat comparable to REMR3EmulateInstruction.
80 *
81 * @returns VBox strict status code.
82 * @retval VINF_EM_DBG_STEPPED on success.
83 * @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
84 * HM right now.
85 *
86 * @param pVM The cross context VM structure.
87 * @param pVCpu The cross context virtual CPU structure for the calling EMT.
88 * @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
89 * @thread EMT.
90 */
91VBOXSTRICTRC emR3NemSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
92{
93 Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
94
95 if (!NEMR3CanExecuteGuest(pVM, pVCpu))
96 return VINF_EM_RESCHEDULE;
97
98#if defined(VBOX_VMM_TARGET_ARMV8)
99 uint64_t const uOldPc = pVCpu->cpum.GstCtx.Pc.u64;
100#else
101 uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip;
102#endif
103 for (;;)
104 {
105 /*
106 * Service necessary FFs before going into HM.
107 */
108 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
109 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
110 {
111 VBOXSTRICTRC rcStrict = emR3NemForcedActions(pVM, pVCpu);
112 if (rcStrict != VINF_SUCCESS)
113 {
114 Log(("emR3NemSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
115 return rcStrict;
116 }
117 }
118
119 /*
120 * Go execute it.
121 */
122 bool fOld = NEMR3SetSingleInstruction(pVM, pVCpu, true);
123 VBOXSTRICTRC rcStrict = NEMR3RunGC(pVM, pVCpu);
124 NEMR3SetSingleInstruction(pVM, pVCpu, fOld);
125 LogFlow(("emR3NemSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
126
127 /*
128 * Handle high priority FFs and informational status codes. We don't do
129 * normal FF processing the caller or the next call can deal with them.
130 */
131 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
132 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
133 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
134 {
135 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
136 LogFlow(("emR3NemSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
137 }
138
139 if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST || rcStrict > VINF_EM_LAST))
140 {
141 rcStrict = emR3NemHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
142 Log(("emR3NemSingleInstruction: emR3NemHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
143 }
144
145 /*
146 * Done?
147 */
148#if defined(VBOX_VMM_TARGET_ARMV8)
149 CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_PC);
150 if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
151 || !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
152 || pVCpu->cpum.GstCtx.Pc.u64 != uOldPc)
153 {
154 if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.Pc.u64 != uOldPc)
155 rcStrict = VINF_EM_DBG_STEPPED;
156 Log(("emR3NemSingleInstruction: returns %Rrc (pc %llx -> %llx)\n",
157 VBOXSTRICTRC_VAL(rcStrict), uOldPc, pVCpu->cpum.GstCtx.Pc.u64));
158 CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
159 return rcStrict;
160 }
161#else
162 CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_RIP);
163 if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
164 || !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
165 || pVCpu->cpum.GstCtx.rip != uOldRip)
166 {
167 if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip)
168 rcStrict = VINF_EM_DBG_STEPPED;
169 Log(("emR3NemSingleInstruction: returns %Rrc (rip %llx -> %llx)\n",
170 VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip));
171 CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
172 return rcStrict;
173 }
174#endif
175 }
176}
177
178
179/**
180 * Executes one (or perhaps a few more) instruction(s).
181 *
182 * @returns VBox status code suitable for EM.
183 *
184 * @param pVM The cross context VM structure.
185 * @param pVCpu The cross context virtual CPU structure.
186 * @param rcRC Return code from RC.
187 * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
188 * instruction and prefix the log output with this text.
189 */
190#if defined(LOG_ENABLED) || defined(DOXYGEN_RUNNING)
191static int emR3NemExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
192#else
193static int emR3NemExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
194#endif
195{
196 NOREF(rcRC);
197
198#ifdef LOG_ENABLED
199 /*
200 * Log it.
201 */
202#ifdef VBOX_VMM_TARGET_ARMV8
203 Log(("EMINS: %RGv SP_EL0=%RGv SP_EL1=%RGv\n", (RTGCPTR)pVCpu->cpum.GstCtx.Pc.u64,
204 (RTGCPTR)pVCpu->cpum.GstCtx.aSpReg[0].u64,
205 (RTGCPTR)pVCpu->cpum.GstCtx.aSpReg[1].u64));
206 if (pszPrefix)
207 {
208 DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
209 DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
210 }
211# else
212 Log(("EMINS: %04x:%RGv RSP=%RGv\n", pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, (RTGCPTR)pVCpu->cpum.GstCtx.rsp));
213 if (pszPrefix)
214 {
215 DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
216 DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
217 }
218# endif
219#endif
220
221 /*
222 * Use IEM and fallback on REM if the functionality is missing.
223 * Once IEM gets mature enough, nothing should ever fall back.
224 */
225 STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
226
227 VBOXSTRICTRC rcStrict;
228 uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
229 RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
230 if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
231 {
232 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
233 rcStrict = IEMExecOne(pVCpu);
234 }
235 else
236 {
237 RT_UNTRUSTED_VALIDATED_FENCE();
238 rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
239 LogFlow(("emR3NemExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
240 }
241
242 STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
243
244 NOREF(pVM);
245 return VBOXSTRICTRC_TODO(rcStrict);
246}
247
248
249/**
250 * Executes one (or perhaps a few more) instruction(s).
251 * This is just a wrapper for discarding pszPrefix in non-logging builds.
252 *
253 * @returns VBox status code suitable for EM.
254 * @param pVM The cross context VM structure.
255 * @param pVCpu The cross context virtual CPU structure.
256 * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
257 * instruction and prefix the log output with this text.
258 * @param rcGC GC return code
259 */
260DECLINLINE(int) emR3NemExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
261{
262#ifdef LOG_ENABLED
263 return emR3NemExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
264#else
265 RT_NOREF_PV(pszPrefix);
266 return emR3NemExecuteInstructionWorker(pVM, pVCpu, rcGC);
267#endif
268}
269
270/**
271 * Executes one (or perhaps a few more) IO instruction(s).
272 *
273 * @returns VBox status code suitable for EM.
274 * @param pVM The cross context VM structure.
275 * @param pVCpu The cross context virtual CPU structure.
276 */
277static int emR3NemExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
278{
279 RT_NOREF_PV(pVM);
280 STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
281
282 /*
283 * Hand it over to the interpreter.
284 */
285 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
286 VBOXSTRICTRC rcStrict;
287 uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
288 RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
289 if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
290 {
291 rcStrict = IEMExecOne(pVCpu);
292 LogFlow(("emR3NemExecuteIOInstruction: %Rrc (IEMExecOne)\n", VBOXSTRICTRC_VAL(rcStrict)));
293 STAM_COUNTER_INC(&pVCpu->em.s.StatIoIem);
294 }
295 else
296 {
297 RT_UNTRUSTED_VALIDATED_FENCE();
298 rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
299 LogFlow(("emR3NemExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
300 STAM_COUNTER_INC(&pVCpu->em.s.StatIoRestarted);
301 }
302
303 STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
304 return VBOXSTRICTRC_TODO(rcStrict);
305}
306
307
308/**
309 * Process NEM specific forced actions.
310 *
311 * This function is called when any FFs in VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
312 * or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
313 *
314 * @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
315 * EM statuses.
316 * @param pVM The cross context VM structure.
317 * @param pVCpu The cross context virtual CPU structure.
318 */
319static int emR3NemForcedActions(PVM pVM, PVMCPU pVCpu)
320{
321 /*
322 * Sync page directory should not happen in NEM mode.
323 */
324 if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
325 {
326 Log(("NEM: TODO: Make VMCPU_FF_PGM_SYNC_CR3 / VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL quiet! (%#RX64)\n", (uint64_t)pVCpu->fLocalForcedActions));
327 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL);
328 }
329
330 /*
331 * Allocate handy pages (just in case the above actions have consumed some pages).
332 */
333 if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
334 {
335 int rc = PGMR3PhysAllocateHandyPages(pVM);
336 if (RT_FAILURE(rc))
337 return rc;
338 }
339
340 /*
341 * Check whether we're out of memory now.
342 *
343 * This may stem from some of the above actions or operations that has been executed
344 * since we ran FFs. The allocate handy pages must for instance always be followed by
345 * this check.
346 */
347 if (VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY))
348 return VINF_EM_NO_MEMORY;
349
350 return VINF_SUCCESS;
351}
352
353
354/**
355 * Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
356 *
357 * This function contains the raw-mode version of the inner
358 * execution loop (the outer loop being in EMR3ExecuteVM()).
359 *
360 * @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
361 * VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
362 *
363 * @param pVM The cross context VM structure.
364 * @param pVCpu The cross context virtual CPU structure.
365 * @param pfFFDone Where to store an indicator telling whether or not
366 * FFs were done before returning.
367 */
368VBOXSTRICTRC emR3NemExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
369{
370 VBOXSTRICTRC rcStrict = VERR_IPE_UNINITIALIZED_STATUS;
371
372#ifdef VBOX_VMM_TARGET_ARMV8
373 LogFlow(("emR3NemExecute%d: (pc=%RGv)\n", pVCpu->idCpu, (RTGCPTR)pVCpu->cpum.GstCtx.Pc.u64));
374#else
375 LogFlow(("emR3NemExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
376#endif
377 *pfFFDone = false;
378
379 STAM_REL_COUNTER_INC(&pVCpu->em.s.StatNEMExecuteCalled);
380
381 /*
382 * Spin till we get a forced action which returns anything but VINF_SUCCESS.
383 */
384 for (;;)
385 {
386 STAM_PROFILE_ADV_START(&pVCpu->em.s.StatNEMEntry, a);
387
388 /*
389 * Check that we can execute in NEM mode.
390 */
391 if (NEMR3CanExecuteGuest(pVM, pVCpu))
392 { /* likely */ }
393 else
394 {
395 rcStrict = VINF_EM_RESCHEDULE_REM;
396 break;
397 }
398
399 /*
400 * Process high priority pre-execution raw-mode FFs.
401 */
402 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
403 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
404 {
405 rcStrict = emR3NemForcedActions(pVM, pVCpu);
406 if (rcStrict != VINF_SUCCESS)
407 break;
408 }
409
410#if defined(LOG_ENABLED) && !defined(VBOX_VMM_TARGET_ARMV8)
411 /*
412 * Log important stuff before entering GC.
413 */
414 if (TRPMHasTrap(pVCpu))
415 Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
416
417 if (!(pVCpu->cpum.GstCtx.fExtrn & ( CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_SS
418 | CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR4 | CPUMCTX_EXTRN_EFER)))
419 {
420 uint32_t cpl = CPUMGetGuestCPL(pVCpu);
421 if (pVM->cCpus == 1)
422 {
423 if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
424 Log(("NEMV86: %08x IF=%d\n", pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
425 else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
426 Log(("NEMR%d: %04x:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
427 else
428 Log(("NEMR%d: %04x:%08x ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
429 }
430 else
431 {
432 if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
433 Log(("NEMV86-CPU%d: %08x IF=%d\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
434 else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
435 Log(("NEMR%d-CPU%d: %04x:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
436 else
437 Log(("NEMR%d-CPU%d: %04x:%08x ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
438 }
439 }
440 else if (pVM->cCpus == 1)
441 Log(("NEMRx: -> NEMR3RunGC\n"));
442 else
443 Log(("NEMRx-CPU%u: -> NEMR3RunGC\n", pVCpu->idCpu));
444#endif /* LOG_ENABLED */
445
446 /*
447 * Execute the code.
448 */
449 if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
450 {
451 STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatNEMEntry, a);
452 STAM_REL_PROFILE_START(&pVCpu->em.s.StatNEMExec, x);
453 rcStrict = NEMR3RunGC(pVM, pVCpu);
454 STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatNEMExec, x);
455 }
456 else
457 {
458 /* Give up this time slice; virtual time continues */
459 STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatNEMEntry, a);
460 STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
461 RTThreadSleep(5);
462 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
463 rcStrict = VINF_SUCCESS;
464 }
465
466
467 /*
468 * Deal with high priority post execution FFs before doing anything else.
469 */
470 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
471 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
472 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
473 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
474
475 /*
476 * Process the returned status code.
477 */
478 if (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST)
479 break;
480
481 rcStrict = emR3NemHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
482 if (rcStrict != VINF_SUCCESS)
483 break;
484
485 /*
486 * Check and execute forced actions.
487 */
488#ifdef VBOX_HIGH_RES_TIMERS_HACK
489 TMTimerPollVoid(pVM, pVCpu);
490#endif
491 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_MASK)
492 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_MASK))
493 {
494 rcStrict = emR3ForcedActions(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
495 VBOXVMM_EM_FF_ALL_RET(pVCpu, VBOXSTRICTRC_VAL(rcStrict));
496 if ( rcStrict != VINF_SUCCESS
497 && rcStrict != VINF_EM_RESCHEDULE_HM)
498 {
499 *pfFFDone = true;
500 break;
501 }
502 }
503 }
504
505 /*
506 * Return to outer loop, making sure the fetch all state as we leave.
507 *
508 * Note! Not using CPUM_IMPORT_EXTRN_RET here, to prioritize an rcStrict error
509 * status over import errors.
510 */
511 if (pVCpu->cpum.GstCtx.fExtrn)
512 {
513 int rcImport = NEMImportStateOnDemand(pVCpu, pVCpu->cpum.GstCtx.fExtrn);
514 AssertReturn(RT_SUCCESS(rcImport) || RT_FAILURE_NP(rcStrict), rcImport);
515 }
516#if defined(LOG_ENABLED) && defined(DEBUG)
517 RTLogFlush(NULL);
518#endif
519 return rcStrict;
520}
521
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