EMHM.cpp@ 47619

最後變更在這個檔案從47619是 47619,由 vboxsync 提交於 12 年前
EM: Started on HM single stepping for IEM verification purposes. Trying to fix the HM debugging in the proccess. VT-x only atm.
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1	/* $Id: EMHM.cpp 47619 2013-08-08 19:06:45Z vboxsync $ */
2	/** @file
3	* EM - Execution Monitor / Manager - hardware virtualization
4	*/
5
6	/*
7	* Copyright (C) 2006-2013 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.alldomusa.eu.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/*******************************************************************************
19	* Header Files *
20	*******************************************************************************/
21	#define LOG_GROUP LOG_GROUP_EM
22	#include <VBox/vmm/em.h>
23	#include <VBox/vmm/vmm.h>
24	#include <VBox/vmm/csam.h>
25	#include <VBox/vmm/selm.h>
26	#include <VBox/vmm/trpm.h>
27	#include <VBox/vmm/iem.h>
28	#include <VBox/vmm/iom.h>
29	#include <VBox/vmm/dbgf.h>
30	#include <VBox/vmm/pgm.h>
31	#ifdef VBOX_WITH_REM
32	# include <VBox/vmm/rem.h>
33	#endif
34	#include <VBox/vmm/tm.h>
35	#include <VBox/vmm/mm.h>
36	#include <VBox/vmm/ssm.h>
37	#include <VBox/vmm/pdmapi.h>
38	#include <VBox/vmm/pdmcritsect.h>
39	#include <VBox/vmm/pdmqueue.h>
40	#include <VBox/vmm/hm.h>
41	#include "EMInternal.h"
42	#include <VBox/vmm/vm.h>
43	#include <VBox/vmm/cpumdis.h>
44	#include <VBox/dis.h>
45	#include <VBox/disopcode.h>
46	#include <VBox/vmm/dbgf.h>
47	#include "VMMTracing.h"
48
49	#include <iprt/asm.h>
50
51
52	/*******************************************************************************
53	* Defined Constants And Macros *
54	*******************************************************************************/
55	#if 0 /* Disabled till after 2.1.0 when we've time to test it. */
56	#define EM_NOTIFY_HM
57	#endif
58
59
60	/*******************************************************************************
61	* Internal Functions *
62	*******************************************************************************/
63	DECLINLINE(int) emR3ExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
64	static int emR3ExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
65	static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
66
67	#define EMHANDLERC_WITH_HM
68	#include "EMHandleRCTmpl.h"
69
70
71	#if defined(DEBUG) && defined(SOME_UNUSED_FUNCTIONS)
72
73	/**
74	* Steps hardware accelerated mode.
75	*
76	* @returns VBox status code.
77	* @param pVM Pointer to the VM.
78	* @param pVCpu Pointer to the VMCPU.
79	*/
80	static int emR3HmStep(PVM pVM, PVMCPU pVCpu)
81	{
82	Assert(pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HM);
83
84	int rc;
85	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
86	# ifdef VBOX_WITH_RAW_MODE
87	Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT \| VMCPU_FF_TRPM_SYNC_IDT \| VMCPU_FF_SELM_SYNC_TSS));
88	# endif
89
90	/*
91	* Check vital forced actions, but ignore pending interrupts and timers.
92	*/
93	if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
94	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
95	{
96	rc = emR3HmForcedActions(pVM, pVCpu, pCtx);
97	if (rc != VINF_SUCCESS)
98	return rc;
99	}
100	/*
101	* Set flags for single stepping.
102	*/
103	CPUMSetGuestEFlags(pVCpu, CPUMGetGuestEFlags(pVCpu) \| X86_EFL_TF \| X86_EFL_RF);
104
105	/*
106	* Single step.
107	* We do not start time or anything, if anything we should just do a few nanoseconds.
108	*/
109	do
110	{
111	rc = VMMR3HmRunGC(pVM, pVCpu);
112	} while ( rc == VINF_SUCCESS
113	\|\| rc == VINF_EM_RAW_INTERRUPT);
114	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
115
116	/*
117	* Make sure the trap flag is cleared.
118	* (Too bad if the guest is trying to single step too.)
119	*/
120	CPUMSetGuestEFlags(pVCpu, CPUMGetGuestEFlags(pVCpu) & ~X86_EFL_TF);
121
122	/*
123	* Deal with the return codes.
124	*/
125	rc = emR3HighPriorityPostForcedActions(pVM, pVCpu, rc);
126	rc = emR3HmHandleRC(pVM, pVCpu, pCtx, rc);
127	return rc;
128	}
129
130
131	static int emR3SingleStepExecHm(PVM pVM, PVMCPU pVCpu, uint32_t cIterations)
132	{
133	int rc = VINF_SUCCESS;
134	EMSTATE enmOldState = pVCpu->em.s.enmState;
135	pVCpu->em.s.enmState = EMSTATE_DEBUG_GUEST_HM;
136
137	Log(("Single step BEGIN:\n"));
138	for (uint32_t i = 0; i < cIterations; i++)
139	{
140	DBGFR3PrgStep(pVCpu);
141	DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, "RSS");
142	rc = emR3HmStep(pVM, pVCpu);
143	if ( rc != VINF_SUCCESS
144	\|\| !HMR3CanExecuteGuest(pVM, pVCpu->em.s.pCtx))
145	break;
146	}
147	Log(("Single step END: rc=%Rrc\n", rc));
148	CPUMSetGuestEFlags(pVCpu, CPUMGetGuestEFlags(pVCpu) & ~X86_EFL_TF);
149	pVCpu->em.s.enmState = enmOldState;
150	return rc == VINF_SUCCESS ? VINF_EM_RESCHEDULE_REM : rc;
151	}
152
153	#endif /* DEBUG */
154
155
156	/**
157	* Executes instruction in HM mode if we can.
158	*
159	* This is somewhat comparable to REMR3EmulateInstruction.
160	*
161	* @returns VBox strict status code.
162	* @retval VINF_EM_DBG_STEPPED on success.
163	* @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
164	* HM right now.
165	*
166	* @param pVM Pointer to the cross context VM structure.
167	* @param pVCpu Pointer to the cross context CPU structure for
168	* the calling EMT.
169	* @thread EMT.
170	*/
171	VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu)
172	{
173	if (!HMR3CanExecuteGuest(pVM, pVCpu->em.s.pCtx))
174	return VINF_EM_RESCHEDULE;
175
176	/*
177	* Service necessary FFs before going into HM.
178	*/
179	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
180	if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
181	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
182	{
183	VBOXSTRICTRC rcStrict = emR3HmForcedActions(pVM, pVCpu, pCtx);
184	if (rcStrict != VINF_SUCCESS)
185	{
186	Log(("EMR3HmSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
187	return rcStrict;
188	}
189	}
190
191	/*
192	* Go execute it.
193	*/
194	bool fOld = HMSetSingleInstruction(pVCpu, true);
195	VBOXSTRICTRC rcStrict = VMMR3HmRunGC(pVM, pVCpu);
196	HMSetSingleInstruction(pVCpu, fOld);
197	LogFlow(("EMR3HmSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
198
199	/*
200	* Handle high priority FFs and informational status codes. We don't do
201	* normal FF processing the caller or the next call can deal with them.
202	*/
203	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
204	if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
205	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
206	{
207	rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
208	LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
209	}
210
211	if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST \|\| rcStrict > VINF_EM_LAST))
212	{
213	rcStrict = emR3HmHandleRC(pVM, pVCpu, pCtx, VBOXSTRICTRC_TODO(rcStrict));
214	Log(("EMR3HmSingleInstruction: emR3HmHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
215	}
216
217	return rcStrict;
218	}
219
220
221	/**
222	* Executes one (or perhaps a few more) instruction(s).
223	*
224	* @returns VBox status code suitable for EM.
225	*
226	* @param pVM Pointer to the VM.
227	* @param pVCpu Pointer to the VMCPU.
228	* @param rcRC Return code from RC.
229	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
230	* instruction and prefix the log output with this text.
231	*/
232	#ifdef LOG_ENABLED
233	static int emR3ExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
234	#else
235	static int emR3ExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
236	#endif
237	{
238	#ifdef LOG_ENABLED
239	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
240	#endif
241	int rc;
242	NOREF(rcRC);
243
244	/*
245	*
246	* The simple solution is to use the recompiler.
247	* The better solution is to disassemble the current instruction and
248	* try handle as many as possible without using REM.
249	*
250	*/
251
252	#ifdef LOG_ENABLED
253	/*
254	* Disassemble the instruction if requested.
255	*/
256	if (pszPrefix)
257	{
258	DBGFR3_INFO_LOG(pVM, "cpumguest", pszPrefix);
259	DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
260	}
261	#endif /* LOG_ENABLED */
262
263	#if 0
264	/* Try our own instruction emulator before falling back to the recompiler. */
265	DISCPUSTATE Cpu;
266	rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pCtx->rip, &Cpu, "GEN EMU");
267	if (RT_SUCCESS(rc))
268	{
269	switch (Cpu.pCurInstr->uOpcode)
270	{
271	/* @todo we can do more now */
272	case OP_MOV:
273	case OP_AND:
274	case OP_OR:
275	case OP_XOR:
276	case OP_POP:
277	case OP_INC:
278	case OP_DEC:
279	case OP_XCHG:
280	STAM_PROFILE_START(&pVCpu->em.s.StatMiscEmu, a);
281	rc = EMInterpretInstructionCpuUpdtPC(pVM, pVCpu, &Cpu, CPUMCTX2CORE(pCtx), 0);
282	if (RT_SUCCESS(rc))
283	{
284	#ifdef EM_NOTIFY_HM
285	if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HM)
286	HMR3NotifyEmulated(pVCpu);
287	#endif
288	STAM_PROFILE_STOP(&pVCpu->em.s.StatMiscEmu, a);
289	return rc;
290	}
291	if (rc != VERR_EM_INTERPRETER)
292	AssertMsgFailedReturn(("rc=%Rrc\n", rc), rc);
293	STAM_PROFILE_STOP(&pVCpu->em.s.StatMiscEmu, a);
294	break;
295	}
296	}
297	#endif /* 0 */
298	STAM_PROFILE_START(&pVCpu->em.s.StatREMEmu, a);
299	Log(("EMINS: %04x:%RGv RSP=%RGv\n", pCtx->cs.Sel, (RTGCPTR)pCtx->rip, (RTGCPTR)pCtx->rsp));
300	#ifdef VBOX_WITH_REM
301	EMRemLock(pVM);
302	/* Flush the recompiler TLB if the VCPU has changed. */
303	if (pVM->em.s.idLastRemCpu != pVCpu->idCpu)
304	CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL);
305	pVM->em.s.idLastRemCpu = pVCpu->idCpu;
306
307	rc = REMR3EmulateInstruction(pVM, pVCpu);
308	EMRemUnlock(pVM);
309	#else
310	rc = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu)); NOREF(pVM);
311	#endif
312	STAM_PROFILE_STOP(&pVCpu->em.s.StatREMEmu, a);
313
314	#ifdef EM_NOTIFY_HM
315	if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HM)
316	HMR3NotifyEmulated(pVCpu);
317	#endif
318	return rc;
319	}
320
321
322	/**
323	* Executes one (or perhaps a few more) instruction(s).
324	* This is just a wrapper for discarding pszPrefix in non-logging builds.
325	*
326	* @returns VBox status code suitable for EM.
327	* @param pVM Pointer to the VM.
328	* @param pVCpu Pointer to the VMCPU.
329	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
330	* instruction and prefix the log output with this text.
331	* @param rcGC GC return code
332	*/
333	DECLINLINE(int) emR3ExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
334	{
335	#ifdef LOG_ENABLED
336	return emR3ExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
337	#else
338	return emR3ExecuteInstructionWorker(pVM, pVCpu, rcGC);
339	#endif
340	}
341
342	/**
343	* Executes one (or perhaps a few more) IO instruction(s).
344	*
345	* @returns VBox status code suitable for EM.
346	* @param pVM Pointer to the VM.
347	* @param pVCpu Pointer to the VMCPU.
348	*/
349	static int emR3ExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
350	{
351	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
352
353	STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
354
355	/* Try to restart the io instruction that was refused in ring-0. */
356	VBOXSTRICTRC rcStrict = HMR3RestartPendingIOInstr(pVM, pVCpu, pCtx);
357	if (IOM_SUCCESS(rcStrict))
358	{
359	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoRestarted);
360	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
361	return VBOXSTRICTRC_TODO(rcStrict); /* rip already updated. */
362	}
363	AssertMsgReturn(rcStrict == VERR_NOT_FOUND, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
364	RT_SUCCESS_NP(rcStrict) ? VERR_IPE_UNEXPECTED_INFO_STATUS : VBOXSTRICTRC_TODO(rcStrict));
365
366	#ifdef VBOX_WITH_FIRST_IEM_STEP
367	/* Hand it over to the interpreter. */
368	rcStrict = IEMExecOne(pVCpu);
369	LogFlow(("emR3ExecuteIOInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
370	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoIem);
371	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
372	return VBOXSTRICTRC_TODO(rcStrict);
373
374	#else
375	/** @todo probably we should fall back to the recompiler; otherwise we'll go back and forth between HC & GC
376	* as io instructions tend to come in packages of more than one
377	*/
378	DISCPUSTATE Cpu;
379	int rc2 = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pCtx->rip, &Cpu, "IO EMU");
380	if (RT_SUCCESS(rc2))
381	{
382	rcStrict = VINF_EM_RAW_EMULATE_INSTR;
383
384	if (!(Cpu.fPrefix & (DISPREFIX_REP \| DISPREFIX_REPNE)))
385	{
386	switch (Cpu.pCurInstr->uOpcode)
387	{
388	case OP_IN:
389	{
390	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIn);
391	rcStrict = IOMInterpretIN(pVM, pVCpu, CPUMCTX2CORE(pCtx), &Cpu);
392	break;
393	}
394
395	case OP_OUT:
396	{
397	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatOut);
398	rcStrict = IOMInterpretOUT(pVM, pVCpu, CPUMCTX2CORE(pCtx), &Cpu);
399	break;
400	}
401	}
402	}
403	else if (Cpu.fPrefix & DISPREFIX_REP)
404	{
405	switch (Cpu.pCurInstr->uOpcode)
406	{
407	case OP_INSB:
408	case OP_INSWD:
409	{
410	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIn);
411	rcStrict = IOMInterpretINS(pVM, pVCpu, CPUMCTX2CORE(pCtx), &Cpu);
412	break;
413	}
414
415	case OP_OUTSB:
416	case OP_OUTSWD:
417	{
418	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatOut);
419	rcStrict = IOMInterpretOUTS(pVM, pVCpu, CPUMCTX2CORE(pCtx), &Cpu);
420	break;
421	}
422	}
423	}
424
425	/*
426	* Handled the I/O return codes.
427	* (The unhandled cases end up with rcStrict == VINF_EM_RAW_EMULATE_INSTR.)
428	*/
429	if (IOM_SUCCESS(rcStrict))
430	{
431	pCtx->rip += Cpu.cbInstr;
432	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
433	LogFlow(("emR3ExecuteIOInstruction: %Rrc 1\n", VBOXSTRICTRC_VAL(rcStrict)));
434	return VBOXSTRICTRC_TODO(rcStrict);
435	}
436
437	if (rcStrict == VINF_EM_RAW_GUEST_TRAP)
438	{
439	/* The active trap will be dispatched. */
440	Assert(TRPMHasTrap(pVCpu));
441	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
442	LogFlow(("emR3ExecuteIOInstruction: VINF_SUCCESS 2\n"));
443	return VINF_SUCCESS;
444	}
445	AssertMsg(rcStrict != VINF_TRPM_XCPT_DISPATCHED, ("Handle VINF_TRPM_XCPT_DISPATCHED\n"));
446
447	if (RT_FAILURE(rcStrict))
448	{
449	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
450	LogFlow(("emR3ExecuteIOInstruction: %Rrc 3\n", VBOXSTRICTRC_VAL(rcStrict)));
451	return VBOXSTRICTRC_TODO(rcStrict);
452	}
453	AssertMsg(rcStrict == VINF_EM_RAW_EMULATE_INSTR \|\| rcStrict == VINF_EM_RESCHEDULE_REM, ("rcStrict=%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
454	}
455
456	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
457	int rc3 = emR3ExecuteInstruction(pVM, pVCpu, "IO: ");
458	LogFlow(("emR3ExecuteIOInstruction: %Rrc 4 (rc2=%Rrc, rc3=%Rrc)\n", VBOXSTRICTRC_VAL(rcStrict), rc2, rc3));
459	return rc3;
460	#endif
461	}
462
463
464	/**
465	* Process raw-mode specific forced actions.
466	*
467	* This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK is pending.
468	*
469	* @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
470	* EM statuses.
471	* @param pVM Pointer to the VM.
472	* @param pVCpu Pointer to the VMCPU.
473	* @param pCtx Pointer to the guest CPU context.
474	*/
475	static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
476	{
477	/*
478	* Sync page directory.
479	*/
480	if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
481	{
482	Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
483	int rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
484	if (RT_FAILURE(rc))
485	return rc;
486
487	#ifdef VBOX_WITH_RAW_MODE
488	Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT));
489	#endif
490
491	/* Prefetch pages for EIP and ESP. */
492	/** @todo This is rather expensive. Should investigate if it really helps at all. */
493	rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_CS, CPUMCTX2CORE(pCtx), pCtx->rip));
494	if (rc == VINF_SUCCESS)
495	rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_SS, CPUMCTX2CORE(pCtx), pCtx->rsp));
496	if (rc != VINF_SUCCESS)
497	{
498	if (rc != VINF_PGM_SYNC_CR3)
499	{
500	AssertLogRelMsgReturn(RT_FAILURE(rc), ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
501	return rc;
502	}
503	rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
504	if (RT_FAILURE(rc))
505	return rc;
506	}
507	/** @todo maybe prefetch the supervisor stack page as well */
508	#ifdef VBOX_WITH_RAW_MODE
509	Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT));
510	#endif
511	}
512
513	/*
514	* Allocate handy pages (just in case the above actions have consumed some pages).
515	*/
516	if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
517	{
518	int rc = PGMR3PhysAllocateHandyPages(pVM);
519	if (RT_FAILURE(rc))
520	return rc;
521	}
522
523	/*
524	* Check whether we're out of memory now.
525	*
526	* This may stem from some of the above actions or operations that has been executed
527	* since we ran FFs. The allocate handy pages must for instance always be followed by
528	* this check.
529	*/
530	if (VM_FF_IS_PENDING(pVM, VM_FF_PGM_NO_MEMORY))
531	return VINF_EM_NO_MEMORY;
532
533	return VINF_SUCCESS;
534	}
535
536
537	/**
538	* Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
539	*
540	* This function contains the raw-mode version of the inner
541	* execution loop (the outer loop being in EMR3ExecuteVM()).
542	*
543	* @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
544	* VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
545	*
546	* @param pVM Pointer to the VM.
547	* @param pVCpu Pointer to the VMCPU.
548	* @param pfFFDone Where to store an indicator telling whether or not
549	* FFs were done before returning.
550	*/
551	int emR3HmExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
552	{
553	int rc = VERR_IPE_UNINITIALIZED_STATUS;
554	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
555
556	LogFlow(("emR3HmExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pCtx->cs.Sel, (RTGCPTR)pCtx->rip));
557	*pfFFDone = false;
558
559	STAM_COUNTER_INC(&pVCpu->em.s.StatHmExecuteEntry);
560
561	#ifdef EM_NOTIFY_HM
562	HMR3NotifyScheduled(pVCpu);
563	#endif
564
565	/*
566	* Spin till we get a forced action which returns anything but VINF_SUCCESS.
567	*/
568	for (;;)
569	{
570	STAM_PROFILE_ADV_START(&pVCpu->em.s.StatHmEntry, a);
571
572	/* Check if a forced reschedule is pending. */
573	if (HMR3IsRescheduleRequired(pVM, pCtx))
574	{
575	rc = VINF_EM_RESCHEDULE;
576	break;
577	}
578
579	/*
580	* Process high priority pre-execution raw-mode FFs.
581	*/
582	#ifdef VBOX_WITH_RAW_MODE
583	Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT));
584	#endif
585	if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
586	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
587	{
588	rc = emR3HmForcedActions(pVM, pVCpu, pCtx);
589	if (rc != VINF_SUCCESS)
590	break;
591	}
592
593	#ifdef LOG_ENABLED
594	/*
595	* Log important stuff before entering GC.
596	*/
597	if (TRPMHasTrap(pVCpu))
598	Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pCtx->cs.Sel, (RTGCPTR)pCtx->rip));
599
600	uint32_t cpl = CPUMGetGuestCPL(pVCpu);
601
602	if (pVM->cCpus == 1)
603	{
604	if (pCtx->eflags.Bits.u1VM)
605	Log(("HWV86: %08X IF=%d\n", pCtx->eip, pCtx->eflags.Bits.u1IF));
606	else if (CPUMIsGuestIn64BitCodeEx(pCtx))
607	Log(("HWR%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs.Sel, (RTGCPTR)pCtx->rip, pCtx->rsp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
608	else
609	Log(("HWR%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs.Sel, pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
610	}
611	else
612	{
613	if (pCtx->eflags.Bits.u1VM)
614	Log(("HWV86-CPU%d: %08X IF=%d\n", pVCpu->idCpu, pCtx->eip, pCtx->eflags.Bits.u1IF));
615	else if (CPUMIsGuestIn64BitCodeEx(pCtx))
616	Log(("HWR%d-CPU%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pCtx->cs.Sel, (RTGCPTR)pCtx->rip, pCtx->rsp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
617	else
618	Log(("HWR%d-CPU%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pCtx->cs.Sel, pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
619	}
620	#endif /* LOG_ENABLED */
621
622	/*
623	* Execute the code.
624	*/
625	STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatHmEntry, a);
626
627	if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
628	{
629	STAM_PROFILE_START(&pVCpu->em.s.StatHmExec, x);
630	rc = VMMR3HmRunGC(pVM, pVCpu);
631	STAM_PROFILE_STOP(&pVCpu->em.s.StatHmExec, x);
632	}
633	else
634	{
635	/* Give up this time slice; virtual time continues */
636	STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
637	RTThreadSleep(5);
638	STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
639	rc = VINF_SUCCESS;
640	}
641
642
643	/*
644	* Deal with high priority post execution FFs before doing anything else.
645	*/
646	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
647	if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
648	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
649	rc = emR3HighPriorityPostForcedActions(pVM, pVCpu, rc);
650
651	/*
652	* Process the returned status code.
653	*/
654	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
655	break;
656
657	rc = emR3HmHandleRC(pVM, pVCpu, pCtx, rc);
658	if (rc != VINF_SUCCESS)
659	break;
660
661	/*
662	* Check and execute forced actions.
663	*/
664	#ifdef VBOX_HIGH_RES_TIMERS_HACK
665	TMTimerPollVoid(pVM, pVCpu);
666	#endif
667	if ( VM_FF_IS_PENDING(pVM, VM_FF_ALL_MASK)
668	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_ALL_MASK))
669	{
670	rc = emR3ForcedActions(pVM, pVCpu, rc);
671	VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
672	if ( rc != VINF_SUCCESS
673	&& rc != VINF_EM_RESCHEDULE_HM)
674	{
675	*pfFFDone = true;
676	break;
677	}
678	}
679	}
680
681	/*
682	* Return to outer loop.
683	*/
684	#if defined(LOG_ENABLED) && defined(DEBUG)
685	RTLogFlush(NULL);
686	#endif
687	return rc;
688	}
689

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source: vbox/trunk/src/VBox/VMM/VMMR3/EMHM.cpp@ 47619

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