VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/DBGFReg.cpp

最後變更 在這個檔案是 107798,由 vboxsync 提交於 2 月 前

VMM/CPUM,DBGF: Register IA32_ARCH_CAPABILITIES and IA32_SPEC_CTRL as CPU registers with DBGF. [debug assertion fixes] jiraref:VBP-947
  • 屬性 svn:eol-style 設為 native
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1/* $Id: DBGFReg.cpp 107798 2025-01-15 21:30:47Z vboxsync $ */
2/** @file
3 * DBGF - Debugger Facility, Register Methods.
4 */
5
6/*
7 * Copyright (C) 2010-2024 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.alldomusa.eu.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_DBGF
33#include <VBox/vmm/dbgf.h>
34#include "DBGFInternal.h"
35#include <VBox/vmm/mm.h>
36#include <VBox/vmm/vm.h>
37#include <VBox/vmm/uvm.h>
38#include <VBox/param.h>
39#include <VBox/err.h>
40#include <VBox/log.h>
41#include <iprt/ctype.h>
42#include <iprt/string.h>
43#include <iprt/uint128.h>
44
45
46/*********************************************************************************************************************************
47* Defined Constants And Macros *
48*********************************************************************************************************************************/
49/** Locks the register database for writing. */
50#define DBGF_REG_DB_LOCK_WRITE(pUVM) \
51 do { \
52 int rcSem = RTSemRWRequestWrite((pUVM)->dbgf.s.hRegDbLock, RT_INDEFINITE_WAIT); \
53 AssertRC(rcSem); \
54 } while (0)
55
56/** Unlocks the register database after writing. */
57#define DBGF_REG_DB_UNLOCK_WRITE(pUVM) \
58 do { \
59 int rcSem = RTSemRWReleaseWrite((pUVM)->dbgf.s.hRegDbLock); \
60 AssertRC(rcSem); \
61 } while (0)
62
63/** Locks the register database for reading. */
64#define DBGF_REG_DB_LOCK_READ(pUVM) \
65 do { \
66 int rcSem = RTSemRWRequestRead((pUVM)->dbgf.s.hRegDbLock, RT_INDEFINITE_WAIT); \
67 AssertRC(rcSem); \
68 } while (0)
69
70/** Unlocks the register database after reading. */
71#define DBGF_REG_DB_UNLOCK_READ(pUVM) \
72 do { \
73 int rcSem = RTSemRWReleaseRead((pUVM)->dbgf.s.hRegDbLock); \
74 AssertRC(rcSem); \
75 } while (0)
76
77
78/** The max length of a set, register or sub-field name. */
79#define DBGF_REG_MAX_NAME 40
80
81
82/*********************************************************************************************************************************
83* Structures and Typedefs *
84*********************************************************************************************************************************/
85/**
86 * Register set registration record type.
87 */
88typedef enum DBGFREGSETTYPE
89{
90 /** Invalid zero value. */
91 DBGFREGSETTYPE_INVALID = 0,
92 /** CPU record. */
93 DBGFREGSETTYPE_CPU,
94 /** Device record. */
95 DBGFREGSETTYPE_DEVICE,
96 /** End of valid record types. */
97 DBGFREGSETTYPE_END
98} DBGFREGSETTYPE;
99
100
101/**
102 * Register set registration record.
103 */
104typedef struct DBGFREGSET
105{
106 /** String space core. */
107 RTSTRSPACECORE Core;
108 /** The registration record type. */
109 DBGFREGSETTYPE enmType;
110 /** The user argument for the callbacks. */
111 union
112 {
113 /** The CPU view. */
114 PVMCPU pVCpu;
115 /** The device view. */
116 PPDMDEVINS pDevIns;
117 /** The general view. */
118 void *pv;
119 } uUserArg;
120
121 /** The register descriptors. */
122 PCDBGFREGDESC paDescs;
123 /** The number of register descriptors. */
124 uint32_t cDescs;
125
126 /** Array of lookup records.
127 * The first part of the array runs parallel to paDescs, the rest are
128 * covering for aliases and bitfield variations. It's done this way to
129 * simplify the query all operations. */
130 struct DBGFREGLOOKUP *paLookupRecs;
131 /** The number of lookup records. */
132 uint32_t cLookupRecs;
133
134 /** The register name prefix. */
135 char szPrefix[1];
136} DBGFREGSET;
137/** Pointer to a register registration record. */
138typedef DBGFREGSET *PDBGFREGSET;
139/** Pointer to a const register registration record. */
140typedef DBGFREGSET const *PCDBGFREGSET;
141
142
143/**
144 * Register lookup record.
145 */
146typedef struct DBGFREGLOOKUP
147{
148 /** The string space core. */
149 RTSTRSPACECORE Core;
150 /** Pointer to the set. */
151 PCDBGFREGSET pSet;
152 /** Pointer to the register descriptor. */
153 PCDBGFREGDESC pDesc;
154 /** If an alias this points to the alias descriptor, NULL if not. */
155 PCDBGFREGALIAS pAlias;
156 /** If a sub-field this points to the sub-field descriptor, NULL if not. */
157 PCDBGFREGSUBFIELD pSubField;
158} DBGFREGLOOKUP;
159/** Pointer to a register lookup record. */
160typedef DBGFREGLOOKUP *PDBGFREGLOOKUP;
161/** Pointer to a const register lookup record. */
162typedef DBGFREGLOOKUP const *PCDBGFREGLOOKUP;
163
164
165/**
166 * Argument packet from DBGFR3RegNmQueryAll to dbgfR3RegNmQueryAllWorker.
167 */
168typedef struct DBGFR3REGNMQUERYALLARGS
169{
170 /** The output register array. */
171 PDBGFREGENTRYNM paRegs;
172 /** The number of entries in the output array. */
173 size_t cRegs;
174 /** The current register number when enumerating the string space.
175 * @remarks Only used by EMT(0). */
176 size_t iReg;
177} DBGFR3REGNMQUERYALLARGS;
178/** Pointer to a dbgfR3RegNmQueryAllWorker argument packet. */
179typedef DBGFR3REGNMQUERYALLARGS *PDBGFR3REGNMQUERYALLARGS;
180
181
182/**
183 * Argument packet passed by DBGFR3RegPrintfV to dbgfR3RegPrintfCbOutput and
184 * dbgfR3RegPrintfCbFormat.
185 */
186typedef struct DBGFR3REGPRINTFARGS
187{
188 /** The user mode VM handle. */
189 PUVM pUVM;
190 /** The target CPU. */
191 VMCPUID idCpu;
192 /** Set if we're looking at guest registers. */
193 bool fGuestRegs;
194 /** The output buffer. */
195 char *pszBuf;
196 /** The format string. */
197 const char *pszFormat;
198 /** The va list with format arguments. */
199 va_list va;
200
201 /** The current buffer offset. */
202 size_t offBuf;
203 /** The amount of buffer space left, not counting the terminator char. */
204 size_t cchLeftBuf;
205 /** The status code of the whole operation. First error is return,
206 * subsequent ones are suppressed. */
207 int rc;
208} DBGFR3REGPRINTFARGS;
209/** Pointer to a DBGFR3RegPrintfV argument packet. */
210typedef DBGFR3REGPRINTFARGS *PDBGFR3REGPRINTFARGS;
211
212
213
214/**
215 * Initializes the register database.
216 *
217 * @returns VBox status code.
218 * @param pUVM The user mode VM handle.
219 */
220int dbgfR3RegInit(PUVM pUVM)
221{
222 int rc = VINF_SUCCESS;
223 if (!pUVM->dbgf.s.fRegDbInitialized)
224 {
225 rc = RTSemRWCreate(&pUVM->dbgf.s.hRegDbLock);
226 pUVM->dbgf.s.fRegDbInitialized = RT_SUCCESS(rc);
227 }
228 return rc;
229}
230
231
232/**
233 * Terminates the register database.
234 *
235 * @param pUVM The user mode VM handle.
236 */
237void dbgfR3RegTerm(PUVM pUVM)
238{
239 RTSemRWDestroy(pUVM->dbgf.s.hRegDbLock);
240 pUVM->dbgf.s.hRegDbLock = NIL_RTSEMRW;
241 pUVM->dbgf.s.fRegDbInitialized = false;
242}
243
244
245/**
246 * Validates a register name.
247 *
248 * This is used for prefixes, aliases and field names.
249 *
250 * @returns true if valid, false if not.
251 * @param pszName The register name to validate.
252 * @param chDot Set to '.' if accepted, otherwise 0.
253 */
254static bool dbgfR3RegIsNameValid(const char *pszName, char chDot)
255{
256 const char *psz = pszName;
257 if (!RT_C_IS_ALPHA(*psz))
258 return false;
259 char ch;
260 while ((ch = *++psz))
261 if ( !RT_C_IS_LOWER(ch)
262 && !RT_C_IS_DIGIT(ch)
263 && ch != '_'
264 && ch != chDot)
265 return false;
266 if (psz - pszName > DBGF_REG_MAX_NAME)
267 return false;
268 return true;
269}
270
271
272/**
273 * Common worker for registering a register set.
274 *
275 * @returns VBox status code.
276 * @param pUVM The user mode VM handle.
277 * @param paRegisters The register descriptors.
278 * @param enmType The set type.
279 * @param pvUserArg The user argument for the callbacks.
280 * @param pszPrefix The name prefix.
281 * @param iInstance The instance number to be appended to @a
282 * pszPrefix when creating the set name.
283 */
284static int dbgfR3RegRegisterCommon(PUVM pUVM, PCDBGFREGDESC paRegisters, DBGFREGSETTYPE enmType, void *pvUserArg,
285 const char *pszPrefix, uint32_t iInstance)
286{
287 /*
288 * Validate input.
289 */
290 /* The name components. */
291 AssertMsgReturn(dbgfR3RegIsNameValid(pszPrefix, 0), ("%s\n", pszPrefix), VERR_INVALID_NAME);
292 const char *psz = RTStrEnd(pszPrefix, RTSTR_MAX);
293 bool const fNeedUnderscore = RT_C_IS_DIGIT(psz[-1]);
294 size_t const cchPrefix = psz - pszPrefix + fNeedUnderscore;
295 AssertMsgReturn(cchPrefix < RT_SIZEOFMEMB(DBGFREGSET, szPrefix) - 4 - 1, ("%s\n", pszPrefix), VERR_INVALID_NAME);
296
297 AssertMsgReturn(iInstance <= 9999, ("%d\n", iInstance), VERR_INVALID_NAME);
298
299 /* The descriptors. */
300#ifdef VBOX_VMM_TARGET_X86
301 DBGFREG const enmCpuFirst = DBGFREG_X86_FIRST;
302 DBGFREG const enmCpuLast = DBGFREG_X86_LAST;
303#elif defined(VBOX_VMM_TARGET_ARMV8)
304 DBGFREG const enmCpuFirst = DBGFREG_ARMV8_FIRST;
305 DBGFREG const enmCpuLast = DBGFREG_ARMV8_LAST;
306#else
307# error "port me"
308#endif
309 unsigned const cCpuDescs = (unsigned)enmCpuLast - (unsigned)enmCpuFirst + 1;
310 uint32_t cLookupRecs = 0;
311 uint32_t iDesc;
312 for (iDesc = 0; paRegisters[iDesc].pszName != NULL; iDesc++)
313 {
314 AssertMsgReturn(dbgfR3RegIsNameValid(paRegisters[iDesc].pszName, 0), ("%s (#%u)\n", paRegisters[iDesc].pszName, iDesc), VERR_INVALID_NAME);
315
316 if (enmType == DBGFREGSETTYPE_CPU) /* The CPU descriptors must be in enum order. */
317 AssertMsgReturn(iDesc < cCpuDescs && (unsigned)paRegisters[iDesc].enmReg == iDesc + (unsigned)enmCpuFirst,
318 ("%d iDesc=%u+%d=%u\n", paRegisters[iDesc].enmReg, iDesc, enmCpuFirst, iDesc + (unsigned)enmCpuFirst),
319 VERR_INVALID_PARAMETER);
320 else
321 AssertReturn(paRegisters[iDesc].enmReg == DBGFREG_END, VERR_INVALID_PARAMETER);
322 AssertReturn( paRegisters[iDesc].enmType > DBGFREGVALTYPE_INVALID
323 && paRegisters[iDesc].enmType < DBGFREGVALTYPE_END, VERR_INVALID_PARAMETER);
324 AssertMsgReturn(!(paRegisters[iDesc].fFlags & ~DBGFREG_FLAGS_READ_ONLY),
325 ("%#x (#%u)\n", paRegisters[iDesc].fFlags, iDesc),
326 VERR_INVALID_PARAMETER);
327 AssertPtrReturn(paRegisters[iDesc].pfnGet, VERR_INVALID_PARAMETER);
328 AssertReturn(RT_VALID_PTR(paRegisters[iDesc].pfnSet) || (paRegisters[iDesc].fFlags & DBGFREG_FLAGS_READ_ONLY),
329 VERR_INVALID_PARAMETER);
330
331 uint32_t iAlias = 0;
332 PCDBGFREGALIAS paAliases = paRegisters[iDesc].paAliases;
333 if (paAliases)
334 {
335 AssertPtrReturn(paAliases, VERR_INVALID_PARAMETER);
336 for (; paAliases[iAlias].pszName; iAlias++)
337 {
338 AssertMsgReturn(dbgfR3RegIsNameValid(paAliases[iAlias].pszName, 0), ("%s (%s)\n", paAliases[iAlias].pszName, paRegisters[iDesc].pszName), VERR_INVALID_NAME);
339 AssertReturn( paAliases[iAlias].enmType > DBGFREGVALTYPE_INVALID
340 && paAliases[iAlias].enmType < DBGFREGVALTYPE_END, VERR_INVALID_PARAMETER);
341 }
342 }
343
344 uint32_t iSubField = 0;
345 PCDBGFREGSUBFIELD paSubFields = paRegisters[iDesc].paSubFields;
346 if (paSubFields)
347 {
348 AssertPtrReturn(paSubFields, VERR_INVALID_PARAMETER);
349 for (; paSubFields[iSubField].pszName; iSubField++)
350 {
351 AssertMsgReturn(dbgfR3RegIsNameValid(paSubFields[iSubField].pszName, '.'), ("%s (%s)\n", paSubFields[iSubField].pszName, paRegisters[iDesc].pszName), VERR_INVALID_NAME);
352 AssertReturn(paSubFields[iSubField].iFirstBit + paSubFields[iSubField].cBits <= 128, VERR_INVALID_PARAMETER);
353 AssertReturn(paSubFields[iSubField].cBits + paSubFields[iSubField].cShift <= 128, VERR_INVALID_PARAMETER);
354 AssertPtrNullReturn(paSubFields[iSubField].pfnGet, VERR_INVALID_POINTER);
355 AssertPtrNullReturn(paSubFields[iSubField].pfnSet, VERR_INVALID_POINTER);
356 }
357 }
358
359 cLookupRecs += (1 + iAlias) * (1 + iSubField);
360 }
361
362 /* Check the instance number of the CPUs. */
363 AssertReturn(enmType != DBGFREGSETTYPE_CPU || iInstance < pUVM->cCpus, VERR_INVALID_CPU_ID);
364
365 /*
366 * Allocate a new record and all associated lookup records.
367 */
368 size_t cbRegSet = RT_UOFFSETOF_DYN(DBGFREGSET, szPrefix[cchPrefix + 4 + 1]);
369 cbRegSet = RT_ALIGN_Z(cbRegSet, 32);
370 size_t const offLookupRecArray = cbRegSet;
371 cbRegSet += cLookupRecs * sizeof(DBGFREGLOOKUP);
372
373 PDBGFREGSET pRegSet = (PDBGFREGSET)MMR3HeapAllocZU(pUVM, MM_TAG_DBGF_REG, cbRegSet);
374 if (!pRegSet)
375 return VERR_NO_MEMORY;
376
377 /*
378 * Initialize the new record.
379 */
380 pRegSet->Core.pszString = pRegSet->szPrefix;
381 pRegSet->enmType = enmType;
382 pRegSet->uUserArg.pv = pvUserArg;
383 pRegSet->paDescs = paRegisters;
384 pRegSet->cDescs = iDesc;
385 pRegSet->cLookupRecs = cLookupRecs;
386 pRegSet->paLookupRecs = (PDBGFREGLOOKUP)((uintptr_t)pRegSet + offLookupRecArray);
387 if (fNeedUnderscore)
388 RTStrPrintf(pRegSet->szPrefix, cchPrefix + 4 + 1, "%s_%u", pszPrefix, iInstance);
389 else
390 RTStrPrintf(pRegSet->szPrefix, cchPrefix + 4 + 1, "%s%u", pszPrefix, iInstance);
391
392 /*
393 * Initialize the lookup records. See DBGFREGSET::paLookupRecs.
394 */
395 char szName[DBGF_REG_MAX_NAME * 3 + 16];
396 strcpy(szName, pRegSet->szPrefix);
397 char *pszReg = strchr(szName, '\0');
398 *pszReg++ = '.';
399
400 /* Array parallel to the descriptors. */
401 int rc = VINF_SUCCESS;
402 PDBGFREGLOOKUP pLookupRec = &pRegSet->paLookupRecs[0];
403 for (iDesc = 0; paRegisters[iDesc].pszName != NULL && RT_SUCCESS(rc); iDesc++)
404 {
405 strcpy(pszReg, paRegisters[iDesc].pszName);
406 pLookupRec->Core.pszString = MMR3HeapStrDupU(pUVM, MM_TAG_DBGF_REG, szName);
407 if (!pLookupRec->Core.pszString)
408 rc = VERR_NO_STR_MEMORY;
409 pLookupRec->pSet = pRegSet;
410 pLookupRec->pDesc = &paRegisters[iDesc];
411 pLookupRec->pAlias = NULL;
412 pLookupRec->pSubField = NULL;
413 pLookupRec++;
414 }
415
416 /* Aliases and sub-fields. */
417 for (iDesc = 0; paRegisters[iDesc].pszName != NULL && RT_SUCCESS(rc); iDesc++)
418 {
419 PCDBGFREGALIAS pCurAlias = NULL; /* first time we add sub-fields for the real name. */
420 PCDBGFREGALIAS pNextAlias = paRegisters[iDesc].paAliases;
421 const char *pszRegName = paRegisters[iDesc].pszName;
422 while (RT_SUCCESS(rc))
423 {
424 /* Add sub-field records. */
425 PCDBGFREGSUBFIELD paSubFields = paRegisters[iDesc].paSubFields;
426 if (paSubFields)
427 {
428 size_t cchReg = strlen(pszRegName);
429 memcpy(pszReg, pszRegName, cchReg);
430 char *pszSub = &pszReg[cchReg];
431 *pszSub++ = '.';
432 for (uint32_t iSubField = 0; paSubFields[iSubField].pszName && RT_SUCCESS(rc); iSubField++)
433 {
434 strcpy(pszSub, paSubFields[iSubField].pszName);
435 pLookupRec->Core.pszString = MMR3HeapStrDupU(pUVM, MM_TAG_DBGF_REG, szName);
436 if (!pLookupRec->Core.pszString)
437 rc = VERR_NO_STR_MEMORY;
438 pLookupRec->pSet = pRegSet;
439 pLookupRec->pDesc = &paRegisters[iDesc];
440 pLookupRec->pAlias = pCurAlias;
441 pLookupRec->pSubField = &paSubFields[iSubField];
442 pLookupRec++;
443 }
444 }
445
446 /* Advance to the next alias. */
447 if (pNextAlias)
448 pCurAlias = pNextAlias++;
449 if (!pCurAlias)
450 break;
451 pszRegName = pCurAlias->pszName;
452 if (!pszRegName)
453 break;
454
455 /* The alias record. */
456 strcpy(pszReg, pszRegName);
457 pLookupRec->Core.pszString = MMR3HeapStrDupU(pUVM, MM_TAG_DBGF_REG, szName);
458 if (!pLookupRec->Core.pszString)
459 rc = VERR_NO_STR_MEMORY;
460 pLookupRec->pSet = pRegSet;
461 pLookupRec->pDesc = &paRegisters[iDesc];
462 pLookupRec->pAlias = pCurAlias;
463 pLookupRec->pSubField = NULL;
464 pLookupRec++;
465 }
466 }
467 Assert(pLookupRec == &pRegSet->paLookupRecs[pRegSet->cLookupRecs]);
468
469 if (RT_SUCCESS(rc))
470 {
471 /*
472 * Insert the record into the register set string space and optionally into
473 * the CPU register set cache.
474 */
475 DBGF_REG_DB_LOCK_WRITE(pUVM);
476
477 bool fInserted = RTStrSpaceInsert(&pUVM->dbgf.s.RegSetSpace, &pRegSet->Core);
478 if (fInserted)
479 {
480 pUVM->dbgf.s.cRegs += pRegSet->cDescs;
481 if (enmType == DBGFREGSETTYPE_CPU)
482 {
483 if (!strcmp(pszPrefix, "cpu"))
484 {
485 if (!pUVM->dbgf.s.cPerCpuRegs)
486 pUVM->dbgf.s.cPerCpuRegs = pRegSet->cDescs;
487 else
488 AssertLogRelMsgStmt(pUVM->dbgf.s.cPerCpuRegs == pRegSet->cDescs,
489 ("%d vs %d\n", pUVM->dbgf.s.cPerCpuRegs, pRegSet->cDescs),
490 pUVM->dbgf.s.cPerCpuRegs = RT_MAX(pRegSet->cDescs, pUVM->dbgf.s.cPerCpuRegs));
491 pUVM->aCpus[iInstance].dbgf.s.pGuestRegSet = pRegSet;
492 }
493 else
494 {
495 Assert(!strcmp(pszPrefix, "hypercpu"));
496 if (!pUVM->dbgf.s.cPerCpuHyperRegs)
497 pUVM->dbgf.s.cPerCpuHyperRegs = pRegSet->cDescs;
498 else
499 AssertLogRelMsgStmt(pUVM->dbgf.s.cPerCpuHyperRegs == pRegSet->cDescs,
500 ("%d vs %d\n", pUVM->dbgf.s.cPerCpuHyperRegs, pRegSet->cDescs),
501 pUVM->dbgf.s.cPerCpuHyperRegs = RT_MAX(pRegSet->cDescs, pUVM->dbgf.s.cPerCpuHyperRegs));
502 pUVM->aCpus[iInstance].dbgf.s.pHyperRegSet = pRegSet;
503 }
504 }
505
506 PDBGFREGLOOKUP paLookupRecs = pRegSet->paLookupRecs;
507 uint32_t iLookupRec = pRegSet->cLookupRecs;
508 while (iLookupRec-- > 0)
509 {
510 bool fInserted2 = RTStrSpaceInsert(&pUVM->dbgf.s.RegSpace, &paLookupRecs[iLookupRec].Core);
511 AssertMsg(fInserted2, ("'%s'", paLookupRecs[iLookupRec].Core.pszString)); NOREF(fInserted2);
512 }
513
514 DBGF_REG_DB_UNLOCK_WRITE(pUVM);
515 return VINF_SUCCESS;
516 }
517
518 DBGF_REG_DB_UNLOCK_WRITE(pUVM);
519 rc = VERR_DUPLICATE;
520 }
521
522 /*
523 * Bail out.
524 */
525 for (uint32_t i = 0; i < pRegSet->cLookupRecs; i++)
526 MMR3HeapFree((char *)pRegSet->paLookupRecs[i].Core.pszString);
527 MMR3HeapFree(pRegSet);
528
529 return rc;
530}
531
532
533/**
534 * Registers a set of registers for a CPU.
535 *
536 * @returns VBox status code.
537 * @param pVM The cross context VM structure.
538 * @param pVCpu The cross context virtual CPU structure.
539 * @param paRegisters The register descriptors.
540 * @param fGuestRegs Set if it's the guest registers, clear if
541 * hypervisor registers.
542 */
543VMMR3_INT_DECL(int) DBGFR3RegRegisterCpu(PVM pVM, PVMCPU pVCpu, PCDBGFREGDESC paRegisters, bool fGuestRegs)
544{
545 PUVM pUVM = pVM->pUVM;
546 if (!pUVM->dbgf.s.fRegDbInitialized)
547 {
548 int rc = dbgfR3RegInit(pUVM);
549 if (RT_FAILURE(rc))
550 return rc;
551 }
552
553 AssertReturn(fGuestRegs, VERR_RAW_MODE_NOT_SUPPORTED);
554 return dbgfR3RegRegisterCommon(pUVM, paRegisters, DBGFREGSETTYPE_CPU, pVCpu, fGuestRegs ? "cpu" : "hypercpu", pVCpu->idCpu);
555}
556
557
558/**
559 * Registers a set of registers for a device.
560 *
561 * @returns VBox status code.
562 * @param pVM The cross context VM structure.
563 * @param paRegisters The register descriptors.
564 * @param pDevIns The device instance. This will be the callback user
565 * argument.
566 * @param pszPrefix The device name.
567 * @param iInstance The device instance.
568 */
569VMMR3_INT_DECL(int) DBGFR3RegRegisterDevice(PVM pVM, PCDBGFREGDESC paRegisters, PPDMDEVINS pDevIns,
570 const char *pszPrefix, uint32_t iInstance)
571{
572 AssertPtrReturn(paRegisters, VERR_INVALID_POINTER);
573 AssertPtrReturn(pDevIns, VERR_INVALID_POINTER);
574 AssertPtrReturn(pszPrefix, VERR_INVALID_POINTER);
575
576 return dbgfR3RegRegisterCommon(pVM->pUVM, paRegisters, DBGFREGSETTYPE_DEVICE, pDevIns, pszPrefix, iInstance);
577}
578
579
580/**
581 * Clears the register value variable.
582 *
583 * @param pValue The variable to clear.
584 */
585DECLINLINE(void) dbgfR3RegValClear(PDBGFREGVAL pValue)
586{
587 pValue->au64[0] = 0;
588 pValue->au64[1] = 0;
589 pValue->au64[2] = 0;
590 pValue->au64[3] = 0;
591 pValue->au64[4] = 0;
592 pValue->au64[5] = 0;
593 pValue->au64[6] = 0;
594 pValue->au64[7] = 0;
595}
596
597
598/**
599 * Sets a 80-bit floating point variable to a 64-bit unsigned interger value.
600 *
601 * @param pValue The value.
602 * @param u64 The integer value.
603 */
604DECLINLINE(void) dbgfR3RegValR80SetU64(PDBGFREGVAL pValue, uint64_t u64)
605{
606 /** @todo fixme */
607 pValue->r80.s.fSign = 0;
608 pValue->r80.s.uExponent = 16383;
609 pValue->r80.s.uMantissa = u64;
610}
611
612
613/**
614 * Sets a 80-bit floating point variable to a 64-bit unsigned interger value.
615 *
616 * @param pValue The value.
617 * @param u128 The integer value.
618 */
619DECLINLINE(void) dbgfR3RegValR80SetU128(PDBGFREGVAL pValue, RTUINT128U u128)
620{
621 /** @todo fixme */
622 pValue->r80.s.fSign = 0;
623 pValue->r80.s.uExponent = 16383;
624 pValue->r80.s.uMantissa = u128.s.Lo;
625}
626
627
628/**
629 * Get a 80-bit floating point variable as a 64-bit unsigned integer.
630 *
631 * @returns 64-bit unsigned integer.
632 * @param pValue The value.
633 */
634DECLINLINE(uint64_t) dbgfR3RegValR80GetU64(PCDBGFREGVAL pValue)
635{
636 /** @todo stupid, stupid MSC. */
637 return pValue->r80.s.uMantissa;
638}
639
640
641/**
642 * Get a 80-bit floating point variable as a 128-bit unsigned integer.
643 *
644 * @returns 128-bit unsigned integer.
645 * @param pValue The value.
646 */
647DECLINLINE(RTUINT128U) dbgfR3RegValR80GetU128(PCDBGFREGVAL pValue)
648{
649 /** @todo stupid, stupid MSC. */
650 RTUINT128U uRet;
651#if 0
652 uRet.s.Lo = (uint64_t)InVal.lrd;
653 uRet.s.Hi = (uint64_t)InVal.lrd / _4G / _4G;
654#else
655 uRet.s.Lo = pValue->r80.s.uMantissa;
656 uRet.s.Hi = 0;
657#endif
658 return uRet;
659}
660
661
662/**
663 * Performs a cast between register value types.
664 *
665 * @retval VINF_SUCCESS
666 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
667 * @retval VINF_DBGF_TRUNCATED_REGISTER
668 * @retval VERR_DBGF_UNSUPPORTED_CAST
669 *
670 * @param pValue The value to cast (input + output).
671 * @param enmFromType The input value.
672 * @param enmToType The desired output value.
673 */
674static int dbgfR3RegValCast(PDBGFREGVAL pValue, DBGFREGVALTYPE enmFromType, DBGFREGVALTYPE enmToType)
675{
676 DBGFREGVAL const InVal = *pValue;
677 dbgfR3RegValClear(pValue);
678
679 /* Note! No default cases here as gcc warnings about missing enum values
680 are desired. */
681 switch (enmFromType)
682 {
683 case DBGFREGVALTYPE_U8:
684 switch (enmToType)
685 {
686 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u8; return VINF_SUCCESS;
687 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u8; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
688 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u8; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
689 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u8; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
690 case DBGFREGVALTYPE_U128: pValue->u128.s.Lo = InVal.u8; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
691 case DBGFREGVALTYPE_U256: pValue->u256.Words.w0 = InVal.u8; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
692 case DBGFREGVALTYPE_U512: pValue->u512.Words.w0 = InVal.u8; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
693 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU64(pValue, InVal.u8); return VINF_DBGF_ZERO_EXTENDED_REGISTER;
694 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
695
696 case DBGFREGVALTYPE_32BIT_HACK:
697 case DBGFREGVALTYPE_END:
698 case DBGFREGVALTYPE_INVALID:
699 break;
700 }
701 break;
702
703 case DBGFREGVALTYPE_U16:
704 switch (enmToType)
705 {
706 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u16; return VINF_DBGF_TRUNCATED_REGISTER;
707 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u16; return VINF_SUCCESS;
708 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u16; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
709 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u16; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
710 case DBGFREGVALTYPE_U128: pValue->u128.s.Lo = InVal.u16; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
711 case DBGFREGVALTYPE_U256: pValue->u256.Words.w0 = InVal.u16; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
712 case DBGFREGVALTYPE_U512: pValue->u512.Words.w0 = InVal.u16; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
713 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU64(pValue, InVal.u16); return VINF_DBGF_ZERO_EXTENDED_REGISTER;
714 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
715
716 case DBGFREGVALTYPE_32BIT_HACK:
717 case DBGFREGVALTYPE_END:
718 case DBGFREGVALTYPE_INVALID:
719 break;
720 }
721 break;
722
723 case DBGFREGVALTYPE_U32:
724 switch (enmToType)
725 {
726 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u32; return VINF_DBGF_TRUNCATED_REGISTER;
727 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u32; return VINF_DBGF_TRUNCATED_REGISTER;
728 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u32; return VINF_SUCCESS;
729 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u32; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
730 case DBGFREGVALTYPE_U128: pValue->u128.s.Lo = InVal.u32; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
731 case DBGFREGVALTYPE_U256: pValue->u256.DWords.dw0 = InVal.u32; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
732 case DBGFREGVALTYPE_U512: pValue->u512.DWords.dw0 = InVal.u32; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
733 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU64(pValue, InVal.u32); return VINF_DBGF_ZERO_EXTENDED_REGISTER;
734 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
735
736 case DBGFREGVALTYPE_32BIT_HACK:
737 case DBGFREGVALTYPE_END:
738 case DBGFREGVALTYPE_INVALID:
739 break;
740 }
741 break;
742
743 case DBGFREGVALTYPE_U64:
744 switch (enmToType)
745 {
746 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u64; return VINF_DBGF_TRUNCATED_REGISTER;
747 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u64; return VINF_DBGF_TRUNCATED_REGISTER;
748 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u64; return VINF_DBGF_TRUNCATED_REGISTER;
749 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u64; return VINF_SUCCESS;
750 case DBGFREGVALTYPE_U128: pValue->u128.s.Lo = InVal.u64; return VINF_DBGF_TRUNCATED_REGISTER;
751 case DBGFREGVALTYPE_U256: pValue->u256.QWords.qw0 = InVal.u64; return VINF_DBGF_TRUNCATED_REGISTER;
752 case DBGFREGVALTYPE_U512: pValue->u512.QWords.qw0 = InVal.u64; return VINF_DBGF_TRUNCATED_REGISTER;
753 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU64(pValue, InVal.u64); return VINF_DBGF_TRUNCATED_REGISTER;
754 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
755
756 case DBGFREGVALTYPE_32BIT_HACK:
757 case DBGFREGVALTYPE_END:
758 case DBGFREGVALTYPE_INVALID:
759 break;
760 }
761 break;
762
763 case DBGFREGVALTYPE_U128:
764 switch (enmToType)
765 {
766 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u128.s.Lo; return VINF_DBGF_TRUNCATED_REGISTER;
767 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u128.s.Lo; return VINF_DBGF_TRUNCATED_REGISTER;
768 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u128.s.Lo; return VINF_DBGF_TRUNCATED_REGISTER;
769 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u128.s.Lo; return VINF_DBGF_TRUNCATED_REGISTER;
770 case DBGFREGVALTYPE_U128: pValue->u128 = InVal.u128; return VINF_SUCCESS;
771 case DBGFREGVALTYPE_U256: pValue->u256.DQWords.dqw0 = InVal.u128; return VINF_SUCCESS;
772 case DBGFREGVALTYPE_U512: pValue->u512.DQWords.dqw0 = InVal.u128; return VINF_SUCCESS;
773 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU128(pValue, InVal.u128); return VINF_DBGF_TRUNCATED_REGISTER;
774 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
775
776 case DBGFREGVALTYPE_32BIT_HACK:
777 case DBGFREGVALTYPE_END:
778 case DBGFREGVALTYPE_INVALID:
779 break;
780 }
781 break;
782
783 case DBGFREGVALTYPE_U256:
784 switch (enmToType)
785 {
786 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u256.Words.w0; return VINF_DBGF_TRUNCATED_REGISTER;
787 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u256.Words.w0; return VINF_DBGF_TRUNCATED_REGISTER;
788 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u256.DWords.dw0; return VINF_DBGF_TRUNCATED_REGISTER;
789 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u256.QWords.qw0; return VINF_DBGF_TRUNCATED_REGISTER;
790 case DBGFREGVALTYPE_U128: pValue->u128 = InVal.u256.DQWords.dqw0; return VINF_DBGF_TRUNCATED_REGISTER;
791 case DBGFREGVALTYPE_U256: pValue->u256 = InVal.u256; return VINF_SUCCESS;
792 case DBGFREGVALTYPE_U512: pValue->u512.OWords.ow0 = InVal.u256; return VINF_SUCCESS;
793 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU128(pValue, InVal.u256.DQWords.dqw0); return VINF_DBGF_TRUNCATED_REGISTER;
794 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
795
796 case DBGFREGVALTYPE_32BIT_HACK:
797 case DBGFREGVALTYPE_END:
798 case DBGFREGVALTYPE_INVALID:
799 break;
800 }
801 break;
802
803 case DBGFREGVALTYPE_U512:
804 switch (enmToType)
805 {
806 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u512.Words.w0; return VINF_DBGF_TRUNCATED_REGISTER;
807 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u512.Words.w0; return VINF_DBGF_TRUNCATED_REGISTER;
808 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u512.DWords.dw0; return VINF_DBGF_TRUNCATED_REGISTER;
809 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u512.QWords.qw0; return VINF_DBGF_TRUNCATED_REGISTER;
810 case DBGFREGVALTYPE_U128: pValue->u128 = InVal.u512.DQWords.dqw0; return VINF_DBGF_TRUNCATED_REGISTER;
811 case DBGFREGVALTYPE_U256: pValue->u256 = InVal.u512.OWords.ow0; return VINF_DBGF_TRUNCATED_REGISTER;
812 case DBGFREGVALTYPE_U512: pValue->u512 = InVal.u512; return VINF_SUCCESS;
813 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU128(pValue, InVal.u512.DQWords.dqw0); return VINF_DBGF_TRUNCATED_REGISTER;
814 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
815
816 case DBGFREGVALTYPE_32BIT_HACK:
817 case DBGFREGVALTYPE_END:
818 case DBGFREGVALTYPE_INVALID:
819 break;
820 }
821 break;
822
823 case DBGFREGVALTYPE_R80:
824 switch (enmToType)
825 {
826 case DBGFREGVALTYPE_U8: pValue->u8 = (uint8_t )dbgfR3RegValR80GetU64(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
827 case DBGFREGVALTYPE_U16: pValue->u16 = (uint16_t)dbgfR3RegValR80GetU64(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
828 case DBGFREGVALTYPE_U32: pValue->u32 = (uint32_t)dbgfR3RegValR80GetU64(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
829 case DBGFREGVALTYPE_U64: pValue->u64 = (uint64_t)dbgfR3RegValR80GetU64(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
830 case DBGFREGVALTYPE_U128: pValue->u128 = dbgfR3RegValR80GetU128(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
831 case DBGFREGVALTYPE_U256: pValue->u256.DQWords.dqw0 = dbgfR3RegValR80GetU128(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
832 case DBGFREGVALTYPE_U512: pValue->u512.DQWords.dqw0 = dbgfR3RegValR80GetU128(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
833 case DBGFREGVALTYPE_R80: pValue->r80 = InVal.r80; return VINF_SUCCESS;
834 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
835
836 case DBGFREGVALTYPE_32BIT_HACK:
837 case DBGFREGVALTYPE_END:
838 case DBGFREGVALTYPE_INVALID:
839 break;
840 }
841 break;
842
843 case DBGFREGVALTYPE_DTR:
844 switch (enmToType)
845 {
846 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
847 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
848 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
849 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
850 case DBGFREGVALTYPE_U128: pValue->u128.s.Lo = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
851 case DBGFREGVALTYPE_U256: pValue->u256.QWords.qw0 = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
852 case DBGFREGVALTYPE_U512: pValue->u512.QWords.qw0 = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
853 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU64(pValue, InVal.dtr.u64Base); return VINF_DBGF_TRUNCATED_REGISTER;
854 case DBGFREGVALTYPE_DTR: pValue->dtr = InVal.dtr; return VINF_SUCCESS;
855
856 case DBGFREGVALTYPE_32BIT_HACK:
857 case DBGFREGVALTYPE_END:
858 case DBGFREGVALTYPE_INVALID:
859 break;
860 }
861 break;
862
863 case DBGFREGVALTYPE_INVALID:
864 case DBGFREGVALTYPE_END:
865 case DBGFREGVALTYPE_32BIT_HACK:
866 break;
867 }
868
869 AssertMsgFailed(("%d / %d\n", enmFromType, enmToType));
870 return VERR_DBGF_UNSUPPORTED_CAST;
871}
872
873
874/**
875 * Worker for the CPU register queries.
876 *
877 * @returns VBox status code.
878 * @retval VINF_SUCCESS
879 * @retval VERR_INVALID_VM_HANDLE
880 * @retval VERR_INVALID_CPU_ID
881 * @retval VERR_DBGF_REGISTER_NOT_FOUND
882 * @retval VERR_DBGF_UNSUPPORTED_CAST
883 * @retval VINF_DBGF_TRUNCATED_REGISTER
884 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
885 *
886 * @param pUVM The user mode VM handle.
887 * @param idCpu The virtual CPU ID.
888 * @param enmReg The register to query.
889 * @param enmType The desired return type.
890 * @param fGuestRegs Query guest CPU registers if set (true),
891 * hypervisor CPU registers if clear (false).
892 * @param pValue Where to return the register value.
893 */
894static DECLCALLBACK(int) dbgfR3RegCpuQueryWorkerOnCpu(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, DBGFREGVALTYPE enmType,
895 bool fGuestRegs, PDBGFREGVAL pValue)
896{
897 int rc = VINF_SUCCESS;
898 DBGF_REG_DB_LOCK_READ(pUVM);
899
900 /*
901 * Look up the register set of the specified CPU.
902 */
903 PDBGFREGSET pSet = fGuestRegs
904 ? pUVM->aCpus[idCpu].dbgf.s.pGuestRegSet
905 : pUVM->aCpus[idCpu].dbgf.s.pHyperRegSet;
906 if (RT_LIKELY(pSet))
907 {
908 /*
909 * Look up the register and get the register value.
910 */
911#ifdef VBOX_VMM_TARGET_X86
912 DBGFREG const enmCpuFirst = DBGFREG_X86_FIRST;
913#elif defined(VBOX_VMM_TARGET_ARMV8)
914 DBGFREG const enmCpuFirst = DBGFREG_ARMV8_FIRST;
915#else
916# error "port me"
917#endif
918 uint32_t const idxDesc = (uint32_t)enmReg - (uint32_t)enmCpuFirst;
919 if (RT_LIKELY(idxDesc < pSet->cDescs))
920 {
921 PCDBGFREGDESC const pDesc = &pSet->paDescs[idxDesc];
922
923 pValue->au64[0] = pValue->au64[1] = 0;
924 rc = pDesc->pfnGet(pSet->uUserArg.pv, pDesc, pValue);
925 if (RT_SUCCESS(rc))
926 {
927 /*
928 * Do the cast if the desired return type doesn't match what
929 * the getter returned.
930 */
931 if (pDesc->enmType == enmType)
932 rc = VINF_SUCCESS;
933 else
934 rc = dbgfR3RegValCast(pValue, pDesc->enmType, enmType);
935 }
936 }
937 else
938 rc = VERR_DBGF_REGISTER_NOT_FOUND;
939 }
940 else
941 rc = VERR_INVALID_CPU_ID;
942
943 DBGF_REG_DB_UNLOCK_READ(pUVM);
944 return rc;
945}
946
947
948/**
949 * Internal worker for the CPU register query functions.
950 *
951 * @returns VBox status code.
952 * @retval VINF_SUCCESS
953 * @retval VERR_INVALID_VM_HANDLE
954 * @retval VERR_INVALID_CPU_ID
955 * @retval VERR_DBGF_REGISTER_NOT_FOUND
956 * @retval VERR_DBGF_UNSUPPORTED_CAST
957 * @retval VINF_DBGF_TRUNCATED_REGISTER
958 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
959 *
960 * @param pUVM The user mode VM handle.
961 * @param idCpu The virtual CPU ID. Can be OR'ed with
962 * DBGFREG_HYPER_VMCPUID.
963 * @param enmReg The register to query.
964 * @param enmType The desired return type.
965 * @param pValue Where to return the register value.
966 */
967static int dbgfR3RegCpuQueryWorker(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, DBGFREGVALTYPE enmType, PDBGFREGVAL pValue)
968{
969 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
970 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
971 AssertMsgReturn(enmReg >= DBGFREG_AL && enmReg <= DBGFREG_END, ("%d\n", enmReg), VERR_INVALID_PARAMETER);
972
973 bool const fGuestRegs = !(idCpu & DBGFREG_HYPER_VMCPUID);
974 idCpu &= ~DBGFREG_HYPER_VMCPUID;
975 AssertReturn(idCpu < pUVM->cCpus, VERR_INVALID_CPU_ID);
976
977 return VMR3ReqPriorityCallWaitU(pUVM, idCpu, (PFNRT)dbgfR3RegCpuQueryWorkerOnCpu, 6,
978 pUVM, idCpu, enmReg, enmType, fGuestRegs, pValue);
979}
980
981
982/**
983 * Queries a 8-bit CPU register value.
984 *
985 * @retval VINF_SUCCESS
986 * @retval VERR_INVALID_VM_HANDLE
987 * @retval VERR_INVALID_CPU_ID
988 * @retval VERR_DBGF_REGISTER_NOT_FOUND
989 * @retval VERR_DBGF_UNSUPPORTED_CAST
990 * @retval VINF_DBGF_TRUNCATED_REGISTER
991 *
992 * @param pUVM The user mode VM handle.
993 * @param idCpu The target CPU ID. Can be OR'ed with
994 * DBGFREG_HYPER_VMCPUID.
995 * @param enmReg The register that's being queried.
996 * @param pu8 Where to store the register value.
997 */
998VMMR3DECL(int) DBGFR3RegCpuQueryU8(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, uint8_t *pu8)
999{
1000 DBGFREGVAL Value;
1001 int rc = dbgfR3RegCpuQueryWorker(pUVM, idCpu, enmReg, DBGFREGVALTYPE_U8, &Value);
1002 if (RT_SUCCESS(rc))
1003 *pu8 = Value.u8;
1004 else
1005 *pu8 = 0;
1006 return rc;
1007}
1008
1009
1010/**
1011 * Queries a 16-bit CPU register value.
1012 *
1013 * @retval VINF_SUCCESS
1014 * @retval VERR_INVALID_VM_HANDLE
1015 * @retval VERR_INVALID_CPU_ID
1016 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1017 * @retval VERR_DBGF_UNSUPPORTED_CAST
1018 * @retval VINF_DBGF_TRUNCATED_REGISTER
1019 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1020 *
1021 * @param pUVM The user mode VM handle.
1022 * @param idCpu The target CPU ID. Can be OR'ed with
1023 * DBGFREG_HYPER_VMCPUID.
1024 * @param enmReg The register that's being queried.
1025 * @param pu16 Where to store the register value.
1026 */
1027VMMR3DECL(int) DBGFR3RegCpuQueryU16(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, uint16_t *pu16)
1028{
1029 DBGFREGVAL Value;
1030 int rc = dbgfR3RegCpuQueryWorker(pUVM, idCpu, enmReg, DBGFREGVALTYPE_U16, &Value);
1031 if (RT_SUCCESS(rc))
1032 *pu16 = Value.u16;
1033 else
1034 *pu16 = 0;
1035 return rc;
1036}
1037
1038
1039/**
1040 * Queries a 32-bit CPU register value.
1041 *
1042 * @retval VINF_SUCCESS
1043 * @retval VERR_INVALID_VM_HANDLE
1044 * @retval VERR_INVALID_CPU_ID
1045 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1046 * @retval VERR_DBGF_UNSUPPORTED_CAST
1047 * @retval VINF_DBGF_TRUNCATED_REGISTER
1048 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1049 *
1050 * @param pUVM The user mode VM handle.
1051 * @param idCpu The target CPU ID. Can be OR'ed with
1052 * DBGFREG_HYPER_VMCPUID.
1053 * @param enmReg The register that's being queried.
1054 * @param pu32 Where to store the register value.
1055 */
1056VMMR3DECL(int) DBGFR3RegCpuQueryU32(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, uint32_t *pu32)
1057{
1058 DBGFREGVAL Value;
1059 int rc = dbgfR3RegCpuQueryWorker(pUVM, idCpu, enmReg, DBGFREGVALTYPE_U32, &Value);
1060 if (RT_SUCCESS(rc))
1061 *pu32 = Value.u32;
1062 else
1063 *pu32 = 0;
1064 return rc;
1065}
1066
1067
1068/**
1069 * Queries a 64-bit CPU register value.
1070 *
1071 * @retval VINF_SUCCESS
1072 * @retval VERR_INVALID_VM_HANDLE
1073 * @retval VERR_INVALID_CPU_ID
1074 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1075 * @retval VERR_DBGF_UNSUPPORTED_CAST
1076 * @retval VINF_DBGF_TRUNCATED_REGISTER
1077 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1078 *
1079 * @param pUVM The user mode VM handle.
1080 * @param idCpu The target CPU ID. Can be OR'ed with
1081 * DBGFREG_HYPER_VMCPUID.
1082 * @param enmReg The register that's being queried.
1083 * @param pu64 Where to store the register value.
1084 */
1085VMMR3DECL(int) DBGFR3RegCpuQueryU64(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, uint64_t *pu64)
1086{
1087 DBGFREGVAL Value;
1088 int rc = dbgfR3RegCpuQueryWorker(pUVM, idCpu, enmReg, DBGFREGVALTYPE_U64, &Value);
1089 if (RT_SUCCESS(rc))
1090 *pu64 = Value.u64;
1091 else
1092 *pu64 = 0;
1093 return rc;
1094}
1095
1096
1097/**
1098 * Queries a descriptor table register value.
1099 *
1100 * @retval VINF_SUCCESS
1101 * @retval VERR_INVALID_VM_HANDLE
1102 * @retval VERR_INVALID_CPU_ID
1103 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1104 * @retval VERR_DBGF_UNSUPPORTED_CAST
1105 * @retval VINF_DBGF_TRUNCATED_REGISTER
1106 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1107 *
1108 * @param pUVM The user mode VM handle.
1109 * @param idCpu The target CPU ID. Can be OR'ed with
1110 * DBGFREG_HYPER_VMCPUID.
1111 * @param enmReg The register that's being queried.
1112 * @param pu64Base Where to store the register base value.
1113 * @param pu16Limit Where to store the register limit value.
1114 */
1115VMMR3DECL(int) DBGFR3RegCpuQueryXdtr(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, uint64_t *pu64Base, uint16_t *pu16Limit)
1116{
1117 DBGFREGVAL Value;
1118 int rc = dbgfR3RegCpuQueryWorker(pUVM, idCpu, enmReg, DBGFREGVALTYPE_DTR, &Value);
1119 if (RT_SUCCESS(rc))
1120 {
1121 *pu64Base = Value.dtr.u64Base;
1122 *pu16Limit = Value.dtr.u32Limit;
1123 }
1124 else
1125 {
1126 *pu64Base = 0;
1127 *pu16Limit = 0;
1128 }
1129 return rc;
1130}
1131
1132
1133#if 0 /* rewrite / remove */
1134
1135/**
1136 * Wrapper around CPUMQueryGuestMsr for dbgfR3RegCpuQueryBatchWorker.
1137 *
1138 * @retval VINF_SUCCESS
1139 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1140 *
1141 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1142 * @param pReg The where to store the register value and
1143 * size.
1144 * @param idMsr The MSR to get.
1145 */
1146static void dbgfR3RegGetMsrBatch(PVMCPU pVCpu, PDBGFREGENTRY pReg, uint32_t idMsr)
1147{
1148 pReg->enmType = DBGFREGVALTYPE_U64;
1149 int rc = CPUMQueryGuestMsr(pVCpu, idMsr, &pReg->Val.u64);
1150 if (RT_FAILURE(rc))
1151 {
1152 AssertMsg(rc == VERR_CPUM_RAISE_GP_0, ("%Rrc\n", rc));
1153 pReg->Val.u64 = 0;
1154 }
1155}
1156
1157
1158static DECLCALLBACK(int) dbgfR3RegCpuQueryBatchWorker(PUVM pUVM, VMCPUID idCpu, PDBGFREGENTRY paRegs, size_t cRegs)
1159{
1160#if 0
1161 PVMCPU pVCpu = &pUVM->pVM->aCpus[idCpu];
1162 PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1163
1164 PDBGFREGENTRY pReg = paRegs - 1;
1165 while (cRegs-- > 0)
1166 {
1167 pReg++;
1168 pReg->Val.au64[0] = 0;
1169 pReg->Val.au64[1] = 0;
1170
1171 DBGFREG const enmReg = pReg->enmReg;
1172 AssertMsgReturn(enmReg >= 0 && enmReg <= DBGFREG_END, ("%d (%#x)\n", enmReg, enmReg), VERR_DBGF_REGISTER_NOT_FOUND);
1173 if (enmReg != DBGFREG_END)
1174 {
1175 PCDBGFREGDESC pDesc = &g_aDbgfRegDescs[enmReg];
1176 if (!pDesc->pfnGet)
1177 {
1178 PCRTUINT128U pu = (PCRTUINT128U)((uintptr_t)pCtx + pDesc->offCtx);
1179 pReg->enmType = pDesc->enmType;
1180 switch (pDesc->enmType)
1181 {
1182 case DBGFREGVALTYPE_U8: pReg->Val.u8 = pu->au8[0]; break;
1183 case DBGFREGVALTYPE_U16: pReg->Val.u16 = pu->au16[0]; break;
1184 case DBGFREGVALTYPE_U32: pReg->Val.u32 = pu->au32[0]; break;
1185 case DBGFREGVALTYPE_U64: pReg->Val.u64 = pu->au64[0]; break;
1186 case DBGFREGVALTYPE_U128:
1187 pReg->Val.au64[0] = pu->au64[0];
1188 pReg->Val.au64[1] = pu->au64[1];
1189 break;
1190 case DBGFREGVALTYPE_R80:
1191 pReg->Val.au64[0] = pu->au64[0];
1192 pReg->Val.au16[5] = pu->au16[5];
1193 break;
1194 default:
1195 AssertMsgFailedReturn(("%s %d\n", pDesc->pszName, pDesc->enmType), VERR_IPE_NOT_REACHED_DEFAULT_CASE);
1196 }
1197 }
1198 else
1199 {
1200 int rc = pDesc->pfnGet(pVCpu, pDesc, pCtx, &pReg->Val.u);
1201 if (RT_FAILURE(rc))
1202 return rc;
1203 }
1204 }
1205 }
1206 return VINF_SUCCESS;
1207#else
1208 return VERR_NOT_IMPLEMENTED;
1209#endif
1210}
1211
1212
1213/**
1214 * Query a batch of registers.
1215 *
1216 * @retval VINF_SUCCESS
1217 * @retval VERR_INVALID_VM_HANDLE
1218 * @retval VERR_INVALID_CPU_ID
1219 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1220 *
1221 * @param pUVM The user mode VM handle.
1222 * @param idCpu The target CPU ID. Can be OR'ed with
1223 * DBGFREG_HYPER_VMCPUID.
1224 * @param paRegs Pointer to an array of @a cRegs elements. On
1225 * input the enmReg members indicates which
1226 * registers to query. On successful return the
1227 * other members are set. DBGFREG_END can be used
1228 * as a filler.
1229 * @param cRegs The number of entries in @a paRegs.
1230 */
1231VMMR3DECL(int) DBGFR3RegCpuQueryBatch(PUVM pUVM, VMCPUID idCpu, PDBGFREGENTRY paRegs, size_t cRegs)
1232{
1233 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
1234 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1235 AssertReturn(idCpu < pUVM->cCpus, VERR_INVALID_CPU_ID);
1236 if (!cRegs)
1237 return VINF_SUCCESS;
1238 AssertReturn(cRegs < _1M, VERR_OUT_OF_RANGE);
1239 AssertPtrReturn(paRegs, VERR_INVALID_POINTER);
1240 size_t iReg = cRegs;
1241 while (iReg-- > 0)
1242 {
1243 DBGFREG enmReg = paRegs[iReg].enmReg;
1244 AssertMsgReturn(enmReg < DBGFREG_END && enmReg >= DBGFREG_AL, ("%d (%#x)", enmReg, enmReg), VERR_DBGF_REGISTER_NOT_FOUND);
1245 }
1246
1247 return VMR3ReqCallWaitU(pUVM, idCpu, (PFNRT)dbgfR3RegCpuQueryBatchWorker, 4, pUVM, idCpu, paRegs, cRegs);
1248}
1249
1250
1251/**
1252 * Query all registers for a Virtual CPU.
1253 *
1254 * @retval VINF_SUCCESS
1255 * @retval VERR_INVALID_VM_HANDLE
1256 * @retval VERR_INVALID_CPU_ID
1257 *
1258 * @param pUVM The user mode VM handle.
1259 * @param idCpu The target CPU ID. Can be OR'ed with
1260 * DBGFREG_HYPER_VMCPUID.
1261 * @param paRegs Pointer to an array of @a cRegs elements.
1262 * These will be filled with the CPU register
1263 * values. Overflowing entries will be set to
1264 * DBGFREG_END. The returned registers can be
1265 * accessed by using the DBGFREG values as index.
1266 * @param cRegs The number of entries in @a paRegs. The
1267 * recommended value is DBGFREG_ALL_COUNT.
1268 */
1269VMMR3DECL(int) DBGFR3RegCpuQueryAll(PUVM pUVM, VMCPUID idCpu, PDBGFREGENTRY paRegs, size_t cRegs)
1270{
1271 /*
1272 * Validate input.
1273 */
1274 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
1275 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1276 AssertReturn(idCpu < pUVM->cCpus, VERR_INVALID_CPU_ID);
1277 if (!cRegs)
1278 return VINF_SUCCESS;
1279 AssertReturn(cRegs < _1M, VERR_OUT_OF_RANGE);
1280 AssertPtrReturn(paRegs, VERR_INVALID_POINTER);
1281
1282 /*
1283 * Convert it into a batch query (lazy bird).
1284 */
1285 unsigned iReg = 0;
1286 while (iReg < cRegs && iReg < DBGFREG_ALL_COUNT)
1287 {
1288 paRegs[iReg].enmReg = (DBGFREG)iReg;
1289 iReg++;
1290 }
1291 while (iReg < cRegs)
1292 paRegs[iReg++].enmReg = DBGFREG_END;
1293
1294 return VMR3ReqCallWaitU(pUVM, idCpu, (PFNRT)dbgfR3RegCpuQueryBatchWorker, 4, pUVM, idCpu, paRegs, cRegs);
1295}
1296
1297#endif /* rewrite or remove? */
1298
1299/**
1300 * Gets the name of a register.
1301 *
1302 * @returns Pointer to read-only register name (lower case). NULL if the
1303 * parameters are invalid.
1304 *
1305 * @param pUVM The user mode VM handle.
1306 * @param enmReg The register identifier.
1307 * @param enmType The register type. This is for sort out
1308 * aliases. Pass DBGFREGVALTYPE_INVALID to get
1309 * the standard name.
1310 */
1311VMMR3DECL(const char *) DBGFR3RegCpuName(PUVM pUVM, DBGFREG enmReg, DBGFREGVALTYPE enmType)
1312{
1313 AssertReturn(enmReg >= DBGFREG_AL && enmReg < DBGFREG_END, NULL);
1314 AssertReturn(enmType >= DBGFREGVALTYPE_INVALID && enmType < DBGFREGVALTYPE_END, NULL);
1315 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
1316 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1317
1318 PCDBGFREGSET pSet = pUVM->aCpus[0].dbgf.s.pGuestRegSet;
1319 if (RT_UNLIKELY(!pSet))
1320 return NULL;
1321
1322 PCDBGFREGDESC pDesc = &pSet->paDescs[enmReg];
1323 PCDBGFREGALIAS pAlias = pDesc->paAliases;
1324 if ( pAlias
1325 && pDesc->enmType != enmType
1326 && enmType != DBGFREGVALTYPE_INVALID)
1327 {
1328 while (pAlias->pszName)
1329 {
1330 if (pAlias->enmType == enmType)
1331 return pAlias->pszName;
1332 pAlias++;
1333 }
1334 }
1335
1336 return pDesc->pszName;
1337}
1338
1339
1340/**
1341 * Fold the string to lower case and copy it into the destination buffer.
1342 *
1343 * @returns Number of folder characters, -1 on overflow.
1344 * @param pszSrc The source string.
1345 * @param cchSrc How much to fold and copy.
1346 * @param pszDst The output buffer.
1347 * @param cbDst The size of the output buffer.
1348 */
1349static ssize_t dbgfR3RegCopyToLower(const char *pszSrc, size_t cchSrc, char *pszDst, size_t cbDst)
1350{
1351 ssize_t cchFolded = 0;
1352 char ch;
1353 while (cchSrc-- > 0 && (ch = *pszSrc++))
1354 {
1355 if (RT_UNLIKELY(cbDst <= 1))
1356 return -1;
1357 cbDst--;
1358
1359 char chLower = RT_C_TO_LOWER(ch);
1360 cchFolded += chLower != ch;
1361 *pszDst++ = chLower;
1362 }
1363 if (RT_UNLIKELY(!cbDst))
1364 return -1;
1365 *pszDst = '\0';
1366 return cchFolded;
1367}
1368
1369
1370/**
1371 * Resolves the register name.
1372 *
1373 * @returns Lookup record.
1374 * @param pUVM The user mode VM handle.
1375 * @param idDefCpu The default CPU ID set.
1376 * @param pszReg The register name.
1377 * @param fGuestRegs Default to guest CPU registers if set, the
1378 * hypervisor CPU registers if clear.
1379 */
1380static PCDBGFREGLOOKUP dbgfR3RegResolve(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, bool fGuestRegs)
1381{
1382 DBGF_REG_DB_LOCK_READ(pUVM);
1383
1384 /* Try looking up the name without any case folding or cpu prefixing. */
1385 PRTSTRSPACE pRegSpace = &pUVM->dbgf.s.RegSpace;
1386 PCDBGFREGLOOKUP pLookupRec = (PCDBGFREGLOOKUP)RTStrSpaceGet(pRegSpace, pszReg);
1387 if (!pLookupRec)
1388 {
1389 char szName[DBGF_REG_MAX_NAME * 4 + 16];
1390
1391 /* Lower case it and try again. */
1392 ssize_t cchFolded = dbgfR3RegCopyToLower(pszReg, RTSTR_MAX, szName, sizeof(szName) - DBGF_REG_MAX_NAME);
1393 if (cchFolded > 0)
1394 pLookupRec = (PCDBGFREGLOOKUP)RTStrSpaceGet(pRegSpace, szName);
1395 if ( !pLookupRec
1396 && cchFolded >= 0
1397 && idDefCpu != VMCPUID_ANY)
1398 {
1399 /* Prefix it with the specified CPU set. */
1400 size_t cchCpuSet = RTStrPrintf(szName, sizeof(szName), fGuestRegs ? "cpu%u." : "hypercpu%u.", idDefCpu);
1401 dbgfR3RegCopyToLower(pszReg, RTSTR_MAX, &szName[cchCpuSet], sizeof(szName) - cchCpuSet);
1402 pLookupRec = (PCDBGFREGLOOKUP)RTStrSpaceGet(pRegSpace, szName);
1403 }
1404 }
1405
1406 DBGF_REG_DB_UNLOCK_READ(pUVM);
1407 return pLookupRec;
1408}
1409
1410
1411/**
1412 * Validates the register name.
1413 *
1414 * @returns VBox status code.
1415 * @retval VINF_SUCCESS if the register was found.
1416 * @retval VERR_DBGF_REGISTER_NOT_FOUND if not found.
1417 *
1418 * @param pUVM The user mode VM handle.
1419 * @param idDefCpu The default CPU.
1420 * @param pszReg The registe name.
1421 */
1422VMMR3DECL(int) DBGFR3RegNmValidate(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg)
1423{
1424 /*
1425 * Validate input.
1426 */
1427 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
1428 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
1429 AssertReturn((idDefCpu & ~DBGFREG_HYPER_VMCPUID) < pUVM->cCpus || idDefCpu == VMCPUID_ANY, VERR_INVALID_CPU_ID);
1430 AssertPtrReturn(pszReg, VERR_INVALID_POINTER);
1431
1432 /*
1433 * Resolve the register.
1434 */
1435 bool fGuestRegs = true;
1436 if ((idDefCpu & DBGFREG_HYPER_VMCPUID) && idDefCpu != VMCPUID_ANY)
1437 {
1438 fGuestRegs = false;
1439 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
1440 }
1441
1442 PCDBGFREGLOOKUP pLookupRec = dbgfR3RegResolve(pUVM, idDefCpu, pszReg, fGuestRegs);
1443 if (!pLookupRec)
1444 return VERR_DBGF_REGISTER_NOT_FOUND;
1445 return VINF_SUCCESS;
1446}
1447
1448
1449/**
1450 * On CPU worker for the register queries, used by dbgfR3RegNmQueryWorker and
1451 * dbgfR3RegPrintfCbFormatNormal.
1452 *
1453 * @returns VBox status code.
1454 *
1455 * @param pUVM The user mode VM handle.
1456 * @param pLookupRec The register lookup record.
1457 * @param enmType The desired return type.
1458 * @param pValue Where to return the register value.
1459 * @param penmType Where to store the register value type.
1460 * Optional.
1461 */
1462static DECLCALLBACK(int) dbgfR3RegNmQueryWorkerOnCpu(PUVM pUVM, PCDBGFREGLOOKUP pLookupRec, DBGFREGVALTYPE enmType,
1463 PDBGFREGVAL pValue, PDBGFREGVALTYPE penmType)
1464{
1465 PCDBGFREGDESC pDesc = pLookupRec->pDesc;
1466 PCDBGFREGSET pSet = pLookupRec->pSet;
1467 PCDBGFREGSUBFIELD pSubField = pLookupRec->pSubField;
1468 DBGFREGVALTYPE enmValueType = pDesc->enmType;
1469 int rc;
1470
1471 NOREF(pUVM);
1472
1473 /*
1474 * Get the register or sub-field value.
1475 */
1476 dbgfR3RegValClear(pValue);
1477 if (!pSubField)
1478 {
1479 rc = pDesc->pfnGet(pSet->uUserArg.pv, pDesc, pValue);
1480 if ( pLookupRec->pAlias
1481 && pLookupRec->pAlias->enmType != enmValueType
1482 && RT_SUCCESS(rc))
1483 {
1484 rc = dbgfR3RegValCast(pValue, enmValueType, pLookupRec->pAlias->enmType);
1485 enmValueType = pLookupRec->pAlias->enmType;
1486 }
1487 }
1488 else
1489 {
1490 if (pSubField->pfnGet)
1491 {
1492 rc = pSubField->pfnGet(pSet->uUserArg.pv, pSubField, &pValue->u128);
1493 enmValueType = DBGFREGVALTYPE_U128;
1494 }
1495 else
1496 {
1497 rc = pDesc->pfnGet(pSet->uUserArg.pv, pDesc, pValue);
1498 if ( pLookupRec->pAlias
1499 && pLookupRec->pAlias->enmType != enmValueType
1500 && RT_SUCCESS(rc))
1501 {
1502 rc = dbgfR3RegValCast(pValue, enmValueType, pLookupRec->pAlias->enmType);
1503 enmValueType = pLookupRec->pAlias->enmType;
1504 }
1505 if (RT_SUCCESS(rc))
1506 {
1507 rc = dbgfR3RegValCast(pValue, enmValueType, DBGFREGVALTYPE_U128);
1508 if (RT_SUCCESS(rc))
1509 {
1510 RTUInt128AssignShiftLeft(&pValue->u128, -pSubField->iFirstBit);
1511 RTUInt128AssignAndNFirstBits(&pValue->u128, pSubField->cBits);
1512 if (pSubField->cShift)
1513 RTUInt128AssignShiftLeft(&pValue->u128, pSubField->cShift);
1514 }
1515 }
1516 }
1517 if (RT_SUCCESS(rc))
1518 {
1519 unsigned const cBits = pSubField->cBits + pSubField->cShift;
1520 if (cBits <= 8)
1521 enmValueType = DBGFREGVALTYPE_U8;
1522 else if (cBits <= 16)
1523 enmValueType = DBGFREGVALTYPE_U16;
1524 else if (cBits <= 32)
1525 enmValueType = DBGFREGVALTYPE_U32;
1526 else if (cBits <= 64)
1527 enmValueType = DBGFREGVALTYPE_U64;
1528 else
1529 enmValueType = DBGFREGVALTYPE_U128;
1530 rc = dbgfR3RegValCast(pValue, DBGFREGVALTYPE_U128, enmValueType);
1531 }
1532 }
1533 if (RT_SUCCESS(rc))
1534 {
1535 /*
1536 * Do the cast if the desired return type doesn't match what
1537 * the getter returned.
1538 */
1539 if ( enmValueType == enmType
1540 || enmType == DBGFREGVALTYPE_END)
1541 {
1542 rc = VINF_SUCCESS;
1543 if (penmType)
1544 *penmType = enmValueType;
1545 }
1546 else
1547 {
1548 rc = dbgfR3RegValCast(pValue, enmValueType, enmType);
1549 if (penmType)
1550 *penmType = RT_SUCCESS(rc) ? enmType : enmValueType;
1551 }
1552 }
1553
1554 return rc;
1555}
1556
1557
1558/**
1559 * Worker for the register queries.
1560 *
1561 * @returns VBox status code.
1562 * @retval VINF_SUCCESS
1563 * @retval VERR_INVALID_VM_HANDLE
1564 * @retval VERR_INVALID_CPU_ID
1565 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1566 * @retval VERR_DBGF_UNSUPPORTED_CAST
1567 * @retval VINF_DBGF_TRUNCATED_REGISTER
1568 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1569 *
1570 * @param pUVM The user mode VM handle.
1571 * @param idDefCpu The virtual CPU ID for the default CPU register
1572 * set. Can be OR'ed with DBGFREG_HYPER_VMCPUID.
1573 * @param pszReg The register to query.
1574 * @param enmType The desired return type.
1575 * @param pValue Where to return the register value.
1576 * @param penmType Where to store the register value type.
1577 * Optional.
1578 */
1579static int dbgfR3RegNmQueryWorker(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, DBGFREGVALTYPE enmType,
1580 PDBGFREGVAL pValue, PDBGFREGVALTYPE penmType)
1581{
1582 /*
1583 * Validate input.
1584 */
1585 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
1586 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
1587 AssertReturn((idDefCpu & ~DBGFREG_HYPER_VMCPUID) < pUVM->cCpus || idDefCpu == VMCPUID_ANY, VERR_INVALID_CPU_ID);
1588 AssertPtrReturn(pszReg, VERR_INVALID_POINTER);
1589
1590 Assert(enmType > DBGFREGVALTYPE_INVALID && enmType <= DBGFREGVALTYPE_END);
1591 AssertPtr(pValue);
1592
1593 /*
1594 * Resolve the register and call the getter on the relevant CPU.
1595 */
1596 bool fGuestRegs = true;
1597 if ((idDefCpu & DBGFREG_HYPER_VMCPUID) && idDefCpu != VMCPUID_ANY)
1598 {
1599 fGuestRegs = false;
1600 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
1601 }
1602 PCDBGFREGLOOKUP pLookupRec = dbgfR3RegResolve(pUVM, idDefCpu, pszReg, fGuestRegs);
1603 if (pLookupRec)
1604 {
1605 if (pLookupRec->pSet->enmType == DBGFREGSETTYPE_CPU)
1606 idDefCpu = pLookupRec->pSet->uUserArg.pVCpu->idCpu;
1607 else if (idDefCpu != VMCPUID_ANY)
1608 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
1609 return VMR3ReqPriorityCallWaitU(pUVM, idDefCpu, (PFNRT)dbgfR3RegNmQueryWorkerOnCpu, 5,
1610 pUVM, pLookupRec, enmType, pValue, penmType);
1611 }
1612 return VERR_DBGF_REGISTER_NOT_FOUND;
1613}
1614
1615
1616/**
1617 * Queries a descriptor table register value.
1618 *
1619 * @retval VINF_SUCCESS
1620 * @retval VERR_INVALID_VM_HANDLE
1621 * @retval VERR_INVALID_CPU_ID
1622 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1623 *
1624 * @param pUVM The user mode VM handle.
1625 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1626 * applicable. Can be OR'ed with
1627 * DBGFREG_HYPER_VMCPUID.
1628 * @param pszReg The register that's being queried. Except for
1629 * CPU registers, this must be on the form
1630 * "set.reg[.sub]".
1631 * @param pValue Where to store the register value.
1632 * @param penmType Where to store the register value type.
1633 */
1634VMMR3DECL(int) DBGFR3RegNmQuery(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, PDBGFREGVAL pValue, PDBGFREGVALTYPE penmType)
1635{
1636 return dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_END, pValue, penmType);
1637}
1638
1639
1640/**
1641 * Queries a 8-bit register value.
1642 *
1643 * @retval VINF_SUCCESS
1644 * @retval VERR_INVALID_VM_HANDLE
1645 * @retval VERR_INVALID_CPU_ID
1646 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1647 * @retval VERR_DBGF_UNSUPPORTED_CAST
1648 * @retval VINF_DBGF_TRUNCATED_REGISTER
1649 *
1650 * @param pUVM The user mode VM handle.
1651 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1652 * applicable. Can be OR'ed with
1653 * DBGFREG_HYPER_VMCPUID.
1654 * @param pszReg The register that's being queried. Except for
1655 * CPU registers, this must be on the form
1656 * "set.reg[.sub]".
1657 * @param pu8 Where to store the register value.
1658 */
1659VMMR3DECL(int) DBGFR3RegNmQueryU8(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, uint8_t *pu8)
1660{
1661 DBGFREGVAL Value;
1662 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_U8, &Value, NULL);
1663 if (RT_SUCCESS(rc))
1664 *pu8 = Value.u8;
1665 else
1666 *pu8 = 0;
1667 return rc;
1668}
1669
1670
1671/**
1672 * Queries a 16-bit register value.
1673 *
1674 * @retval VINF_SUCCESS
1675 * @retval VERR_INVALID_VM_HANDLE
1676 * @retval VERR_INVALID_CPU_ID
1677 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1678 * @retval VERR_DBGF_UNSUPPORTED_CAST
1679 * @retval VINF_DBGF_TRUNCATED_REGISTER
1680 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1681 *
1682 * @param pUVM The user mode VM handle.
1683 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1684 * applicable. Can be OR'ed with
1685 * DBGFREG_HYPER_VMCPUID.
1686 * @param pszReg The register that's being queried. Except for
1687 * CPU registers, this must be on the form
1688 * "set.reg[.sub]".
1689 * @param pu16 Where to store the register value.
1690 */
1691VMMR3DECL(int) DBGFR3RegNmQueryU16(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, uint16_t *pu16)
1692{
1693 DBGFREGVAL Value;
1694 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_U16, &Value, NULL);
1695 if (RT_SUCCESS(rc))
1696 *pu16 = Value.u16;
1697 else
1698 *pu16 = 0;
1699 return rc;
1700}
1701
1702
1703/**
1704 * Queries a 32-bit register value.
1705 *
1706 * @retval VINF_SUCCESS
1707 * @retval VERR_INVALID_VM_HANDLE
1708 * @retval VERR_INVALID_CPU_ID
1709 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1710 * @retval VERR_DBGF_UNSUPPORTED_CAST
1711 * @retval VINF_DBGF_TRUNCATED_REGISTER
1712 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1713 *
1714 * @param pUVM The user mode VM handle.
1715 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1716 * applicable. Can be OR'ed with
1717 * DBGFREG_HYPER_VMCPUID.
1718 * @param pszReg The register that's being queried. Except for
1719 * CPU registers, this must be on the form
1720 * "set.reg[.sub]".
1721 * @param pu32 Where to store the register value.
1722 */
1723VMMR3DECL(int) DBGFR3RegNmQueryU32(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, uint32_t *pu32)
1724{
1725 DBGFREGVAL Value;
1726 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_U32, &Value, NULL);
1727 if (RT_SUCCESS(rc))
1728 *pu32 = Value.u32;
1729 else
1730 *pu32 = 0;
1731 return rc;
1732}
1733
1734
1735/**
1736 * Queries a 64-bit register value.
1737 *
1738 * @retval VINF_SUCCESS
1739 * @retval VERR_INVALID_VM_HANDLE
1740 * @retval VERR_INVALID_CPU_ID
1741 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1742 * @retval VERR_DBGF_UNSUPPORTED_CAST
1743 * @retval VINF_DBGF_TRUNCATED_REGISTER
1744 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1745 *
1746 * @param pUVM The user mode VM handle.
1747 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1748 * applicable. Can be OR'ed with
1749 * DBGFREG_HYPER_VMCPUID.
1750 * @param pszReg The register that's being queried. Except for
1751 * CPU registers, this must be on the form
1752 * "set.reg[.sub]".
1753 * @param pu64 Where to store the register value.
1754 */
1755VMMR3DECL(int) DBGFR3RegNmQueryU64(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, uint64_t *pu64)
1756{
1757 DBGFREGVAL Value;
1758 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_U64, &Value, NULL);
1759 if (RT_SUCCESS(rc))
1760 *pu64 = Value.u64;
1761 else
1762 *pu64 = 0;
1763 return rc;
1764}
1765
1766
1767/**
1768 * Queries a 128-bit register value.
1769 *
1770 * @retval VINF_SUCCESS
1771 * @retval VERR_INVALID_VM_HANDLE
1772 * @retval VERR_INVALID_CPU_ID
1773 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1774 * @retval VERR_DBGF_UNSUPPORTED_CAST
1775 * @retval VINF_DBGF_TRUNCATED_REGISTER
1776 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1777 *
1778 * @param pUVM The user mode VM handle.
1779 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1780 * applicable. Can be OR'ed with
1781 * DBGFREG_HYPER_VMCPUID.
1782 * @param pszReg The register that's being queried. Except for
1783 * CPU registers, this must be on the form
1784 * "set.reg[.sub]".
1785 * @param pu128 Where to store the register value.
1786 */
1787VMMR3DECL(int) DBGFR3RegNmQueryU128(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, PRTUINT128U pu128)
1788{
1789 DBGFREGVAL Value;
1790 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_U128, &Value, NULL);
1791 if (RT_SUCCESS(rc))
1792 *pu128 = Value.u128;
1793 else
1794 pu128->s.Hi = pu128->s.Lo = 0;
1795 return rc;
1796}
1797
1798
1799#if 0
1800/**
1801 * Queries a long double register value.
1802 *
1803 * @retval VINF_SUCCESS
1804 * @retval VERR_INVALID_VM_HANDLE
1805 * @retval VERR_INVALID_CPU_ID
1806 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1807 * @retval VERR_DBGF_UNSUPPORTED_CAST
1808 * @retval VINF_DBGF_TRUNCATED_REGISTER
1809 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1810 *
1811 * @param pUVM The user mode VM handle.
1812 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1813 * applicable. Can be OR'ed with
1814 * DBGFREG_HYPER_VMCPUID.
1815 * @param pszReg The register that's being queried. Except for
1816 * CPU registers, this must be on the form
1817 * "set.reg[.sub]".
1818 * @param plrd Where to store the register value.
1819 */
1820VMMR3DECL(int) DBGFR3RegNmQueryLrd(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, long double *plrd)
1821{
1822 DBGFREGVAL Value;
1823 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_R80, &Value, NULL);
1824 if (RT_SUCCESS(rc))
1825 *plrd = Value.lrd;
1826 else
1827 *plrd = 0;
1828 return rc;
1829}
1830#endif
1831
1832
1833/**
1834 * Queries a descriptor table register value.
1835 *
1836 * @retval VINF_SUCCESS
1837 * @retval VERR_INVALID_VM_HANDLE
1838 * @retval VERR_INVALID_CPU_ID
1839 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1840 * @retval VERR_DBGF_UNSUPPORTED_CAST
1841 * @retval VINF_DBGF_TRUNCATED_REGISTER
1842 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1843 *
1844 * @param pUVM The user mode VM handle.
1845 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1846 * applicable. Can be OR'ed with
1847 * DBGFREG_HYPER_VMCPUID.
1848 * @param pszReg The register that's being queried. Except for
1849 * CPU registers, this must be on the form
1850 * "set.reg[.sub]".
1851 * @param pu64Base Where to store the register base value.
1852 * @param pu16Limit Where to store the register limit value.
1853 */
1854VMMR3DECL(int) DBGFR3RegNmQueryXdtr(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, uint64_t *pu64Base, uint16_t *pu16Limit)
1855{
1856 DBGFREGVAL Value;
1857 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_DTR, &Value, NULL);
1858 if (RT_SUCCESS(rc))
1859 {
1860 *pu64Base = Value.dtr.u64Base;
1861 *pu16Limit = Value.dtr.u32Limit;
1862 }
1863 else
1864 {
1865 *pu64Base = 0;
1866 *pu16Limit = 0;
1867 }
1868 return rc;
1869}
1870
1871
1872/**
1873 * Gets the number of bits in value of type @a enmValType.
1874 */
1875static unsigned dbgfR3RegGetBitsForValType(DBGFREGVALTYPE enmValType)
1876{
1877 switch (enmValType)
1878 {
1879 case DBGFREGVALTYPE_U8: return 8;
1880 case DBGFREGVALTYPE_U16: return 16;
1881 case DBGFREGVALTYPE_U32: return 32;
1882 case DBGFREGVALTYPE_U64: return 64;
1883 case DBGFREGVALTYPE_U128: return 128;
1884 case DBGFREGVALTYPE_U256: return 256;
1885 case DBGFREGVALTYPE_U512: return 512;
1886 case DBGFREGVALTYPE_R80: return 80;
1887 case DBGFREGVALTYPE_DTR: return 80;
1888 /* no default, want gcc warnings */
1889 case DBGFREGVALTYPE_32BIT_HACK:
1890 case DBGFREGVALTYPE_END:
1891 case DBGFREGVALTYPE_INVALID:
1892 break;
1893 }
1894 return 512;
1895}
1896
1897
1898/**
1899 * On CPU worker for the extended register queries, used by DBGFR3RegNmQueryEx.
1900 *
1901 * @returns VBox status code.
1902 *
1903 * @param pUVM The user mode VM handle.
1904 * @param pLookupRec The register lookup record.
1905 * @param fFlags DBGFR3REG_QUERY_EX_F_XXX
1906 * @param paRegs Where to return the register values.
1907 * @param cRegs The number of register values to return.
1908 * The caller has checked that this is sufficient
1909 * to store the entire result.
1910 */
1911static DECLCALLBACK(int) dbgfR3RegNmQueryExWorkerOnCpu(PUVM pUVM, PCDBGFREGLOOKUP pLookupRec, uint32_t fFlags,
1912 PDBGFREGENTRYNM paRegs, size_t cRegs)
1913{
1914 PCDBGFREGDESC pDesc = pLookupRec->pDesc;
1915 PCDBGFREGSET pSet = pLookupRec->pSet;
1916 Assert(!pLookupRec->pSubField);
1917 NOREF(pUVM);
1918
1919 /*
1920 * The register first.
1921 */
1922 AssertReturn(cRegs > 0, VERR_BUFFER_OVERFLOW);
1923 dbgfR3RegValClear(&paRegs[0].Val);
1924 paRegs[0].pszName = pLookupRec->Core.pszString;
1925 paRegs[0].enmType = pDesc->enmType;
1926 paRegs[0].u.uInfo = 0;
1927 paRegs[0].u.s.fMain = true;
1928 int rc = pDesc->pfnGet(pSet->uUserArg.pv, pDesc, &paRegs[0].Val);
1929 AssertMsg(rc == VINF_SUCCESS || rc == VERR_CPUM_RAISE_GP_0, ("rc=%Rrc reg=%s\n", rc, paRegs[0].pszName));
1930 if (RT_FAILURE(rc))
1931 return rc;
1932 DBGFREGVAL const MainValue = paRegs[0].Val;
1933 uint32_t iReg = 1;
1934
1935 /* If it's a alias we looked up we may have to do some casting and
1936 restricting the number of bits included in the sub-fields. */
1937 unsigned cMaxBits = sizeof(paRegs[0].Val) * 8;
1938 if (pLookupRec->pAlias)
1939 {
1940 paRegs[0].enmType = pLookupRec->pAlias->enmType;
1941 paRegs[0].u.uInfo = 0;
1942 paRegs[0].u.s.fAlias = true;
1943 if (paRegs[0].enmType != pDesc->enmType)
1944 {
1945 dbgfR3RegValCast(&paRegs[0].Val, pDesc->enmType, paRegs[0].enmType);
1946 cMaxBits = dbgfR3RegGetBitsForValType(paRegs[0].enmType);
1947 }
1948
1949 /* Add the main value as the 2nd entry. */
1950 paRegs[iReg].pszName = pDesc->pszName;
1951 paRegs[iReg].enmType = pDesc->enmType;
1952 paRegs[iReg].Val = MainValue;
1953 paRegs[iReg].u.uInfo = 0;
1954 paRegs[iReg].u.s.fMain = true;
1955 iReg++;
1956 }
1957
1958 /*
1959 * (Other) Aliases.
1960 */
1961 if ( (fFlags & DBGFR3REG_QUERY_EX_F_ALIASES)
1962 && pDesc->paAliases)
1963 {
1964 PCDBGFREGALIAS const paAliases = pDesc->paAliases;
1965 for (uint32_t i = 0; paAliases[i].pszName != NULL; i++)
1966 if (&paAliases[i] != pLookupRec->pAlias )
1967 {
1968 AssertReturn(iReg < cRegs, VERR_BUFFER_OVERFLOW);
1969 paRegs[iReg].pszName = paAliases[i].pszName;
1970 paRegs[iReg].enmType = paAliases[i].enmType;
1971 paRegs[iReg].u.uInfo = 0;
1972 paRegs[iReg].u.s.fAlias = true;
1973 paRegs[iReg].Val = MainValue;
1974 dbgfR3RegValCast(&paRegs[iReg].Val, pDesc->enmType, paAliases[i].enmType);
1975 iReg++;
1976 }
1977 }
1978
1979 /*
1980 * Subfields.
1981 */
1982 if ( (fFlags & DBGFR3REG_QUERY_EX_F_SUBFIELDS)
1983 && pDesc->paSubFields)
1984 {
1985 PCDBGFREGSUBFIELD const paSubFields = pDesc->paSubFields;
1986 for (uint32_t i = 0; paSubFields[i].pszName != NULL; i++)
1987 if (paSubFields[i].iFirstBit < cMaxBits || paSubFields[i].pfnGet)
1988 {
1989 AssertReturn(iReg < cRegs, VERR_BUFFER_OVERFLOW);
1990 int rc2;
1991 paRegs[iReg].pszName = paSubFields[i].pszName;
1992 paRegs[iReg].u.uInfo = 0;
1993 paRegs[iReg].u.s.fSubField = true;
1994 paRegs[iReg].u.s.cBits = paSubFields[i].cBits + paSubFields[i].cShift;
1995 if (paSubFields[i].pfnGet)
1996 {
1997 dbgfR3RegValClear(&paRegs[iReg].Val);
1998 rc2 = paSubFields[i].pfnGet(pSet->uUserArg.pv, &paSubFields[i], &paRegs[iReg].Val.u128);
1999 }
2000 else
2001 {
2002 paRegs[iReg].Val = MainValue;
2003 rc2 = dbgfR3RegValCast(&paRegs[iReg].Val, pDesc->enmType, DBGFREGVALTYPE_U128);
2004 if (RT_SUCCESS(rc2))
2005 {
2006 RTUInt128AssignShiftLeft(&paRegs[iReg].Val.u128, -paSubFields[i].iFirstBit);
2007 RTUInt128AssignAndNFirstBits(&paRegs[iReg].Val.u128, paSubFields[i].cBits);
2008 if (paSubFields[i].cShift)
2009 RTUInt128AssignShiftLeft(&paRegs[iReg].Val.u128, paSubFields[i].cShift);
2010 }
2011 }
2012 if (RT_SUCCESS(rc2))
2013 {
2014 unsigned const cBits = paSubFields[i].cBits + paSubFields[i].cShift;
2015 if (cBits <= 8)
2016 paRegs[iReg].enmType = DBGFREGVALTYPE_U8;
2017 else if (cBits <= 16)
2018 paRegs[iReg].enmType = DBGFREGVALTYPE_U16;
2019 else if (cBits <= 32)
2020 paRegs[iReg].enmType = DBGFREGVALTYPE_U32;
2021 else if (cBits <= 64)
2022 paRegs[iReg].enmType = DBGFREGVALTYPE_U64;
2023 else
2024 paRegs[iReg].enmType = DBGFREGVALTYPE_U128;
2025 rc2 = dbgfR3RegValCast(&paRegs[iReg].Val, DBGFREGVALTYPE_U128, paRegs[iReg].enmType);
2026 }
2027 if (RT_SUCCESS(rc2))
2028 iReg++;
2029 else
2030 rc = rc2;
2031 }
2032 }
2033 return rc;
2034}
2035
2036
2037/**
2038 * Queries a register with aliases and/or sub-fields.
2039 *
2040 * @retval VINF_SUCCESS
2041 * @retval VERR_INVALID_VM_HANDLE
2042 * @retval VERR_INVALID_CPU_ID
2043 * @retval VERR_BUFFER_OVERFLOW w/ *pcRegs set to the required size.
2044 * No other data returned.
2045 * @retval VERR_DBGF_REGISTER_NOT_FOUND
2046 * @retval VERR_DBGF_UNSUPPORTED_CAST
2047 * @retval VINF_DBGF_TRUNCATED_REGISTER
2048 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
2049 *
2050 * @param pUVM The user mode VM handle.
2051 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
2052 * applicable. Can be OR'ed with DBGFREG_HYPER_VMCPUID.
2053 * @param pszReg The register that's being queried. Except for CPU
2054 * registers, this must be on the form "set.reg[.sub]".
2055 * @param fFlags DBGFR3REG_QUERY_EX_F_XXX
2056 * @param paRegs
2057 * @param pcRegs On input this is the size of the paRegs buffer.
2058 * On successful return this is set to the number of
2059 * registers returned. This is set to the required number
2060 * of register entries when VERR_BUFFER_OVERFLOW is
2061 * returned.
2062 */
2063VMMR3DECL(int) DBGFR3RegNmQueryEx(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, uint32_t fFlags,
2064 PDBGFREGENTRYNM paRegs, size_t *pcRegs)
2065{
2066 /*
2067 * Validate input.
2068 */
2069 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
2070 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
2071 AssertReturn((idDefCpu & ~DBGFREG_HYPER_VMCPUID) < pUVM->cCpus || idDefCpu == VMCPUID_ANY, VERR_INVALID_CPU_ID);
2072 AssertPtrReturn(pszReg, VERR_INVALID_POINTER);
2073 AssertReturn(!(fFlags & ~DBGFR3REG_QUERY_EX_F_VALID_MASK), VERR_INVALID_FLAGS);
2074 AssertPtrReturn(pcRegs, VERR_INVALID_POINTER);
2075 AssertPtrNullReturn(paRegs, VERR_INVALID_POINTER);
2076
2077 /*
2078 * Resolve the register and call the getter on the relevant CPU.
2079 */
2080 bool fGuestRegs = true;
2081 if ((idDefCpu & DBGFREG_HYPER_VMCPUID) && idDefCpu != VMCPUID_ANY)
2082 {
2083 fGuestRegs = false;
2084 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
2085 }
2086 PCDBGFREGLOOKUP pLookupRec = dbgfR3RegResolve(pUVM, idDefCpu, pszReg, fGuestRegs);
2087 if (pLookupRec)
2088 {
2089 /*
2090 * Determine how many register values we'd be returning.
2091 */
2092 size_t cRegs = 1; /* we always return the direct hit. */
2093
2094 if ( (fFlags & DBGFR3REG_QUERY_EX_F_ALIASES)
2095 && !pLookupRec->pSubField
2096 && pLookupRec->pDesc->paAliases)
2097 {
2098 PCDBGFREGALIAS const paAliases = pLookupRec->pDesc->paAliases;
2099 for (uint32_t i = 0; paAliases[i].pszName != NULL; i++)
2100 cRegs++;
2101 }
2102 else if (pLookupRec->pAlias)
2103 cRegs++;
2104
2105 if ( (fFlags & DBGFR3REG_QUERY_EX_F_SUBFIELDS)
2106 && !pLookupRec->pSubField
2107 && pLookupRec->pDesc->paSubFields)
2108 {
2109 unsigned const cMaxBits = !pLookupRec->pAlias ? sizeof(paRegs[0].Val) * 8
2110 : dbgfR3RegGetBitsForValType(pLookupRec->pAlias->enmType);
2111 PCDBGFREGSUBFIELD const paSubFields = pLookupRec->pDesc->paSubFields;
2112 for (uint32_t i = 0; paSubFields[i].pszName != NULL; i++)
2113 if (paSubFields[i].iFirstBit < cMaxBits || paSubFields[i].pfnGet)
2114 cRegs++;
2115 }
2116
2117 /*
2118 * Did the caller provide sufficient room for the register values, then
2119 * retrieve the register on the specified CPU.
2120 */
2121 if (paRegs && *pcRegs >= cRegs)
2122 {
2123 *pcRegs = cRegs;
2124
2125 if (pLookupRec->pSet->enmType == DBGFREGSETTYPE_CPU)
2126 idDefCpu = pLookupRec->pSet->uUserArg.pVCpu->idCpu;
2127 else if (idDefCpu != VMCPUID_ANY)
2128 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
2129
2130 /* If we hit a sub-field we'll just use the regular worker to get it. */
2131 if (!pLookupRec->pSubField)
2132 return VMR3ReqPriorityCallWaitU(pUVM, idDefCpu, (PFNRT)dbgfR3RegNmQueryExWorkerOnCpu, 5,
2133 pUVM, pLookupRec, fFlags, paRegs, cRegs);
2134 Assert(cRegs == 1);
2135 paRegs[0].pszName = pLookupRec->Core.pszString;
2136 paRegs[0].enmType = DBGFREGVALTYPE_END;
2137 paRegs[0].u.uInfo = 0;
2138 paRegs[0].u.s.cBits = pLookupRec->pSubField->cBits + pLookupRec->pSubField->cShift;
2139 paRegs[0].u.s.fSubField = true;
2140 dbgfR3RegValClear(&paRegs[0].Val);
2141 return VMR3ReqPriorityCallWaitU(pUVM, idDefCpu, (PFNRT)dbgfR3RegNmQueryWorkerOnCpu, 5,
2142 pUVM, pLookupRec, DBGFREGVALTYPE_END, &paRegs[0].Val, &paRegs[0].enmType);
2143 }
2144 *pcRegs = cRegs;
2145 return VERR_BUFFER_OVERFLOW;
2146 }
2147 return VERR_DBGF_REGISTER_NOT_FOUND;
2148
2149}
2150
2151
2152/// @todo VMMR3DECL(int) DBGFR3RegNmQueryBatch(PUVM pUVM,VMCPUID idDefCpu, DBGFREGENTRYNM paRegs, size_t cRegs);
2153
2154
2155/**
2156 * Gets the number of registers returned by DBGFR3RegNmQueryAll.
2157 *
2158 * @returns VBox status code.
2159 * @param pUVM The user mode VM handle.
2160 * @param pcRegs Where to return the register count.
2161 */
2162VMMR3DECL(int) DBGFR3RegNmQueryAllCount(PUVM pUVM, size_t *pcRegs)
2163{
2164 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
2165 *pcRegs = pUVM->dbgf.s.cRegs;
2166 return VINF_SUCCESS;
2167}
2168
2169
2170/**
2171 * Pad register entries.
2172 *
2173 * @param paRegs The output array.
2174 * @param cRegs The size of the output array.
2175 * @param iReg The first register to pad.
2176 * @param cRegsToPad The number of registers to pad.
2177 */
2178static void dbgfR3RegNmQueryAllPadEntries(PDBGFREGENTRYNM paRegs, size_t cRegs, size_t iReg, size_t cRegsToPad)
2179{
2180 if (iReg < cRegs)
2181 {
2182 size_t iEndReg = iReg + cRegsToPad;
2183 if (iEndReg > cRegs)
2184 iEndReg = cRegs;
2185 while (iReg < iEndReg)
2186 {
2187 paRegs[iReg].pszName = NULL;
2188 paRegs[iReg].enmType = DBGFREGVALTYPE_END;
2189 paRegs[iReg].u.uInfo = 0;
2190 dbgfR3RegValClear(&paRegs[iReg].Val);
2191 iReg++;
2192 }
2193 }
2194}
2195
2196
2197/**
2198 * Query all registers in a set.
2199 *
2200 * @param pSet The set.
2201 * @param cRegsToQuery The number of registers to query.
2202 * @param paRegs The output array.
2203 * @param cRegs The size of the output array.
2204 */
2205static void dbgfR3RegNmQueryAllInSet(PCDBGFREGSET pSet, size_t cRegsToQuery, PDBGFREGENTRYNM paRegs, size_t cRegs)
2206{
2207 if (cRegsToQuery > pSet->cDescs)
2208 cRegsToQuery = pSet->cDescs;
2209 if (cRegsToQuery > cRegs)
2210 cRegsToQuery = cRegs;
2211
2212 for (size_t iReg = 0; iReg < cRegsToQuery; iReg++)
2213 {
2214 paRegs[iReg].enmType = pSet->paDescs[iReg].enmType;
2215 paRegs[iReg].pszName = pSet->paLookupRecs[iReg].Core.pszString;
2216 paRegs[iReg].u.uInfo = 0;
2217 paRegs[iReg].u.s.fMain = true;
2218 dbgfR3RegValClear(&paRegs[iReg].Val);
2219 int rc2 = pSet->paDescs[iReg].pfnGet(pSet->uUserArg.pv, &pSet->paDescs[iReg], &paRegs[iReg].Val);
2220 AssertMsg(rc2 == VINF_SUCCESS || rc2 == VERR_CPUM_RAISE_GP_0, ("rc2=%Rrc iReg=%u %s\n", rc2, iReg, paRegs[iReg].pszName));
2221 if (RT_FAILURE(rc2))
2222 dbgfR3RegValClear(&paRegs[iReg].Val);
2223 }
2224}
2225
2226
2227/**
2228 * @callback_method_impl{FNRTSTRSPACECALLBACK, Worker used by
2229 * dbgfR3RegNmQueryAllWorker}
2230 */
2231static DECLCALLBACK(int) dbgfR3RegNmQueryAllEnum(PRTSTRSPACECORE pStr, void *pvUser)
2232{
2233 PCDBGFREGSET pSet = (PCDBGFREGSET)pStr;
2234 if (pSet->enmType != DBGFREGSETTYPE_CPU)
2235 {
2236 PDBGFR3REGNMQUERYALLARGS pArgs = (PDBGFR3REGNMQUERYALLARGS)pvUser;
2237 if (pArgs->iReg < pArgs->cRegs)
2238 dbgfR3RegNmQueryAllInSet(pSet, pSet->cDescs, &pArgs->paRegs[pArgs->iReg], pArgs->cRegs - pArgs->iReg);
2239 pArgs->iReg += pSet->cDescs;
2240 }
2241
2242 return 0;
2243}
2244
2245
2246/**
2247 * @callback_method_impl{FNVMMEMTRENDEZVOUS, Worker used by DBGFR3RegNmQueryAll}
2248 */
2249static DECLCALLBACK(VBOXSTRICTRC) dbgfR3RegNmQueryAllWorker(PVM pVM, PVMCPU pVCpu, void *pvUser)
2250{
2251 PDBGFR3REGNMQUERYALLARGS pArgs = (PDBGFR3REGNMQUERYALLARGS)pvUser;
2252 PDBGFREGENTRYNM paRegs = pArgs->paRegs;
2253 size_t const cRegs = pArgs->cRegs;
2254 PUVM pUVM = pVM->pUVM;
2255 PUVMCPU pUVCpu = pVCpu->pUVCpu;
2256
2257 DBGF_REG_DB_LOCK_READ(pUVM);
2258
2259 /*
2260 * My guest CPU registers.
2261 */
2262 size_t iCpuReg = pVCpu->idCpu * pUVM->dbgf.s.cPerCpuRegs;
2263 if (pUVCpu->dbgf.s.pGuestRegSet)
2264 {
2265 if (iCpuReg < cRegs)
2266 dbgfR3RegNmQueryAllInSet(pUVCpu->dbgf.s.pGuestRegSet, pUVM->dbgf.s.cPerCpuRegs, &paRegs[iCpuReg], cRegs - iCpuReg);
2267 }
2268 else
2269 dbgfR3RegNmQueryAllPadEntries(paRegs, cRegs, iCpuReg, pUVM->dbgf.s.cPerCpuRegs);
2270
2271 /*
2272 * My hypervisor CPU registers.
2273 */
2274 iCpuReg = pUVM->cCpus * pUVM->dbgf.s.cPerCpuRegs + pUVCpu->idCpu * pUVM->dbgf.s.cPerCpuHyperRegs;
2275 if (pUVCpu->dbgf.s.pHyperRegSet)
2276 {
2277 if (iCpuReg < cRegs)
2278 dbgfR3RegNmQueryAllInSet(pUVCpu->dbgf.s.pHyperRegSet, pUVM->dbgf.s.cPerCpuHyperRegs, &paRegs[iCpuReg], cRegs - iCpuReg);
2279 }
2280 else
2281 dbgfR3RegNmQueryAllPadEntries(paRegs, cRegs, iCpuReg, pUVM->dbgf.s.cPerCpuHyperRegs);
2282
2283 /*
2284 * The primary CPU does all the other registers.
2285 */
2286 if (pUVCpu->idCpu == 0)
2287 {
2288 pArgs->iReg = pUVM->cCpus * (pUVM->dbgf.s.cPerCpuRegs + pUVM->dbgf.s.cPerCpuHyperRegs);
2289 RTStrSpaceEnumerate(&pUVM->dbgf.s.RegSetSpace, dbgfR3RegNmQueryAllEnum, pArgs);
2290 dbgfR3RegNmQueryAllPadEntries(paRegs, cRegs, pArgs->iReg, cRegs);
2291 }
2292
2293 DBGF_REG_DB_UNLOCK_READ(pUVM);
2294 return VINF_SUCCESS; /* Ignore errors. */
2295}
2296
2297
2298/**
2299 * Queries all register.
2300 *
2301 * @returns VBox status code.
2302 * @param pUVM The user mode VM handle.
2303 * @param paRegs The output register value array. The register
2304 * name string is read only and shall not be freed
2305 * or modified.
2306 * @param cRegs The number of entries in @a paRegs. The
2307 * correct size can be obtained by calling
2308 * DBGFR3RegNmQueryAllCount.
2309 */
2310VMMR3DECL(int) DBGFR3RegNmQueryAll(PUVM pUVM, PDBGFREGENTRYNM paRegs, size_t cRegs)
2311{
2312 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
2313 PVM pVM = pUVM->pVM;
2314 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
2315 AssertPtrReturn(paRegs, VERR_INVALID_POINTER);
2316 AssertReturn(cRegs > 0, VERR_OUT_OF_RANGE);
2317
2318 DBGFR3REGNMQUERYALLARGS Args;
2319 Args.paRegs = paRegs;
2320 Args.cRegs = cRegs;
2321
2322 return VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE, dbgfR3RegNmQueryAllWorker, &Args);
2323}
2324
2325
2326/**
2327 * On CPU worker for the register modifications, used by DBGFR3RegNmSet.
2328 *
2329 * @returns VBox status code.
2330 *
2331 * @param pUVM The user mode VM handle.
2332 * @param pLookupRec The register lookup record. Maybe be modified,
2333 * so please pass a copy of the user's one.
2334 * @param pValue The new register value.
2335 * @param pMask Indicate which bits to modify.
2336 */
2337static DECLCALLBACK(int) dbgfR3RegNmSetWorkerOnCpu(PUVM pUVM, PDBGFREGLOOKUP pLookupRec,
2338 PCDBGFREGVAL pValue, PCDBGFREGVAL pMask)
2339{
2340 RT_NOREF_PV(pUVM);
2341 PCDBGFREGSUBFIELD pSubField = pLookupRec->pSubField;
2342 if (pSubField && pSubField->pfnSet)
2343 return pSubField->pfnSet(pLookupRec->pSet->uUserArg.pv, pSubField, pValue->u128, pMask->u128);
2344 return pLookupRec->pDesc->pfnSet(pLookupRec->pSet->uUserArg.pv, pLookupRec->pDesc, pValue, pMask);
2345}
2346
2347
2348/**
2349 * Worker for the register setting.
2350 *
2351 * @returns VBox status code.
2352 * @retval VINF_SUCCESS
2353 * @retval VERR_INVALID_VM_HANDLE
2354 * @retval VERR_INVALID_CPU_ID
2355 * @retval VERR_DBGF_REGISTER_NOT_FOUND
2356 * @retval VERR_DBGF_UNSUPPORTED_CAST
2357 * @retval VINF_DBGF_TRUNCATED_REGISTER
2358 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
2359 *
2360 * @param pUVM The user mode VM handle.
2361 * @param idDefCpu The virtual CPU ID for the default CPU register
2362 * set. Can be OR'ed with DBGFREG_HYPER_VMCPUID.
2363 * @param pszReg The register to query.
2364 * @param pValue The value to set
2365 * @param enmType How to interpret the value in @a pValue.
2366 */
2367VMMR3DECL(int) DBGFR3RegNmSet(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, PCDBGFREGVAL pValue, DBGFREGVALTYPE enmType)
2368{
2369 /*
2370 * Validate input.
2371 */
2372 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
2373 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
2374 AssertReturn((idDefCpu & ~DBGFREG_HYPER_VMCPUID) < pUVM->cCpus || idDefCpu == VMCPUID_ANY, VERR_INVALID_CPU_ID);
2375 AssertPtrReturn(pszReg, VERR_INVALID_POINTER);
2376 AssertReturn(enmType > DBGFREGVALTYPE_INVALID && enmType < DBGFREGVALTYPE_END, VERR_INVALID_PARAMETER);
2377 AssertPtrReturn(pValue, VERR_INVALID_PARAMETER);
2378
2379 /*
2380 * Resolve the register and check that it is writable.
2381 */
2382 bool fGuestRegs = true;
2383 if ((idDefCpu & DBGFREG_HYPER_VMCPUID) && idDefCpu != VMCPUID_ANY)
2384 {
2385 fGuestRegs = false;
2386 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
2387 }
2388 PCDBGFREGLOOKUP pLookupRec = dbgfR3RegResolve(pUVM, idDefCpu, pszReg, fGuestRegs);
2389 if (pLookupRec)
2390 {
2391 PCDBGFREGDESC pDesc = pLookupRec->pDesc;
2392 PCDBGFREGSET pSet = pLookupRec->pSet;
2393 PCDBGFREGSUBFIELD pSubField = pLookupRec->pSubField;
2394
2395 if ( !(pDesc->fFlags & DBGFREG_FLAGS_READ_ONLY)
2396 && (pSubField
2397 ? !(pSubField->fFlags & DBGFREGSUBFIELD_FLAGS_READ_ONLY)
2398 && (pSubField->pfnSet != NULL || pDesc->pfnSet != NULL)
2399 : pDesc->pfnSet != NULL) )
2400 {
2401 /*
2402 * Calculate the modification mask and cast the input value to the
2403 * type of the target register.
2404 */
2405 DBGFREGVAL Mask = DBGFREGVAL_INITIALIZE_ZERO;
2406 DBGFREGVAL Value = DBGFREGVAL_INITIALIZE_ZERO;
2407 switch (enmType)
2408 {
2409 case DBGFREGVALTYPE_U8:
2410 Value.u8 = pValue->u8;
2411 Mask.u8 = UINT8_MAX;
2412 break;
2413 case DBGFREGVALTYPE_U16:
2414 Value.u16 = pValue->u16;
2415 Mask.u16 = UINT16_MAX;
2416 break;
2417 case DBGFREGVALTYPE_U32:
2418 Value.u32 = pValue->u32;
2419 Mask.u32 = UINT32_MAX;
2420 break;
2421 case DBGFREGVALTYPE_U64:
2422 Value.u64 = pValue->u64;
2423 Mask.u64 = UINT64_MAX;
2424 break;
2425 case DBGFREGVALTYPE_U128:
2426 Value.u128 = pValue->u128;
2427 Mask.u128.s.Lo = UINT64_MAX;
2428 Mask.u128.s.Hi = UINT64_MAX;
2429 break;
2430 case DBGFREGVALTYPE_U256:
2431 Value.u256 = pValue->u256;
2432 Mask.u256.QWords.qw0 = UINT64_MAX;
2433 Mask.u256.QWords.qw1 = UINT64_MAX;
2434 Mask.u256.QWords.qw2 = UINT64_MAX;
2435 Mask.u256.QWords.qw3 = UINT64_MAX;
2436 break;
2437 case DBGFREGVALTYPE_U512:
2438 Value.u512 = pValue->u512;
2439 Mask.u512.QWords.qw0 = UINT64_MAX;
2440 Mask.u512.QWords.qw1 = UINT64_MAX;
2441 Mask.u512.QWords.qw2 = UINT64_MAX;
2442 Mask.u512.QWords.qw3 = UINT64_MAX;
2443 Mask.u512.QWords.qw4 = UINT64_MAX;
2444 Mask.u512.QWords.qw5 = UINT64_MAX;
2445 Mask.u512.QWords.qw6 = UINT64_MAX;
2446 Mask.u512.QWords.qw7 = UINT64_MAX;
2447 break;
2448 case DBGFREGVALTYPE_R80:
2449#ifdef RT_COMPILER_WITH_80BIT_LONG_DOUBLE
2450 Value.r80Ex.lrd = pValue->r80Ex.lrd;
2451#else
2452 Value.r80Ex.au64[0] = pValue->r80Ex.au64[0];
2453 Value.r80Ex.au16[4] = pValue->r80Ex.au16[4];
2454#endif
2455 Value.r80Ex.au64[0] = UINT64_MAX;
2456 Value.r80Ex.au16[4] = UINT16_MAX;
2457 break;
2458 case DBGFREGVALTYPE_DTR:
2459 Value.dtr.u32Limit = pValue->dtr.u32Limit;
2460 Value.dtr.u64Base = pValue->dtr.u64Base;
2461 Mask.dtr.u32Limit = UINT32_MAX;
2462 Mask.dtr.u64Base = UINT64_MAX;
2463 break;
2464 case DBGFREGVALTYPE_32BIT_HACK:
2465 case DBGFREGVALTYPE_END:
2466 case DBGFREGVALTYPE_INVALID:
2467 AssertFailedReturn(VERR_INTERNAL_ERROR_3);
2468 }
2469
2470 int rc = VINF_SUCCESS;
2471 DBGFREGVALTYPE enmRegType = pDesc->enmType;
2472 if (pSubField)
2473 {
2474 unsigned const cBits = pSubField->cBits + pSubField->cShift;
2475 if (cBits <= 8)
2476 enmRegType = DBGFREGVALTYPE_U8;
2477 else if (cBits <= 16)
2478 enmRegType = DBGFREGVALTYPE_U16;
2479 else if (cBits <= 32)
2480 enmRegType = DBGFREGVALTYPE_U32;
2481 else if (cBits <= 64)
2482 enmRegType = DBGFREGVALTYPE_U64;
2483 else if (cBits <= 128)
2484 enmRegType = DBGFREGVALTYPE_U128;
2485 else if (cBits <= 256)
2486 enmRegType = DBGFREGVALTYPE_U256;
2487 else
2488 enmRegType = DBGFREGVALTYPE_U512;
2489 }
2490 else if (pLookupRec->pAlias)
2491 {
2492 /* Restrict the input to the size of the alias register. */
2493 DBGFREGVALTYPE enmAliasType = pLookupRec->pAlias->enmType;
2494 if (enmAliasType != enmType)
2495 {
2496 rc = dbgfR3RegValCast(&Value, enmType, enmAliasType);
2497 if (RT_FAILURE(rc))
2498 return rc;
2499 dbgfR3RegValCast(&Mask, enmType, enmAliasType);
2500 enmType = enmAliasType;
2501 }
2502 }
2503
2504 if (enmType != enmRegType)
2505 {
2506 int rc2 = dbgfR3RegValCast(&Value, enmType, enmRegType);
2507 if (RT_FAILURE(rc2))
2508 return rc2;
2509 if (rc2 != VINF_SUCCESS && rc == VINF_SUCCESS)
2510 rc2 = VINF_SUCCESS;
2511 dbgfR3RegValCast(&Mask, enmType, enmRegType);
2512 }
2513
2514 /*
2515 * Subfields needs some extra processing if there is no subfield
2516 * setter, since we'll be feeding it to the normal register setter
2517 * instead. The mask and value must be shifted and truncated to the
2518 * subfield position.
2519 */
2520 if (pSubField && !pSubField->pfnSet)
2521 {
2522 /* The shift factor is for displaying a subfield value
2523 2**cShift times larger than the stored value. We have
2524 to undo this before adjusting value and mask. */
2525 if (pSubField->cShift)
2526 {
2527 /* Warn about trunction of the lower bits that get
2528 shifted out below. */
2529 if (rc == VINF_SUCCESS)
2530 {
2531 DBGFREGVAL Value2 = Value;
2532 RTUInt128AssignAndNFirstBits(&Value2.u128, -pSubField->cShift);
2533 if (!RTUInt128BitAreAllClear(&Value2.u128))
2534 rc = VINF_DBGF_TRUNCATED_REGISTER;
2535 }
2536 RTUInt128AssignShiftRight(&Value.u128, pSubField->cShift);
2537 }
2538
2539 RTUInt128AssignAndNFirstBits(&Value.u128, pSubField->cBits);
2540 if (rc == VINF_SUCCESS && RTUInt128IsNotEqual(&Value.u128, &Value.u128))
2541 rc = VINF_DBGF_TRUNCATED_REGISTER;
2542 RTUInt128AssignAndNFirstBits(&Mask.u128, pSubField->cBits);
2543
2544 RTUInt128AssignShiftLeft(&Value.u128, pSubField->iFirstBit);
2545 RTUInt128AssignShiftLeft(&Mask.u128, pSubField->iFirstBit);
2546 }
2547
2548 /*
2549 * Do the actual work on an EMT.
2550 */
2551 if (pSet->enmType == DBGFREGSETTYPE_CPU)
2552 idDefCpu = pSet->uUserArg.pVCpu->idCpu;
2553 else if (idDefCpu != VMCPUID_ANY)
2554 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
2555
2556 int rc2 = VMR3ReqPriorityCallWaitU(pUVM, idDefCpu, (PFNRT)dbgfR3RegNmSetWorkerOnCpu, 4,
2557 pUVM, pLookupRec, &Value, &Mask);
2558
2559 if (rc == VINF_SUCCESS || RT_FAILURE(rc2))
2560 rc = rc2;
2561 return rc;
2562 }
2563 return VERR_DBGF_READ_ONLY_REGISTER;
2564 }
2565 return VERR_DBGF_REGISTER_NOT_FOUND;
2566}
2567
2568
2569/**
2570 * Set a given set of registers.
2571 *
2572 * @returns VBox status code.
2573 * @retval VINF_SUCCESS
2574 * @retval VERR_INVALID_VM_HANDLE
2575 * @retval VERR_INVALID_CPU_ID
2576 * @retval VERR_DBGF_REGISTER_NOT_FOUND
2577 * @retval VERR_DBGF_UNSUPPORTED_CAST
2578 * @retval VINF_DBGF_TRUNCATED_REGISTER
2579 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
2580 *
2581 * @param pUVM The user mode VM handle.
2582 * @param idDefCpu The virtual CPU ID for the default CPU register
2583 * set. Can be OR'ed with DBGFREG_HYPER_VMCPUID.
2584 * @param paRegs The array of registers to set.
2585 * @param cRegs Number of registers in the array.
2586 *
2587 * @todo This is a _very_ lazy implementation by a lazy developer, some semantics
2588 * need to be figured out before the real implementation especially how and
2589 * when errors and informational status codes like VINF_DBGF_TRUNCATED_REGISTER
2590 * should be returned (think of an error right in the middle of the batch, should we
2591 * save the state and roll back?).
2592 */
2593VMMR3DECL(int) DBGFR3RegNmSetBatch(PUVM pUVM, VMCPUID idDefCpu, PCDBGFREGENTRYNM paRegs, size_t cRegs)
2594{
2595 /*
2596 * Validate input.
2597 */
2598 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
2599 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
2600 AssertReturn((idDefCpu & ~DBGFREG_HYPER_VMCPUID) < pUVM->cCpus || idDefCpu == VMCPUID_ANY, VERR_INVALID_CPU_ID);
2601 AssertPtrReturn(paRegs, VERR_INVALID_PARAMETER);
2602 AssertReturn(cRegs > 0, VERR_INVALID_PARAMETER);
2603
2604 for (uint32_t i = 0; i < cRegs; i++)
2605 {
2606 int rc = DBGFR3RegNmSet(pUVM, idDefCpu, paRegs[i].pszName, &paRegs[i].Val, paRegs[i].enmType);
2607 if (RT_FAILURE(rc))
2608 return rc;
2609 }
2610
2611 return VINF_SUCCESS;
2612}
2613
2614
2615/**
2616 * Internal worker for DBGFR3RegFormatValue, cbBuf is sufficent.
2617 *
2618 * @copydoc DBGFR3RegFormatValueEx
2619 */
2620DECLINLINE(ssize_t) dbgfR3RegFormatValueInt(char *pszBuf, size_t cbBuf, PCDBGFREGVAL pValue, DBGFREGVALTYPE enmType,
2621 unsigned uBase, signed int cchWidth, signed int cchPrecision, uint32_t fFlags)
2622{
2623 switch (enmType)
2624 {
2625 case DBGFREGVALTYPE_U8:
2626 return RTStrFormatU8(pszBuf, cbBuf, pValue->u8, uBase, cchWidth, cchPrecision, fFlags);
2627 case DBGFREGVALTYPE_U16:
2628 return RTStrFormatU16(pszBuf, cbBuf, pValue->u16, uBase, cchWidth, cchPrecision, fFlags);
2629 case DBGFREGVALTYPE_U32:
2630 return RTStrFormatU32(pszBuf, cbBuf, pValue->u32, uBase, cchWidth, cchPrecision, fFlags);
2631 case DBGFREGVALTYPE_U64:
2632 return RTStrFormatU64(pszBuf, cbBuf, pValue->u64, uBase, cchWidth, cchPrecision, fFlags);
2633 case DBGFREGVALTYPE_U128:
2634 return RTStrFormatU128(pszBuf, cbBuf, &pValue->u128, uBase, cchWidth, cchPrecision, fFlags);
2635 case DBGFREGVALTYPE_U256:
2636 return RTStrFormatU256(pszBuf, cbBuf, &pValue->u256, uBase, cchWidth, cchPrecision, fFlags);
2637 case DBGFREGVALTYPE_U512:
2638 return RTStrFormatU512(pszBuf, cbBuf, &pValue->u512, uBase, cchWidth, cchPrecision, fFlags);
2639 case DBGFREGVALTYPE_R80:
2640 return RTStrFormatR80u2(pszBuf, cbBuf, &pValue->r80Ex, cchWidth, cchPrecision, fFlags);
2641 case DBGFREGVALTYPE_DTR:
2642 {
2643 ssize_t cch = RTStrFormatU64(pszBuf, cbBuf, pValue->dtr.u64Base,
2644 16, 2+16, 0, RTSTR_F_SPECIAL | RTSTR_F_ZEROPAD);
2645 AssertReturn(cch > 0, VERR_DBGF_REG_IPE_1);
2646 pszBuf[cch++] = ':';
2647 cch += RTStrFormatU64(&pszBuf[cch], cbBuf - cch, pValue->dtr.u32Limit,
2648 16, 4, 0, RTSTR_F_ZEROPAD | RTSTR_F_32BIT);
2649 return cch;
2650 }
2651
2652 case DBGFREGVALTYPE_32BIT_HACK:
2653 case DBGFREGVALTYPE_END:
2654 case DBGFREGVALTYPE_INVALID:
2655 break;
2656 /* no default, want gcc warnings */
2657 }
2658
2659 RTStrPrintf(pszBuf, cbBuf, "!enmType=%d!", enmType);
2660 return VERR_DBGF_REG_IPE_2;
2661}
2662
2663
2664/**
2665 * Format a register value, extended version.
2666 *
2667 * @returns The number of bytes returned, VERR_BUFFER_OVERFLOW on failure.
2668 * @param pszBuf The output buffer.
2669 * @param cbBuf The size of the output buffer.
2670 * @param pValue The value to format.
2671 * @param enmType The value type.
2672 * @param uBase The base (ignored if not applicable).
2673 * @param cchWidth The width if RTSTR_F_WIDTH is set, otherwise
2674 * ignored.
2675 * @param cchPrecision The width if RTSTR_F_PRECISION is set, otherwise
2676 * ignored.
2677 * @param fFlags String formatting flags, RTSTR_F_XXX.
2678 */
2679VMMR3DECL(ssize_t) DBGFR3RegFormatValueEx(char *pszBuf, size_t cbBuf, PCDBGFREGVAL pValue, DBGFREGVALTYPE enmType,
2680 unsigned uBase, signed int cchWidth, signed int cchPrecision, uint32_t fFlags)
2681{
2682 /*
2683 * Format to temporary buffer using worker shared with dbgfR3RegPrintfCbFormatNormal.
2684 */
2685 char szTmp[160];
2686 ssize_t cchOutput = dbgfR3RegFormatValueInt(szTmp, sizeof(szTmp), pValue, enmType, uBase, cchWidth, cchPrecision, fFlags);
2687 if (cchOutput > 0)
2688 {
2689 if ((size_t)cchOutput < cbBuf)
2690 memcpy(pszBuf, szTmp, cchOutput + 1);
2691 else
2692 {
2693 if (cbBuf)
2694 {
2695 memcpy(pszBuf, szTmp, cbBuf - 1); /* (parfait is wrong about out of bound read here) */
2696 pszBuf[cbBuf - 1] = '\0';
2697 }
2698 cchOutput = VERR_BUFFER_OVERFLOW;
2699 }
2700 }
2701 return cchOutput;
2702}
2703
2704
2705/**
2706 * Format a register value as hexadecimal and with default width according to
2707 * the type.
2708 *
2709 * @returns The number of bytes returned, VERR_BUFFER_OVERFLOW on failure.
2710 * @param pszBuf The output buffer.
2711 * @param cbBuf The size of the output buffer.
2712 * @param pValue The value to format.
2713 * @param enmType The value type.
2714 * @param fSpecial Same as RTSTR_F_SPECIAL.
2715 */
2716VMMR3DECL(ssize_t) DBGFR3RegFormatValue(char *pszBuf, size_t cbBuf, PCDBGFREGVAL pValue, DBGFREGVALTYPE enmType, bool fSpecial)
2717{
2718 int cchWidth = 0;
2719 switch (enmType)
2720 {
2721 case DBGFREGVALTYPE_U8: cchWidth = 2 + fSpecial*2; break;
2722 case DBGFREGVALTYPE_U16: cchWidth = 4 + fSpecial*2; break;
2723 case DBGFREGVALTYPE_U32: cchWidth = 8 + fSpecial*2; break;
2724 case DBGFREGVALTYPE_U64: cchWidth = 16 + fSpecial*2; break;
2725 case DBGFREGVALTYPE_U128: cchWidth = 32 + fSpecial*2; break;
2726 case DBGFREGVALTYPE_U256: cchWidth = 64 + fSpecial*2; break;
2727 case DBGFREGVALTYPE_U512: cchWidth = 128 + fSpecial*2; break;
2728 case DBGFREGVALTYPE_R80: cchWidth = 0; break;
2729 case DBGFREGVALTYPE_DTR: cchWidth = 16+1+4 + fSpecial*2; break;
2730
2731 case DBGFREGVALTYPE_32BIT_HACK:
2732 case DBGFREGVALTYPE_END:
2733 case DBGFREGVALTYPE_INVALID:
2734 break;
2735 /* no default, want gcc warnings */
2736 }
2737 uint32_t fFlags = RTSTR_F_ZEROPAD;
2738 if (fSpecial)
2739 fFlags |= RTSTR_F_SPECIAL;
2740 if (cchWidth != 0)
2741 fFlags |= RTSTR_F_WIDTH;
2742 return DBGFR3RegFormatValueEx(pszBuf, cbBuf, pValue, enmType, 16, cchWidth, 0, fFlags);
2743}
2744
2745
2746/**
2747 * Format a register using special hacks as well as sub-field specifications
2748 * (the latter isn't implemented yet).
2749 */
2750static size_t
2751dbgfR3RegPrintfCbFormatField(PDBGFR3REGPRINTFARGS pThis, PFNRTSTROUTPUT pfnOutput, void *pvArgOutput,
2752 PCDBGFREGLOOKUP pLookupRec, int cchWidth, int cchPrecision, unsigned fFlags)
2753{
2754 char szTmp[160];
2755
2756 NOREF(cchWidth); NOREF(cchPrecision); NOREF(fFlags);
2757
2758 /*
2759 * Retrieve the register value.
2760 */
2761 DBGFREGVAL Value;
2762 DBGFREGVALTYPE enmType;
2763 int rc = dbgfR3RegNmQueryWorkerOnCpu(pThis->pUVM, pLookupRec, DBGFREGVALTYPE_END, &Value, &enmType);
2764 if (RT_FAILURE(rc))
2765 {
2766 ssize_t cchDefine = RTErrQueryDefine(rc, szTmp, sizeof(szTmp), true /*fFailIfUnknown*/);
2767 if (cchDefine <= 0)
2768 cchDefine = RTStrPrintf(szTmp, sizeof(szTmp), "rc=%d", rc);
2769 return pfnOutput(pvArgOutput, szTmp, cchDefine);
2770 }
2771
2772 char *psz = szTmp;
2773
2774 /*
2775 * Special case: Format eflags.
2776 */
2777 if ( pLookupRec->pSet->enmType == DBGFREGSETTYPE_CPU
2778 && pLookupRec->pDesc->enmReg == DBGFREG_RFLAGS
2779 && pLookupRec->pSubField == NULL)
2780 {
2781 rc = dbgfR3RegValCast(&Value, enmType, DBGFREGVALTYPE_U32);
2782 AssertRC(rc);
2783 uint32_t const efl = Value.u32;
2784
2785 /* the iopl */
2786 psz += RTStrPrintf(psz, sizeof(szTmp) / 2, "iopl=%u ", X86_EFL_GET_IOPL(efl));
2787
2788 /* add flags */
2789 static const struct
2790 {
2791 const char *pszSet;
2792 const char *pszClear;
2793 uint32_t fFlag;
2794 } aFlags[] =
2795 {
2796 { "vip",NULL, X86_EFL_VIP },
2797 { "vif",NULL, X86_EFL_VIF },
2798 { "ac", NULL, X86_EFL_AC },
2799 { "vm", NULL, X86_EFL_VM },
2800 { "rf", NULL, X86_EFL_RF },
2801 { "nt", NULL, X86_EFL_NT },
2802 { "ov", "nv", X86_EFL_OF },
2803 { "dn", "up", X86_EFL_DF },
2804 { "ei", "di", X86_EFL_IF },
2805 { "tf", NULL, X86_EFL_TF },
2806 { "ng", "pl", X86_EFL_SF },
2807 { "zr", "nz", X86_EFL_ZF },
2808 { "ac", "na", X86_EFL_AF },
2809 { "po", "pe", X86_EFL_PF },
2810 { "cy", "nc", X86_EFL_CF },
2811 };
2812 for (unsigned i = 0; i < RT_ELEMENTS(aFlags); i++)
2813 {
2814 const char *pszAdd = aFlags[i].fFlag & efl ? aFlags[i].pszSet : aFlags[i].pszClear;
2815 if (pszAdd)
2816 {
2817 *psz++ = *pszAdd++;
2818 *psz++ = *pszAdd++;
2819 if (*pszAdd)
2820 *psz++ = *pszAdd++;
2821 *psz++ = ' ';
2822 }
2823 }
2824
2825 /* drop trailing space */
2826 psz--;
2827 }
2828 else
2829 {
2830 /*
2831 * General case.
2832 */
2833 AssertMsgFailed(("Not implemented: %s\n", pLookupRec->Core.pszString));
2834 return pfnOutput(pvArgOutput, pLookupRec->Core.pszString, pLookupRec->Core.cchString);
2835 }
2836
2837 /* Output the string. */
2838 return pfnOutput(pvArgOutput, szTmp, psz - &szTmp[0]);
2839}
2840
2841
2842/**
2843 * Formats a register having parsed up to the register name.
2844 */
2845static size_t
2846dbgfR3RegPrintfCbFormatNormal(PDBGFR3REGPRINTFARGS pThis, PFNRTSTROUTPUT pfnOutput, void *pvArgOutput,
2847 PCDBGFREGLOOKUP pLookupRec, unsigned uBase, int cchWidth, int cchPrecision, unsigned fFlags)
2848{
2849 char szTmp[160];
2850
2851 /*
2852 * Get the register value.
2853 */
2854 DBGFREGVAL Value;
2855 DBGFREGVALTYPE enmType;
2856 int rc = dbgfR3RegNmQueryWorkerOnCpu(pThis->pUVM, pLookupRec, DBGFREGVALTYPE_END, &Value, &enmType);
2857 if (RT_FAILURE(rc))
2858 {
2859 ssize_t cchDefine = RTErrQueryDefine(rc, szTmp, sizeof(szTmp), true /*fFailIfUnknown*/);
2860 if (cchDefine <= 0)
2861 cchDefine = RTStrPrintf(szTmp, sizeof(szTmp), "rc=%d", rc);
2862 return pfnOutput(pvArgOutput, szTmp, cchDefine);
2863 }
2864
2865 /*
2866 * Format the value.
2867 */
2868 ssize_t cchOutput = dbgfR3RegFormatValueInt(szTmp, sizeof(szTmp), &Value, enmType, uBase, cchWidth, cchPrecision, fFlags);
2869 if (RT_UNLIKELY(cchOutput <= 0))
2870 {
2871 AssertFailed();
2872 return pfnOutput(pvArgOutput, "internal-error", sizeof("internal-error") - 1);
2873 }
2874 return pfnOutput(pvArgOutput, szTmp, cchOutput);
2875}
2876
2877
2878/**
2879 * @callback_method_impl{FNSTRFORMAT}
2880 */
2881static DECLCALLBACK(size_t)
2882dbgfR3RegPrintfCbFormat(void *pvArg, PFNRTSTROUTPUT pfnOutput, void *pvArgOutput,
2883 const char **ppszFormat, va_list *pArgs, int cchWidth,
2884 int cchPrecision, unsigned fFlags, char chArgSize)
2885{
2886 NOREF(pArgs); NOREF(chArgSize);
2887
2888 /*
2889 * Parse the format type and hand the job to the appropriate worker.
2890 */
2891 PDBGFR3REGPRINTFARGS pThis = (PDBGFR3REGPRINTFARGS)pvArg;
2892 const char *pszFormat = *ppszFormat;
2893 if ( pszFormat[0] != 'V'
2894 || pszFormat[1] != 'R')
2895 {
2896 AssertMsgFailed(("'%s'\n", pszFormat));
2897 return 0;
2898 }
2899 unsigned offCurly = 2;
2900 if (pszFormat[offCurly] != '{')
2901 {
2902 AssertMsgReturn(pszFormat[offCurly], ("'%s'\n", pszFormat), 0);
2903 offCurly++;
2904 AssertMsgReturn(pszFormat[offCurly] == '{', ("'%s'\n", pszFormat), 0);
2905 }
2906 const char *pachReg = &pszFormat[offCurly + 1];
2907
2908 /*
2909 * The end and length of the register.
2910 */
2911 const char *pszEnd = strchr(pachReg, '}');
2912 AssertMsgReturn(pszEnd, ("Missing closing curly bracket: '%s'\n", pszFormat), 0);
2913 size_t const cchReg = pszEnd - pachReg;
2914
2915 /*
2916 * Look up the register - same as dbgfR3RegResolve, except for locking and
2917 * input string termination.
2918 */
2919 PRTSTRSPACE pRegSpace = &pThis->pUVM->dbgf.s.RegSpace;
2920 /* Try looking up the name without any case folding or cpu prefixing. */
2921 PCDBGFREGLOOKUP pLookupRec = (PCDBGFREGLOOKUP)RTStrSpaceGetN(pRegSpace, pachReg, cchReg);
2922 if (!pLookupRec)
2923 {
2924 /* Lower case it and try again. */
2925 char szName[DBGF_REG_MAX_NAME * 4 + 16];
2926 ssize_t cchFolded = dbgfR3RegCopyToLower(pachReg, cchReg, szName, sizeof(szName) - DBGF_REG_MAX_NAME);
2927 if (cchFolded > 0)
2928 pLookupRec = (PCDBGFREGLOOKUP)RTStrSpaceGet(pRegSpace, szName);
2929 if ( !pLookupRec
2930 && cchFolded >= 0
2931 && pThis->idCpu != VMCPUID_ANY)
2932 {
2933 /* Prefix it with the specified CPU set. */
2934 size_t cchCpuSet = RTStrPrintf(szName, sizeof(szName), pThis->fGuestRegs ? "cpu%u." : "hypercpu%u.", pThis->idCpu);
2935 dbgfR3RegCopyToLower(pachReg, cchReg, &szName[cchCpuSet], sizeof(szName) - cchCpuSet);
2936 pLookupRec = (PCDBGFREGLOOKUP)RTStrSpaceGet(pRegSpace, szName);
2937 }
2938 }
2939 AssertMsgReturn(pLookupRec, ("'%s'\n", pszFormat), 0);
2940 AssertMsgReturn( pLookupRec->pSet->enmType != DBGFREGSETTYPE_CPU
2941 || pLookupRec->pSet->uUserArg.pVCpu->idCpu == pThis->idCpu,
2942 ("'%s' idCpu=%u, pSet/cpu=%u\n", pszFormat, pThis->idCpu, pLookupRec->pSet->uUserArg.pVCpu->idCpu),
2943 0);
2944
2945 /*
2946 * Commit the parsed format string. Up to this point it is nice to know
2947 * what register lookup failed and such, so we've delayed comitting.
2948 */
2949 *ppszFormat = pszEnd + 1;
2950
2951 /*
2952 * Call the responsible worker.
2953 */
2954 switch (pszFormat[offCurly - 1])
2955 {
2956 case 'R': /* %VR{} */
2957 case 'X': /* %VRX{} */
2958 return dbgfR3RegPrintfCbFormatNormal(pThis, pfnOutput, pvArgOutput, pLookupRec,
2959 16, cchWidth, cchPrecision, fFlags);
2960 case 'U':
2961 return dbgfR3RegPrintfCbFormatNormal(pThis, pfnOutput, pvArgOutput, pLookupRec,
2962 10, cchWidth, cchPrecision, fFlags);
2963 case 'O':
2964 return dbgfR3RegPrintfCbFormatNormal(pThis, pfnOutput, pvArgOutput, pLookupRec,
2965 8, cchWidth, cchPrecision, fFlags);
2966 case 'B':
2967 return dbgfR3RegPrintfCbFormatNormal(pThis, pfnOutput, pvArgOutput, pLookupRec,
2968 2, cchWidth, cchPrecision, fFlags);
2969 case 'F':
2970 return dbgfR3RegPrintfCbFormatField(pThis, pfnOutput, pvArgOutput, pLookupRec, cchWidth, cchPrecision, fFlags);
2971 default:
2972 AssertFailed();
2973 return 0;
2974 }
2975}
2976
2977
2978
2979/**
2980 * @callback_method_impl{FNRTSTROUTPUT}
2981 */
2982static DECLCALLBACK(size_t)
2983dbgfR3RegPrintfCbOutput(void *pvArg, const char *pachChars, size_t cbChars)
2984{
2985 PDBGFR3REGPRINTFARGS pArgs = (PDBGFR3REGPRINTFARGS)pvArg;
2986 size_t cbToCopy = cbChars;
2987 if (cbToCopy >= pArgs->cchLeftBuf)
2988 {
2989 if (RT_SUCCESS(pArgs->rc))
2990 pArgs->rc = VERR_BUFFER_OVERFLOW;
2991 cbToCopy = pArgs->cchLeftBuf;
2992 }
2993 if (cbToCopy > 0)
2994 {
2995 memcpy(&pArgs->pszBuf[pArgs->offBuf], pachChars, cbToCopy);
2996 pArgs->offBuf += cbToCopy;
2997 pArgs->cchLeftBuf -= cbToCopy;
2998 pArgs->pszBuf[pArgs->offBuf] = '\0';
2999 }
3000 return cbToCopy;
3001}
3002
3003
3004/**
3005 * On CPU worker for the register formatting, used by DBGFR3RegPrintfV.
3006 *
3007 * @returns VBox status code.
3008 *
3009 * @param pArgs The argument package and state.
3010 */
3011static DECLCALLBACK(int) dbgfR3RegPrintfWorkerOnCpu(PDBGFR3REGPRINTFARGS pArgs)
3012{
3013 DBGF_REG_DB_LOCK_READ(pArgs->pUVM);
3014 RTStrFormatV(dbgfR3RegPrintfCbOutput, pArgs, dbgfR3RegPrintfCbFormat, pArgs, pArgs->pszFormat, pArgs->va);
3015 DBGF_REG_DB_UNLOCK_READ(pArgs->pUVM);
3016 return pArgs->rc;
3017}
3018
3019
3020/**
3021 * Format a registers.
3022 *
3023 * This is restricted to registers from one CPU, that specified by @a idCpu.
3024 *
3025 * @returns VBox status code.
3026 * @param pUVM The user mode VM handle.
3027 * @param idCpu The CPU ID of any CPU registers that may be
3028 * printed, pass VMCPUID_ANY if not applicable.
3029 * @param pszBuf The output buffer.
3030 * @param cbBuf The size of the output buffer.
3031 * @param pszFormat The format string. Register names are given by
3032 * %VR{name}, they take no arguments.
3033 * @param va Other format arguments.
3034 */
3035VMMR3DECL(int) DBGFR3RegPrintfV(PUVM pUVM, VMCPUID idCpu, char *pszBuf, size_t cbBuf, const char *pszFormat, va_list va)
3036{
3037 AssertPtrReturn(pszBuf, VERR_INVALID_POINTER);
3038 AssertReturn(cbBuf > 0, VERR_BUFFER_OVERFLOW);
3039 *pszBuf = '\0';
3040
3041 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
3042 AssertReturn((idCpu & ~DBGFREG_HYPER_VMCPUID) < pUVM->cCpus || idCpu == VMCPUID_ANY, VERR_INVALID_CPU_ID);
3043 AssertPtrReturn(pszFormat, VERR_INVALID_POINTER);
3044
3045 /*
3046 * Set up an argument package and execute the formatting on the
3047 * specified CPU.
3048 */
3049 DBGFR3REGPRINTFARGS Args;
3050 Args.pUVM = pUVM;
3051 Args.idCpu = idCpu != VMCPUID_ANY ? idCpu & ~DBGFREG_HYPER_VMCPUID : idCpu;
3052 Args.fGuestRegs = idCpu != VMCPUID_ANY && !(idCpu & DBGFREG_HYPER_VMCPUID);
3053 Args.pszBuf = pszBuf;
3054 Args.pszFormat = pszFormat;
3055 va_copy(Args.va, va);
3056 Args.offBuf = 0;
3057 Args.cchLeftBuf = cbBuf - 1;
3058 Args.rc = VINF_SUCCESS;
3059 int rc = VMR3ReqPriorityCallWaitU(pUVM, Args.idCpu, (PFNRT)dbgfR3RegPrintfWorkerOnCpu, 1, &Args);
3060 va_end(Args.va);
3061 return rc;
3062}
3063
3064
3065/**
3066 * Format a registers.
3067 *
3068 * This is restricted to registers from one CPU, that specified by @a idCpu.
3069 *
3070 * @returns VBox status code.
3071 * @param pUVM The user mode VM handle.
3072 * @param idCpu The CPU ID of any CPU registers that may be
3073 * printed, pass VMCPUID_ANY if not applicable.
3074 * @param pszBuf The output buffer.
3075 * @param cbBuf The size of the output buffer.
3076 * @param pszFormat The format string. Register names are given by
3077 * %VR{name}, %VRU{name}, %VRO{name} and
3078 * %VRB{name}, which are hexadecimal, (unsigned)
3079 * decimal, octal and binary representation. None
3080 * of these types takes any arguments.
3081 * @param ... Other format arguments.
3082 */
3083VMMR3DECL(int) DBGFR3RegPrintf(PUVM pUVM, VMCPUID idCpu, char *pszBuf, size_t cbBuf, const char *pszFormat, ...)
3084{
3085 va_list va;
3086 va_start(va, pszFormat);
3087 int rc = DBGFR3RegPrintfV(pUVM, idCpu, pszBuf, cbBuf, pszFormat, va);
3088 va_end(va);
3089 return rc;
3090}
3091
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