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source: vbox/trunk/src/VBox/VMM/VMMAll/TMAllCpu.cpp@ 80268

最後變更 在這個檔案從80268是 80268,由 vboxsync 提交於 6 年 前

VMM: Refactoring VMMAll/* to use VMCC & VMMCPUCC. bugref:9217
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1/* $Id: TMAllCpu.cpp 80268 2019-08-14 11:25:13Z vboxsync $ */
2/** @file
3 * TM - Timeout Manager, CPU Time, All Contexts.
4 */
5
6/*
7 * Copyright (C) 2006-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.alldomusa.eu.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define VBOX_BUGREF_9217_PART_I
23#define LOG_GROUP LOG_GROUP_TM
24#include <VBox/vmm/tm.h>
25#include <VBox/vmm/gim.h>
26#include <VBox/vmm/dbgf.h>
27#include <VBox/vmm/nem.h>
28#include <iprt/asm-amd64-x86.h> /* for SUPGetCpuHzFromGIP */
29#include "TMInternal.h"
30#include <VBox/vmm/vmcc.h>
31#include <VBox/sup.h>
32
33#include <VBox/param.h>
34#include <VBox/err.h>
35#include <iprt/asm-math.h>
36#include <iprt/assert.h>
37#include <VBox/log.h>
38
39
40/**
41 * Gets the raw cpu tick from current virtual time.
42 *
43 * @param pVM The cross context VM structure.
44 * @param fCheckTimers Whether to check timers.
45 */
46DECLINLINE(uint64_t) tmCpuTickGetRawVirtual(PVM pVM, bool fCheckTimers)
47{
48 uint64_t u64;
49 if (fCheckTimers)
50 u64 = TMVirtualSyncGet(pVM);
51 else
52 u64 = TMVirtualSyncGetNoCheck(pVM);
53 return ASMMultU64ByU32DivByU32(u64, pVM->tm.s.cTSCTicksPerSecond, TMCLOCK_FREQ_VIRTUAL);
54}
55
56
57#ifdef IN_RING3
58/**
59 * Used by tmR3CpuTickParavirtEnable and tmR3CpuTickParavirtDisable.
60 *
61 * @param pVM The cross context VM structure.
62 */
63uint64_t tmR3CpuTickGetRawVirtualNoCheck(PVM pVM)
64{
65 return tmCpuTickGetRawVirtual(pVM, false /*fCheckTimers*/);
66}
67#endif
68
69
70/**
71 * Resumes the CPU timestamp counter ticking.
72 *
73 * @returns VBox status code.
74 * @param pVM The cross context VM structure.
75 * @param pVCpu The cross context virtual CPU structure.
76 * @internal
77 */
78int tmCpuTickResume(PVMCC pVM, PVMCPUCC pVCpu)
79{
80 if (!pVCpu->tm.s.fTSCTicking)
81 {
82 pVCpu->tm.s.fTSCTicking = true;
83
84 /** @todo Test that pausing and resuming doesn't cause lag! (I.e. that we're
85 * unpaused before the virtual time and stopped after it. */
86 switch (pVM->tm.s.enmTSCMode)
87 {
88 case TMTSCMODE_REAL_TSC_OFFSET:
89 pVCpu->tm.s.offTSCRawSrc = SUPReadTsc() - pVCpu->tm.s.u64TSC;
90 break;
91 case TMTSCMODE_VIRT_TSC_EMULATED:
92 case TMTSCMODE_DYNAMIC:
93 pVCpu->tm.s.offTSCRawSrc = tmCpuTickGetRawVirtual(pVM, false /* don't check for pending timers */)
94 - pVCpu->tm.s.u64TSC;
95 break;
96 case TMTSCMODE_NATIVE_API:
97 pVCpu->tm.s.offTSCRawSrc = 0; /** @todo ?? */
98 /* Looks like this is only used by weird modes and MSR TSC writes. We cannot support either on NEM/win. */
99 break;
100 default:
101 AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE);
102 }
103 return VINF_SUCCESS;
104 }
105 AssertFailed();
106 return VERR_TM_TSC_ALREADY_TICKING;
107}
108
109
110/**
111 * Resumes the CPU timestamp counter ticking.
112 *
113 * @returns VINF_SUCCESS or VERR_TM_VIRTUAL_TICKING_IPE (asserted).
114 * @param pVM The cross context VM structure.
115 * @param pVCpu The cross context virtual CPU structure.
116 */
117int tmCpuTickResumeLocked(PVMCC pVM, PVMCPUCC pVCpu)
118{
119 if (!pVCpu->tm.s.fTSCTicking)
120 {
121 /* TSC must be ticking before calling tmCpuTickGetRawVirtual()! */
122 pVCpu->tm.s.fTSCTicking = true;
123 uint32_t c = ASMAtomicIncU32(&pVM->tm.s.cTSCsTicking);
124 AssertMsgReturn(c <= pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_TM_VIRTUAL_TICKING_IPE);
125 if (c == 1)
126 {
127 /* The first VCPU to resume. */
128 uint64_t offTSCRawSrcOld = pVCpu->tm.s.offTSCRawSrc;
129
130 STAM_COUNTER_INC(&pVM->tm.s.StatTSCResume);
131
132 /* When resuming, use the TSC value of the last stopped VCPU to avoid the TSC going back. */
133 switch (pVM->tm.s.enmTSCMode)
134 {
135 case TMTSCMODE_REAL_TSC_OFFSET:
136 pVCpu->tm.s.offTSCRawSrc = SUPReadTsc() - pVM->tm.s.u64LastPausedTSC;
137 break;
138 case TMTSCMODE_VIRT_TSC_EMULATED:
139 case TMTSCMODE_DYNAMIC:
140 pVCpu->tm.s.offTSCRawSrc = tmCpuTickGetRawVirtual(pVM, false /* don't check for pending timers */)
141 - pVM->tm.s.u64LastPausedTSC;
142 break;
143 case TMTSCMODE_NATIVE_API:
144 {
145 int rc = NEMHCResumeCpuTickOnAll(pVM, pVCpu, pVM->tm.s.u64LastPausedTSC);
146 AssertRCReturn(rc, rc);
147 pVCpu->tm.s.offTSCRawSrc = offTSCRawSrcOld = 0;
148 break;
149 }
150 default:
151 AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE);
152 }
153
154 /* Calculate the offset addendum for other VCPUs to use. */
155 pVM->tm.s.offTSCPause = pVCpu->tm.s.offTSCRawSrc - offTSCRawSrcOld;
156 }
157 else
158 {
159 /* All other VCPUs (if any). */
160 pVCpu->tm.s.offTSCRawSrc += pVM->tm.s.offTSCPause;
161 }
162 }
163 return VINF_SUCCESS;
164}
165
166
167/**
168 * Pauses the CPU timestamp counter ticking.
169 *
170 * @returns VBox status code.
171 * @param pVCpu The cross context virtual CPU structure.
172 * @internal
173 */
174int tmCpuTickPause(PVMCPUCC pVCpu)
175{
176 if (pVCpu->tm.s.fTSCTicking)
177 {
178 pVCpu->tm.s.u64TSC = TMCpuTickGetNoCheck(pVCpu);
179 pVCpu->tm.s.fTSCTicking = false;
180 return VINF_SUCCESS;
181 }
182 AssertFailed();
183 return VERR_TM_TSC_ALREADY_PAUSED;
184}
185
186
187/**
188 * Pauses the CPU timestamp counter ticking.
189 *
190 * @returns VBox status code.
191 * @param pVM The cross context VM structure.
192 * @param pVCpu The cross context virtual CPU structure.
193 * @internal
194 */
195int tmCpuTickPauseLocked(PVMCC pVM, PVMCPUCC pVCpu)
196{
197 if (pVCpu->tm.s.fTSCTicking)
198 {
199 pVCpu->tm.s.u64TSC = TMCpuTickGetNoCheck(pVCpu);
200 pVCpu->tm.s.fTSCTicking = false;
201
202 uint32_t c = ASMAtomicDecU32(&pVM->tm.s.cTSCsTicking);
203 AssertMsgReturn(c < pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_TM_VIRTUAL_TICKING_IPE);
204 if (c == 0)
205 {
206 /* When the last TSC stops, remember the value. */
207 STAM_COUNTER_INC(&pVM->tm.s.StatTSCPause);
208 pVM->tm.s.u64LastPausedTSC = pVCpu->tm.s.u64TSC;
209 }
210 return VINF_SUCCESS;
211 }
212 AssertFailed();
213 return VERR_TM_TSC_ALREADY_PAUSED;
214}
215
216
217#ifdef VBOX_WITH_STATISTICS
218/**
219 * Record why we refused to use offsetted TSC.
220 *
221 * Used by TMCpuTickCanUseRealTSC() and TMCpuTickGetDeadlineAndTscOffset().
222 *
223 * @param pVM The cross context VM structure.
224 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
225 */
226DECLINLINE(void) tmCpuTickRecordOffsettedTscRefusal(PVM pVM, PVMCPU pVCpu)
227{
228 /* Sample the reason for refusing. */
229 if (pVM->tm.s.enmTSCMode != TMTSCMODE_DYNAMIC)
230 STAM_COUNTER_INC(&pVM->tm.s.StatTSCNotFixed);
231 else if (!pVCpu->tm.s.fTSCTicking)
232 STAM_COUNTER_INC(&pVM->tm.s.StatTSCNotTicking);
233 else if (pVM->tm.s.enmTSCMode != TMTSCMODE_REAL_TSC_OFFSET)
234 {
235 if (pVM->tm.s.fVirtualSyncCatchUp)
236 {
237 if (pVM->tm.s.u32VirtualSyncCatchUpPercentage <= 10)
238 STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupLE010);
239 else if (pVM->tm.s.u32VirtualSyncCatchUpPercentage <= 25)
240 STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupLE025);
241 else if (pVM->tm.s.u32VirtualSyncCatchUpPercentage <= 100)
242 STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupLE100);
243 else
244 STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupOther);
245 }
246 else if (!pVM->tm.s.fVirtualSyncTicking)
247 STAM_COUNTER_INC(&pVM->tm.s.StatTSCSyncNotTicking);
248 else if (pVM->tm.s.fVirtualWarpDrive)
249 STAM_COUNTER_INC(&pVM->tm.s.StatTSCWarp);
250 }
251}
252#endif /* VBOX_WITH_STATISTICS */
253
254
255/**
256 * Checks if AMD-V / VT-x can use an offsetted hardware TSC or not.
257 *
258 * @returns true/false accordingly.
259 * @param pVM The cross context VM structure.
260 * @param pVCpu The cross context virtual CPU structure.
261 * @param poffRealTsc The offset against the TSC of the current host CPU,
262 * if pfOffsettedTsc is set to true.
263 * @param pfParavirtTsc Where to return whether paravirt TSC is enabled.
264 *
265 * @thread EMT(pVCpu).
266 * @see TMCpuTickGetDeadlineAndTscOffset().
267 */
268VMM_INT_DECL(bool) TMCpuTickCanUseRealTSC(PVMCC pVM, PVMCPUCC pVCpu, uint64_t *poffRealTsc, bool *pfParavirtTsc)
269{
270 Assert(pVCpu->tm.s.fTSCTicking || DBGFIsStepping(pVCpu));
271
272 *pfParavirtTsc = pVM->tm.s.fParavirtTscEnabled;
273
274 /*
275 * In real TSC mode it's easy, we just need the delta & offTscRawSrc and
276 * the CPU will add them to RDTSC and RDTSCP at runtime.
277 *
278 * In tmCpuTickGetInternal we do:
279 * SUPReadTsc() - pVCpu->tm.s.offTSCRawSrc;
280 * Where SUPReadTsc() does:
281 * ASMReadTSC() - pGipCpu->i64TscDelta;
282 * Which means tmCpuTickGetInternal actually does:
283 * ASMReadTSC() - pGipCpu->i64TscDelta - pVCpu->tm.s.offTSCRawSrc;
284 * So, the offset to be ADDED to RDTSC[P] is:
285 * offRealTsc = -(pGipCpu->i64TscDelta + pVCpu->tm.s.offTSCRawSrc)
286 */
287 if (pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET)
288 {
289 /** @todo We should negate both deltas! It's soo weird that we do the
290 * exact opposite of what the hardware implements. */
291#ifdef IN_RING3
292 *poffRealTsc = 0 - pVCpu->tm.s.offTSCRawSrc - SUPGetTscDelta();
293#else
294 *poffRealTsc = 0 - pVCpu->tm.s.offTSCRawSrc - SUPGetTscDeltaByCpuSetIndex(pVCpu->iHostCpuSet);
295#endif
296 return true;
297 }
298
299 /*
300 * We require:
301 * 1. A fixed TSC, this is checked at init time.
302 * 2. That the TSC is ticking (we shouldn't be here if it isn't)
303 * 3. Either that we're using the real TSC as time source or
304 * a) we don't have any lag to catch up, and
305 * b) the virtual sync clock hasn't been halted by an expired timer, and
306 * c) we're not using warp drive (accelerated virtual guest time).
307 */
308 if ( pVM->tm.s.enmTSCMode == TMTSCMODE_DYNAMIC
309 && !pVM->tm.s.fVirtualSyncCatchUp
310 && RT_LIKELY(pVM->tm.s.fVirtualSyncTicking)
311 && !pVM->tm.s.fVirtualWarpDrive)
312 {
313 /* The source is the timer synchronous virtual clock. */
314 uint64_t u64Now = tmCpuTickGetRawVirtual(pVM, false /* don't check for pending timers */)
315 - pVCpu->tm.s.offTSCRawSrc;
316 /** @todo When we start collecting statistics on how much time we spend executing
317 * guest code before exiting, we should check this against the next virtual sync
318 * timer timeout. If it's lower than the avg. length, we should trap rdtsc to increase
319 * the chance that we'll get interrupted right after the timer expired. */
320 if (u64Now >= pVCpu->tm.s.u64TSCLastSeen)
321 {
322 *poffRealTsc = u64Now - ASMReadTSC();
323 return true; /** @todo count this? */
324 }
325 }
326
327#ifdef VBOX_WITH_STATISTICS
328 tmCpuTickRecordOffsettedTscRefusal(pVM, pVCpu);
329#endif
330 return false;
331}
332
333
334/**
335 * Calculates the number of host CPU ticks till the next virtual sync deadline.
336 *
337 * @note To save work, this function will not bother calculating the accurate
338 * tick count for deadlines that are more than a second ahead.
339 *
340 * @returns The number of host cpu ticks to the next deadline. Max one second.
341 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
342 * @param cNsToDeadline The number of nano seconds to the next virtual
343 * sync deadline.
344 */
345DECLINLINE(uint64_t) tmCpuCalcTicksToDeadline(PVMCPU pVCpu, uint64_t cNsToDeadline)
346{
347 AssertCompile(TMCLOCK_FREQ_VIRTUAL <= _4G);
348#ifdef IN_RING3
349 RT_NOREF_PV(pVCpu);
350 uint64_t uCpuHz = SUPGetCpuHzFromGip(g_pSUPGlobalInfoPage);
351#else
352 uint64_t uCpuHz = SUPGetCpuHzFromGipBySetIndex(g_pSUPGlobalInfoPage, pVCpu->iHostCpuSet);
353#endif
354 if (RT_UNLIKELY(cNsToDeadline >= TMCLOCK_FREQ_VIRTUAL))
355 return uCpuHz;
356 uint64_t cTicks = ASMMultU64ByU32DivByU32(uCpuHz, cNsToDeadline, TMCLOCK_FREQ_VIRTUAL);
357 if (cTicks > 4000)
358 cTicks -= 4000; /* fudge to account for overhead */
359 else
360 cTicks >>= 1;
361 return cTicks;
362}
363
364
365/**
366 * Gets the next deadline in host CPU clock ticks and the TSC offset if we can
367 * use the raw TSC.
368 *
369 * @returns The number of host CPU clock ticks to the next timer deadline.
370 * @param pVM The cross context VM structure.
371 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
372 * @param poffRealTsc The offset against the TSC of the current host CPU,
373 * if pfOffsettedTsc is set to true.
374 * @param pfOffsettedTsc Where to return whether TSC offsetting can be used.
375 * @param pfParavirtTsc Where to return whether paravirt TSC is enabled.
376 *
377 * @thread EMT(pVCpu).
378 * @see TMCpuTickCanUseRealTSC().
379 */
380VMM_INT_DECL(uint64_t) TMCpuTickGetDeadlineAndTscOffset(PVMCC pVM, PVMCPUCC pVCpu, uint64_t *poffRealTsc,
381 bool *pfOffsettedTsc, bool *pfParavirtTsc)
382{
383 Assert(pVCpu->tm.s.fTSCTicking || DBGFIsStepping(pVCpu));
384
385 *pfParavirtTsc = pVM->tm.s.fParavirtTscEnabled;
386
387 /*
388 * Same logic as in TMCpuTickCanUseRealTSC.
389 */
390 if (pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET)
391 {
392 /** @todo We should negate both deltas! It's soo weird that we do the
393 * exact opposite of what the hardware implements. */
394#ifdef IN_RING3
395 *poffRealTsc = 0 - pVCpu->tm.s.offTSCRawSrc - SUPGetTscDelta();
396#else
397 *poffRealTsc = 0 - pVCpu->tm.s.offTSCRawSrc - SUPGetTscDeltaByCpuSetIndex(pVCpu->iHostCpuSet);
398#endif
399 *pfOffsettedTsc = true;
400 return tmCpuCalcTicksToDeadline(pVCpu, TMVirtualSyncGetNsToDeadline(pVM));
401 }
402
403 /*
404 * Same logic as in TMCpuTickCanUseRealTSC.
405 */
406 if ( pVM->tm.s.enmTSCMode == TMTSCMODE_DYNAMIC
407 && !pVM->tm.s.fVirtualSyncCatchUp
408 && RT_LIKELY(pVM->tm.s.fVirtualSyncTicking)
409 && !pVM->tm.s.fVirtualWarpDrive)
410 {
411 /* The source is the timer synchronous virtual clock. */
412 uint64_t cNsToDeadline;
413 uint64_t u64NowVirtSync = TMVirtualSyncGetWithDeadlineNoCheck(pVM, &cNsToDeadline);
414 uint64_t u64Now = ASMMultU64ByU32DivByU32(u64NowVirtSync, pVM->tm.s.cTSCTicksPerSecond, TMCLOCK_FREQ_VIRTUAL);
415 u64Now -= pVCpu->tm.s.offTSCRawSrc;
416 *poffRealTsc = u64Now - ASMReadTSC();
417 *pfOffsettedTsc = u64Now >= pVCpu->tm.s.u64TSCLastSeen;
418 return tmCpuCalcTicksToDeadline(pVCpu, cNsToDeadline);
419 }
420
421#ifdef VBOX_WITH_STATISTICS
422 tmCpuTickRecordOffsettedTscRefusal(pVM, pVCpu);
423#endif
424 *pfOffsettedTsc = false;
425 *poffRealTsc = 0;
426 return tmCpuCalcTicksToDeadline(pVCpu, TMVirtualSyncGetNsToDeadline(pVM));
427}
428
429
430/**
431 * Read the current CPU timestamp counter.
432 *
433 * @returns Gets the CPU tsc.
434 * @param pVCpu The cross context virtual CPU structure.
435 * @param fCheckTimers Whether to check timers.
436 */
437DECLINLINE(uint64_t) tmCpuTickGetInternal(PVMCPUCC pVCpu, bool fCheckTimers)
438{
439 uint64_t u64;
440
441 if (RT_LIKELY(pVCpu->tm.s.fTSCTicking))
442 {
443 PVMCC pVM = pVCpu->CTX_SUFF(pVM);
444 switch (pVM->tm.s.enmTSCMode)
445 {
446 case TMTSCMODE_REAL_TSC_OFFSET:
447 u64 = SUPReadTsc();
448 break;
449 case TMTSCMODE_VIRT_TSC_EMULATED:
450 case TMTSCMODE_DYNAMIC:
451 u64 = tmCpuTickGetRawVirtual(pVM, fCheckTimers);
452 break;
453 case TMTSCMODE_NATIVE_API:
454 {
455 u64 = 0;
456 int rcNem = NEMHCQueryCpuTick(pVCpu, &u64, NULL);
457 AssertLogRelRCReturn(rcNem, SUPReadTsc());
458 break;
459 }
460 default:
461 AssertFailedBreakStmt(u64 = SUPReadTsc());
462 }
463 u64 -= pVCpu->tm.s.offTSCRawSrc;
464
465 /* Always return a value higher than what the guest has already seen. */
466 if (RT_LIKELY(u64 > pVCpu->tm.s.u64TSCLastSeen))
467 pVCpu->tm.s.u64TSCLastSeen = u64;
468 else
469 {
470 STAM_COUNTER_INC(&pVM->tm.s.StatTSCUnderflow);
471 pVCpu->tm.s.u64TSCLastSeen += 64; /** @todo choose a good increment here */
472 u64 = pVCpu->tm.s.u64TSCLastSeen;
473 }
474 }
475 else
476 u64 = pVCpu->tm.s.u64TSC;
477 return u64;
478}
479
480
481/**
482 * Read the current CPU timestamp counter.
483 *
484 * @returns Gets the CPU tsc.
485 * @param pVCpu The cross context virtual CPU structure.
486 */
487VMMDECL(uint64_t) TMCpuTickGet(PVMCPUCC pVCpu)
488{
489 return tmCpuTickGetInternal(pVCpu, true /* fCheckTimers */);
490}
491
492
493/**
494 * Read the current CPU timestamp counter, don't check for expired timers.
495 *
496 * @returns Gets the CPU tsc.
497 * @param pVCpu The cross context virtual CPU structure.
498 */
499VMM_INT_DECL(uint64_t) TMCpuTickGetNoCheck(PVMCPUCC pVCpu)
500{
501 return tmCpuTickGetInternal(pVCpu, false /* fCheckTimers */);
502}
503
504
505/**
506 * Sets the current CPU timestamp counter.
507 *
508 * @returns VBox status code.
509 * @param pVM The cross context VM structure.
510 * @param pVCpu The cross context virtual CPU structure.
511 * @param u64Tick The new timestamp value.
512 *
513 * @thread EMT which TSC is to be set.
514 */
515VMM_INT_DECL(int) TMCpuTickSet(PVMCC pVM, PVMCPUCC pVCpu, uint64_t u64Tick)
516{
517 VMCPU_ASSERT_EMT(pVCpu);
518 STAM_COUNTER_INC(&pVM->tm.s.StatTSCSet);
519
520 /*
521 * This is easier to do when the TSC is paused since resume will
522 * do all the calculations for us. Actually, we don't need to
523 * call tmCpuTickPause here since we overwrite u64TSC anyway.
524 */
525 bool fTSCTicking = pVCpu->tm.s.fTSCTicking;
526 pVCpu->tm.s.fTSCTicking = false;
527 pVCpu->tm.s.u64TSC = u64Tick;
528 pVCpu->tm.s.u64TSCLastSeen = u64Tick;
529 if (fTSCTicking)
530 tmCpuTickResume(pVM, pVCpu);
531 /** @todo Try help synchronizing it better among the virtual CPUs? */
532
533 return VINF_SUCCESS;
534}
535
536/**
537 * Sets the last seen CPU timestamp counter.
538 *
539 * @returns VBox status code.
540 * @param pVCpu The cross context virtual CPU structure.
541 * @param u64LastSeenTick The last seen timestamp value.
542 *
543 * @thread EMT which TSC is to be set.
544 */
545VMM_INT_DECL(int) TMCpuTickSetLastSeen(PVMCPUCC pVCpu, uint64_t u64LastSeenTick)
546{
547 VMCPU_ASSERT_EMT(pVCpu);
548
549 LogFlow(("TMCpuTickSetLastSeen %RX64\n", u64LastSeenTick));
550 if (pVCpu->tm.s.u64TSCLastSeen < u64LastSeenTick)
551 pVCpu->tm.s.u64TSCLastSeen = u64LastSeenTick;
552 return VINF_SUCCESS;
553}
554
555/**
556 * Gets the last seen CPU timestamp counter of the guest.
557 *
558 * @returns the last seen TSC.
559 * @param pVCpu The cross context virtual CPU structure.
560 *
561 * @thread EMT(pVCpu).
562 */
563VMM_INT_DECL(uint64_t) TMCpuTickGetLastSeen(PVMCPUCC pVCpu)
564{
565 VMCPU_ASSERT_EMT(pVCpu);
566
567 return pVCpu->tm.s.u64TSCLastSeen;
568}
569
570
571/**
572 * Get the timestamp frequency.
573 *
574 * @returns Number of ticks per second.
575 * @param pVM The cross context VM structure.
576 */
577VMMDECL(uint64_t) TMCpuTicksPerSecond(PVMCC pVM)
578{
579 if ( pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET
580 && g_pSUPGlobalInfoPage->u32Mode != SUPGIPMODE_INVARIANT_TSC)
581 {
582#ifdef IN_RING3
583 uint64_t cTSCTicksPerSecond = SUPGetCpuHzFromGip(g_pSUPGlobalInfoPage);
584#elif defined(IN_RING0)
585 uint64_t cTSCTicksPerSecond = SUPGetCpuHzFromGipBySetIndex(g_pSUPGlobalInfoPage, RTMpCpuIdToSetIndex(RTMpCpuId()));
586#else
587 uint64_t cTSCTicksPerSecond = SUPGetCpuHzFromGipBySetIndex(g_pSUPGlobalInfoPage, VMMGetCpu(pVM)->iHostCpuSet);
588#endif
589 if (RT_LIKELY(cTSCTicksPerSecond != ~(uint64_t)0))
590 return cTSCTicksPerSecond;
591 }
592 return pVM->tm.s.cTSCTicksPerSecond;
593}
594
595
596/**
597 * Whether the TSC is ticking for the VCPU.
598 *
599 * @returns true if ticking, false otherwise.
600 * @param pVCpu The cross context virtual CPU structure.
601 */
602VMM_INT_DECL(bool) TMCpuTickIsTicking(PVMCPUCC pVCpu)
603{
604 return pVCpu->tm.s.fTSCTicking;
605}
606
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