VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp@ 64323

最後變更 在這個檔案從64323是 64323,由 vboxsync 提交於 8 年 前

pgmHandlerPhysicalExRegister: Corrected check for single RAM range.

  • 屬性 svn:eol-style 設為 native
  • 屬性 svn:keywords 設為 Id Revision
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1/* $Id: PGMAllHandler.cpp 64323 2016-10-19 15:34:57Z vboxsync $ */
2/** @file
3 * PGM - Page Manager / Monitor, Access Handlers.
4 */
5
6/*
7 * Copyright (C) 2006-2016 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.alldomusa.eu.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_PGM
23#include <VBox/vmm/dbgf.h>
24#include <VBox/vmm/pgm.h>
25#include <VBox/vmm/iom.h>
26#include <VBox/vmm/mm.h>
27#include <VBox/vmm/em.h>
28#include <VBox/vmm/stam.h>
29#ifdef VBOX_WITH_REM
30# include <VBox/vmm/rem.h>
31#endif
32#include <VBox/vmm/dbgf.h>
33#ifdef VBOX_WITH_REM
34# include <VBox/vmm/rem.h>
35#endif
36#include "PGMInternal.h"
37#include <VBox/vmm/vm.h>
38#include "PGMInline.h"
39
40#include <VBox/log.h>
41#include <iprt/assert.h>
42#include <iprt/asm-amd64-x86.h>
43#include <iprt/string.h>
44#include <VBox/param.h>
45#include <VBox/err.h>
46#include <VBox/vmm/selm.h>
47
48
49/*********************************************************************************************************************************
50* Internal Functions *
51*********************************************************************************************************************************/
52static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVM pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam);
53static void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur);
54static void pgmHandlerPhysicalResetRamFlags(PVM pVM, PPGMPHYSHANDLER pCur);
55
56
57/**
58 * Internal worker for releasing a physical handler type registration reference.
59 *
60 * @returns New reference count. UINT32_MAX if invalid input (asserted).
61 * @param pVM The cross context VM structure.
62 * @param pType Pointer to the type registration.
63 */
64DECLINLINE(uint32_t) pgmHandlerPhysicalTypeRelease(PVM pVM, PPGMPHYSHANDLERTYPEINT pType)
65{
66 AssertMsgReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, ("%#x\n", pType->u32Magic), UINT32_MAX);
67 uint32_t cRefs = ASMAtomicDecU32(&pType->cRefs);
68 if (cRefs == 0)
69 {
70 pgmLock(pVM);
71 pType->u32Magic = PGMPHYSHANDLERTYPEINT_MAGIC_DEAD;
72 RTListOff32NodeRemove(&pType->ListNode);
73 pgmUnlock(pVM);
74 MMHyperFree(pVM, pType);
75 }
76 return cRefs;
77}
78
79
80/**
81 * Internal worker for retaining a physical handler type registration reference.
82 *
83 * @returns New reference count. UINT32_MAX if invalid input (asserted).
84 * @param pVM The cross context VM structure.
85 * @param pType Pointer to the type registration.
86 */
87DECLINLINE(uint32_t) pgmHandlerPhysicalTypeRetain(PVM pVM, PPGMPHYSHANDLERTYPEINT pType)
88{
89 NOREF(pVM);
90 AssertMsgReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, ("%#x\n", pType->u32Magic), UINT32_MAX);
91 uint32_t cRefs = ASMAtomicIncU32(&pType->cRefs);
92 Assert(cRefs < _1M && cRefs > 0);
93 return cRefs;
94}
95
96
97/**
98 * Releases a reference to a physical handler type registration.
99 *
100 * @returns New reference count. UINT32_MAX if invalid input (asserted).
101 * @param pVM The cross context VM structure.
102 * @param hType The type regiration handle.
103 */
104VMMDECL(uint32_t) PGMHandlerPhysicalTypeRelease(PVM pVM, PGMPHYSHANDLERTYPE hType)
105{
106 if (hType != NIL_PGMPHYSHANDLERTYPE)
107 return pgmHandlerPhysicalTypeRelease(pVM, PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType));
108 return 0;
109}
110
111
112/**
113 * Retains a reference to a physical handler type registration.
114 *
115 * @returns New reference count. UINT32_MAX if invalid input (asserted).
116 * @param pVM The cross context VM structure.
117 * @param hType The type regiration handle.
118 */
119VMMDECL(uint32_t) PGMHandlerPhysicalTypeRetain(PVM pVM, PGMPHYSHANDLERTYPE hType)
120{
121 return pgmHandlerPhysicalTypeRetain(pVM, PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType));
122}
123
124
125/**
126 * Creates an physical access handler.
127 *
128 * @returns VBox status code.
129 * @retval VINF_SUCCESS when successfully installed.
130 * @retval VINF_PGM_GCPHYS_ALIASED when the shadow PTs could be updated because
131 * the guest page aliased or/and mapped by multiple PTs. A CR3 sync has been
132 * flagged together with a pool clearing.
133 * @retval VERR_PGM_HANDLER_PHYSICAL_CONFLICT if the range conflicts with an existing
134 * one. A debug assertion is raised.
135 *
136 * @param pVM The cross context VM structure.
137 * @param hType The handler type registration handle.
138 * @param pvUserR3 User argument to the R3 handler.
139 * @param pvUserR0 User argument to the R0 handler.
140 * @param pvUserRC User argument to the RC handler. This can be a value
141 * less that 0x10000 or a (non-null) pointer that is
142 * automatically relocated.
143 * @param pszDesc Description of this handler. If NULL, the type
144 * description will be used instead.
145 * @param ppPhysHandler Where to return the access handler structure on
146 * success.
147 */
148int pgmHandlerPhysicalExCreate(PVM pVM, PGMPHYSHANDLERTYPE hType, RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC,
149 R3PTRTYPE(const char *) pszDesc, PPGMPHYSHANDLER *ppPhysHandler)
150{
151 PPGMPHYSHANDLERTYPEINT pType = PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType);
152 Log(("pgmHandlerPhysicalExCreate: pvUserR3=%RHv pvUserR0=%RHv pvUserGC=%RRv hType=%#x (%d, %s) pszDesc=%RHv:%s\n",
153 pvUserR3, pvUserR0, pvUserRC, hType, pType->enmKind, R3STRING(pType->pszDesc), pszDesc, R3STRING(pszDesc)));
154
155 /*
156 * Validate input.
157 */
158 AssertPtr(ppPhysHandler);
159 AssertReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, VERR_INVALID_HANDLE);
160 AssertMsgReturn( (RTRCUINTPTR)pvUserRC < 0x10000
161 || MMHyperR3ToRC(pVM, MMHyperRCToR3(pVM, pvUserRC)) == pvUserRC,
162 ("Not RC pointer! pvUserRC=%RRv\n", pvUserRC),
163 VERR_INVALID_PARAMETER);
164 AssertMsgReturn( (RTR0UINTPTR)pvUserR0 < 0x10000
165 || MMHyperR3ToR0(pVM, MMHyperR0ToR3(pVM, pvUserR0)) == pvUserR0,
166 ("Not R0 pointer! pvUserR0=%RHv\n", pvUserR0),
167 VERR_INVALID_PARAMETER);
168
169 /*
170 * Allocate and initialize the new entry.
171 */
172 PPGMPHYSHANDLER pNew;
173 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
174 if (RT_SUCCESS(rc))
175 {
176 pNew->Core.Key = NIL_RTGCPHYS;
177 pNew->Core.KeyLast = NIL_RTGCPHYS;
178 pNew->cPages = 0;
179 pNew->cAliasedPages = 0;
180 pNew->cTmpOffPages = 0;
181 pNew->pvUserR3 = pvUserR3;
182 pNew->pvUserR0 = pvUserR0;
183 pNew->pvUserRC = pvUserRC;
184 pNew->hType = hType;
185 pNew->pszDesc = pszDesc != NIL_RTR3PTR ? pszDesc : pType->pszDesc;
186 pgmHandlerPhysicalTypeRetain(pVM, pType);
187 *ppPhysHandler = pNew;
188 return VINF_SUCCESS;
189 }
190
191 return rc;
192}
193
194
195/**
196 * Register a access handler for a physical range.
197 *
198 * @returns VBox status code.
199 * @retval VINF_SUCCESS when successfully installed.
200 * @retval VINF_PGM_GCPHYS_ALIASED when the shadow PTs could be updated because
201 * the guest page aliased or/and mapped by multiple PTs. A CR3 sync has been
202 * flagged together with a pool clearing.
203 * @retval VERR_PGM_HANDLER_PHYSICAL_CONFLICT if the range conflicts with an existing
204 * one. A debug assertion is raised.
205 *
206 * @param pVM The cross context VM structure.
207 * @param pPhysHandler The physical handler.
208 * @param GCPhys Start physical address.
209 * @param GCPhysLast Last physical address. (inclusive)
210 */
211int pgmHandlerPhysicalExRegister(PVM pVM, PPGMPHYSHANDLER pPhysHandler, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast)
212{
213 /*
214 * Validate input.
215 */
216 AssertPtr(pPhysHandler);
217 PPGMPHYSHANDLERTYPEINT pType = PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, pPhysHandler->hType);
218 Assert(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC);
219 Log(("pgmHandlerPhysicalExRegister: GCPhys=%RGp GCPhysLast=%RGp hType=%#x (%d, %s) pszDesc=%RHv:%s\n",
220 GCPhys, GCPhysLast, pPhysHandler->hType, pType->enmKind, R3STRING(pType->pszDesc), pPhysHandler->pszDesc, R3STRING(pPhysHandler->pszDesc)));
221 AssertReturn(pPhysHandler->Core.Key == NIL_RTGCPHYS, VERR_WRONG_ORDER);
222
223 AssertMsgReturn(GCPhys < GCPhysLast, ("GCPhys >= GCPhysLast (%#x >= %#x)\n", GCPhys, GCPhysLast), VERR_INVALID_PARAMETER);
224 switch (pType->enmKind)
225 {
226 case PGMPHYSHANDLERKIND_WRITE:
227 break;
228 case PGMPHYSHANDLERKIND_MMIO:
229 case PGMPHYSHANDLERKIND_ALL:
230 /* Simplification for PGMPhysRead, PGMR0Trap0eHandlerNPMisconfig and others: Full pages. */
231 AssertMsgReturn(!(GCPhys & PAGE_OFFSET_MASK), ("%RGp\n", GCPhys), VERR_INVALID_PARAMETER);
232 AssertMsgReturn((GCPhysLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, ("%RGp\n", GCPhysLast), VERR_INVALID_PARAMETER);
233 break;
234 default:
235 AssertMsgFailed(("Invalid input enmKind=%d!\n", pType->enmKind));
236 return VERR_INVALID_PARAMETER;
237 }
238
239 /*
240 * We require the range to be within registered ram.
241 * There is no apparent need to support ranges which cover more than one ram range.
242 */
243 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
244 if ( !pRam
245 || GCPhysLast > pRam->GCPhysLast)
246 {
247#ifdef IN_RING3
248 DBGFR3Info(pVM->pUVM, "phys", NULL, NULL);
249#endif
250 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
251 return VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
252 }
253 Assert(GCPhys >= pRam->GCPhys && GCPhys < pRam->GCPhysLast);
254 Assert(GCPhysLast <= pRam->GCPhysLast && GCPhysLast >= pRam->GCPhys);
255
256 /*
257 * Try insert into list.
258 */
259 pPhysHandler->Core.Key = GCPhys;
260 pPhysHandler->Core.KeyLast = GCPhysLast;
261 pPhysHandler->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
262
263 pgmLock(pVM);
264 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pPhysHandler->Core))
265 {
266 int rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pPhysHandler, pRam);
267 if (rc == VINF_PGM_SYNC_CR3)
268 rc = VINF_PGM_GCPHYS_ALIASED;
269 pgmUnlock(pVM);
270
271#ifdef VBOX_WITH_REM
272# ifndef IN_RING3
273 REMNotifyHandlerPhysicalRegister(pVM, pType->enmKind, GCPhys, GCPhysLast - GCPhys + 1, !!pType->pfnHandlerR3);
274# else
275 REMR3NotifyHandlerPhysicalRegister(pVM, pType->enmKind, GCPhys, GCPhysLast - GCPhys + 1, !!pType->pfnHandlerR3);
276# endif
277#endif
278 if (rc != VINF_SUCCESS)
279 Log(("PGMHandlerPhysicalRegisterEx: returns %Rrc (%RGp-%RGp)\n", rc, GCPhys, GCPhysLast));
280 return rc;
281 }
282 pgmUnlock(pVM);
283
284 pPhysHandler->Core.Key = NIL_RTGCPHYS;
285 pPhysHandler->Core.KeyLast = NIL_RTGCPHYS;
286
287#if defined(IN_RING3) && defined(VBOX_STRICT)
288 DBGFR3Info(pVM->pUVM, "handlers", "phys nostats", NULL);
289#endif
290 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp pszDesc=%s/%s\n",
291 GCPhys, GCPhysLast, R3STRING(pPhysHandler->pszDesc), R3STRING(pType->pszDesc)));
292 return VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
293}
294
295
296/**
297 * Register a access handler for a physical range.
298 *
299 * @returns VBox status code.
300 * @retval VINF_SUCCESS when successfully installed.
301 * @retval VINF_PGM_GCPHYS_ALIASED when the shadow PTs could be updated because
302 * the guest page aliased or/and mapped by multiple PTs. A CR3 sync has been
303 * flagged together with a pool clearing.
304 * @retval VERR_PGM_HANDLER_PHYSICAL_CONFLICT if the range conflicts with an existing
305 * one. A debug assertion is raised.
306 *
307 * @param pVM The cross context VM structure.
308 * @param GCPhys Start physical address.
309 * @param GCPhysLast Last physical address. (inclusive)
310 * @param hType The handler type registration handle.
311 * @param pvUserR3 User argument to the R3 handler.
312 * @param pvUserR0 User argument to the R0 handler.
313 * @param pvUserRC User argument to the RC handler. This can be a value
314 * less that 0x10000 or a (non-null) pointer that is
315 * automatically relocated.
316 * @param pszDesc Description of this handler. If NULL, the type
317 * description will be used instead.
318 */
319VMMDECL(int) PGMHandlerPhysicalRegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, PGMPHYSHANDLERTYPE hType,
320 RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, R3PTRTYPE(const char *) pszDesc)
321{
322#ifdef LOG_ENABLED
323 PPGMPHYSHANDLERTYPEINT pType = PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType);
324 Log(("PGMHandlerPhysicalRegister: GCPhys=%RGp GCPhysLast=%RGp pvUserR3=%RHv pvUserR0=%RHv pvUserGC=%RRv hType=%#x (%d, %s) pszDesc=%RHv:%s\n",
325 GCPhys, GCPhysLast, pvUserR3, pvUserR0, pvUserRC, hType, pType->enmKind, R3STRING(pType->pszDesc), pszDesc, R3STRING(pszDesc)));
326#endif
327
328 PPGMPHYSHANDLER pNew;
329 int rc = pgmHandlerPhysicalExCreate(pVM, hType, pvUserR3, pvUserR0, pvUserRC, pszDesc, &pNew);
330 if (RT_SUCCESS(rc))
331 {
332 rc = pgmHandlerPhysicalExRegister(pVM, pNew, GCPhys, GCPhysLast);
333 if (RT_SUCCESS(rc))
334 return rc;
335 pgmHandlerPhysicalExDestroy(pVM, pNew);
336 }
337 return rc;
338}
339
340
341/**
342 * Sets ram range flags and attempts updating shadow PTs.
343 *
344 * @returns VBox status code.
345 * @retval VINF_SUCCESS when shadow PTs was successfully updated.
346 * @retval VINF_PGM_SYNC_CR3 when the shadow PTs could be updated because
347 * the guest page aliased or/and mapped by multiple PTs. FFs set.
348 * @param pVM The cross context VM structure.
349 * @param pCur The physical handler.
350 * @param pRam The RAM range.
351 */
352static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVM pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam)
353{
354 /*
355 * Iterate the guest ram pages updating the flags and flushing PT entries
356 * mapping the page.
357 */
358 bool fFlushTLBs = false;
359 int rc = VINF_SUCCESS;
360 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
361 const unsigned uState = pCurType->uState;
362 uint32_t cPages = pCur->cPages;
363 uint32_t i = (pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT;
364 for (;;)
365 {
366 PPGMPAGE pPage = &pRam->aPages[i];
367 AssertMsg(pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO || PGM_PAGE_IS_MMIO(pPage),
368 ("%RGp %R[pgmpage]\n", pRam->GCPhys + (i << PAGE_SHIFT), pPage));
369
370 /* Only do upgrades. */
371 if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
372 {
373 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
374
375 int rc2 = pgmPoolTrackUpdateGCPhys(pVM, pRam->GCPhys + (i << PAGE_SHIFT), pPage,
376 false /* allow updates of PTEs (instead of flushing) */, &fFlushTLBs);
377 if (rc2 != VINF_SUCCESS && rc == VINF_SUCCESS)
378 rc = rc2;
379 }
380
381 /* next */
382 if (--cPages == 0)
383 break;
384 i++;
385 }
386
387 if (fFlushTLBs)
388 {
389 PGM_INVL_ALL_VCPU_TLBS(pVM);
390 Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: flushing guest TLBs; rc=%d\n", rc));
391 }
392 else
393 Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: doesn't flush guest TLBs. rc=%Rrc; sync flags=%x VMCPU_FF_PGM_SYNC_CR3=%d\n", rc, VMMGetCpu(pVM)->pgm.s.fSyncFlags, VMCPU_FF_IS_SET(VMMGetCpu(pVM), VMCPU_FF_PGM_SYNC_CR3)));
394
395 return rc;
396}
397
398
399/**
400 * Deregister a physical page access handler.
401 *
402 * @returns VBox status code.
403 * @param pVM The cross context VM structure.
404 * @param pPhysHandler The handler to deregister (but not free).
405 */
406int pgmHandlerPhysicalExDeregister(PVM pVM, PPGMPHYSHANDLER pPhysHandler)
407{
408 LogFlow(("pgmHandlerPhysicalExDeregister: Removing Range %RGp-%RGp %s\n",
409 pPhysHandler->Core.Key, pPhysHandler->Core.KeyLast, R3STRING(pPhysHandler->pszDesc)));
410 AssertReturn(pPhysHandler->Core.Key != NIL_RTGCPHYS, VERR_PGM_HANDLER_NOT_FOUND);
411
412 /*
413 * Remove the handler from the tree.
414 */
415 pgmLock(pVM);
416 PPGMPHYSHANDLER pRemoved = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers,
417 pPhysHandler->Core.Key);
418 if (pRemoved == pPhysHandler)
419 {
420 /*
421 * Clear the page bits, notify the REM about this change and clear
422 * the cache.
423 */
424 pgmHandlerPhysicalResetRamFlags(pVM, pPhysHandler);
425 pgmHandlerPhysicalDeregisterNotifyREM(pVM, pPhysHandler);
426 pVM->pgm.s.pLastPhysHandlerR0 = 0;
427 pVM->pgm.s.pLastPhysHandlerR3 = 0;
428 pVM->pgm.s.pLastPhysHandlerRC = 0;
429
430 pPhysHandler->Core.Key = NIL_RTGCPHYS;
431 pPhysHandler->Core.KeyLast = NIL_RTGCPHYS;
432
433 pgmUnlock(pVM);
434
435 return VINF_SUCCESS;
436 }
437
438 /*
439 * Both of the failure conditions here are considered internal processing
440 * errors because they can only be caused by race conditions or corruption.
441 * If we ever need to handle concurrent deregistration, we have to move
442 * the NIL_RTGCPHYS check inside the PGM lock.
443 */
444 if (pRemoved)
445 RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pRemoved->Core);
446
447 pgmUnlock(pVM);
448
449 if (!pRemoved)
450 AssertMsgFailed(("Didn't find range starting at %RGp in the tree!\n", pPhysHandler->Core.Key));
451 else
452 AssertMsgFailed(("Found different handle at %RGp in the tree: got %p insteaded of %p\n",
453 pPhysHandler->Core.Key, pRemoved, pPhysHandler));
454 return VERR_PGM_HANDLER_IPE_1;
455}
456
457
458/**
459 * Destroys (frees) a physical handler.
460 *
461 * The caller must deregister it before destroying it!
462 *
463 * @returns VBox status code.
464 * @param pVM The cross context VM structure.
465 * @param pHandler The handler to free. NULL if ignored.
466 */
467int pgmHandlerPhysicalExDestroy(PVM pVM, PPGMPHYSHANDLER pHandler)
468{
469 if (pHandler)
470 {
471 AssertPtr(pHandler);
472 AssertReturn(pHandler->Core.Key == NIL_RTGCPHYS, VERR_WRONG_ORDER);
473 PGMHandlerPhysicalTypeRelease(pVM, pHandler->hType);
474 MMHyperFree(pVM, pHandler);
475 }
476 return VINF_SUCCESS;
477}
478
479
480/**
481 * Deregister a physical page access handler.
482 *
483 * @returns VBox status code.
484 * @param pVM The cross context VM structure.
485 * @param GCPhys Start physical address.
486 */
487VMMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys)
488{
489 /*
490 * Find the handler.
491 */
492 pgmLock(pVM);
493 PPGMPHYSHANDLER pRemoved = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
494 if (pRemoved)
495 {
496 LogFlow(("PGMHandlerPhysicalDeregister: Removing Range %RGp-%RGp %s\n",
497 pRemoved->Core.Key, pRemoved->Core.KeyLast, R3STRING(pRemoved->pszDesc)));
498
499 /*
500 * Clear the page bits, notify the REM about this change and clear
501 * the cache.
502 */
503 pgmHandlerPhysicalResetRamFlags(pVM, pRemoved);
504 pgmHandlerPhysicalDeregisterNotifyREM(pVM, pRemoved);
505 pVM->pgm.s.pLastPhysHandlerR0 = 0;
506 pVM->pgm.s.pLastPhysHandlerR3 = 0;
507 pVM->pgm.s.pLastPhysHandlerRC = 0;
508
509 pgmUnlock(pVM);
510
511 pRemoved->Core.Key = NIL_RTGCPHYS;
512 pgmHandlerPhysicalExDestroy(pVM, pRemoved);
513 return VINF_SUCCESS;
514 }
515
516 pgmUnlock(pVM);
517
518 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
519 return VERR_PGM_HANDLER_NOT_FOUND;
520}
521
522
523/**
524 * Shared code with modify.
525 */
526static void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur)
527{
528 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
529 RTGCPHYS GCPhysStart = pCur->Core.Key;
530 RTGCPHYS GCPhysLast = pCur->Core.KeyLast;
531
532 /*
533 * Page align the range.
534 *
535 * Since we've reset (recalculated) the physical handler state of all pages
536 * we can make use of the page states to figure out whether a page should be
537 * included in the REM notification or not.
538 */
539 if ( (pCur->Core.Key & PAGE_OFFSET_MASK)
540 || ((pCur->Core.KeyLast + 1) & PAGE_OFFSET_MASK))
541 {
542 Assert(pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO);
543
544 if (GCPhysStart & PAGE_OFFSET_MASK)
545 {
546 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhysStart);
547 if ( pPage
548 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
549 {
550 RTGCPHYS GCPhys = (GCPhysStart + (PAGE_SIZE - 1)) & X86_PTE_PAE_PG_MASK;
551 if ( GCPhys > GCPhysLast
552 || GCPhys < GCPhysStart)
553 return;
554 GCPhysStart = GCPhys;
555 }
556 else
557 GCPhysStart &= X86_PTE_PAE_PG_MASK;
558 Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
559 }
560
561 if (GCPhysLast & PAGE_OFFSET_MASK)
562 {
563 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhysLast);
564 if ( pPage
565 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
566 {
567 RTGCPHYS GCPhys = (GCPhysLast & X86_PTE_PAE_PG_MASK) - 1;
568 if ( GCPhys < GCPhysStart
569 || GCPhys > GCPhysLast)
570 return;
571 GCPhysLast = GCPhys;
572 }
573 else
574 GCPhysLast |= PAGE_OFFSET_MASK;
575 Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
576 }
577 }
578
579#ifdef VBOX_WITH_REM
580 /*
581 * Tell REM.
582 */
583 const bool fRestoreAsRAM = pCurType->pfnHandlerR3
584 && pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO; /** @todo this isn't entirely correct. */
585# ifndef IN_RING3
586 REMNotifyHandlerPhysicalDeregister(pVM, pCurType->enmKind, GCPhysStart, GCPhysLast - GCPhysStart + 1,
587 !!pCurType->pfnHandlerR3, fRestoreAsRAM);
588# else
589 REMR3NotifyHandlerPhysicalDeregister(pVM, pCurType->enmKind, GCPhysStart, GCPhysLast - GCPhysStart + 1,
590 !!pCurType->pfnHandlerR3, fRestoreAsRAM);
591# endif
592#else
593 RT_NOREF_PV(pCurType);
594#endif
595}
596
597
598/**
599 * pgmHandlerPhysicalResetRamFlags helper that checks for other handlers on
600 * edge pages.
601 */
602DECLINLINE(void) pgmHandlerPhysicalRecalcPageState(PVM pVM, RTGCPHYS GCPhys, bool fAbove, PPGMRAMRANGE *ppRamHint)
603{
604 /*
605 * Look for other handlers.
606 */
607 unsigned uState = PGM_PAGE_HNDL_PHYS_STATE_NONE;
608 for (;;)
609 {
610 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys, fAbove);
611 if ( !pCur
612 || ((fAbove ? pCur->Core.Key : pCur->Core.KeyLast) >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
613 break;
614 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
615 uState = RT_MAX(uState, pCurType->uState);
616
617 /* next? */
618 RTGCPHYS GCPhysNext = fAbove
619 ? pCur->Core.KeyLast + 1
620 : pCur->Core.Key - 1;
621 if ((GCPhysNext >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
622 break;
623 GCPhys = GCPhysNext;
624 }
625
626 /*
627 * Update if we found something that is a higher priority
628 * state than the current.
629 */
630 if (uState != PGM_PAGE_HNDL_PHYS_STATE_NONE)
631 {
632 PPGMPAGE pPage;
633 int rc = pgmPhysGetPageWithHintEx(pVM, GCPhys, &pPage, ppRamHint);
634 if ( RT_SUCCESS(rc)
635 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
636 {
637 /* This should normally not be necessary. */
638 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
639 bool fFlushTLBs ;
640 rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhys, pPage, false /*fFlushPTEs*/, &fFlushTLBs);
641 if (RT_SUCCESS(rc) && fFlushTLBs)
642 PGM_INVL_ALL_VCPU_TLBS(pVM);
643 else
644 AssertRC(rc);
645 }
646 else
647 AssertRC(rc);
648 }
649}
650
651
652/**
653 * Resets an aliased page.
654 *
655 * @param pVM The cross context VM structure.
656 * @param pPage The page.
657 * @param GCPhysPage The page address in case it comes in handy.
658 * @param fDoAccounting Whether to perform accounting. (Only set during
659 * reset where pgmR3PhysRamReset doesn't have the
660 * handler structure handy.)
661 */
662void pgmHandlerPhysicalResetAliasedPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhysPage, bool fDoAccounting)
663{
664 Assert( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
665 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO);
666 Assert(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) == PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
667
668 /*
669 * Flush any shadow page table references *first*.
670 */
671 bool fFlushTLBs = false;
672 int rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhysPage, pPage, true /*fFlushPTEs*/, &fFlushTLBs);
673 AssertLogRelRCReturnVoid(rc);
674# ifdef IN_RC
675 if (fFlushTLBs && rc != VINF_PGM_SYNC_CR3)
676 PGM_INVL_VCPU_TLBS(VMMGetCpu0(pVM));
677# else
678 HMFlushTLBOnAllVCpus(pVM);
679# endif
680
681 /*
682 * Make it an MMIO/Zero page.
683 */
684 PGM_PAGE_SET_HCPHYS(pVM, pPage, pVM->pgm.s.HCPhysZeroPg);
685 PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO);
686 PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ZERO);
687 PGM_PAGE_SET_PAGEID(pVM, pPage, NIL_GMM_PAGEID);
688 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_ALL);
689
690 /* Flush its TLB entry. */
691 pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
692
693 /*
694 * Do accounting for pgmR3PhysRamReset.
695 */
696 if (fDoAccounting)
697 {
698 PPGMPHYSHANDLER pHandler = pgmHandlerPhysicalLookup(pVM, GCPhysPage);
699 if (RT_LIKELY(pHandler))
700 {
701 Assert(pHandler->cAliasedPages > 0);
702 pHandler->cAliasedPages--;
703 }
704 else
705 AssertFailed();
706 }
707}
708
709
710/**
711 * Resets ram range flags.
712 *
713 * @returns VBox status code.
714 * @retval VINF_SUCCESS when shadow PTs was successfully updated.
715 * @param pVM The cross context VM structure.
716 * @param pCur The physical handler.
717 *
718 * @remark We don't start messing with the shadow page tables, as we've
719 * already got code in Trap0e which deals with out of sync handler
720 * flags (originally conceived for global pages).
721 */
722static void pgmHandlerPhysicalResetRamFlags(PVM pVM, PPGMPHYSHANDLER pCur)
723{
724 /*
725 * Iterate the guest ram pages updating the state.
726 */
727 RTUINT cPages = pCur->cPages;
728 RTGCPHYS GCPhys = pCur->Core.Key;
729 PPGMRAMRANGE pRamHint = NULL;
730 for (;;)
731 {
732 PPGMPAGE pPage;
733 int rc = pgmPhysGetPageWithHintEx(pVM, GCPhys, &pPage, &pRamHint);
734 if (RT_SUCCESS(rc))
735 {
736 /* Reset aliased MMIO pages to MMIO, since this aliasing is our business.
737 (We don't flip MMIO to RAM though, that's PGMPhys.cpp's job.) */
738 if ( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
739 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO)
740 {
741 Assert(pCur->cAliasedPages > 0);
742 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhys, false /*fDoAccounting*/);
743 pCur->cAliasedPages--;
744 }
745#ifdef VBOX_STRICT
746 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
747 AssertMsg(pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO || PGM_PAGE_IS_MMIO(pPage), ("%RGp %R[pgmpage]\n", GCPhys, pPage));
748#endif
749 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_NONE);
750 }
751 else
752 AssertRC(rc);
753
754 /* next */
755 if (--cPages == 0)
756 break;
757 GCPhys += PAGE_SIZE;
758 }
759
760 pCur->cAliasedPages = 0;
761 pCur->cTmpOffPages = 0;
762
763 /*
764 * Check for partial start and end pages.
765 */
766 if (pCur->Core.Key & PAGE_OFFSET_MASK)
767 pgmHandlerPhysicalRecalcPageState(pVM, pCur->Core.Key - 1, false /* fAbove */, &pRamHint);
768 if ((pCur->Core.KeyLast & PAGE_OFFSET_MASK) != PAGE_OFFSET_MASK)
769 pgmHandlerPhysicalRecalcPageState(pVM, pCur->Core.KeyLast + 1, true /* fAbove */, &pRamHint);
770}
771
772
773/**
774 * Modify a physical page access handler.
775 *
776 * Modification can only be done to the range it self, not the type or anything else.
777 *
778 * @returns VBox status code.
779 * For all return codes other than VERR_PGM_HANDLER_NOT_FOUND and VINF_SUCCESS the range is deregistered
780 * and a new registration must be performed!
781 * @param pVM The cross context VM structure.
782 * @param GCPhysCurrent Current location.
783 * @param GCPhys New location.
784 * @param GCPhysLast New last location.
785 */
786VMMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast)
787{
788 /*
789 * Remove it.
790 */
791 int rc;
792 pgmLock(pVM);
793 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhysCurrent);
794 if (pCur)
795 {
796 /*
797 * Clear the ram flags. (We're gonna move or free it!)
798 */
799 pgmHandlerPhysicalResetRamFlags(pVM, pCur);
800#ifdef VBOX_WITH_REM
801 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
802 const bool fRestoreAsRAM = pCurType->pfnHandlerR3
803 && pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO; /** @todo this isn't entirely correct. */
804#endif
805
806 /*
807 * Validate the new range, modify and reinsert.
808 */
809 if (GCPhysLast >= GCPhys)
810 {
811 /*
812 * We require the range to be within registered ram.
813 * There is no apparent need to support ranges which cover more than one ram range.
814 */
815 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
816 if ( pRam
817 && GCPhys <= pRam->GCPhysLast
818 && GCPhysLast >= pRam->GCPhys)
819 {
820 pCur->Core.Key = GCPhys;
821 pCur->Core.KeyLast = GCPhysLast;
822 pCur->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + 1) >> PAGE_SHIFT;
823
824 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pCur->Core))
825 {
826#ifdef VBOX_WITH_REM
827 RTGCPHYS cb = GCPhysLast - GCPhys + 1;
828 PGMPHYSHANDLERKIND enmKind = pCurType->enmKind;
829 bool fHasHCHandler = !!pCurType->pfnHandlerR3;
830#endif
831
832 /*
833 * Set ram flags, flush shadow PT entries and finally tell REM about this.
834 */
835 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
836 pgmUnlock(pVM);
837
838#ifdef VBOX_WITH_REM
839# ifndef IN_RING3
840 REMNotifyHandlerPhysicalModify(pVM, enmKind, GCPhysCurrent, GCPhys, cb,
841 fHasHCHandler, fRestoreAsRAM);
842# else
843 REMR3NotifyHandlerPhysicalModify(pVM, enmKind, GCPhysCurrent, GCPhys, cb,
844 fHasHCHandler, fRestoreAsRAM);
845# endif
846#endif
847 PGM_INVL_ALL_VCPU_TLBS(pVM);
848 Log(("PGMHandlerPhysicalModify: GCPhysCurrent=%RGp -> GCPhys=%RGp GCPhysLast=%RGp\n",
849 GCPhysCurrent, GCPhys, GCPhysLast));
850 return VINF_SUCCESS;
851 }
852
853 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp\n", GCPhys, GCPhysLast));
854 rc = VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
855 }
856 else
857 {
858 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
859 rc = VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
860 }
861 }
862 else
863 {
864 AssertMsgFailed(("Invalid range %RGp-%RGp\n", GCPhys, GCPhysLast));
865 rc = VERR_INVALID_PARAMETER;
866 }
867
868 /*
869 * Invalid new location, flush the cache and free it.
870 * We've only gotta notify REM and free the memory.
871 */
872 pgmHandlerPhysicalDeregisterNotifyREM(pVM, pCur);
873 pVM->pgm.s.pLastPhysHandlerR0 = 0;
874 pVM->pgm.s.pLastPhysHandlerR3 = 0;
875 pVM->pgm.s.pLastPhysHandlerRC = 0;
876 PGMHandlerPhysicalTypeRelease(pVM, pCur->hType);
877 MMHyperFree(pVM, pCur);
878 }
879 else
880 {
881 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhysCurrent));
882 rc = VERR_PGM_HANDLER_NOT_FOUND;
883 }
884
885 pgmUnlock(pVM);
886 return rc;
887}
888
889
890/**
891 * Changes the user callback arguments associated with a physical access
892 * handler.
893 *
894 * @returns VBox status code.
895 * @param pVM The cross context VM structure.
896 * @param GCPhys Start physical address of the handler.
897 * @param pvUserR3 User argument to the R3 handler.
898 * @param pvUserR0 User argument to the R0 handler.
899 * @param pvUserRC User argument to the RC handler. Values larger or
900 * equal to 0x10000 will be relocated automatically.
901 */
902VMMDECL(int) PGMHandlerPhysicalChangeUserArgs(PVM pVM, RTGCPHYS GCPhys, RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC)
903{
904 /*
905 * Find the handler.
906 */
907 int rc = VINF_SUCCESS;
908 pgmLock(pVM);
909 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
910 if (pCur)
911 {
912 /*
913 * Change arguments.
914 */
915 pCur->pvUserR3 = pvUserR3;
916 pCur->pvUserR0 = pvUserR0;
917 pCur->pvUserRC = pvUserRC;
918 }
919 else
920 {
921 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
922 rc = VERR_PGM_HANDLER_NOT_FOUND;
923 }
924
925 pgmUnlock(pVM);
926 return rc;
927}
928
929
930/**
931 * Splits a physical access handler in two.
932 *
933 * @returns VBox status code.
934 * @param pVM The cross context VM structure.
935 * @param GCPhys Start physical address of the handler.
936 * @param GCPhysSplit The split address.
937 */
938VMMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit)
939{
940 AssertReturn(GCPhys < GCPhysSplit, VERR_INVALID_PARAMETER);
941
942 /*
943 * Do the allocation without owning the lock.
944 */
945 PPGMPHYSHANDLER pNew;
946 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
947 if (RT_FAILURE(rc))
948 return rc;
949
950 /*
951 * Get the handler.
952 */
953 pgmLock(pVM);
954 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
955 if (RT_LIKELY(pCur))
956 {
957 if (RT_LIKELY(GCPhysSplit <= pCur->Core.KeyLast))
958 {
959 /*
960 * Create new handler node for the 2nd half.
961 */
962 *pNew = *pCur;
963 pNew->Core.Key = GCPhysSplit;
964 pNew->cPages = (pNew->Core.KeyLast - (pNew->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
965
966 pCur->Core.KeyLast = GCPhysSplit - 1;
967 pCur->cPages = (pCur->Core.KeyLast - (pCur->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
968
969 if (RT_LIKELY(RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core)))
970 {
971 LogFlow(("PGMHandlerPhysicalSplit: %RGp-%RGp and %RGp-%RGp\n",
972 pCur->Core.Key, pCur->Core.KeyLast, pNew->Core.Key, pNew->Core.KeyLast));
973 pgmUnlock(pVM);
974 return VINF_SUCCESS;
975 }
976 AssertMsgFailed(("whu?\n"));
977 rc = VERR_PGM_PHYS_HANDLER_IPE;
978 }
979 else
980 {
981 AssertMsgFailed(("outside range: %RGp-%RGp split %RGp\n", pCur->Core.Key, pCur->Core.KeyLast, GCPhysSplit));
982 rc = VERR_INVALID_PARAMETER;
983 }
984 }
985 else
986 {
987 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
988 rc = VERR_PGM_HANDLER_NOT_FOUND;
989 }
990 pgmUnlock(pVM);
991 MMHyperFree(pVM, pNew);
992 return rc;
993}
994
995
996/**
997 * Joins up two adjacent physical access handlers which has the same callbacks.
998 *
999 * @returns VBox status code.
1000 * @param pVM The cross context VM structure.
1001 * @param GCPhys1 Start physical address of the first handler.
1002 * @param GCPhys2 Start physical address of the second handler.
1003 */
1004VMMDECL(int) PGMHandlerPhysicalJoin(PVM pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2)
1005{
1006 /*
1007 * Get the handlers.
1008 */
1009 int rc;
1010 pgmLock(pVM);
1011 PPGMPHYSHANDLER pCur1 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys1);
1012 if (RT_LIKELY(pCur1))
1013 {
1014 PPGMPHYSHANDLER pCur2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
1015 if (RT_LIKELY(pCur2))
1016 {
1017 /*
1018 * Make sure that they are adjacent, and that they've got the same callbacks.
1019 */
1020 if (RT_LIKELY(pCur1->Core.KeyLast + 1 == pCur2->Core.Key))
1021 {
1022 if (RT_LIKELY(pCur1->hType == pCur2->hType))
1023 {
1024 PPGMPHYSHANDLER pCur3 = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
1025 if (RT_LIKELY(pCur3 == pCur2))
1026 {
1027 pCur1->Core.KeyLast = pCur2->Core.KeyLast;
1028 pCur1->cPages = (pCur1->Core.KeyLast - (pCur1->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
1029 LogFlow(("PGMHandlerPhysicalJoin: %RGp-%RGp %RGp-%RGp\n",
1030 pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
1031 pVM->pgm.s.pLastPhysHandlerR0 = 0;
1032 pVM->pgm.s.pLastPhysHandlerR3 = 0;
1033 pVM->pgm.s.pLastPhysHandlerRC = 0;
1034 PGMHandlerPhysicalTypeRelease(pVM, pCur2->hType);
1035 MMHyperFree(pVM, pCur2);
1036 pgmUnlock(pVM);
1037 return VINF_SUCCESS;
1038 }
1039
1040 Assert(pCur3 == pCur2);
1041 rc = VERR_PGM_PHYS_HANDLER_IPE;
1042 }
1043 else
1044 {
1045 AssertMsgFailed(("mismatching handlers\n"));
1046 rc = VERR_ACCESS_DENIED;
1047 }
1048 }
1049 else
1050 {
1051 AssertMsgFailed(("not adjacent: %RGp-%RGp %RGp-%RGp\n",
1052 pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
1053 rc = VERR_INVALID_PARAMETER;
1054 }
1055 }
1056 else
1057 {
1058 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys2));
1059 rc = VERR_PGM_HANDLER_NOT_FOUND;
1060 }
1061 }
1062 else
1063 {
1064 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys1));
1065 rc = VERR_PGM_HANDLER_NOT_FOUND;
1066 }
1067 pgmUnlock(pVM);
1068 return rc;
1069
1070}
1071
1072
1073/**
1074 * Resets any modifications to individual pages in a physical page access
1075 * handler region.
1076 *
1077 * This is used in pair with PGMHandlerPhysicalPageTempOff(),
1078 * PGMHandlerPhysicalPageAlias() or PGMHandlerPhysicalPageAliasHC().
1079 *
1080 * @returns VBox status code.
1081 * @param pVM The cross context VM structure.
1082 * @param GCPhys The start address of the handler regions, i.e. what you
1083 * passed to PGMR3HandlerPhysicalRegister(),
1084 * PGMHandlerPhysicalRegisterEx() or
1085 * PGMHandlerPhysicalModify().
1086 */
1087VMMDECL(int) PGMHandlerPhysicalReset(PVM pVM, RTGCPHYS GCPhys)
1088{
1089 LogFlow(("PGMHandlerPhysicalReset GCPhys=%RGp\n", GCPhys));
1090 pgmLock(pVM);
1091
1092 /*
1093 * Find the handler.
1094 */
1095 int rc;
1096 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1097 if (RT_LIKELY(pCur))
1098 {
1099 /*
1100 * Validate kind.
1101 */
1102 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1103 switch (pCurType->enmKind)
1104 {
1105 case PGMPHYSHANDLERKIND_WRITE:
1106 case PGMPHYSHANDLERKIND_ALL:
1107 case PGMPHYSHANDLERKIND_MMIO: /* NOTE: Only use when clearing MMIO ranges with aliased MMIO2 pages! */
1108 {
1109 STAM_COUNTER_INC(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,PhysHandlerReset)); /** @todo move out of switch */
1110 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
1111 Assert(pRam);
1112 Assert(pRam->GCPhys <= pCur->Core.Key);
1113 Assert(pRam->GCPhysLast >= pCur->Core.KeyLast);
1114
1115 if (pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO)
1116 {
1117 /*
1118 * Reset all the PGMPAGETYPE_MMIO2_ALIAS_MMIO pages first and that's it.
1119 * This could probably be optimized a bit wrt to flushing, but I'm too lazy
1120 * to do that now...
1121 */
1122 if (pCur->cAliasedPages)
1123 {
1124 PPGMPAGE pPage = &pRam->aPages[(pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT];
1125 uint32_t cLeft = pCur->cPages;
1126 while (cLeft-- > 0)
1127 {
1128 if ( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
1129 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO)
1130 {
1131 Assert(pCur->cAliasedPages > 0);
1132 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, pRam->GCPhys + ((RTGCPHYS)cLeft << PAGE_SHIFT),
1133 false /*fDoAccounting*/);
1134 --pCur->cAliasedPages;
1135#ifndef VBOX_STRICT
1136 if (pCur->cAliasedPages == 0)
1137 break;
1138#endif
1139 }
1140 Assert(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO);
1141 pPage++;
1142 }
1143 Assert(pCur->cAliasedPages == 0);
1144 }
1145 }
1146 else if (pCur->cTmpOffPages > 0)
1147 {
1148 /*
1149 * Set the flags and flush shadow PT entries.
1150 */
1151 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
1152 }
1153
1154 pCur->cAliasedPages = 0;
1155 pCur->cTmpOffPages = 0;
1156
1157 rc = VINF_SUCCESS;
1158 break;
1159 }
1160
1161 /*
1162 * Invalid.
1163 */
1164 default:
1165 AssertMsgFailed(("Invalid type %d! Corruption!\n", pCurType->enmKind));
1166 rc = VERR_PGM_PHYS_HANDLER_IPE;
1167 break;
1168 }
1169 }
1170 else
1171 {
1172 AssertMsgFailed(("Didn't find MMIO Range starting at %#x\n", GCPhys));
1173 rc = VERR_PGM_HANDLER_NOT_FOUND;
1174 }
1175
1176 pgmUnlock(pVM);
1177 return rc;
1178}
1179
1180
1181/**
1182 * Temporarily turns off the access monitoring of a page within a monitored
1183 * physical write/all page access handler region.
1184 *
1185 * Use this when no further \#PFs are required for that page. Be aware that
1186 * a page directory sync might reset the flags, and turn on access monitoring
1187 * for the page.
1188 *
1189 * The caller must do required page table modifications.
1190 *
1191 * @returns VBox status code.
1192 * @param pVM The cross context VM structure.
1193 * @param GCPhys The start address of the access handler. This
1194 * must be a fully page aligned range or we risk
1195 * messing up other handlers installed for the
1196 * start and end pages.
1197 * @param GCPhysPage The physical address of the page to turn off
1198 * access monitoring for.
1199 */
1200VMMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage)
1201{
1202 LogFlow(("PGMHandlerPhysicalPageTempOff GCPhysPage=%RGp\n", GCPhysPage));
1203
1204 pgmLock(pVM);
1205 /*
1206 * Validate the range.
1207 */
1208 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1209 if (RT_LIKELY(pCur))
1210 {
1211 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1212 && GCPhysPage <= pCur->Core.KeyLast))
1213 {
1214 Assert(!(pCur->Core.Key & PAGE_OFFSET_MASK));
1215 Assert((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
1216
1217 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1218 AssertReturnStmt( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE
1219 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL,
1220 pgmUnlock(pVM), VERR_ACCESS_DENIED);
1221
1222 /*
1223 * Change the page status.
1224 */
1225 PPGMPAGE pPage;
1226 int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
1227 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1228 if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
1229 {
1230 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1231 pCur->cTmpOffPages++;
1232 }
1233 pgmUnlock(pVM);
1234 return VINF_SUCCESS;
1235 }
1236 pgmUnlock(pVM);
1237 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1238 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1239 return VERR_INVALID_PARAMETER;
1240 }
1241 pgmUnlock(pVM);
1242 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1243 return VERR_PGM_HANDLER_NOT_FOUND;
1244}
1245
1246#ifndef IEM_VERIFICATION_MODE_FULL
1247
1248/**
1249 * Replaces an MMIO page with an MMIO2 page.
1250 *
1251 * This is a worker for IOMMMIOMapMMIO2Page that works in a similar way to
1252 * PGMHandlerPhysicalPageTempOff but for an MMIO page. Since an MMIO page has no
1253 * backing, the caller must provide a replacement page. For various reasons the
1254 * replacement page must be an MMIO2 page.
1255 *
1256 * The caller must do required page table modifications. You can get away
1257 * without making any modifications since it's an MMIO page, the cost is an extra
1258 * \#PF which will the resync the page.
1259 *
1260 * Call PGMHandlerPhysicalReset() to restore the MMIO page.
1261 *
1262 * The caller may still get handler callback even after this call and must be
1263 * able to deal correctly with such calls. The reason for these callbacks are
1264 * either that we're executing in the recompiler (which doesn't know about this
1265 * arrangement) or that we've been restored from saved state (where we won't
1266 * save the change).
1267 *
1268 * @returns VBox status code.
1269 * @param pVM The cross context VM structure.
1270 * @param GCPhys The start address of the access handler. This
1271 * must be a fully page aligned range or we risk
1272 * messing up other handlers installed for the
1273 * start and end pages.
1274 * @param GCPhysPage The physical address of the page to turn off
1275 * access monitoring for.
1276 * @param GCPhysPageRemap The physical address of the MMIO2 page that
1277 * serves as backing memory.
1278 *
1279 * @remark May cause a page pool flush if used on a page that is already
1280 * aliased.
1281 *
1282 * @note This trick does only work reliably if the two pages are never ever
1283 * mapped in the same page table. If they are the page pool code will
1284 * be confused should either of them be flushed. See the special case
1285 * of zero page aliasing mentioned in #3170.
1286 *
1287 */
1288VMMDECL(int) PGMHandlerPhysicalPageAlias(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTGCPHYS GCPhysPageRemap)
1289{
1290/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
1291 pgmLock(pVM);
1292
1293 /*
1294 * Lookup and validate the range.
1295 */
1296 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1297 if (RT_LIKELY(pCur))
1298 {
1299 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1300 && GCPhysPage <= pCur->Core.KeyLast))
1301 {
1302 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1303 AssertReturnStmt(pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);
1304 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1305 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1306
1307 /*
1308 * Get and validate the two pages.
1309 */
1310 PPGMPAGE pPageRemap;
1311 int rc = pgmPhysGetPageEx(pVM, GCPhysPageRemap, &pPageRemap);
1312 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1313 AssertMsgReturnStmt(PGM_PAGE_GET_TYPE(pPageRemap) == PGMPAGETYPE_MMIO2,
1314 ("GCPhysPageRemap=%RGp %R[pgmpage]\n", GCPhysPageRemap, pPageRemap),
1315 pgmUnlock(pVM), VERR_PGM_PHYS_NOT_MMIO2);
1316
1317 PPGMPAGE pPage;
1318 rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
1319 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1320 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1321 {
1322 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO,
1323 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1324 VERR_PGM_PHYS_NOT_MMIO2);
1325 if (PGM_PAGE_GET_HCPHYS(pPage) == PGM_PAGE_GET_HCPHYS(pPageRemap))
1326 {
1327 pgmUnlock(pVM);
1328 return VINF_PGM_HANDLER_ALREADY_ALIASED;
1329 }
1330
1331 /*
1332 * The page is already mapped as some other page, reset it
1333 * to an MMIO/ZERO page before doing the new mapping.
1334 */
1335 Log(("PGMHandlerPhysicalPageAlias: GCPhysPage=%RGp (%R[pgmpage]; %RHp -> %RHp\n",
1336 GCPhysPage, pPage, PGM_PAGE_GET_HCPHYS(pPage), PGM_PAGE_GET_HCPHYS(pPageRemap)));
1337 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhysPage, false /*fDoAccounting*/);
1338 pCur->cAliasedPages--;
1339 }
1340 Assert(PGM_PAGE_IS_ZERO(pPage));
1341
1342 /*
1343 * Do the actual remapping here.
1344 * This page now serves as an alias for the backing memory specified.
1345 */
1346 LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RGp (%R[pgmpage])\n",
1347 GCPhysPage, pPage, GCPhysPageRemap, pPageRemap ));
1348 PGM_PAGE_SET_HCPHYS(pVM, pPage, PGM_PAGE_GET_HCPHYS(pPageRemap));
1349 PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
1350 PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
1351 PGM_PAGE_SET_PAGEID(pVM, pPage, PGM_PAGE_GET_PAGEID(pPageRemap));
1352 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1353 pCur->cAliasedPages++;
1354 Assert(pCur->cAliasedPages <= pCur->cPages);
1355
1356 /* Flush its TLB entry. */
1357 pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1358
1359 LogFlow(("PGMHandlerPhysicalPageAlias: => %R[pgmpage]\n", pPage));
1360 pgmUnlock(pVM);
1361 return VINF_SUCCESS;
1362 }
1363
1364 pgmUnlock(pVM);
1365 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1366 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1367 return VERR_INVALID_PARAMETER;
1368 }
1369
1370 pgmUnlock(pVM);
1371 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1372 return VERR_PGM_HANDLER_NOT_FOUND;
1373}
1374
1375
1376/**
1377 * Replaces an MMIO page with an arbitrary HC page in the shadow page tables.
1378 *
1379 * This differs from PGMHandlerPhysicalPageAlias in that the page doesn't need
1380 * to be a known MMIO2 page and that only shadow paging may access the page.
1381 * The latter distinction is important because the only use for this feature is
1382 * for mapping the special APIC access page that VT-x uses to detect APIC MMIO
1383 * operations, the page is shared between all guest CPUs and actually not
1384 * written to. At least at the moment.
1385 *
1386 * The caller must do required page table modifications. You can get away
1387 * without making any modifications since it's an MMIO page, the cost is an extra
1388 * \#PF which will the resync the page.
1389 *
1390 * Call PGMHandlerPhysicalReset() to restore the MMIO page.
1391 *
1392 *
1393 * @returns VBox status code.
1394 * @param pVM The cross context VM structure.
1395 * @param GCPhys The start address of the access handler. This
1396 * must be a fully page aligned range or we risk
1397 * messing up other handlers installed for the
1398 * start and end pages.
1399 * @param GCPhysPage The physical address of the page to turn off
1400 * access monitoring for.
1401 * @param HCPhysPageRemap The physical address of the HC page that
1402 * serves as backing memory.
1403 *
1404 * @remark May cause a page pool flush if used on a page that is already
1405 * aliased.
1406 */
1407VMMDECL(int) PGMHandlerPhysicalPageAliasHC(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTHCPHYS HCPhysPageRemap)
1408{
1409/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
1410 pgmLock(pVM);
1411
1412 /*
1413 * Lookup and validate the range.
1414 */
1415 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1416 if (RT_LIKELY(pCur))
1417 {
1418 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1419 && GCPhysPage <= pCur->Core.KeyLast))
1420 {
1421 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1422 AssertReturnStmt(pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);
1423 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1424 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1425
1426 /*
1427 * Get and validate the pages.
1428 */
1429 PPGMPAGE pPage;
1430 int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
1431 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1432 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1433 {
1434 pgmUnlock(pVM);
1435 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO,
1436 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1437 VERR_PGM_PHYS_NOT_MMIO2);
1438 return VINF_PGM_HANDLER_ALREADY_ALIASED;
1439 }
1440 Assert(PGM_PAGE_IS_ZERO(pPage));
1441
1442 /*
1443 * Do the actual remapping here.
1444 * This page now serves as an alias for the backing memory
1445 * specified as far as shadow paging is concerned.
1446 */
1447 LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RHp\n",
1448 GCPhysPage, pPage, HCPhysPageRemap));
1449 PGM_PAGE_SET_HCPHYS(pVM, pPage, HCPhysPageRemap);
1450 PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_SPECIAL_ALIAS_MMIO);
1451 PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
1452 PGM_PAGE_SET_PAGEID(pVM, pPage, NIL_GMM_PAGEID);
1453 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1454 pCur->cAliasedPages++;
1455 Assert(pCur->cAliasedPages <= pCur->cPages);
1456
1457 /* Flush its TLB entry. */
1458 pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1459
1460 LogFlow(("PGMHandlerPhysicalPageAliasHC: => %R[pgmpage]\n", pPage));
1461 pgmUnlock(pVM);
1462 return VINF_SUCCESS;
1463 }
1464 pgmUnlock(pVM);
1465 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1466 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1467 return VERR_INVALID_PARAMETER;
1468 }
1469 pgmUnlock(pVM);
1470
1471 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1472 return VERR_PGM_HANDLER_NOT_FOUND;
1473}
1474
1475#endif /* !IEM_VERIFICATION_MODE_FULL */
1476
1477/**
1478 * Checks if a physical range is handled
1479 *
1480 * @returns boolean
1481 * @param pVM The cross context VM structure.
1482 * @param GCPhys Start physical address earlier passed to PGMR3HandlerPhysicalRegister().
1483 * @remarks Caller must take the PGM lock...
1484 * @thread EMT.
1485 */
1486VMMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys)
1487{
1488 /*
1489 * Find the handler.
1490 */
1491 pgmLock(pVM);
1492 PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys);
1493 if (pCur)
1494 {
1495#ifdef VBOX_STRICT
1496 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast);
1497 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1498 Assert( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE
1499 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL
1500 || pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO);
1501#endif
1502 pgmUnlock(pVM);
1503 return true;
1504 }
1505 pgmUnlock(pVM);
1506 return false;
1507}
1508
1509
1510/**
1511 * Checks if it's an disabled all access handler or write access handler at the
1512 * given address.
1513 *
1514 * @returns true if it's an all access handler, false if it's a write access
1515 * handler.
1516 * @param pVM The cross context VM structure.
1517 * @param GCPhys The address of the page with a disabled handler.
1518 *
1519 * @remarks The caller, PGMR3PhysTlbGCPhys2Ptr, must hold the PGM lock.
1520 */
1521bool pgmHandlerPhysicalIsAll(PVM pVM, RTGCPHYS GCPhys)
1522{
1523 pgmLock(pVM);
1524 PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys);
1525 if (!pCur)
1526 {
1527 pgmUnlock(pVM);
1528 AssertFailed();
1529 return true;
1530 }
1531 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1532 Assert( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE
1533 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL
1534 || pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO); /* sanity */
1535 /* Only whole pages can be disabled. */
1536 Assert( pCur->Core.Key <= (GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK)
1537 && pCur->Core.KeyLast >= (GCPhys | PAGE_OFFSET_MASK));
1538
1539 bool bRet = pCurType->enmKind != PGMPHYSHANDLERKIND_WRITE;
1540 pgmUnlock(pVM);
1541 return bRet;
1542}
1543
1544
1545#ifdef VBOX_WITH_RAW_MODE
1546
1547/**
1548 * Internal worker for releasing a virtual handler type registration reference.
1549 *
1550 * @returns New reference count. UINT32_MAX if invalid input (asserted).
1551 * @param pVM The cross context VM structure.
1552 * @param pType Pointer to the type registration.
1553 */
1554DECLINLINE(uint32_t) pgmHandlerVirtualTypeRelease(PVM pVM, PPGMVIRTHANDLERTYPEINT pType)
1555{
1556 AssertMsgReturn(pType->u32Magic == PGMVIRTHANDLERTYPEINT_MAGIC, ("%#x\n", pType->u32Magic), UINT32_MAX);
1557 uint32_t cRefs = ASMAtomicDecU32(&pType->cRefs);
1558 if (cRefs == 0)
1559 {
1560 pgmLock(pVM);
1561 pType->u32Magic = PGMVIRTHANDLERTYPEINT_MAGIC_DEAD;
1562 RTListOff32NodeRemove(&pType->ListNode);
1563 pgmUnlock(pVM);
1564 MMHyperFree(pVM, pType);
1565 }
1566 return cRefs;
1567}
1568
1569
1570/**
1571 * Internal worker for retaining a virtual handler type registration reference.
1572 *
1573 * @returns New reference count. UINT32_MAX if invalid input (asserted).
1574 * @param pVM The cross context VM structure.
1575 * @param pType Pointer to the type registration.
1576 */
1577DECLINLINE(uint32_t) pgmHandlerVirtualTypeRetain(PVM pVM, PPGMVIRTHANDLERTYPEINT pType)
1578{
1579 NOREF(pVM);
1580 AssertMsgReturn(pType->u32Magic == PGMVIRTHANDLERTYPEINT_MAGIC, ("%#x\n", pType->u32Magic), UINT32_MAX);
1581 uint32_t cRefs = ASMAtomicIncU32(&pType->cRefs);
1582 Assert(cRefs < _1M && cRefs > 0);
1583 return cRefs;
1584}
1585
1586
1587/**
1588 * Releases a reference to a virtual handler type registration.
1589 *
1590 * @returns New reference count. UINT32_MAX if invalid input (asserted).
1591 * @param pVM The cross context VM structure.
1592 * @param hType The type regiration handle.
1593 */
1594VMM_INT_DECL(uint32_t) PGMHandlerVirtualTypeRelease(PVM pVM, PGMVIRTHANDLERTYPE hType)
1595{
1596 if (hType != NIL_PGMVIRTHANDLERTYPE)
1597 return pgmHandlerVirtualTypeRelease(pVM, PGMVIRTHANDLERTYPEINT_FROM_HANDLE(pVM, hType));
1598 return 0;
1599}
1600
1601
1602/**
1603 * Retains a reference to a virtual handler type registration.
1604 *
1605 * @returns New reference count. UINT32_MAX if invalid input (asserted).
1606 * @param pVM The cross context VM structure.
1607 * @param hType The type regiration handle.
1608 */
1609VMM_INT_DECL(uint32_t) PGMHandlerVirtualTypeRetain(PVM pVM, PGMVIRTHANDLERTYPE hType)
1610{
1611 return pgmHandlerVirtualTypeRetain(pVM, PGMVIRTHANDLERTYPEINT_FROM_HANDLE(pVM, hType));
1612}
1613
1614
1615/**
1616 * Check if particular guest's VA is being monitored.
1617 *
1618 * @returns true or false
1619 * @param pVM The cross context VM structure.
1620 * @param GCPtr Virtual address.
1621 * @remarks Will acquire the PGM lock.
1622 * @thread Any.
1623 */
1624VMM_INT_DECL(bool) PGMHandlerVirtualIsRegistered(PVM pVM, RTGCPTR GCPtr)
1625{
1626 pgmLock(pVM);
1627 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)RTAvlroGCPtrGet(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, GCPtr);
1628 pgmUnlock(pVM);
1629
1630 return pCur != NULL;
1631}
1632
1633
1634/**
1635 * Search for virtual handler with matching physical address
1636 *
1637 * @returns Pointer to the virtual handler structure if found, otherwise NULL.
1638 * @param pVM The cross context VM structure.
1639 * @param GCPhys GC physical address to search for.
1640 * @param piPage Where to store the pointer to the index of the cached physical page.
1641 */
1642PPGMVIRTHANDLER pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, unsigned *piPage)
1643{
1644 STAM_PROFILE_START(&pVM->pgm.s.CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1645
1646 pgmLock(pVM);
1647 PPGMPHYS2VIRTHANDLER pCur;
1648 pCur = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, GCPhys);
1649 if (pCur)
1650 {
1651 /* found a match! */
1652 PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
1653 *piPage = pCur - &pVirt->aPhysToVirt[0];
1654 pgmUnlock(pVM);
1655
1656#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1657 AssertRelease(pCur->offNextAlias & PGMPHYS2VIRTHANDLER_IS_HEAD);
1658#endif
1659 LogFlow(("PHYS2VIRT: found match for %RGp -> %RGv *piPage=%#x\n", GCPhys, pVirt->Core.Key, *piPage));
1660 STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1661 return pVirt;
1662 }
1663
1664 pgmUnlock(pVM);
1665 STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1666 return NULL;
1667}
1668
1669
1670/**
1671 * Deal with aliases in phys2virt.
1672 *
1673 * As pointed out by the various todos, this currently only deals with
1674 * aliases where the two ranges match 100%.
1675 *
1676 * @param pVM The cross context VM structure.
1677 * @param pPhys2Virt The node we failed insert.
1678 */
1679static void pgmHandlerVirtualInsertAliased(PVM pVM, PPGMPHYS2VIRTHANDLER pPhys2Virt)
1680{
1681 /*
1682 * First find the node which is conflicting with us.
1683 */
1684 /** @todo Deal with partial overlapping. (Unlikely situation, so I'm too lazy to do anything about it now.) */
1685 /** @todo check if the current head node covers the ground we do. This is highly unlikely
1686 * and I'm too lazy to implement this now as it will require sorting the list and stuff like that. */
1687 PPGMPHYS2VIRTHANDLER pHead = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key);
1688#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1689 AssertReleaseMsg(pHead != pPhys2Virt, ("%RGp-%RGp offVirtHandler=%#RX32\n",
1690 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler));
1691#endif
1692 if (RT_UNLIKELY(!pHead || pHead->Core.KeyLast != pPhys2Virt->Core.KeyLast))
1693 {
1694 /** @todo do something clever here... */
1695 LogRel(("pgmHandlerVirtualInsertAliased: %RGp-%RGp\n", pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast));
1696 pPhys2Virt->offNextAlias = 0;
1697 return;
1698 }
1699
1700 /*
1701 * Insert ourselves as the next node.
1702 */
1703 if (!(pHead->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK))
1704 pPhys2Virt->offNextAlias = PGMPHYS2VIRTHANDLER_IN_TREE;
1705 else
1706 {
1707 PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pHead + (pHead->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
1708 pPhys2Virt->offNextAlias = ((intptr_t)pNext - (intptr_t)pPhys2Virt)
1709 | PGMPHYS2VIRTHANDLER_IN_TREE;
1710 }
1711 pHead->offNextAlias = ((intptr_t)pPhys2Virt - (intptr_t)pHead)
1712 | (pHead->offNextAlias & ~PGMPHYS2VIRTHANDLER_OFF_MASK);
1713 Log(("pgmHandlerVirtualInsertAliased: %RGp-%RGp offNextAlias=%#RX32\n", pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias));
1714}
1715
1716
1717/**
1718 * Resets one virtual handler range.
1719 *
1720 * This is called by HandlerVirtualUpdate when it has detected some kind of
1721 * problem and have started clearing the virtual handler page states (or
1722 * when there have been registration/deregistrations). For this reason this
1723 * function will only update the page status if it's lower than desired.
1724 *
1725 * @returns 0
1726 * @param pNode Pointer to a PGMVIRTHANDLER.
1727 * @param pvUser Pointer to the VM.
1728 */
1729DECLCALLBACK(int) pgmHandlerVirtualResetOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
1730{
1731 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
1732 PVM pVM = (PVM)pvUser;
1733
1734 PGM_LOCK_ASSERT_OWNER(pVM);
1735
1736 /*
1737 * Iterate the pages and apply the new state.
1738 */
1739 uint32_t uState = PGMVIRTANDLER_GET_TYPE(pVM, pCur)->uState;
1740 PPGMRAMRANGE pRamHint = NULL;
1741 RTGCUINTPTR offPage = ((RTGCUINTPTR)pCur->Core.Key & PAGE_OFFSET_MASK);
1742 RTGCUINTPTR cbLeft = pCur->cb;
1743 for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
1744 {
1745 PPGMPHYS2VIRTHANDLER pPhys2Virt = &pCur->aPhysToVirt[iPage];
1746 if (pPhys2Virt->Core.Key != NIL_RTGCPHYS)
1747 {
1748 /*
1749 * Update the page state wrt virtual handlers.
1750 */
1751 PPGMPAGE pPage;
1752 int rc = pgmPhysGetPageWithHintEx(pVM, pPhys2Virt->Core.Key, &pPage, &pRamHint);
1753 if ( RT_SUCCESS(rc)
1754 && PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
1755 PGM_PAGE_SET_HNDL_VIRT_STATE(pPage, uState);
1756 else
1757 AssertRC(rc);
1758
1759 /*
1760 * Need to insert the page in the Phys2Virt lookup tree?
1761 */
1762 if (pPhys2Virt->Core.KeyLast == NIL_RTGCPHYS)
1763 {
1764#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1765 AssertRelease(!pPhys2Virt->offNextAlias);
1766#endif
1767 unsigned cbPhys = cbLeft;
1768 if (cbPhys > PAGE_SIZE - offPage)
1769 cbPhys = PAGE_SIZE - offPage;
1770 else
1771 Assert(iPage == pCur->cPages - 1);
1772 pPhys2Virt->Core.KeyLast = pPhys2Virt->Core.Key + cbPhys - 1; /* inclusive */
1773 pPhys2Virt->offNextAlias = PGMPHYS2VIRTHANDLER_IS_HEAD | PGMPHYS2VIRTHANDLER_IN_TREE;
1774 if (!RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, &pPhys2Virt->Core))
1775 pgmHandlerVirtualInsertAliased(pVM, pPhys2Virt);
1776#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1777 else
1778 AssertReleaseMsg(RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key) == &pPhys2Virt->Core,
1779 ("%RGp-%RGp offNextAlias=%#RX32\n",
1780 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias));
1781#endif
1782 Log2(("PHYS2VIRT: Insert physical range %RGp-%RGp offNextAlias=%#RX32 %s\n",
1783 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias, R3STRING(pCur->pszDesc)));
1784 }
1785 }
1786 cbLeft -= PAGE_SIZE - offPage;
1787 offPage = 0;
1788 }
1789
1790 return 0;
1791}
1792
1793# if defined(VBOX_STRICT) || defined(LOG_ENABLED)
1794
1795/**
1796 * Worker for pgmHandlerVirtualDumpPhysPages.
1797 *
1798 * @returns 0 (continue enumeration).
1799 * @param pNode The virtual handler node.
1800 * @param pvUser User argument, unused.
1801 */
1802static DECLCALLBACK(int) pgmHandlerVirtualDumpPhysPagesCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1803{
1804 PPGMPHYS2VIRTHANDLER pCur = (PPGMPHYS2VIRTHANDLER)pNode;
1805 PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
1806 NOREF(pvUser); NOREF(pVirt);
1807
1808 Log(("PHYS2VIRT: Range %RGp-%RGp for virtual handler: %s\n", pCur->Core.Key, pCur->Core.KeyLast, pVirt->pszDesc));
1809 return 0;
1810}
1811
1812
1813/**
1814 * Assertion / logging helper for dumping all the
1815 * virtual handlers to the log.
1816 *
1817 * @param pVM The cross context VM structure.
1818 */
1819void pgmHandlerVirtualDumpPhysPages(PVM pVM)
1820{
1821 RTAvlroGCPhysDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, true /* from left */,
1822 pgmHandlerVirtualDumpPhysPagesCallback, 0);
1823}
1824
1825# endif /* VBOX_STRICT || LOG_ENABLED */
1826#endif /* VBOX_WITH_RAW_MODE */
1827#ifdef VBOX_STRICT
1828
1829/**
1830 * State structure used by the PGMAssertHandlerAndFlagsInSync() function
1831 * and its AVL enumerators.
1832 */
1833typedef struct PGMAHAFIS
1834{
1835 /** The current physical address. */
1836 RTGCPHYS GCPhys;
1837 /** The state we've calculated. */
1838 unsigned uVirtStateFound;
1839 /** The state we're matching up to. */
1840 unsigned uVirtState;
1841 /** Number of errors. */
1842 unsigned cErrors;
1843 /** Pointer to the VM. */
1844 PVM pVM;
1845} PGMAHAFIS, *PPGMAHAFIS;
1846
1847# ifdef VBOX_WITH_RAW_MODE
1848
1849# if 0 /* unused */
1850/**
1851 * Verify virtual handler by matching physical address.
1852 *
1853 * @returns 0
1854 * @param pNode Pointer to a PGMVIRTHANDLER.
1855 * @param pvUser Pointer to user parameter.
1856 */
1857static DECLCALLBACK(int) pgmHandlerVirtualVerifyOneByPhysAddr(PAVLROGCPTRNODECORE pNode, void *pvUser)
1858{
1859 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
1860 PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
1861
1862 for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
1863 {
1864 if ((pCur->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) == pState->GCPhys)
1865 {
1866 unsigned uState = pgmHandlerVirtualCalcState(pCur);
1867 if (pState->uVirtState < uState)
1868 {
1869 error
1870 }
1871
1872 if (pState->uVirtState == uState)
1873 break; //??
1874 }
1875 }
1876 return 0;
1877}
1878# endif /* unused */
1879
1880
1881/**
1882 * Verify a virtual handler (enumeration callback).
1883 *
1884 * Called by PGMAssertHandlerAndFlagsInSync to check the sanity of all
1885 * the virtual handlers, esp. that the physical addresses matches up.
1886 *
1887 * @returns 0
1888 * @param pNode Pointer to a PGMVIRTHANDLER.
1889 * @param pvUser Pointer to a PPGMAHAFIS structure.
1890 */
1891static DECLCALLBACK(int) pgmHandlerVirtualVerifyOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
1892{
1893 PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
1894 PVM pVM = pState->pVM;
1895 PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)pNode;
1896 PPGMVIRTHANDLERTYPEINT pType = PGMVIRTANDLER_GET_TYPE(pVM, pVirt);
1897
1898 /*
1899 * Validate the type and calc state.
1900 */
1901 switch (pType->enmKind)
1902 {
1903 case PGMVIRTHANDLERKIND_WRITE:
1904 case PGMVIRTHANDLERKIND_ALL:
1905 break;
1906 default:
1907 AssertMsgFailed(("unknown/wrong enmKind=%d\n", pType->enmKind));
1908 pState->cErrors++;
1909 return 0;
1910 }
1911 const uint32_t uState = pType->uState;
1912
1913 /*
1914 * Check key alignment.
1915 */
1916 if ( (pVirt->aPhysToVirt[0].Core.Key & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->Core.Key & PAGE_OFFSET_MASK)
1917 && pVirt->aPhysToVirt[0].Core.Key != NIL_RTGCPHYS)
1918 {
1919 AssertMsgFailed(("virt handler phys has incorrect key! %RGp %RGv %s\n",
1920 pVirt->aPhysToVirt[0].Core.Key, pVirt->Core.Key, R3STRING(pVirt->pszDesc)));
1921 pState->cErrors++;
1922 }
1923
1924 if ( (pVirt->aPhysToVirt[pVirt->cPages - 1].Core.KeyLast & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->Core.KeyLast & PAGE_OFFSET_MASK)
1925 && pVirt->aPhysToVirt[pVirt->cPages - 1].Core.Key != NIL_RTGCPHYS)
1926 {
1927 AssertMsgFailed(("virt handler phys has incorrect key! %RGp %RGv %s\n",
1928 pVirt->aPhysToVirt[pVirt->cPages - 1].Core.KeyLast, pVirt->Core.KeyLast, R3STRING(pVirt->pszDesc)));
1929 pState->cErrors++;
1930 }
1931
1932 /*
1933 * Check pages for sanity and state.
1934 */
1935 RTGCUINTPTR GCPtr = (RTGCUINTPTR)pVirt->Core.Key;
1936 for (unsigned iPage = 0; iPage < pVirt->cPages; iPage++, GCPtr += PAGE_SIZE)
1937 {
1938 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1939 {
1940 PVMCPU pVCpu = &pVM->aCpus[i];
1941
1942 RTGCPHYS GCPhysGst;
1943 uint64_t fGst;
1944 int rc = PGMGstGetPage(pVCpu, (RTGCPTR)GCPtr, &fGst, &GCPhysGst);
1945 if ( rc == VERR_PAGE_NOT_PRESENT
1946 || rc == VERR_PAGE_TABLE_NOT_PRESENT)
1947 {
1948 if (pVirt->aPhysToVirt[iPage].Core.Key != NIL_RTGCPHYS)
1949 {
1950 AssertMsgFailed(("virt handler phys out of sync. %RGp GCPhysNew=~0 iPage=%#x %RGv %s\n",
1951 pVirt->aPhysToVirt[iPage].Core.Key, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1952 pState->cErrors++;
1953 }
1954 continue;
1955 }
1956
1957 AssertRCReturn(rc, 0);
1958 if ((pVirt->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) != GCPhysGst)
1959 {
1960 AssertMsgFailed(("virt handler phys out of sync. %RGp GCPhysGst=%RGp iPage=%#x %RGv %s\n",
1961 pVirt->aPhysToVirt[iPage].Core.Key, GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1962 pState->cErrors++;
1963 continue;
1964 }
1965
1966 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhysGst);
1967 if (!pPage)
1968 {
1969 AssertMsgFailed(("virt handler getting ram flags. GCPhysGst=%RGp iPage=%#x %RGv %s\n",
1970 GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1971 pState->cErrors++;
1972 continue;
1973 }
1974
1975 if (PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
1976 {
1977 AssertMsgFailed(("virt handler state mismatch. pPage=%R[pgmpage] GCPhysGst=%RGp iPage=%#x %RGv state=%d expected>=%d %s\n",
1978 pPage, GCPhysGst, iPage, GCPtr, PGM_PAGE_GET_HNDL_VIRT_STATE(pPage), uState, R3STRING(pVirt->pszDesc)));
1979 pState->cErrors++;
1980 continue;
1981 }
1982 } /* for each VCPU */
1983 } /* for pages in virtual mapping. */
1984
1985 return 0;
1986}
1987
1988# endif /* VBOX_WITH_RAW_MODE */
1989
1990/**
1991 * Asserts that the handlers+guest-page-tables == ramrange-flags and
1992 * that the physical addresses associated with virtual handlers are correct.
1993 *
1994 * @returns Number of mismatches.
1995 * @param pVM The cross context VM structure.
1996 */
1997VMMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM)
1998{
1999 PPGM pPGM = &pVM->pgm.s;
2000 PGMAHAFIS State;
2001 State.GCPhys = 0;
2002 State.uVirtState = 0;
2003 State.uVirtStateFound = 0;
2004 State.cErrors = 0;
2005 State.pVM = pVM;
2006
2007 PGM_LOCK_ASSERT_OWNER(pVM);
2008
2009 /*
2010 * Check the RAM flags against the handlers.
2011 */
2012 for (PPGMRAMRANGE pRam = pPGM->CTX_SUFF(pRamRangesX); pRam; pRam = pRam->CTX_SUFF(pNext))
2013 {
2014 const uint32_t cPages = pRam->cb >> PAGE_SHIFT;
2015 for (uint32_t iPage = 0; iPage < cPages; iPage++)
2016 {
2017 PGMPAGE const *pPage = &pRam->aPages[iPage];
2018 if (PGM_PAGE_HAS_ANY_HANDLERS(pPage))
2019 {
2020 State.GCPhys = pRam->GCPhys + (iPage << PAGE_SHIFT);
2021
2022 /*
2023 * Physical first - calculate the state based on the handlers
2024 * active on the page, then compare.
2025 */
2026 if (PGM_PAGE_HAS_ANY_PHYSICAL_HANDLERS(pPage))
2027 {
2028 /* the first */
2029 PPGMPHYSHANDLER pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys);
2030 if (!pPhys)
2031 {
2032 pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys, true);
2033 if ( pPhys
2034 && pPhys->Core.Key > (State.GCPhys + PAGE_SIZE - 1))
2035 pPhys = NULL;
2036 Assert(!pPhys || pPhys->Core.Key >= State.GCPhys);
2037 }
2038 if (pPhys)
2039 {
2040 PPGMPHYSHANDLERTYPEINT pPhysType = (PPGMPHYSHANDLERTYPEINT)MMHyperHeapOffsetToPtr(pVM, pPhys->hType);
2041 unsigned uState = pPhysType->uState;
2042
2043 /* more? */
2044 while (pPhys->Core.KeyLast < (State.GCPhys | PAGE_OFFSET_MASK))
2045 {
2046 PPGMPHYSHANDLER pPhys2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers,
2047 pPhys->Core.KeyLast + 1, true);
2048 if ( !pPhys2
2049 || pPhys2->Core.Key > (State.GCPhys | PAGE_OFFSET_MASK))
2050 break;
2051 PPGMPHYSHANDLERTYPEINT pPhysType2 = (PPGMPHYSHANDLERTYPEINT)MMHyperHeapOffsetToPtr(pVM, pPhys2->hType);
2052 uState = RT_MAX(uState, pPhysType2->uState);
2053 pPhys = pPhys2;
2054 }
2055
2056 /* compare.*/
2057 if ( PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != uState
2058 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
2059 {
2060 AssertMsgFailed(("ram range vs phys handler flags mismatch. GCPhys=%RGp state=%d expected=%d %s\n",
2061 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), uState, pPhysType->pszDesc));
2062 State.cErrors++;
2063 }
2064
2065# ifdef VBOX_WITH_REM
2066# ifdef IN_RING3
2067 /* validate that REM is handling it. */
2068 if ( !REMR3IsPageAccessHandled(pVM, State.GCPhys)
2069 /* ignore shadowed ROM for the time being. */
2070 && PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_ROM_SHADOW)
2071 {
2072 AssertMsgFailed(("ram range vs phys handler REM mismatch. GCPhys=%RGp state=%d %s\n",
2073 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), pPhysType->pszDesc));
2074 State.cErrors++;
2075 }
2076# endif
2077# endif
2078 }
2079 else
2080 {
2081 AssertMsgFailed(("ram range vs phys handler mismatch. no handler for GCPhys=%RGp\n", State.GCPhys));
2082 State.cErrors++;
2083 }
2084 }
2085
2086 /*
2087 * Virtual handlers.
2088 */
2089 if (PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage))
2090 {
2091 State.uVirtState = PGM_PAGE_GET_HNDL_VIRT_STATE(pPage);
2092
2093 /* locate all the matching physical ranges. */
2094 State.uVirtStateFound = PGM_PAGE_HNDL_VIRT_STATE_NONE;
2095# ifdef VBOX_WITH_RAW_MODE
2096 RTGCPHYS GCPhysKey = State.GCPhys;
2097 for (;;)
2098 {
2099 PPGMPHYS2VIRTHANDLER pPhys2Virt = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers,
2100 GCPhysKey, true /* above-or-equal */);
2101 if ( !pPhys2Virt
2102 || (pPhys2Virt->Core.Key & X86_PTE_PAE_PG_MASK) != State.GCPhys)
2103 break;
2104
2105 /* the head */
2106 GCPhysKey = pPhys2Virt->Core.KeyLast;
2107 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)((uintptr_t)pPhys2Virt + pPhys2Virt->offVirtHandler);
2108 unsigned uState = PGMVIRTANDLER_GET_TYPE(pVM, pCur)->uState;
2109 State.uVirtStateFound = RT_MAX(State.uVirtStateFound, uState);
2110
2111 /* any aliases */
2112 while (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK)
2113 {
2114 pPhys2Virt = (PPGMPHYS2VIRTHANDLER)((uintptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
2115 pCur = (PPGMVIRTHANDLER)((uintptr_t)pPhys2Virt + pPhys2Virt->offVirtHandler);
2116 uState = PGMVIRTANDLER_GET_TYPE(pVM, pCur)->uState;
2117 State.uVirtStateFound = RT_MAX(State.uVirtStateFound, uState);
2118 }
2119
2120 /* done? */
2121 if ((GCPhysKey & X86_PTE_PAE_PG_MASK) != State.GCPhys)
2122 break;
2123 }
2124# endif /* VBOX_WITH_RAW_MODE */
2125 if (State.uVirtState != State.uVirtStateFound)
2126 {
2127 AssertMsgFailed(("ram range vs virt handler flags mismatch. GCPhys=%RGp uVirtState=%#x uVirtStateFound=%#x\n",
2128 State.GCPhys, State.uVirtState, State.uVirtStateFound));
2129 State.cErrors++;
2130 }
2131 }
2132 }
2133 } /* foreach page in ram range. */
2134 } /* foreach ram range. */
2135
2136# ifdef VBOX_WITH_RAW_MODE
2137 /*
2138 * Check that the physical addresses of the virtual handlers matches up
2139 * and that they are otherwise sane.
2140 */
2141 RTAvlroGCPtrDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, true, pgmHandlerVirtualVerifyOne, &State);
2142# endif
2143
2144 /*
2145 * Do the reverse check for physical handlers.
2146 */
2147 /** @todo */
2148
2149 return State.cErrors;
2150}
2151
2152#endif /* VBOX_STRICT */
2153
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