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source: vbox/trunk/src/VBox/VMM/VMMAll/IEMAllN8veHlpA.asm@ 104322

最後變更 在這個檔案從104322是 104322,由 vboxsync 提交於 12 月 前

VMM/IEM: Have a single TB prologue which serves as an entry point to the TB, bugref:10653

  • 屬性 svn:eol-style 設為 native
  • 屬性 svn:keywords 設為 Author Date Id Revision
檔案大小: 8.1 KB
 
1; $Id: IEMAllN8veHlpA.asm 104322 2024-04-12 15:18:43Z vboxsync $
2;; @file
3; IEM - Native Recompiler Assembly Helpers.
4;
5
6;
7; Copyright (C) 2023 Oracle and/or its affiliates.
8;
9; This file is part of VirtualBox base platform packages, as
10; available from https://www.alldomusa.eu.org.
11;
12; This program is free software; you can redistribute it and/or
13; modify it under the terms of the GNU General Public License
14; as published by the Free Software Foundation, in version 3 of the
15; License.
16;
17; This program is distributed in the hope that it will be useful, but
18; WITHOUT ANY WARRANTY; without even the implied warranty of
19; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20; General Public License for more details.
21;
22; You should have received a copy of the GNU General Public License
23; along with this program; if not, see <https://www.gnu.org/licenses>.
24;
25; SPDX-License-Identifier: GPL-3.0-only
26;
27
28;*********************************************************************************************************************************
29;* Header Files *
30;*********************************************************************************************************************************
31%define RT_ASM_WITH_SEH64
32%include "VBox/asmdefs.mac"
33
34;; @todo r=aeichner The following is copied from IEMInternal.h
35;%define VBOX_WITH_IEM_NATIVE_RECOMPILER_LONGJMP - not enabled right now on amd64
36
37;; @todo r=aeichner The following defines are copied from IEMN8veRecompiler.h
38
39; /** @def IEMNATIVE_WITH_RECOMPILER_PROLOGUE_SINGLETON
40; * Enables having only a single prologue for native TBs. */
41%define IEMNATIVE_WITH_RECOMPILER_PROLOGUE_SINGLETON
42
43; /** An stack alignment adjustment (between non-volatile register pushes and
44; * the stack variable area, so the latter better aligned). */
45%define IEMNATIVE_FRAME_ALIGN_SIZE 8
46
47; /** The size of the area for stack variables and spills and stuff.
48; * @note This limit is duplicated in the python script(s). We add 0x40 for
49; * alignment padding. */
50%define IEMNATIVE_FRAME_VAR_SIZE (0xc0 + 0x40)
51
52; This needs to correspond to IEMNATIVE_REG_FIXED_PVMCPU in IEMN8veRecompiler.h
53%define IEMNATIVE_REG_FIXED_PVMCPU_ASM xBX
54
55; /** Number of stack arguments slots for calls made from the frame. */
56%ifdef RT_OS_WINDOWS
57%define IEMNATIVE_FRAME_STACK_ARG_COUNT 4
58%else
59%define IEMNATIVE_FRAME_STACK_ARG_COUNT 2
60%endif
61; /** Number of any shadow arguments (spill area) for calls we make. */
62%ifdef RT_OS_WINDOWS
63%define IEMNATIVE_FRAME_SHADOW_ARG_COUNT 4
64%else
65%define IEMNATIVE_FRAME_SHADOW_ARG_COUNT 0
66%endif
67
68
69BEGINCODE
70
71extern NAME(iemThreadedFunc_BltIn_LogCpuStateWorker)
72extern NAME(iemNativeHlpCheckTlbLookup)
73
74%ifdef IEMNATIVE_WITH_RECOMPILER_PROLOGUE_SINGLETON
75;;
76; This is the common prologue of a TB, saving all volatile registers
77; and creating the stack frame for saving temporary values.
78;
79; @param pVCpu (gcc:rdi, msc:rcx) The cross-context vCPU structure pointer.
80; @param pTbStart (gcc:rsi, msc:rdx) The TB instruction start pointer.
81;
82BEGINPROC iemNativeTbEntry
83 push rbp
84 mov rbp, rsp
85 push rbx
86%ifdef ASM_CALL64_MSC
87 mov IEMNATIVE_REG_FIXED_PVMCPU_ASM, rcx
88 push rsi
89 push rdi
90%else
91 mov IEMNATIVE_REG_FIXED_PVMCPU_ASM, rdi
92%endif
93 push r12
94 push r13
95 push r14
96 push r15
97%ifdef VBOX_WITH_IEM_NATIVE_RECOMPILER_LONGJMP
98%error "Port me"
99%endif
100 sub rsp, IEMNATIVE_FRAME_ALIGN_SIZE \
101 + IEMNATIVE_FRAME_VAR_SIZE \
102 + IEMNATIVE_FRAME_STACK_ARG_COUNT * 8 \
103 + IEMNATIVE_FRAME_SHADOW_ARG_COUNT * 8 \
104
105%ifdef ASM_CALL64_MSC
106 jmp rdx
107%else
108 jmp rsi
109%endif
110ENDPROC iemNativeTbEntry
111%endif
112
113
114;;
115; This does the epilogue of a TB, given the RBP for the frame and eax value to return.
116;
117; @param pFrame (gcc:rdi, msc:rcx) The frame pointer.
118; @param rc (gcc:esi, msc:edx) The return value.
119;
120; @note This doesn't really work for MSC since xmm6 thru xmm15 are non-volatile
121; and since we don't save them in the TB prolog we'll potentially return
122; with different values if any functions on the calling stack uses them
123; as they're unlikely to restore them till they return.
124;
125; For the GCC calling convention all xmm registers are volatile and the
126; only worry would be someone fiddling the control bits of MXCSR or FCW
127; without restoring them. This is highly unlikely, unless we're doing
128; it ourselves, I think.
129;
130BEGINPROC iemNativeTbLongJmp
131%ifdef ASM_CALL64_MSC
132 mov rbp, rcx
133 mov eax, edx
134%else
135 mov rbp, rdi
136 mov eax, esi
137%endif
138 SEH64_PUSH_xBP ; non-sense, but whatever.
139SEH64_END_PROLOGUE
140
141 ;
142 ; This must exactly match what iemNativeEmitEpilog does.
143 ;
144%ifdef ASM_CALL64_MSC
145 lea rsp, [rbp - 5 * 8]
146%else
147 lea rsp, [rbp - 7 * 8]
148%endif
149 pop r15
150 pop r14
151 pop r13
152 pop r12
153%ifdef ASM_CALL64_MSC
154 pop rdi
155 pop rsi
156%endif
157 pop rbx
158 leave
159 ret
160ENDPROC iemNativeTbLongJmp
161
162
163
164;;
165; This is wrapper function that saves and restores all volatile registers
166; so the impact of inserting LogCpuState is minimal to the other TB code.
167;
168BEGINPROC iemNativeHlpAsmSafeWrapLogCpuState
169 push xBP
170 SEH64_PUSH_xBP
171 mov xBP, xSP
172 SEH64_SET_FRAME_xBP 0
173SEH64_END_PROLOGUE
174
175 ;
176 ; Save all volatile registers.
177 ;
178 push xAX
179 push xCX
180 push xDX
181%ifdef RT_OS_WINDOWS
182 push xSI
183 push xDI
184%endif
185 push r8
186 push r9
187 push r10
188 push r11
189 sub rsp, 8+20h
190
191 ;
192 ; Call C function to do the actual work.
193 ;
194%ifdef RT_OS_WINDOWS
195 mov rcx, rbx ; IEMNATIVE_REG_FIXED_PVMCPU
196 mov rdx, [rbp + 10h] ; Just in case we decide to put something there.
197 xor r8, r8
198 xor r9, r9
199%else
200 mov rdi, rbx ; IEMNATIVE_REG_FIXED_PVMCPU
201 mov rsi, [rbp + 10h] ; Just in case we decide to put something there.
202 xor ecx, ecx
203 xor edx, edx
204%endif
205 call NAME(iemThreadedFunc_BltIn_LogCpuStateWorker)
206
207 ;
208 ; Restore volatile registers and return to the TB code.
209 ;
210 add rsp, 8+20h
211 pop r11
212 pop r10
213 pop r9
214 pop r8
215%ifdef RT_OS_WINDOWS
216 pop xDI
217 pop xSI
218%endif
219 pop xDX
220 pop xCX
221 pop xAX
222 leave
223 ret
224ENDPROC iemNativeHlpAsmSafeWrapLogCpuState
225
226
227;;
228; This is wrapper function that saves and restores all volatile registers
229; so the impact of inserting CheckTlbLookup is minimal to the other TB code.
230;
231BEGINPROC iemNativeHlpAsmSafeWrapCheckTlbLookup
232 push xBP
233 SEH64_PUSH_xBP
234 mov xBP, xSP
235 SEH64_SET_FRAME_xBP 0
236SEH64_END_PROLOGUE
237
238 ;
239 ; Save all volatile registers.
240 ;
241 push xAX
242 push xCX
243 push xDX
244%ifdef RT_OS_WINDOWS
245 push xSI
246 push xDI
247%endif
248 push r8
249 push r9
250 push r10
251 push r11
252 sub rsp, 8+20h
253
254 ;
255 ; Call C function to do the actual work.
256 ;
257%ifdef RT_OS_WINDOWS
258 mov rcx, [rbp + 10h]
259 mov rdx, [rbp + 18h]
260 mov r8, [rbp + 20h]
261 mov r9, [rbp + 28h]
262%else
263 mov rdi, [rbp + 10h]
264 mov rsi, [rbp + 18h]
265 mov ecx, [rbp + 20h]
266 mov edx, [rbp + 28h]
267%endif
268 call NAME(iemNativeHlpCheckTlbLookup)
269
270 ;
271 ; Restore volatile registers and return to the TB code.
272 ;
273 add rsp, 8+20h
274 pop r11
275 pop r10
276 pop r9
277 pop r8
278%ifdef RT_OS_WINDOWS
279 pop xDI
280 pop xSI
281%endif
282 pop xDX
283 pop xCX
284 pop xAX
285 leave
286 ret 20h
287ENDPROC iemNativeHlpAsmSafeWrapCheckTlbLookup
288
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