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source: vbox/trunk/src/VBox/VMM/PDMInternal.h@ 28263

最後變更 在這個檔案從28263是 28263,由 vboxsync 提交於 15 年 前

PDM: Put pAsyncCompletionTemplates under the ListCritSect.
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  • 屬性 svn:keywords 設為 Id
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1/* $Id: PDMInternal.h 28263 2010-04-13 15:55:36Z vboxsync $ */
2/** @file
3 * PDM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.alldomusa.eu.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22#ifndef ___PDMInternal_h
23#define ___PDMInternal_h
24
25#include <VBox/types.h>
26#include <VBox/param.h>
27#include <VBox/cfgm.h>
28#include <VBox/stam.h>
29#include <VBox/vusb.h>
30#include <VBox/pdmasynccompletion.h>
31#include <VBox/pdmcommon.h>
32#include <iprt/assert.h>
33#include <iprt/critsect.h>
34#ifdef IN_RING3
35# include <iprt/thread.h>
36#endif
37
38RT_C_DECLS_BEGIN
39
40
41/** @defgroup grp_pdm_int Internal
42 * @ingroup grp_pdm
43 * @internal
44 * @{
45 */
46
47/** @def PDM_WITH_R3R0_CRIT_SECT
48 * Enables or disabled ring-3/ring-0 critical sections. */
49#if defined(DOXYGEN_RUNNING) || 1
50# define PDM_WITH_R3R0_CRIT_SECT
51#endif
52
53/** @def PDMCRITSECT_STRICT
54 * Enables/disables PDM critsect strictness like deadlock detection. */
55#if (defined(RT_LOCK_STRICT) && defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
56# define PDMCRITSECT_STRICT
57#endif
58
59
60/*******************************************************************************
61* Structures and Typedefs *
62*******************************************************************************/
63
64/** Pointer to a PDM Device. */
65typedef struct PDMDEV *PPDMDEV;
66/** Pointer to a pointer to a PDM Device. */
67typedef PPDMDEV *PPPDMDEV;
68
69/** Pointer to a PDM USB Device. */
70typedef struct PDMUSB *PPDMUSB;
71/** Pointer to a pointer to a PDM USB Device. */
72typedef PPDMUSB *PPPDMUSB;
73
74/** Pointer to a PDM Driver. */
75typedef struct PDMDRV *PPDMDRV;
76/** Pointer to a pointer to a PDM Driver. */
77typedef PPDMDRV *PPPDMDRV;
78
79/** Pointer to a PDM Logical Unit. */
80typedef struct PDMLUN *PPDMLUN;
81/** Pointer to a pointer to a PDM Logical Unit. */
82typedef PPDMLUN *PPPDMLUN;
83
84/** Pointer to a PDM PCI Bus instance. */
85typedef struct PDMPCIBUS *PPDMPCIBUS;
86/** Pointer to a DMAC instance. */
87typedef struct PDMDMAC *PPDMDMAC;
88/** Pointer to a RTC instance. */
89typedef struct PDMRTC *PPDMRTC;
90
91/** Pointer to an USB HUB registration record. */
92typedef struct PDMUSBHUB *PPDMUSBHUB;
93
94/**
95 * Supported asynchronous completion endpoint classes.
96 */
97typedef enum PDMASYNCCOMPLETIONEPCLASSTYPE
98{
99 /** File class. */
100 PDMASYNCCOMPLETIONEPCLASSTYPE_FILE = 0,
101 /** Number of supported classes. */
102 PDMASYNCCOMPLETIONEPCLASSTYPE_MAX,
103 /** 32bit hack. */
104 PDMASYNCCOMPLETIONEPCLASSTYPE_32BIT_HACK = 0x7fffffff
105} PDMASYNCCOMPLETIONEPCLASSTYPE;
106
107/**
108 * Private device instance data.
109 */
110typedef struct PDMDEVINSINT
111{
112 /** Pointer to the next instance (HC Ptr).
113 * (Head is pointed to by PDM::pDevInstances.) */
114 R3PTRTYPE(PPDMDEVINS) pNextR3;
115 /** Pointer to the next per device instance (HC Ptr).
116 * (Head is pointed to by PDMDEV::pInstances.) */
117 R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
118 /** Pointer to device structure - HC Ptr. */
119 R3PTRTYPE(PPDMDEV) pDevR3;
120 /** Pointer to the list of logical units associated with the device. (FIFO) */
121 R3PTRTYPE(PPDMLUN) pLunsR3;
122 /** Pointer to the asynchronous notification callback set while in
123 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
124 R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
125 /** Configuration handle to the instance node. */
126 R3PTRTYPE(PCFGMNODE) pCfgHandle;
127
128 /** R3 pointer to the VM this instance was created for. */
129 PVMR3 pVMR3;
130 /** R3 pointer to associated PCI device structure. */
131 R3PTRTYPE(struct PCIDevice *) pPciDeviceR3;
132 /** R3 pointer to associated PCI bus structure. */
133 R3PTRTYPE(PPDMPCIBUS) pPciBusR3;
134
135 /** R0 pointer to the VM this instance was created for. */
136 PVMR0 pVMR0;
137 /** R0 pointer to associated PCI device structure. */
138 R0PTRTYPE(struct PCIDevice *) pPciDeviceR0;
139 /** R0 pointer to associated PCI bus structure. */
140 R0PTRTYPE(PPDMPCIBUS) pPciBusR0;
141
142 /** RC pointer to the VM this instance was created for. */
143 PVMRC pVMRC;
144 /** RC pointer to associated PCI device structure. */
145 RCPTRTYPE(struct PCIDevice *) pPciDeviceRC;
146 /** RC pointer to associated PCI bus structure. */
147 RCPTRTYPE(PPDMPCIBUS) pPciBusRC;
148
149 /** Flags, see PDMDEVINSINT_FLAGS_XXX. */
150 uint32_t fIntFlags;
151} PDMDEVINSINT;
152
153/** @name PDMDEVINSINT::fIntFlags
154 * @{ */
155/** Used by pdmR3Load to mark device instances it found in the saved state. */
156#define PDMDEVINSINT_FLAGS_FOUND RT_BIT_32(0)
157/** Indicates that the device hasn't been powered on or resumed.
158 * This is used by PDMR3PowerOn, PDMR3Resume, PDMR3Suspend and PDMR3PowerOff
159 * to make sure each device gets exactly one notification for each of those
160 * events. PDMR3Resume and PDMR3PowerOn also makes use of it to bail out on
161 * a failure (already resumed/powered-on devices are suspended). */
162#define PDMDEVINSINT_FLAGS_SUSPENDED RT_BIT_32(1)
163/** Indicates that the device has been reset already. Used by PDMR3Reset. */
164#define PDMDEVINSINT_FLAGS_RESET RT_BIT_32(2)
165/** @} */
166
167
168/**
169 * Private USB device instance data.
170 */
171typedef struct PDMUSBINSINT
172{
173 /** The UUID of this instance. */
174 RTUUID Uuid;
175 /** Pointer to the next instance.
176 * (Head is pointed to by PDM::pUsbInstances.) */
177 R3PTRTYPE(PPDMUSBINS) pNext;
178 /** Pointer to the next per USB device instance.
179 * (Head is pointed to by PDMUSB::pInstances.) */
180 R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;
181
182 /** Pointer to device structure. */
183 R3PTRTYPE(PPDMUSB) pUsbDev;
184
185 /** Pointer to the VM this instance was created for. */
186 PVMR3 pVM;
187 /** Pointer to the list of logical units associated with the device. (FIFO) */
188 R3PTRTYPE(PPDMLUN) pLuns;
189 /** The per instance device configuration. */
190 R3PTRTYPE(PCFGMNODE) pCfg;
191 /** Same as pCfg if the configuration should be deleted when detaching the device. */
192 R3PTRTYPE(PCFGMNODE) pCfgDelete;
193 /** The global device configuration. */
194 R3PTRTYPE(PCFGMNODE) pCfgGlobal;
195
196 /** Pointer to the USB hub this device is attached to.
197 * This is NULL if the device isn't connected to any HUB. */
198 R3PTRTYPE(PPDMUSBHUB) pHub;
199 /** The port number that we're connected to. */
200 uint32_t iPort;
201 /** Indicates that the USB device hasn't been powered on or resumed.
202 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
203 bool fVMSuspended;
204 /** Indicates that the USB device has been reset. */
205 bool fVMReset;
206 /** Pointer to the asynchronous notification callback set while in
207 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
208 R3PTRTYPE(PFNPDMUSBASYNCNOTIFY) pfnAsyncNotify;
209} PDMUSBINSINT;
210
211
212/**
213 * Private driver instance data.
214 */
215typedef struct PDMDRVINSINT
216{
217 /** Pointer to the driver instance above.
218 * This is NULL for the topmost drive. */
219 R3PTRTYPE(PPDMDRVINS) pUp;
220 /** Pointer to the driver instance below.
221 * This is NULL for the bottommost driver. */
222 R3PTRTYPE(PPDMDRVINS) pDown;
223 /** Pointer to the logical unit this driver chained on. */
224 R3PTRTYPE(PPDMLUN) pLun;
225 /** Pointer to driver structure from which this was instantiated. */
226 R3PTRTYPE(PPDMDRV) pDrv;
227 /** Pointer to the VM this instance was created for, ring-3 context. */
228 PVMR3 pVMR3;
229 /** Pointer to the VM this instance was created for, ring-0 context. */
230 PVMR0 pVMR0;
231 /** Pointer to the VM this instance was created for, raw-mode context. */
232 PVMRC pVMRC;
233 /** Flag indicating that the driver is being detached and destroyed.
234 * (Helps detect potential recursive detaching.) */
235 bool fDetaching;
236 /** Indicates that the driver hasn't been powered on or resumed.
237 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
238 bool fVMSuspended;
239 /** Indicates that the driver has been reset already. */
240 bool fVMReset;
241 /** Set if allocated on the hyper heap, false if on the ring-3 heap. */
242 bool fHyperHeap;
243 /** Pointer to the asynchronous notification callback set while in
244 * PDMUSBREG::pfnVMSuspend or PDMUSBREG::pfnVMPowerOff. */
245 R3PTRTYPE(PFNPDMDRVASYNCNOTIFY) pfnAsyncNotify;
246 /** Configuration handle to the instance node. */
247 R3PTRTYPE(PCFGMNODE) pCfgHandle;
248} PDMDRVINSINT;
249
250
251/**
252 * Private critical section data.
253 */
254typedef struct PDMCRITSECTINT
255{
256 /** The critical section core which is shared with IPRT. */
257 RTCRITSECT Core;
258 /** Pointer to the next critical section.
259 * This chain is used for relocating pVMRC and device cleanup. */
260 R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
261 /** Owner identifier.
262 * This is pDevIns if the owner is a device. Similarily for a driver or service.
263 * PDMR3CritSectInit() sets this to point to the critsect itself. */
264 RTR3PTR pvKey;
265 /** Pointer to the VM - R3Ptr. */
266 PVMR3 pVMR3;
267 /** Pointer to the VM - R0Ptr. */
268 PVMR0 pVMR0;
269 /** Pointer to the VM - GCPtr. */
270 PVMRC pVMRC;
271 /** Alignment padding. */
272 uint32_t padding;
273 /** Event semaphore that is scheduled to be signaled upon leaving the
274 * critical section. This is Ring-3 only of course. */
275 RTSEMEVENT EventToSignal;
276 /** The lock name. */
277 R3PTRTYPE(const char *) pszName;
278 /** R0/RC lock contention. */
279 STAMCOUNTER StatContentionRZLock;
280 /** R0/RC unlock contention. */
281 STAMCOUNTER StatContentionRZUnlock;
282 /** R3 lock contention. */
283 STAMCOUNTER StatContentionR3;
284 /** Profiling the time the section is locked. */
285 STAMPROFILEADV StatLocked;
286} PDMCRITSECTINT;
287AssertCompileMemberAlignment(PDMCRITSECTINT, StatContentionRZLock, 8);
288/** Pointer to private critical section data. */
289typedef PDMCRITSECTINT *PPDMCRITSECTINT;
290
291/** Indicates that the critical section is queued for unlock.
292 * PDMCritSectIsOwner and PDMCritSectIsOwned optimizations. */
293#define PDMCRITSECT_FLAGS_PENDING_UNLOCK RT_BIT_32(17)
294
295
296/**
297 * The usual device/driver/internal/external stuff.
298 */
299typedef enum
300{
301 /** The usual invalid entry. */
302 PDMTHREADTYPE_INVALID = 0,
303 /** Device type. */
304 PDMTHREADTYPE_DEVICE,
305 /** USB Device type. */
306 PDMTHREADTYPE_USB,
307 /** Driver type. */
308 PDMTHREADTYPE_DRIVER,
309 /** Internal type. */
310 PDMTHREADTYPE_INTERNAL,
311 /** External type. */
312 PDMTHREADTYPE_EXTERNAL,
313 /** The usual 32-bit hack. */
314 PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
315} PDMTHREADTYPE;
316
317
318/**
319 * The internal structure for the thread.
320 */
321typedef struct PDMTHREADINT
322{
323 /** The VM pointer. */
324 PVMR3 pVM;
325 /** The event semaphore the thread blocks on when not running. */
326 RTSEMEVENTMULTI BlockEvent;
327 /** The event semaphore the thread sleeps on while running. */
328 RTSEMEVENTMULTI SleepEvent;
329 /** Pointer to the next thread. */
330 R3PTRTYPE(struct PDMTHREAD *) pNext;
331 /** The thread type. */
332 PDMTHREADTYPE enmType;
333} PDMTHREADINT;
334
335
336
337/* Must be included after PDMDEVINSINT is defined. */
338#define PDMDEVINSINT_DECLARED
339#define PDMUSBINSINT_DECLARED
340#define PDMDRVINSINT_DECLARED
341#define PDMCRITSECTINT_DECLARED
342#define PDMTHREADINT_DECLARED
343#ifdef ___VBox_pdm_h
344# error "Invalid header PDM order. Include PDMInternal.h before VBox/pdm.h!"
345#endif
346RT_C_DECLS_END
347#include <VBox/pdm.h>
348RT_C_DECLS_BEGIN
349
350/**
351 * PDM Logical Unit.
352 *
353 * This typically the representation of a physical port on a
354 * device, like for instance the PS/2 keyboard port on the
355 * keyboard controller device. The LUNs are chained on the
356 * device the belong to (PDMDEVINSINT::pLunsR3).
357 */
358typedef struct PDMLUN
359{
360 /** The LUN - The Logical Unit Number. */
361 RTUINT iLun;
362 /** Pointer to the next LUN. */
363 PPDMLUN pNext;
364 /** Pointer to the top driver in the driver chain. */
365 PPDMDRVINS pTop;
366 /** Pointer to the bottom driver in the driver chain. */
367 PPDMDRVINS pBottom;
368 /** Pointer to the device instance which the LUN belongs to.
369 * Either this is set or pUsbIns is set. Both is never set at the same time. */
370 PPDMDEVINS pDevIns;
371 /** Pointer to the USB device instance which the LUN belongs to. */
372 PPDMUSBINS pUsbIns;
373 /** Pointer to the device base interface. */
374 PPDMIBASE pBase;
375 /** Description of this LUN. */
376 const char *pszDesc;
377} PDMLUN;
378
379
380/**
381 * PDM Device.
382 */
383typedef struct PDMDEV
384{
385 /** Pointer to the next device (R3 Ptr). */
386 R3PTRTYPE(PPDMDEV) pNext;
387 /** Device name length. (search optimization) */
388 RTUINT cchName;
389 /** Registration structure. */
390 R3PTRTYPE(const struct PDMDEVREG *) pReg;
391 /** Number of instances. */
392 uint32_t cInstances;
393 /** Pointer to chain of instances (R3 Ptr). */
394 PPDMDEVINSR3 pInstances;
395} PDMDEV;
396
397
398/**
399 * PDM USB Device.
400 */
401typedef struct PDMUSB
402{
403 /** Pointer to the next device (R3 Ptr). */
404 R3PTRTYPE(PPDMUSB) pNext;
405 /** Device name length. (search optimization) */
406 RTUINT cchName;
407 /** Registration structure. */
408 R3PTRTYPE(const struct PDMUSBREG *) pReg;
409 /** Next instance number. */
410 uint32_t iNextInstance;
411 /** Pointer to chain of instances (R3 Ptr). */
412 R3PTRTYPE(PPDMUSBINS) pInstances;
413} PDMUSB;
414
415
416/**
417 * PDM Driver.
418 */
419typedef struct PDMDRV
420{
421 /** Pointer to the next device. */
422 PPDMDRV pNext;
423 /** Registration structure. */
424 const struct PDMDRVREG * pReg;
425 /** Current number of instances. */
426 uint32_t cInstances;
427 /** The next instance number. */
428 uint32_t iNextInstance;
429} PDMDRV;
430
431
432/**
433 * PDM registered PIC device.
434 */
435typedef struct PDMPIC
436{
437 /** Pointer to the PIC device instance - R3. */
438 PPDMDEVINSR3 pDevInsR3;
439 /** @copydoc PDMPICREG::pfnSetIrqR3 */
440 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
441 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
442 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
443
444 /** Pointer to the PIC device instance - R0. */
445 PPDMDEVINSR0 pDevInsR0;
446 /** @copydoc PDMPICREG::pfnSetIrqR3 */
447 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
448 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
449 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
450
451 /** Pointer to the PIC device instance - RC. */
452 PPDMDEVINSRC pDevInsRC;
453 /** @copydoc PDMPICREG::pfnSetIrqR3 */
454 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
455 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
456 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));
457 /** Alignment padding. */
458 RTRCPTR RCPtrPadding;
459} PDMPIC;
460
461
462/**
463 * PDM registered APIC device.
464 */
465typedef struct PDMAPIC
466{
467 /** Pointer to the APIC device instance - R3 Ptr. */
468 PPDMDEVINSR3 pDevInsR3;
469 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
470 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
471 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
472 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
473 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
474 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
475 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
476 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
477 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
478 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
479 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
480 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
481 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
482 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
483 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
484 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
485 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
486 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
487 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
488 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
489 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
490
491 /** Pointer to the APIC device instance - R0 Ptr. */
492 PPDMDEVINSR0 pDevInsR0;
493 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
494 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
495 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
496 DECLR0CALLBACKMEMBER(bool, pfnHasPendingIrqR0,(PPDMDEVINS pDevIns));
497 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
498 DECLR0CALLBACKMEMBER(void, pfnSetBaseR0,(PPDMDEVINS pDevIns, uint64_t u64Base));
499 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
500 DECLR0CALLBACKMEMBER(uint64_t, pfnGetBaseR0,(PPDMDEVINS pDevIns));
501 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
502 DECLR0CALLBACKMEMBER(void, pfnSetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
503 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
504 DECLR0CALLBACKMEMBER(uint8_t, pfnGetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu));
505 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
506 DECLR0CALLBACKMEMBER(uint32_t, pfnWriteMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
507 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
508 DECLR0CALLBACKMEMBER(uint32_t, pfnReadMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
509 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
510 DECLR0CALLBACKMEMBER(int, pfnBusDeliverR0,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
511 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
512 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
513 DECLR0CALLBACKMEMBER(int, pfnLocalInterruptR0,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
514
515 /** Pointer to the APIC device instance - RC Ptr. */
516 PPDMDEVINSRC pDevInsRC;
517 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
518 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));
519 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
520 DECLRCCALLBACKMEMBER(bool, pfnHasPendingIrqRC,(PPDMDEVINS pDevIns));
521 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
522 DECLRCCALLBACKMEMBER(void, pfnSetBaseRC,(PPDMDEVINS pDevIns, uint64_t u64Base));
523 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
524 DECLRCCALLBACKMEMBER(uint64_t, pfnGetBaseRC,(PPDMDEVINS pDevIns));
525 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
526 DECLRCCALLBACKMEMBER(void, pfnSetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
527 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
528 DECLRCCALLBACKMEMBER(uint8_t, pfnGetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu));
529 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
530 DECLRCCALLBACKMEMBER(uint32_t, pfnWriteMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
531 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
532 DECLRCCALLBACKMEMBER(uint32_t, pfnReadMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
533 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
534 DECLRCCALLBACKMEMBER(int, pfnBusDeliverRC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
535 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
536 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
537 DECLRCCALLBACKMEMBER(int, pfnLocalInterruptRC,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
538 RTRCPTR RCPtrAlignment;
539
540} PDMAPIC;
541
542
543/**
544 * PDM registered I/O APIC device.
545 */
546typedef struct PDMIOAPIC
547{
548 /** Pointer to the APIC device instance - R3 Ptr. */
549 PPDMDEVINSR3 pDevInsR3;
550 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
551 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
552
553 /** Pointer to the PIC device instance - R0. */
554 PPDMDEVINSR0 pDevInsR0;
555 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
556 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
557
558 /** Pointer to the APIC device instance - RC Ptr. */
559 PPDMDEVINSRC pDevInsRC;
560 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
561 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
562} PDMIOAPIC;
563
564/** Maximum number of PCI busses for a VM. */
565#define PDM_PCI_BUSSES_MAX 8
566
567/**
568 * PDM PCI Bus instance.
569 */
570typedef struct PDMPCIBUS
571{
572 /** PCI bus number. */
573 RTUINT iBus;
574 RTUINT uPadding0; /**< Alignment padding.*/
575
576 /** Pointer to PCI Bus device instance. */
577 PPDMDEVINSR3 pDevInsR3;
578 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
579 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
580 /** @copydoc PDMPCIBUSREG::pfnRegisterR3 */
581 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
582 /** @copydoc PDMPCIBUSREG::pfnIORegionRegisterR3 */
583 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion,
584 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
585 /** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3 */
586 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead,
587 PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
588 /** @copydoc PDMPCIBUSREG::pfnSaveExecR3 */
589 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
590 /** @copydoc PDMPCIBUSREG::pfnLoadExecR3 */
591 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
592 /** @copydoc PDMPCIBUSREG::pfnFakePCIBIOSR3 */
593 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
594
595 /** Pointer to the PIC device instance - R0. */
596 R0PTRTYPE(PPDMDEVINS) pDevInsR0;
597 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
598 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
599
600 /** Pointer to PCI Bus device instance. */
601 PPDMDEVINSRC pDevInsRC;
602 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
603 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
604} PDMPCIBUS;
605
606
607#ifdef IN_RING3
608/**
609 * PDM registered DMAC (DMA Controller) device.
610 */
611typedef struct PDMDMAC
612{
613 /** Pointer to the DMAC device instance. */
614 PPDMDEVINSR3 pDevIns;
615 /** Copy of the registration structure. */
616 PDMDMACREG Reg;
617} PDMDMAC;
618
619
620/**
621 * PDM registered RTC (Real Time Clock) device.
622 */
623typedef struct PDMRTC
624{
625 /** Pointer to the RTC device instance. */
626 PPDMDEVINSR3 pDevIns;
627 /** Copy of the registration structure. */
628 PDMRTCREG Reg;
629} PDMRTC;
630
631#endif /* IN_RING3 */
632
633/**
634 * Module type.
635 */
636typedef enum PDMMODTYPE
637{
638 /** Raw-mode (RC) context module. */
639 PDMMOD_TYPE_RC,
640 /** Ring-0 (host) context module. */
641 PDMMOD_TYPE_R0,
642 /** Ring-3 (host) context module. */
643 PDMMOD_TYPE_R3
644} PDMMODTYPE;
645
646
647/** The module name length including the terminator. */
648#define PDMMOD_NAME_LEN 32
649
650/**
651 * Loaded module instance.
652 */
653typedef struct PDMMOD
654{
655 /** Module name. This is used for refering to
656 * the module internally, sort of like a handle. */
657 char szName[PDMMOD_NAME_LEN];
658 /** Module type. */
659 PDMMODTYPE eType;
660 /** Loader module handle. Not used for R0 modules. */
661 RTLDRMOD hLdrMod;
662 /** Loaded address.
663 * This is the 'handle' for R0 modules. */
664 RTUINTPTR ImageBase;
665 /** Old loaded address.
666 * This is used during relocation of GC modules. Not used for R0 modules. */
667 RTUINTPTR OldImageBase;
668 /** Where the R3 HC bits are stored.
669 * This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
670 void *pvBits;
671
672 /** Pointer to next module. */
673 struct PDMMOD *pNext;
674 /** Module filename. */
675 char szFilename[1];
676} PDMMOD;
677/** Pointer to loaded module instance. */
678typedef PDMMOD *PPDMMOD;
679
680
681
682/** Extra space in the free array. */
683#define PDMQUEUE_FREE_SLACK 16
684
685/**
686 * Queue type.
687 */
688typedef enum PDMQUEUETYPE
689{
690 /** Device consumer. */
691 PDMQUEUETYPE_DEV = 1,
692 /** Driver consumer. */
693 PDMQUEUETYPE_DRV,
694 /** Internal consumer. */
695 PDMQUEUETYPE_INTERNAL,
696 /** External consumer. */
697 PDMQUEUETYPE_EXTERNAL
698} PDMQUEUETYPE;
699
700/** Pointer to a PDM Queue. */
701typedef struct PDMQUEUE *PPDMQUEUE;
702
703/**
704 * PDM Queue.
705 */
706typedef struct PDMQUEUE
707{
708 /** Pointer to the next queue in the list. */
709 R3PTRTYPE(PPDMQUEUE) pNext;
710 /** Type specific data. */
711 union
712 {
713 /** PDMQUEUETYPE_DEV */
714 struct
715 {
716 /** Pointer to consumer function. */
717 R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
718 /** Pointer to the device instance owning the queue. */
719 R3PTRTYPE(PPDMDEVINS) pDevIns;
720 } Dev;
721 /** PDMQUEUETYPE_DRV */
722 struct
723 {
724 /** Pointer to consumer function. */
725 R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
726 /** Pointer to the driver instance owning the queue. */
727 R3PTRTYPE(PPDMDRVINS) pDrvIns;
728 } Drv;
729 /** PDMQUEUETYPE_INTERNAL */
730 struct
731 {
732 /** Pointer to consumer function. */
733 R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;
734 } Int;
735 /** PDMQUEUETYPE_EXTERNAL */
736 struct
737 {
738 /** Pointer to consumer function. */
739 R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
740 /** Pointer to user argument. */
741 R3PTRTYPE(void *) pvUser;
742 } Ext;
743 } u;
744 /** Queue type. */
745 PDMQUEUETYPE enmType;
746 /** The interval between checking the queue for events.
747 * The realtime timer below is used to do the waiting.
748 * If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
749 uint32_t cMilliesInterval;
750 /** Interval timer. Only used if cMilliesInterval is non-zero. */
751 PTMTIMERR3 pTimer;
752 /** Pointer to the VM - R3. */
753 PVMR3 pVMR3;
754 /** LIFO of pending items - R3. */
755 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;
756 /** Pointer to the VM - R0. */
757 PVMR0 pVMR0;
758 /** LIFO of pending items - R0. */
759 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;
760 /** Pointer to the GC VM and indicator for GC enabled queue.
761 * If this is NULL, the queue cannot be used in GC.
762 */
763 PVMRC pVMRC;
764 /** LIFO of pending items - GC. */
765 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;
766
767 /** Item size (bytes). */
768 uint32_t cbItem;
769 /** Number of items in the queue. */
770 uint32_t cItems;
771 /** Index to the free head (where we insert). */
772 uint32_t volatile iFreeHead;
773 /** Index to the free tail (where we remove). */
774 uint32_t volatile iFreeTail;
775
776 /** Unqiue queue name. */
777 R3PTRTYPE(const char *) pszName;
778#if HC_ARCH_BITS == 32
779 RTR3PTR Alignment1;
780#endif
781 /** Stat: Times PDMQueueAlloc fails. */
782 STAMCOUNTER StatAllocFailures;
783 /** Stat: PDMQueueInsert calls. */
784 STAMCOUNTER StatInsert;
785 /** Stat: Queue flushes. */
786 STAMCOUNTER StatFlush;
787 /** Stat: Queue flushes with pending items left over. */
788 STAMCOUNTER StatFlushLeftovers;
789#ifdef VBOX_WITH_STATISTICS
790 /** State: Profiling the flushing. */
791 STAMPROFILE StatFlushPrf;
792 /** State: Pending items. */
793 uint32_t volatile cStatPending;
794 uint32_t volatile cAlignment;
795#endif
796
797 /** Array of pointers to free items. Variable size. */
798 struct PDMQUEUEFREEITEM
799 {
800 /** Pointer to the free item - HC Ptr. */
801 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;
802 /** Pointer to the free item - HC Ptr. */
803 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;
804 /** Pointer to the free item - GC Ptr. */
805 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;
806#if HC_ARCH_BITS == 64
807 RTRCPTR Alignment0;
808#endif
809 } aFreeItems[1];
810} PDMQUEUE;
811
812/** @name PDM::fQueueFlushing
813 * @{ */
814/** Indicating that an queue insert has been performed. */
815#define PDM_QUEUE_FLUSH_FLAG_ACTIVE RT_BIT_32(PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT)
816/** The bit number for PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT. */
817#define PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT 0
818/** Indicating there are pending items.
819 * This is make sure we don't miss inserts happening during flushing. The FF
820 * cannot be used for this since it has to be cleared immediately to prevent
821 * other EMTs from spinning. */
822#define PDM_QUEUE_FLUSH_FLAG_PENDING RT_BIT_32(PDM_QUEUE_FLUSH_FLAG_PENDING_BIT)
823/** The bit number for PDM_QUEUE_FLUSH_FLAG_PENDING. */
824#define PDM_QUEUE_FLUSH_FLAG_PENDING_BIT 1
825/** }@ */
826
827
828/**
829 * Queue device helper task operation.
830 */
831typedef enum PDMDEVHLPTASKOP
832{
833 /** The usual invalid 0 entry. */
834 PDMDEVHLPTASKOP_INVALID = 0,
835 /** ISASetIrq */
836 PDMDEVHLPTASKOP_ISA_SET_IRQ,
837 /** PCISetIrq */
838 PDMDEVHLPTASKOP_PCI_SET_IRQ,
839 /** PCISetIrq */
840 PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
841 /** The usual 32-bit hack. */
842 PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
843} PDMDEVHLPTASKOP;
844
845/**
846 * Queued Device Helper Task.
847 */
848typedef struct PDMDEVHLPTASK
849{
850 /** The queue item core (don't touch). */
851 PDMQUEUEITEMCORE Core;
852 /** Pointer to the device instance (R3 Ptr). */
853 PPDMDEVINSR3 pDevInsR3;
854 /** This operation to perform. */
855 PDMDEVHLPTASKOP enmOp;
856#if HC_ARCH_BITS == 64
857 uint32_t Alignment0;
858#endif
859 /** Parameters to the operation. */
860 union PDMDEVHLPTASKPARAMS
861 {
862 /**
863 * PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_PCI_SET_IRQ.
864 */
865 struct PDMDEVHLPTASKSETIRQ
866 {
867 /** The IRQ */
868 int iIrq;
869 /** The new level. */
870 int iLevel;
871 } SetIRQ;
872 } u;
873} PDMDEVHLPTASK;
874/** Pointer to a queued Device Helper Task. */
875typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
876/** Pointer to a const queued Device Helper Task. */
877typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
878
879
880
881/**
882 * An USB hub registration record.
883 */
884typedef struct PDMUSBHUB
885{
886 /** The USB versions this hub support.
887 * Note that 1.1 hubs can take on 2.0 devices. */
888 uint32_t fVersions;
889 /** The number of ports on the hub. */
890 uint32_t cPorts;
891 /** The number of available ports (0..cPorts). */
892 uint32_t cAvailablePorts;
893 /** The driver instance of the hub. */
894 PPDMDRVINS pDrvIns;
895 /** Copy of the to the registration structure. */
896 PDMUSBHUBREG Reg;
897
898 /** Pointer to the next hub in the list. */
899 struct PDMUSBHUB *pNext;
900} PDMUSBHUB;
901
902/** Pointer to a const USB HUB registration record. */
903typedef const PDMUSBHUB *PCPDMUSBHUB;
904
905/** Pointer to a PDM Async I/O template. */
906typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;
907
908/** Pointer to the main PDM Async completion endpoint class. */
909typedef struct PDMASYNCCOMPLETIONEPCLASS *PPDMASYNCCOMPLETIONEPCLASS;
910
911
912/**
913 * PDM VMCPU Instance data.
914 * Changes to this must checked against the padding of the cfgm union in VMCPU!
915 */
916typedef struct PDMCPU
917{
918 /** The number of entries in the apQueuedCritSectsLeaves table that's currnetly in use. */
919 uint32_t cQueuedCritSectLeaves;
920 uint32_t uPadding0; /**< Alignment padding.*/
921 /** Critical sections queued in RC/R0 because of contention preventing leave to complete. (R3 Ptrs)
922 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
923 R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectsLeaves[8];
924} PDMCPU;
925
926/**
927 * Converts a PDM pointer into a VM pointer.
928 * @returns Pointer to the VM structure the PDM is part of.
929 * @param pPDM Pointer to PDM instance data.
930 */
931#define PDM2VM(pPDM) ( (PVM)((char*)pPDM - pPDM->offVM) )
932
933
934/**
935 * PDM VM Instance data.
936 * Changes to this must checked against the padding of the cfgm union in VM!
937 */
938typedef struct PDM
939{
940 /** Offset to the VM structure.
941 * See PDM2VM(). */
942 RTUINT offVM;
943 RTUINT uPadding0; /**< Alignment padding.*/
944
945 /** List of registered devices. (FIFO) */
946 R3PTRTYPE(PPDMDEV) pDevs;
947 /** List of devices instances. (FIFO) */
948 R3PTRTYPE(PPDMDEVINS) pDevInstances;
949 /** List of registered USB devices. (FIFO) */
950 R3PTRTYPE(PPDMUSB) pUsbDevs;
951 /** List of USB devices instances. (FIFO) */
952 R3PTRTYPE(PPDMUSBINS) pUsbInstances;
953 /** List of registered drivers. (FIFO) */
954 R3PTRTYPE(PPDMDRV) pDrvs;
955 /** PCI Buses. */
956 PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];
957 /** The register PIC device. */
958 PDMPIC Pic;
959 /** The registerd APIC device. */
960 PDMAPIC Apic;
961 /** The registerd I/O APIC device. */
962 PDMIOAPIC IoApic;
963 /** The registered DMAC device. */
964 R3PTRTYPE(PPDMDMAC) pDmac;
965 /** The registered RTC device. */
966 R3PTRTYPE(PPDMRTC) pRtc;
967 /** The registered USB HUBs. (FIFO) */
968 R3PTRTYPE(PPDMUSBHUB) pUsbHubs;
969
970 /** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */
971 R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;
972 /** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */
973 R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;
974 /** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */
975 RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;
976 /** Pointer to the queue which should be manually flushed - RC Ptr.
977 * Only touched by EMT. */
978 RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;
979 /** Pointer to the queue which should be manually flushed - R0 Ptr.
980 * Only touched by EMT. */
981 R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;
982 /** Bitmask controlling the queue flushing.
983 * See PDM_QUEUE_FLUSH_FLAG_ACTIVE and PDM_QUEUE_FLUSH_FLAG_PENDING. */
984 uint32_t volatile fQueueFlushing;
985 /** Alignment padding. */
986 uint32_t u32Padding2;
987
988 /** @name VMM device heap
989 * @{ */
990 /** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */
991 RTR3PTR pvVMMDevHeap;
992 /** The heap size. */
993 uint32_t cbVMMDevHeap;
994 /** Free space. */
995 uint32_t cbVMMDevHeapLeft;
996 /** The current mapping. NIL_RTGCPHYS if not mapped or registered. */
997 RTGCPHYS GCPhysVMMDevHeap;
998 /** @} */
999
1000 /** The PDM lock.
1001 * This is used to protect everything that deals with interrupts, i.e.
1002 * the PIC, APIC, IOAPIC and PCI devices pluss some PDM functions. */
1003 PDMCRITSECT CritSect;
1004
1005 /** Number of times a critical section leave requesed needed to be queued for ring-3 execution. */
1006 STAMCOUNTER StatQueuedCritSectLeaves;
1007} PDM;
1008AssertCompileMemberAlignment(PDM, GCPhysVMMDevHeap, sizeof(RTGCPHYS));
1009AssertCompileMemberAlignment(PDM, CritSect, 8);
1010AssertCompileMemberAlignment(PDM, StatQueuedCritSectLeaves, 8);
1011/** Pointer to PDM VM instance data. */
1012typedef PDM *PPDM;
1013
1014
1015
1016/**
1017 * PDM data kept in the UVM.
1018 */
1019typedef struct PDMUSERPERVM
1020{
1021 /** @todo move more stuff over here. */
1022
1023 /** Linked list of timer driven PDM queues. */
1024 R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;
1025 /** Linked list of force action driven PDM queues. */
1026 R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;
1027
1028 /** Head of the PDM Thread list. (singly linked) */
1029 R3PTRTYPE(PPDMTHREAD) pThreads;
1030 /** Tail of the PDM Thread list. (singly linked) */
1031 R3PTRTYPE(PPDMTHREAD) pThreadsTail;
1032
1033 /** Lock protecting the lists below it. */
1034 RTCRITSECT ListCritSect;
1035 /** Pointer to list of loaded modules. */
1036 PPDMMOD pModules;
1037 /** List of initialized critical sections. (LIFO) */
1038 R3PTRTYPE(PPDMCRITSECTINT) pCritSects;
1039
1040 /** @name PDM Async Completion
1041 * @{ */
1042 /** Pointer to the array of supported endpoint classes. */
1043 PPDMASYNCCOMPLETIONEPCLASS apAsyncCompletionEndpointClass[PDMASYNCCOMPLETIONEPCLASSTYPE_MAX];
1044 /** Head of the templates. Singly linked, protected by ListCritSect. */
1045 R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;
1046 /** @} */
1047
1048} PDMUSERPERVM;
1049/** Pointer to the PDM data kept in the UVM. */
1050typedef PDMUSERPERVM *PPDMUSERPERVM;
1051
1052
1053
1054/*******************************************************************************
1055* Global Variables *
1056*******************************************************************************/
1057#ifdef IN_RING3
1058extern const PDMDRVHLPR3 g_pdmR3DrvHlp;
1059extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;
1060extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;
1061extern const PDMPICHLPR3 g_pdmR3DevPicHlp;
1062extern const PDMAPICHLPR3 g_pdmR3DevApicHlp;
1063extern const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp;
1064extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;
1065extern const PDMDMACHLP g_pdmR3DevDmacHlp;
1066extern const PDMRTCHLP g_pdmR3DevRtcHlp;
1067extern const PDMHPETHLPR3 g_pdmR3DevHpetHlp;
1068#endif
1069
1070
1071/*******************************************************************************
1072* Defined Constants And Macros *
1073*******************************************************************************/
1074/** @def PDMDEV_ASSERT_DEVINS
1075 * Asserts the validity of the device instance.
1076 */
1077#ifdef VBOX_STRICT
1078# define PDMDEV_ASSERT_DEVINS(pDevIns) \
1079 do { \
1080 AssertPtr(pDevIns); \
1081 Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
1082 Assert(pDevIns->CTX_SUFF(pvInstanceData) == (void *)&pDevIns->achInstanceData[0]); \
1083 } while (0)
1084#else
1085# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
1086#endif
1087
1088/** @def PDMDRV_ASSERT_DRVINS
1089 * Asserts the validity of the driver instance.
1090 */
1091#ifdef VBOX_STRICT
1092# define PDMDRV_ASSERT_DRVINS(pDrvIns) \
1093 do { \
1094 AssertPtr(pDrvIns); \
1095 Assert(pDrvIns->u32Version == PDM_DRVINS_VERSION); \
1096 Assert(pDrvIns->CTX_SUFF(pvInstanceData) == (void *)&pDrvIns->achInstanceData[0]); \
1097 } while (0)
1098#else
1099# define PDMDRV_ASSERT_DRVINS(pDrvIns) do { } while (0)
1100#endif
1101
1102
1103/*******************************************************************************
1104* Internal Functions *
1105*******************************************************************************/
1106#ifdef IN_RING3
1107int pdmR3CritSectInitStats(PVM pVM);
1108void pdmR3CritSectRelocate(PVM pVM);
1109int pdmR3CritSectInitDevice(PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, va_list va);
1110int pdmR3CritSectDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
1111int pdmR3CritSectInitDriver(PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...);
1112int pdmR3CritSectDeleteDriver(PVM pVM, PPDMDRVINS pDrvIns);
1113
1114int pdmR3DevInit(PVM pVM);
1115PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
1116int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1117DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
1118
1119int pdmR3UsbLoadModules(PVM pVM);
1120int pdmR3UsbInstantiateDevices(PVM pVM);
1121PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);
1122int pdmR3UsbFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1123int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);
1124int pdmR3UsbVMInitComplete(PVM pVM);
1125
1126int pdmR3DrvInit(PVM pVM);
1127int pdmR3DrvInstantiate(PVM pVM, PCFGMNODE pNode, PPDMIBASE pBaseInterface, PPDMDRVINS pDrvAbove,
1128 PPDMLUN pLun, PPDMIBASE *ppBaseInterface);
1129int pdmR3DrvDetach(PPDMDRVINS pDrvIns, uint32_t fFlags);
1130void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns, uint32_t fFlags);
1131PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
1132
1133int pdmR3LdrInitU(PUVM pUVM);
1134void pdmR3LdrTermU(PUVM pUVM);
1135char * pdmR3FileR3(const char *pszFile, bool fShared = false);
1136int pdmR3LoadR3U(PUVM pUVM, const char *pszFilename, const char *pszName);
1137
1138void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
1139
1140int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1141 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1142int pdmR3ThreadCreateUsb(PVM pVM, PPDMDRVINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,
1143 PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1144int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,
1145 PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1146int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1147int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1148int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1149void pdmR3ThreadDestroyAll(PVM pVM);
1150int pdmR3ThreadResumeAll(PVM pVM);
1151int pdmR3ThreadSuspendAll(PVM pVM);
1152
1153#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
1154int pdmR3AsyncCompletionInit(PVM pVM);
1155int pdmR3AsyncCompletionTerm(PVM pVM);
1156#endif
1157
1158#endif /* IN_RING3 */
1159
1160void pdmLock(PVM pVM);
1161int pdmLockEx(PVM pVM, int rc);
1162void pdmUnlock(PVM pVM);
1163
1164/** @} */
1165
1166RT_C_DECLS_END
1167
1168#endif
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