VirtualBox

source: vbox/trunk/src/VBox/Devices/Storage/DevLsiLogicSCSI.h@ 25587

最後變更 在這個檔案從25587是 25587,由 vboxsync 提交於 15 年 前

LsiLogic: Updates for the SAS controller emulation
  • 屬性 svn:eol-style 設為 native
  • 屬性 svn:keywords 設為 Author Date Id Revision
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1/* $Id: DevLsiLogicSCSI.h 25587 2009-12-28 15:17:58Z vboxsync $ */
2/** @file
3 * VBox storage devices: LsiLogic LSI53c1030 SCSI controller - Defines and structures.
4 */
5
6/*
7 * Copyright (C) 2006-2009 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.alldomusa.eu.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21#ifndef __DEVLSILOGICSCSI_H__
22#define __DEVLSILOGICSCSI_H__
23
24#include <iprt/stdint.h>
25
26/*
27 * I/O port registered in the ISA compatible range to let the BIOS access
28 * the controller.
29 */
30#define LSILOGIC_ISA_IO_PORT 0x340
31
32#define LSILOGICSCSI_REQUEST_QUEUE_DEPTH_DEFAULT 1024
33#define LSILOGICSCSI_REPLY_QUEUE_DEPTH_DEFAULT 128
34
35#define LSILOGICSCSI_MAXIMUM_CHAIN_DEPTH 3
36
37#define LSILOGIC_NR_OF_ALLOWED_BIGGER_LISTS 100
38
39/** Equal for all devices */
40#define LSILOGICSCSI_PCI_VENDOR_ID (0x1000)
41
42/** SPI SCSI controller (LSI53C1030) */
43#define LSILOGICSCSI_PCI_SPI_CTRLNAME "LSI53C1030"
44#define LSILOGICSCSI_PCI_SPI_DEVICE_ID (0x0030)
45#define LSILOGICSCSI_PCI_SPI_REVISION_ID (0x00)
46#define LSILOGICSCSI_PCI_SPI_CLASS_CODE (0x01)
47#define LSILOGICSCSI_PCI_SPI_SUBSYSTEM_VENDOR_ID (0x1000)
48#define LSILOGICSCSI_PCI_SPI_SUBSYSTEM_ID (0x8000)
49#define LSILOGICSCSI_PCI_SPI_PORTS_MAX 1
50#define LSILOGICSCSI_PCI_SPI_BUSES_MAX 1
51#define LSILOGICSCSI_PCI_SPI_DEVICES_PER_BUS_MAX 16
52#define LSILOGICSCSI_PCI_SPI_DEVICES_MAX (LSILOGICSCSI_PCI_SPI_BUSES_MAX*LSILOGICSCSI_PCI_SPI_DEVICES_PER_BUS_MAX)
53
54/** SAS SCSI controller (SAS1068 PCI-X Fusion-MPT SAS) */
55#define LSILOGICSCSI_PCI_SAS_CTRLNAME "SAS1068"
56#define LSILOGICSCSI_PCI_SAS_DEVICE_ID (0x0054)
57#define LSILOGICSCSI_PCI_SAS_REVISION_ID (0x00)
58#define LSILOGICSCSI_PCI_SAS_CLASS_CODE (0x00)
59#define LSILOGICSCSI_PCI_SAS_SUBSYSTEM_VENDOR_ID (0x1000)
60#define LSILOGICSCSI_PCI_SAS_SUBSYSTEM_ID (0x8000)
61#define LSILOGICSCSI_PCI_SAS_PORTS_MAX 8
62#define LSILOGICSCSI_PCI_SAS_DEVICES_PER_PORT_MAX 1
63#define LSILOGICSCSI_PCI_SAS_DEVICES_MAX (LSILOGICSCSI_PCI_SAS_PORTS_MAX * LSILOGICSCSI_PCI_SAS_DEVICES_PER_PORT_MAX)
64
65/** Maximum number of devices for both types */
66#define LSILOGIC_DEVICES_MAX LSILOGICSCSI_PCI_SPI_DEVICES_MAX
67
68/**
69 * A SAS address.
70 */
71#pragma pack(1)
72typedef union SASADDRESS
73{
74 /** 64bit view. */
75 uint64_t u64Address;
76 /** 32bit view. */
77 uint32_t u32Address[2];
78 /** 16bit view. */
79 uint16_t u16Address[4];
80 /** Byte view. */
81 uint8_t u8Address[8];
82} SASADDRESS, *PSASADDRESS;
83#pragma pack()
84AssertCompileSize(SASADDRESS, 8);
85
86/**
87 * Possible device types we support.
88 */
89typedef enum LSILOGICCTRLTYPE
90{
91 /** SPI SCSI controller (PCI dev id 0x0030) */
92 LSILOGICCTRLTYPE_SCSI_SPI = 0,
93 /** SAS SCSI controller (PCI dev id 0x0054) */
94 LSILOGICCTRLTYPE_SCSI_SAS = 1,
95 /** 32bit hack */
96 LSILOGICCTRLTYPE_32BIT_HACK = 0x7fffffff
97} LSILOGICCTRLTYPE, *PLSILOGICCTRLTYPE;
98
99/**
100 * A simple SG element for a 64bit adress.
101 */
102#pragma pack(1)
103typedef struct MptSGEntrySimple64
104{
105 /** Length of the buffer this entry describes. */
106 unsigned u24Length: 24;
107 /** Flag whether this element is the end of the list. */
108 unsigned fEndOfList: 1;
109 /** Flag whether the address is 32bit or 64bits wide. */
110 unsigned f64BitAddress: 1;
111 /** Flag whether this buffer contains data to be transfered or is the destination. */
112 unsigned fBufferContainsData: 1;
113 /** Flag whether this is a local address or a system address. */
114 unsigned fLocalAddress: 1;
115 /** Element type. */
116 unsigned u2ElementType: 2;
117 /** Flag whether this is the last element of the buffer. */
118 unsigned fEndOfBuffer: 1;
119 /** Flag whether this is the last element of the current segment. */
120 unsigned fLastElement: 1;
121 /** Lower 32bits of the address of the data buffer. */
122 unsigned u32DataBufferAddressLow: 32;
123 /** Upper 32bits of the address of the data buffer. */
124 unsigned u32DataBufferAddressHigh: 32;
125} MptSGEntrySimple64, *PMptSGEntrySimple64;
126#pragma pack()
127AssertCompileSize(MptSGEntrySimple64, 12);
128
129/**
130 * A simple SG element for a 32bit adress.
131 */
132#pragma pack(1)
133typedef struct MptSGEntrySimple32
134{
135 /** Length of the buffer this entry describes. */
136 unsigned u24Length: 24;
137 /** Flag whether this element is the end of the list. */
138 unsigned fEndOfList: 1;
139 /** Flag whether the address is 32bit or 64bits wide. */
140 unsigned f64BitAddress: 1;
141 /** Flag whether this buffer contains data to be transfered or is the destination. */
142 unsigned fBufferContainsData: 1;
143 /** Flag whether this is a local address or a system address. */
144 unsigned fLocalAddress: 1;
145 /** Element type. */
146 unsigned u2ElementType: 2;
147 /** Flag whether this is the last element of the buffer. */
148 unsigned fEndOfBuffer: 1;
149 /** Flag whether this is the last element of the current segment. */
150 unsigned fLastElement: 1;
151 /** Lower 32bits of the address of the data buffer. */
152 unsigned u32DataBufferAddressLow: 32;
153} MptSGEntrySimple32, *PMptSGEntrySimple32;
154#pragma pack()
155AssertCompileSize(MptSGEntrySimple32, 8);
156
157/**
158 * A chain SG element.
159 */
160#pragma pack(1)
161typedef struct MptSGEntryChain
162{
163 /** Size of the segment. */
164 unsigned u16Length: 16;
165 /** Offset in 32bit words of the next chain element in the segment
166 * identified by this element. */
167 unsigned u8NextChainOffset: 8;
168 /** Reserved. */
169 unsigned fReserved0: 1;
170 /** Flag whether the address is 32bit or 64bits wide. */
171 unsigned f64BitAddress: 1;
172 /** Reserved. */
173 unsigned fReserved1: 1;
174 /** Flag whether this is a local address or a system address. */
175 unsigned fLocalAddress: 1;
176 /** Element type. */
177 unsigned u2ElementType: 2;
178 /** Flag whether this is the last element of the buffer. */
179 unsigned u2Reserved2: 2;
180 /** Lower 32bits of the address of the data buffer. */
181 unsigned u32SegmentAddressLow: 32;
182 /** Upper 32bits of the address of the data buffer. */
183 unsigned u32SegmentAddressHigh: 32;
184} MptSGEntryChain, *PMptSGEntryChain;
185#pragma pack()
186AssertCompileSize(MptSGEntryChain, 12);
187
188typedef union MptSGEntryUnion
189{
190 MptSGEntrySimple64 Simple64;
191 MptSGEntrySimple32 Simple32;
192 MptSGEntryChain Chain;
193} MptSGEntryUnion, *PMptSGEntryUnion;
194
195/**
196 * MPT Fusion message header - Common for all message frames.
197 * This is filled in by the guest.
198 */
199#pragma pack(1)
200typedef struct MptMessageHdr
201{
202 /** Function dependent data. */
203 uint16_t u16FunctionDependent;
204 /** Chain offset. */
205 uint8_t u8ChainOffset;
206 /** The function code. */
207 uint8_t u8Function;
208 /** Function dependent data. */
209 uint8_t au8FunctionDependent[3];
210 /** Message flags. */
211 uint8_t u8MessageFlags;
212 /** Message context - Unique ID from the guest unmodified by the device. */
213 uint32_t u32MessageContext;
214} MptMessageHdr, *PMptMessageHdr;
215#pragma pack()
216AssertCompileSize(MptMessageHdr, 12);
217
218/** Defined function codes found in the message header. */
219#define MPT_MESSAGE_HDR_FUNCTION_SCSI_IO_REQUEST (0x00)
220#define MPT_MESSAGE_HDR_FUNCTION_SCSI_TASK_MGMT (0x01)
221#define MPT_MESSAGE_HDR_FUNCTION_IOC_INIT (0x02)
222#define MPT_MESSAGE_HDR_FUNCTION_IOC_FACTS (0x03)
223#define MPT_MESSAGE_HDR_FUNCTION_CONFIG (0x04)
224#define MPT_MESSAGE_HDR_FUNCTION_PORT_FACTS (0x05)
225#define MPT_MESSAGE_HDR_FUNCTION_PORT_ENABLE (0x06)
226#define MPT_MESSAGE_HDR_FUNCTION_EVENT_NOTIFICATION (0x07)
227#define MPT_MESSAGE_HDR_FUNCTION_EVENT_ACK (0x08)
228#define MPT_MESSAGE_HDR_FUNCTION_FW_DOWNLOAD (0x09)
229#define MPT_MESSAGE_HDR_FUNCTION_TARGET_CMD_BUFFER_POST (0x0A)
230#define MPT_MESSAGE_HDR_FUNCTION_TARGET_ASSIST (0x0B)
231#define MPT_MESSAGE_HDR_FUNCTION_TARGET_STATUS_SEND (0x0C)
232#define MPT_MESSAGE_HDR_FUNCTION_TARGET_MODE_ABORT (0x0D)
233
234#ifdef DEBUG
235/**
236 * Function names
237 */
238static const char * const g_apszMPTFunctionNames[] =
239{
240 "SCSI I/O Request",
241 "SCSI Task Management",
242 "IOC Init",
243 "IOC Facts",
244 "Config",
245 "Port Facts",
246 "Port Enable",
247 "Event Notification",
248 "Event Ack",
249 "Firmware Download"
250};
251#endif
252
253/**
254 * Default reply message.
255 * Send from the device to the guest upon completion of a request.
256 */
257 #pragma pack(1)
258typedef struct MptDefaultReplyMessage
259{
260 /** Function dependent data. */
261 uint16_t u16FunctionDependent;
262 /** Length of the message in 32bit DWords. */
263 uint8_t u8MessageLength;
264 /** Function which completed. */
265 uint8_t u8Function;
266 /** Function dependent. */
267 uint8_t au8FunctionDependent[3];
268 /** Message flags. */
269 uint8_t u8MessageFlags;
270 /** Message context given in the request. */
271 uint32_t u32MessageContext;
272 /** Function dependent status code. */
273 uint16_t u16FunctionDependentStatus;
274 /** Status of the IOC. */
275 uint16_t u16IOCStatus;
276 /** Additional log info. */
277 uint32_t u32IOCLogInfo;
278} MptDefaultReplyMessage, *PMptDefaultReplyMessage;
279#pragma pack()
280AssertCompileSize(MptDefaultReplyMessage, 20);
281
282/**
283 * IO controller init request.
284 */
285#pragma pack(1)
286typedef struct MptIOCInitRequest
287{
288 /** Which system send this init request. */
289 uint8_t u8WhoInit;
290 /** Reserved */
291 uint8_t u8Reserved;
292 /** Chain offset in the SG list. */
293 uint8_t u8ChainOffset;
294 /** Function to execute. */
295 uint8_t u8Function;
296 /** Flags */
297 uint8_t u8Flags;
298 /** Maximum number of devices the driver can handle. */
299 uint8_t u8MaxDevices;
300 /** Maximum number of buses the driver can handle. */
301 uint8_t u8MaxBuses;
302 /** Message flags. */
303 uint8_t u8MessageFlags;
304 /** Message context ID. */
305 uint32_t u32MessageContext;
306 /** Reply frame size. */
307 uint16_t u16ReplyFrameSize;
308 /** Reserved */
309 uint16_t u16Reserved;
310 /** Upper 32bit part of the 64bit address the message frames are in.
311 * That means all frames must be in the same 4GB segment. */
312 uint32_t u32HostMfaHighAddr;
313 /** Upper 32bit of the sense buffer. */
314 uint32_t u32SenseBufferHighAddr;
315} MptIOCInitRequest, *PMptIOCInitRequest;
316#pragma pack()
317AssertCompileSize(MptIOCInitRequest, 24);
318
319/**
320 * IO controller init reply.
321 */
322#pragma pack(1)
323typedef struct MptIOCInitReply
324{
325 /** Which subsystem send this init request. */
326 uint8_t u8WhoInit;
327 /** Reserved */
328 uint8_t u8Reserved;
329 /** Message length */
330 uint8_t u8MessageLength;
331 /** Function. */
332 uint8_t u8Function;
333 /** Flags */
334 uint8_t u8Flags;
335 /** Maximum number of devices the driver can handle. */
336 uint8_t u8MaxDevices;
337 /** Maximum number of busses the driver can handle. */
338 uint8_t u8MaxBuses;
339 /** Message flags. */
340 uint8_t u8MessageFlags;
341 /** Message context ID */
342 uint32_t u32MessageContext;
343 /** Reserved */
344 uint16_t u16Reserved;
345 /** IO controller status. */
346 uint16_t u16IOCStatus;
347 /** IO controller log information. */
348 uint32_t u32IOCLogInfo;
349} MptIOCInitReply, *PMptIOCInitReply;
350#pragma pack()
351AssertCompileSize(MptIOCInitReply, 20);
352
353/**
354 * IO controller facts request.
355 */
356#pragma pack(1)
357typedef struct MptIOCFactsRequest
358{
359 /** Reserved. */
360 uint16_t u16Reserved;
361 /** Chain offset in SG list. */
362 uint8_t u8ChainOffset;
363 /** Function number. */
364 uint8_t u8Function;
365 /** Reserved */
366 uint8_t u8Reserved[3];
367 /** Message flags. */
368 uint8_t u8MessageFlags;
369 /** Message context ID. */
370 uint32_t u32MessageContext;
371} MptIOCFactsRequest, *PMptIOCFactsRequest;
372#pragma pack()
373AssertCompileSize(MptIOCFactsRequest, 12);
374
375/**
376 * IO controller facts reply.
377 */
378#pragma pack(1)
379typedef struct MptIOCFactsReply
380{
381 /** Message version. */
382 uint16_t u16MessageVersion;
383 /** Message length. */
384 uint8_t u8MessageLength;
385 /** Function number. */
386 uint8_t u8Function;
387 /** Reserved */
388 uint16_t u16Reserved1;
389 /** IO controller number */
390 uint8_t u8IOCNumber;
391 /** Message flags. */
392 uint8_t u8MessageFlags;
393 /** Message context ID. */
394 uint32_t u32MessageContext;
395 /** IO controller exceptions */
396 uint16_t u16IOCExceptions;
397 /** IO controller status. */
398 uint16_t u16IOCStatus;
399 /** IO controller log information. */
400 uint32_t u32IOCLogInfo;
401 /** Maximum chain depth. */
402 uint8_t u8MaxChainDepth;
403 /** The current value of the WhoInit field. */
404 uint8_t u8WhoInit;
405 /** Block size. */
406 uint8_t u8BlockSize;
407 /** Flags. */
408 uint8_t u8Flags;
409 /** Depth of the reply queue. */
410 uint16_t u16ReplyQueueDepth;
411 /** Size of a request frame. */
412 uint16_t u16RequestFrameSize;
413 /** Reserved */
414 uint16_t u16Reserved2;
415 /** Product ID. */
416 uint16_t u16ProductID;
417 /** Current value of the high 32bit MFA address. */
418 uint32_t u32CurrentHostMFAHighAddr;
419 /** Global credits - Number of entries allocated to queues */
420 uint16_t u16GlobalCredits;
421 /** Number of ports on the IO controller */
422 uint8_t u8NumberOfPorts;
423 /** Event state. */
424 uint8_t u8EventState;
425 /** Current value of the high 32bit sense buffer address. */
426 uint32_t u32CurrentSenseBufferHighAddr;
427 /** Current reply frame size. */
428 uint16_t u16CurReplyFrameSize;
429 /** Maximum number of devices. */
430 uint8_t u8MaxDevices;
431 /** Maximum number of buses. */
432 uint8_t u8MaxBuses;
433 /** Size of the firmware image. */
434 uint32_t u32FwImageSize;
435 /** Reserved. */
436 uint32_t u32Reserved;
437 /** Firmware version */
438 uint32_t u32FWVersion;
439} MptIOCFactsReply, *PMptIOCFactsReply;
440#pragma pack()
441AssertCompileSize(MptIOCFactsReply, 60);
442
443/**
444 * Port facts request
445 */
446#pragma pack(1)
447typedef struct MptPortFactsRequest
448{
449 /** Reserved */
450 uint16_t u16Reserved1;
451 /** Message length. */
452 uint8_t u8MessageLength;
453 /** Function number. */
454 uint8_t u8Function;
455 /** Reserved */
456 uint16_t u16Reserved2;
457 /** Port number to get facts for. */
458 uint8_t u8PortNumber;
459 /** Message flags. */
460 uint8_t u8MessageFlags;
461 /** Message context ID. */
462 uint32_t u32MessageContext;
463} MptPortFactsRequest, *PMptPortFactsRequest;
464#pragma pack()
465AssertCompileSize(MptPortFactsRequest, 12);
466
467/**
468 * Port facts reply.
469 */
470#pragma pack(1)
471typedef struct MptPortFactsReply
472{
473 /** Reserved. */
474 uint16_t u16Reserved1;
475 /** Message length. */
476 uint8_t u8MessageLength;
477 /** Function number. */
478 uint8_t u8Function;
479 /** Reserved */
480 uint16_t u16Reserved2;
481 /** Port number the facts are for. */
482 uint8_t u8PortNumber;
483 /** Message flags. */
484 uint8_t u8MessageFlags;
485 /** Message context ID. */
486 uint32_t u32MessageContext;
487 /** Reserved. */
488 uint16_t u16Reserved3;
489 /** IO controller status. */
490 uint16_t u16IOCStatus;
491 /** IO controller log information. */
492 uint32_t u32IOCLogInfo;
493 /** Reserved */
494 uint8_t u8Reserved;
495 /** Port type */
496 uint8_t u8PortType;
497 /** Maximum number of devices on this port. */
498 uint16_t u16MaxDevices;
499 /** SCSI ID of this port on the attached bus. */
500 uint16_t u16PortSCSIID;
501 /** Protocol flags. */
502 uint16_t u16ProtocolFlags;
503 /** Maxmimum number of target command buffers which can be posted to this port at a time. */
504 uint16_t u16MaxPostedCmdBuffers;
505 /** Maximum number of target IDs that remain persistent between power/reset cycles. */
506 uint16_t u16MaxPersistentIDs;
507 /** Maximum number of LAN buckets. */
508 uint16_t u16MaxLANBuckets;
509 /** Reserved. */
510 uint16_t u16Reserved4;
511 /** Reserved. */
512 uint32_t u32Reserved;
513} MptPortFactsReply, *PMptPortFactsReply;
514#pragma pack()
515AssertCompileSize(MptPortFactsReply, 40);
516
517/**
518 * Port Enable request.
519 */
520#pragma pack(1)
521typedef struct MptPortEnableRequest
522{
523 /** Reserved. */
524 uint16_t u16Reserved1;
525 /** Message length. */
526 uint8_t u8MessageLength;
527 /** Function number. */
528 uint8_t u8Function;
529 /** Reserved. */
530 uint16_t u16Reserved2;
531 /** Port number to enable. */
532 uint8_t u8PortNumber;
533 /** Message flags. */
534 uint8_t u8MessageFlags;
535 /** Message context ID. */
536 uint32_t u32MessageContext;
537} MptPortEnableRequest, *PMptPortEnableRequest;
538#pragma pack()
539AssertCompileSize(MptPortEnableRequest, 12);
540
541/**
542 * Port enable reply.
543 */
544#pragma pack(1)
545typedef struct MptPortEnableReply
546{
547 /** Reserved. */
548 uint16_t u16Reserved1;
549 /** Message length. */
550 uint8_t u8MessageLength;
551 /** Function number. */
552 uint8_t u8Function;
553 /** Reserved */
554 uint16_t u16Reserved2;
555 /** Port number which was enabled. */
556 uint8_t u8PortNumber;
557 /** Message flags. */
558 uint8_t u8MessageFlags;
559 /** Message context ID. */
560 uint32_t u32MessageContext;
561 /** Reserved. */
562 uint16_t u16Reserved3;
563 /** IO controller status */
564 uint16_t u16IOCStatus;
565 /** IO controller log information. */
566 uint32_t u32IOCLogInfo;
567} MptPortEnableReply, *PMptPortEnableReply;
568#pragma pack()
569AssertCompileSize(MptPortEnableReply, 20);
570
571/**
572 * Event notification request.
573 */
574#pragma pack(1)
575typedef struct MptEventNotificationRequest
576{
577 /** Switch - Turns event notification on and off. */
578 uint8_t u8Switch;
579 /** Reserved. */
580 uint8_t u8Reserved1;
581 /** Chain offset. */
582 uint8_t u8ChainOffset;
583 /** Function number. */
584 uint8_t u8Function;
585 /** Reserved. */
586 uint8_t u8reserved2[3];
587 /** Message flags. */
588 uint8_t u8MessageFlags;
589 /** Message context ID. */
590 uint32_t u32MessageContext;
591} MptEventNotificationRequest, *PMptEventNotificationRequest;
592#pragma pack()
593AssertCompileSize(MptEventNotificationRequest, 12);
594
595/**
596 * Event notification reply.
597 */
598#pragma pack(1)
599typedef struct MptEventNotificationReply
600{
601 /** Event data length. */
602 uint16_t u16EventDataLength;
603 /** Message length. */
604 uint8_t u8MessageLength;
605 /** Function number. */
606 uint8_t u8Function;
607 /** Reserved. */
608 uint16_t u16Reserved1;
609 /** Ack required. */
610 uint8_t u8AckRequired;
611 /** Message flags. */
612 uint8_t u8MessageFlags;
613 /** Message context ID. */
614 uint32_t u32MessageContext;
615 /** Reserved. */
616 uint16_t u16Reserved2;
617 /** IO controller status. */
618 uint16_t u16IOCStatus;
619 /** IO controller log information. */
620 uint32_t u32IOCLogInfo;
621 /** Notification event. */
622 uint32_t u32Event;
623 /** Event context. */
624 uint32_t u32EventContext;
625 /** Event data. */
626 uint32_t u32EventData;
627} MptEventNotificationReply, *PMptEventNotificationReply;
628#pragma pack()
629AssertCompileSize(MptEventNotificationReply, 32);
630
631#define MPT_EVENT_EVENT_CHANGE (0x0000000a)
632
633/**
634 * SCSI IO Request
635 */
636#pragma pack(1)
637typedef struct MptSCSIIORequest
638{
639 /** Target ID */
640 uint8_t u8TargetID;
641 /** Bus number */
642 uint8_t u8Bus;
643 /** Chain offset */
644 uint8_t u8ChainOffset;
645 /** Function number. */
646 uint8_t u8Function;
647 /** CDB length. */
648 uint8_t u8CDBLength;
649 /** Sense buffer length. */
650 uint8_t u8SenseBufferLength;
651 /** Rserved */
652 uint8_t u8Reserved;
653 /** Message flags. */
654 uint8_t u8MessageFlags;
655 /** Message context ID. */
656 uint32_t u32MessageContext;
657 /** LUN */
658 uint8_t au8LUN[8];
659 /** Control values. */
660 uint32_t u32Control;
661 /** The CDB. */
662 uint8_t au8CDB[16];
663 /** Data length. */
664 uint32_t u32DataLength;
665 /** Sense buffer low 32bit address. */
666 uint32_t u32SenseBufferLowAddress;
667} MptSCSIIORequest, *PMptSCSIIORequest;
668#pragma pack()
669AssertCompileSize(MptSCSIIORequest, 48);
670
671#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_GET(x) (((x) & 0x3000000) >> 24)
672#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_NONE (0x0)
673#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_WRITE (0x1)
674#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_READ (0x2)
675
676/**
677 * SCSI IO error reply.
678 */
679#pragma pack(1)
680typedef struct MptSCSIIOErrorReply
681{
682 /** Target ID */
683 uint8_t u8TargetID;
684 /** Bus number */
685 uint8_t u8Bus;
686 /** Message length. */
687 uint8_t u8MessageLength;
688 /** Function number. */
689 uint8_t u8Function;
690 /** CDB length */
691 uint8_t u8CDBLength;
692 /** Sense buffer length */
693 uint8_t u8SenseBufferLength;
694 /** Reserved */
695 uint8_t u8Reserved;
696 /** Message flags */
697 uint8_t u8MessageFlags;
698 /** Message context ID */
699 uint32_t u32MessageContext;
700 /** SCSI status. */
701 uint8_t u8SCSIStatus;
702 /** SCSI state */
703 uint8_t u8SCSIState;
704 /** IO controller status */
705 uint16_t u16IOCStatus;
706 /** IO controller log information */
707 uint32_t u32IOCLogInfo;
708 /** Transfer count */
709 uint32_t u32TransferCount;
710 /** Sense count */
711 uint32_t u32SenseCount;
712 /** Response information */
713 uint32_t u32ResponseInfo;
714} MptSCSIIOErrorReply, *PMptSCSIIOErrorReply;
715#pragma pack()
716AssertCompileSize(MptSCSIIOErrorReply, 32);
717
718#define MPT_SCSI_IO_ERROR_SCSI_STATE_AUTOSENSE_VALID (0x01)
719#define MPT_SCSI_IO_ERROR_SCSI_STATE_TERMINATED (0x08)
720
721/**
722 * IOC status codes sepcific to the SCSI I/O error reply.
723 */
724#define MPT_SCSI_IO_ERROR_IOCSTATUS_INVALID_BUS (0x0041)
725#define MPT_SCSI_IO_ERROR_IOCSTATUS_INVALID_TARGETID (0x0042)
726#define MPT_SCSI_IO_ERROR_IOCSTATUS_DEVICE_NOT_THERE (0x0043)
727
728/**
729 * SCSI task management request.
730 */
731#pragma pack(1)
732typedef struct MptSCSITaskManagementRequest
733{
734 /** Target ID */
735 uint8_t u8TargetID;
736 /** Bus number */
737 uint8_t u8Bus;
738 /** Chain offset */
739 uint8_t u8ChainOffset;
740 /** Function number */
741 uint8_t u8Function;
742 /** Reserved */
743 uint8_t u8Reserved1;
744 /** Task type */
745 uint8_t u8TaskType;
746 /** Reserved */
747 uint8_t u8Reserved2;
748 /** Message flags */
749 uint8_t u8MessageFlags;
750 /** Message context ID */
751 uint32_t u32MessageContext;
752 /** LUN */
753 uint8_t au8LUN[8];
754 /** Reserved */
755 uint8_t auReserved[28];
756 /** Task message context ID. */
757 uint32_t u32TaskMessageContext;
758} MptSCSITaskManagementRequest, *PMptSCSITaskManagementRequest;
759#pragma pack()
760AssertCompileSize(MptSCSITaskManagementRequest, 52);
761
762/**
763 * SCSI task management reply.
764 */
765#pragma pack(1)
766typedef struct MptSCSITaskManagementReply
767{
768 /** Target ID */
769 uint8_t u8TargetID;
770 /** Bus number */
771 uint8_t u8Bus;
772 /** Message length */
773 uint8_t u8MessageLength;
774 /** Function number */
775 uint8_t u8Function;
776 /** Reserved */
777 uint8_t u8Reserved1;
778 /** Task type */
779 uint8_t u8TaskType;
780 /** Reserved */
781 uint8_t u8Reserved2;
782 /** Message flags */
783 uint8_t u8MessageFlags;
784 /** Message context ID */
785 uint32_t u32MessageContext;
786 /** Reserved */
787 uint16_t u16Reserved;
788 /** IO controller status */
789 uint16_t u16IOCStatus;
790 /** IO controller log information */
791 uint32_t u32IOCLogInfo;
792 /** Termination count */
793 uint32_t u32TerminationCount;
794} MptSCSITaskManagementReply, *PMptSCSITaskManagementReply;
795#pragma pack()
796AssertCompileSize(MptSCSITaskManagementReply, 24);
797
798/**
799 * Page address for SAS expander page types.
800 */
801#pragma pack(1)
802typedef union MptConfigurationPageAddressSASExpander
803{
804 struct
805 {
806 uint16_t u16Handle;
807 uint16_t u16Reserved;
808 } Form0And2;
809 struct
810 {
811 uint16_t u16Handle;
812 uint8_t u8PhyNum;
813 uint8_t u8Reserved;
814 } Form1;
815} MptConfigurationPageAddressSASExpander, *PMptConfigurationPageAddressSASExpander;
816#pragma pack()
817
818/**
819 * Page address for SAS device page types.
820 */
821#pragma pack(1)
822typedef union MptConfigurationPageAddressSASDevice
823{
824 struct
825 {
826 uint16_t u16Handle;
827 uint16_t u16Reserved;
828 } Form0And2;
829 struct
830 {
831 uint8_t u8TargetID;
832 uint8_t u8Bus;
833 uint8_t u8Reserved;
834 } Form1;
835} MptConfigurationPageAddressSASDevice, *PMptConfigurationPageAddressSASDevice;
836#pragma pack()
837
838/**
839 * Page address for SAS PHY page types.
840 */
841#pragma pack(1)
842typedef union MptConfigurationPageAddressSASPHY
843{
844 struct
845 {
846 uint8_t u8PhyNumber;
847 uint8_t u8Reserved[3];
848 } Form0;
849 struct
850 {
851 uint16_t u16Index;
852 uint16_t u16Reserved;
853 } Form1;
854} MptConfigurationPageAddressSASPHY, *PMptConfigurationPageAddressSASPHY;
855#pragma pack()
856
857/**
858 * Page address for SAS Enclosure page types.
859 */
860#pragma pack(1)
861typedef struct MptConfigurationPageAddressSASEnclosure
862{
863 uint16_t u16Handle;
864 uint16_t u16Reserved;
865} MptConfigurationPageAddressSASEnclosure, *PMptConfigurationPageAddressSASEnclosure;
866#pragma pack()
867
868/**
869 * Union of all possible address types.
870 */
871#pragma pack(1)
872typedef union MptConfigurationPageAddress
873{
874 /** 32bit view. */
875 uint32_t u32PageAddress;
876 struct
877 {
878 /** Port number to get the configuration page for. */
879 uint8_t u8PortNumber;
880 /** Reserved. */
881 uint8_t u8Reserved[3];
882 } MPIPortNumber;
883 struct
884 {
885 /** Target ID to get the configuration page for. */
886 uint8_t u8TargetID;
887 /** Bus number to get the configuration page for. */
888 uint8_t u8Bus;
889 /** Reserved. */
890 uint8_t u8Reserved[2];
891 } BusAndTargetId;
892 MptConfigurationPageAddressSASExpander SASExpander;
893 MptConfigurationPageAddressSASDevice SASDevice;
894 MptConfigurationPageAddressSASPHY SASPHY;
895 MptConfigurationPageAddressSASEnclosure SASEnclosure;
896} MptConfigurationPageAddress, *PMptConfigurationPageAddress;
897#pragma pack()
898AssertCompileSize(MptConfigurationPageAddress, 4);
899
900#define MPT_CONFIGURATION_PAGE_ADDRESS_GET_SAS_FORM(x) (((x).u32PageAddress >> 28) & 0x0f)
901
902/**
903 * Configuration request
904 */
905#pragma pack(1)
906typedef struct MptConfigurationRequest
907{
908 /** Action code. */
909 uint8_t u8Action;
910 /** Reserved. */
911 uint8_t u8Reserved1;
912 /** Chain offset. */
913 uint8_t u8ChainOffset;
914 /** Function number. */
915 uint8_t u8Function;
916 /** Extended page length. */
917 uint16_t u16ExtPageLength;
918 /** Extended page type */
919 uint8_t u8ExtPageType;
920 /** Message flags. */
921 uint8_t u8MessageFlags;
922 /** Message context ID. */
923 uint32_t u32MessageContext;
924 /** Reserved. */
925 uint8_t u8Reserved2[8];
926 /** Version number of the page. */
927 uint8_t u8PageVersion;
928 /** Length of the page in 32bit Dwords. */
929 uint8_t u8PageLength;
930 /** Page number to access. */
931 uint8_t u8PageNumber;
932 /** Type of the page beeing accessed. */
933 uint8_t u8PageType;
934 /** Page type dependent address. */
935 MptConfigurationPageAddress PageAddress;
936 /** Simple SG element describing the buffer. */
937 MptSGEntrySimple64 SimpleSGElement;
938} MptConfigurationRequest, *PMptConfigurationRequest;
939#pragma pack()
940AssertCompileSize(MptConfigurationRequest, 40);
941
942/** Possible action codes. */
943#define MPT_CONFIGURATION_REQUEST_ACTION_HEADER (0x00)
944#define MPT_CONFIGURATION_REQUEST_ACTION_READ_CURRENT (0x01)
945#define MPT_CONFIGURATION_REQUEST_ACTION_WRITE_CURRENT (0x02)
946#define MPT_CONFIGURATION_REQUEST_ACTION_READ_DEFAULT (0x03)
947#define MPT_CONFIGURATION_REQUEST_ACTION_DEFAULT (0x04)
948#define MPT_CONFIGURATION_REQUEST_ACTION_READ_NVRAM (0x05)
949#define MPT_CONFIGURATION_REQUEST_ACTION_WRITE_NVRAM (0x06)
950
951/** Page type codes. */
952#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_IO_UNIT (0x00)
953#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_IOC (0x01)
954#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_BIOS (0x02)
955#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_SCSI_PORT (0x03)
956#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_EXTENDED (0x0F)
957
958/**
959 * Configuration reply.
960 */
961#pragma pack(1)
962typedef struct MptConfigurationReply
963{
964 /** Action code. */
965 uint8_t u8Action;
966 /** Reserved. */
967 uint8_t u8Reserved;
968 /** Message length. */
969 uint8_t u8MessageLength;
970 /** Function number. */
971 uint8_t u8Function;
972 /** Extended page length. */
973 uint16_t u16ExtPageLength;
974 /** Extended page type */
975 uint8_t u8ExtPageType;
976 /** Message flags. */
977 uint8_t u8MessageFlags;
978 /** Message context ID. */
979 uint32_t u32MessageContext;
980 /** Reserved. */
981 uint16_t u16Reserved;
982 /** I/O controller status. */
983 uint16_t u16IOCStatus;
984 /** I/O controller log information. */
985 uint32_t u32IOCLogInfo;
986 /** Version number of the page. */
987 uint8_t u8PageVersion;
988 /** Length of the page in 32bit Dwords. */
989 uint8_t u8PageLength;
990 /** Page number to access. */
991 uint8_t u8PageNumber;
992 /** Type of the page beeing accessed. */
993 uint8_t u8PageType;
994} MptConfigurationReply, *PMptConfigurationReply;
995#pragma pack()
996AssertCompileSize(MptConfigurationReply, 24);
997
998/** Additional I/O controller status codes for the configuration reply. */
999#define MPT_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
1000#define MPT_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
1001#define MPT_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
1002#define MPT_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
1003#define MPT_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
1004#define MPT_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
1005
1006/**
1007 * Union of all possible request messages.
1008 */
1009typedef union MptRequestUnion
1010{
1011 MptMessageHdr Header;
1012 MptIOCInitRequest IOCInit;
1013 MptIOCFactsRequest IOCFacts;
1014 MptPortFactsRequest PortFacts;
1015 MptPortEnableRequest PortEnable;
1016 MptEventNotificationRequest EventNotification;
1017 MptSCSIIORequest SCSIIO;
1018 MptSCSITaskManagementRequest SCSITaskManagement;
1019 MptConfigurationRequest Configuration;
1020} MptRequestUnion, *PMptRequestUnion;
1021
1022/**
1023 * Union of all possible reply messages.
1024 */
1025typedef union MptReplyUnion
1026{
1027 /** 16bit view. */
1028 uint16_t au16Reply[30];
1029 MptDefaultReplyMessage Header;
1030 MptIOCInitReply IOCInit;
1031 MptIOCFactsReply IOCFacts;
1032 MptPortFactsReply PortFacts;
1033 MptPortEnableReply PortEnable;
1034 MptEventNotificationReply EventNotification;
1035 MptSCSIIOErrorReply SCSIIOError;
1036 MptSCSITaskManagementReply SCSITaskManagement;
1037 MptConfigurationReply Configuration;
1038} MptReplyUnion, *PMptReplyUnion;
1039
1040
1041/**
1042 * Configuration Page attributes.
1043 */
1044#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY (0x00)
1045#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE (0x10)
1046#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT (0x20)
1047#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT_READONLY (0x30)
1048
1049#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_GET(u8PageType) ((u8PageType) & 0xf0)
1050
1051/**
1052 * Configuration Page types.
1053 */
1054#define MPT_CONFIGURATION_PAGE_TYPE_IO_UNIT (0x00)
1055#define MPT_CONFIGURATION_PAGE_TYPE_IOC (0x01)
1056#define MPT_CONFIGURATION_PAGE_TYPE_BIOS (0x02)
1057#define MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_PORT (0x03)
1058#define MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_DEVICE (0x04)
1059#define MPT_CONFIGURATION_PAGE_TYPE_MANUFACTURING (0x09)
1060#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED (0x0F)
1061
1062#define MPT_CONFIGURATION_PAGE_TYPE_GET(u8PageType) ((u8PageType) & 0x0f)
1063
1064/**
1065 * Extented page types.
1066 */
1067#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASIOUNIT (0x10)
1068#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASEXPANDER (0x11)
1069#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASDEVICE (0x12)
1070#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASPHYS (0x13)
1071#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_LOG (0x14)
1072#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_ENCLOSURE (0x15)
1073
1074/**
1075 * Configuration Page header - Common to all pages.
1076 */
1077#pragma pack(1)
1078typedef struct MptConfigurationPageHeader
1079{
1080 /** Version of the page. */
1081 uint8_t u8PageVersion;
1082 /** The length of the page in 32bit D-Words. */
1083 uint8_t u8PageLength;
1084 /** Number of the page. */
1085 uint8_t u8PageNumber;
1086 /** Type of the page. */
1087 uint8_t u8PageType;
1088} MptConfigurationPageHeader, *PMptConfigurationPageHeader;
1089#pragma pack()
1090AssertCompileSize(MptConfigurationPageHeader, 4);
1091
1092/**
1093 * Extended configuration page header - Common to all extended pages.
1094 */
1095#pragma pack(1)
1096typedef struct MptExtendedConfigurationPageHeader
1097{
1098 /** Version of the page. */
1099 uint8_t u8PageVersion;
1100 /** Reserved. */
1101 uint8_t u8Reserved1;
1102 /** Number of the page. */
1103 uint8_t u8PageNumber;
1104 /** Type of the page. */
1105 uint8_t u8PageType;
1106 /** Extended page length. */
1107 uint16_t u16ExtPageLength;
1108 /** Extended page type. */
1109 uint8_t u8ExtPageType;
1110 /** Reserved */
1111 uint8_t u8Reserved2;
1112} MptExtendedConfigurationPageHeader, *PMptExtendedConfigurationPageHeader;
1113#pragma pack()
1114AssertCompileSize(MptExtendedConfigurationPageHeader, 8);
1115
1116/**
1117 * Manufacturing page 0. - Readonly.
1118 */
1119#pragma pack(1)
1120typedef struct MptConfigurationPageManufacturing0
1121{
1122 /** Union. */
1123 union
1124 {
1125 /** Byte view. */
1126 uint8_t abPageData[76];
1127 /** Field view. */
1128 struct
1129 {
1130 /** The omnipresent header. */
1131 MptConfigurationPageHeader Header;
1132 /** Name of the chip. */
1133 uint8_t abChipName[16];
1134 /** Chip revision. */
1135 uint8_t abChipRevision[8];
1136 /** Board name. */
1137 uint8_t abBoardName[16];
1138 /** Board assembly. */
1139 uint8_t abBoardAssembly[16];
1140 /** Board tracer number. */
1141 uint8_t abBoardTracerNumber[16];
1142 } fields;
1143 } u;
1144} MptConfigurationPageManufacturing0, *PMptConfigurationPageManufacturing0;
1145#pragma pack()
1146AssertCompileSize(MptConfigurationPageManufacturing0, 76);
1147
1148/**
1149 * Manufacturing page 1. - Readonly Persistent.
1150 */
1151#pragma pack(1)
1152typedef struct MptConfigurationPageManufacturing1
1153{
1154 /** The omnipresent header. */
1155 MptConfigurationPageHeader Header;
1156 /** VPD info - don't know what belongs here so all zero. */
1157 uint8_t abVPDInfo[256];
1158} MptConfigurationPageManufacturing1, *PMptConfigurationPageManufacturing1;
1159#pragma pack()
1160AssertCompileSize(MptConfigurationPageManufacturing1, 260);
1161
1162/**
1163 * Manufacturing page 2. - Readonly.
1164 */
1165#pragma pack(1)
1166typedef struct MptConfigurationPageManufacturing2
1167{
1168 /** Union. */
1169 union
1170 {
1171 /** Byte view. */
1172 uint8_t abPageData[8];
1173 /** Field view. */
1174 struct
1175 {
1176 /** The omnipresent header. */
1177 MptConfigurationPageHeader Header;
1178 /** PCI Device ID. */
1179 uint16_t u16PCIDeviceID;
1180 /** PCI Revision ID. */
1181 uint8_t u8PCIRevisionID;
1182 /** Reserved. */
1183 uint8_t u8Reserved;
1184 /** Hardware specific settings... */
1185 } fields;
1186 } u;
1187} MptConfigurationPageManufacturing2, *PMptConfigurationPageManufacturing2;
1188#pragma pack()
1189AssertCompileSize(MptConfigurationPageManufacturing2, 8);
1190
1191/**
1192 * Manufacturing page 3. - Readonly.
1193 */
1194#pragma pack(1)
1195typedef struct MptConfigurationPageManufacturing3
1196{
1197 /** Union. */
1198 union
1199 {
1200 /** Byte view. */
1201 uint8_t abPageData[8];
1202 /** Field view. */
1203 struct
1204 {
1205 /** The omnipresent header. */
1206 MptConfigurationPageHeader Header;
1207 /** PCI Device ID. */
1208 uint16_t u16PCIDeviceID;
1209 /** PCI Revision ID. */
1210 uint8_t u8PCIRevisionID;
1211 /** Reserved. */
1212 uint8_t u8Reserved;
1213 /** Chip specific settings... */
1214 } fields;
1215 } u;
1216} MptConfigurationPageManufacturing3, *PMptConfigurationPageManufacturing3;
1217#pragma pack()
1218AssertCompileSize(MptConfigurationPageManufacturing3, 8);
1219
1220/**
1221 * Manufacturing page 4. - Readonly.
1222 */
1223#pragma pack(1)
1224typedef struct MptConfigurationPageManufacturing4
1225{
1226 /** Union. */
1227 union
1228 {
1229 /** Byte view. */
1230 uint8_t abPageData[84];
1231 /** Field view. */
1232 struct
1233 {
1234 /** The omnipresent header. */
1235 MptConfigurationPageHeader Header;
1236 /** Reserved. */
1237 uint32_t u32Reserved;
1238 /** InfoOffset0. */
1239 uint8_t u8InfoOffset0;
1240 /** Info size. */
1241 uint8_t u8InfoSize0;
1242 /** InfoOffset1. */
1243 uint8_t u8InfoOffset1;
1244 /** Info size. */
1245 uint8_t u8InfoSize1;
1246 /** Size of the inquiry data. */
1247 uint8_t u8InquirySize;
1248 /** Reserved. */
1249 uint8_t abReserved[3];
1250 /** Inquiry data. */
1251 uint8_t abInquiryData[56];
1252 /** IS volume settings. */
1253 uint32_t u32ISVolumeSettings;
1254 /** IME volume settings. */
1255 uint32_t u32IMEVolumeSettings;
1256 /** IM volume settings. */
1257 uint32_t u32IMVolumeSettings;
1258 } fields;
1259 } u;
1260} MptConfigurationPageManufacturing4, *PMptConfigurationPageManufacturing4;
1261#pragma pack()
1262AssertCompileSize(MptConfigurationPageManufacturing4, 84);
1263
1264/**
1265 * Manufacturing page 5 - Readonly.
1266 */
1267#pragma pack(1)
1268typedef struct MptConfigurationPageManufacturing5
1269{
1270 /** Union. */
1271 union
1272 {
1273 /** Byte view. */
1274 uint8_t abPageData[88];
1275 /** Field view. */
1276 struct
1277 {
1278 /** The omnipresent header. */
1279 MptConfigurationPageHeader Header;
1280 /** Base WWID. */
1281 uint64_t u64BaseWWID;
1282 /** Flags */
1283 uint8_t u8Flags;
1284 /** Number of ForceWWID fields in this page. */
1285 uint8_t u8NumForceWWID;
1286 /** Reserved */
1287 uint16_t u16Reserved;
1288 /** Reserved */
1289 uint32_t au32Reserved[2];
1290 /** ForceWWID entries Maximum of 8 because the SAS controller doesn't has more */
1291 uint64_t au64ForceWWID[8];
1292 } fields;
1293 } u;
1294} MptConfigurationPageManufacturing5, *PMptConfigurationPageManufacturing5;
1295#pragma pack()
1296AssertCompileSize(MptConfigurationPageManufacturing5, 24+64);
1297
1298/**
1299 * Manufacturing page 6 - Readonly.
1300 */
1301#pragma pack(1)
1302typedef struct MptConfigurationPageManufacturing6
1303{
1304 /** Union. */
1305 union
1306 {
1307 /** Byte view. */
1308 uint8_t abPageData[4];
1309 /** Field view. */
1310 struct
1311 {
1312 /** The omnipresent header. */
1313 MptConfigurationPageHeader Header;
1314 /** Product specific data - 0 for now */
1315 } fields;
1316 } u;
1317} MptConfigurationPageManufacturing6, *PMptConfigurationPageManufacturing6;
1318#pragma pack()
1319AssertCompileSize(MptConfigurationPageManufacturing6, 4);
1320
1321/**
1322 * Manufacturing page 7 - Readonly.
1323 */
1324#pragma pack(1)
1325typedef struct MptConfigurationPageManufacturing7
1326{
1327 /** Union. */
1328 union
1329 {
1330 /** Byte view. */
1331 uint8_t abPageData[228];
1332 /** Field view. */
1333 struct
1334 {
1335 /** The omnipresent header. */
1336 MptConfigurationPageHeader Header;
1337 /** Reserved */
1338 uint32_t au32Reserved[2];
1339 /** Flags */
1340 uint32_t u32Flags;
1341 /** Enclosure name */
1342 uint8_t szEnclosureName[16];
1343 /** Nummber of PHYs */
1344 uint8_t u8NumPhys;
1345 /** Reserved */
1346 uint8_t au8Reserved[3];
1347 /** PHY list for the SAS controller */
1348 struct
1349 {
1350 /** Pinout */
1351 uint32_t u32Pinout;
1352 /** Connector name */
1353 uint8_t szConnector[16];
1354 /** Location */
1355 uint8_t u8Location;
1356 /** reserved */
1357 uint8_t u8Reserved;
1358 /** Slot */
1359 uint16_t u16Slot;
1360 } aPHYs[LSILOGICSCSI_PCI_SAS_PORTS_MAX];
1361 } fields;
1362 } u;
1363} MptConfigurationPageManufacturing7, *PMptConfigurationPageManufacturing7;
1364#pragma pack()
1365AssertCompileSize(MptConfigurationPageManufacturing7, 36+(LSILOGICSCSI_PCI_SAS_PORTS_MAX * 24));
1366
1367/** Flags for the flags field */
1368#define LSILOGICSCSI_MANUFACTURING7_FLAGS_USE_PROVIDED_INFORMATION RT_BIT(0)
1369
1370/** Flags for the pinout field */
1371#define LSILOGICSCSI_MANUFACTURING7_PINOUT_UNKNOWN RT_BIT(0)
1372#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8482 RT_BIT(1)
1373#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE1 RT_BIT(8)
1374#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE2 RT_BIT(9)
1375#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE3 RT_BIT(10)
1376#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE4 RT_BIT(11)
1377#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE1 RT_BIT(16)
1378#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE2 RT_BIT(17)
1379#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE3 RT_BIT(18)
1380#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE4 RT_BIT(19)
1381
1382/** Flags for the location field */
1383#define LSILOGICSCSI_MANUFACTURING7_LOCATION_UNKNOWN 0x01
1384#define LSILOGICSCSI_MANUFACTURING7_LOCATION_INTERNAL 0x02
1385#define LSILOGICSCSI_MANUFACTURING7_LOCATION_EXTERNAL 0x04
1386#define LSILOGICSCSI_MANUFACTURING7_LOCATION_SWITCHABLE 0x08
1387#define LSILOGICSCSI_MANUFACTURING7_LOCATION_AUTO 0x10
1388#define LSILOGICSCSI_MANUFACTURING7_LOCATION_NOT_PRESENT 0x20
1389#define LSILOGICSCSI_MANUFACTURING7_LOCATION_NOT_CONNECTED 0x80
1390
1391/**
1392 * Manufacturing page 8 - Readonly.
1393 */
1394#pragma pack(1)
1395typedef struct MptConfigurationPageManufacturing8
1396{
1397 /** Union. */
1398 union
1399 {
1400 /** Byte view. */
1401 uint8_t abPageData[4];
1402 /** Field view. */
1403 struct
1404 {
1405 /** The omnipresent header. */
1406 MptConfigurationPageHeader Header;
1407 /** Product specific information */
1408 } fields;
1409 } u;
1410} MptConfigurationPageManufacturing8, *PMptConfigurationPageManufacturing8;
1411#pragma pack()
1412AssertCompileSize(MptConfigurationPageManufacturing8, 4);
1413
1414/**
1415 * Manufacturing page 9 - Readonly.
1416 */
1417#pragma pack(1)
1418typedef struct MptConfigurationPageManufacturing9
1419{
1420 /** Union. */
1421 union
1422 {
1423 /** Byte view. */
1424 uint8_t abPageData[4];
1425 /** Field view. */
1426 struct
1427 {
1428 /** The omnipresent header. */
1429 MptConfigurationPageHeader Header;
1430 /** Product specific information */
1431 } fields;
1432 } u;
1433} MptConfigurationPageManufacturing9, *PMptConfigurationPageManufacturing9;
1434#pragma pack()
1435AssertCompileSize(MptConfigurationPageManufacturing9, 4);
1436
1437/**
1438 * Manufacturing page 10 - Readonly.
1439 */
1440#pragma pack(1)
1441typedef struct MptConfigurationPageManufacturing10
1442{
1443 /** Union. */
1444 union
1445 {
1446 /** Byte view. */
1447 uint8_t abPageData[4];
1448 /** Field view. */
1449 struct
1450 {
1451 /** The omnipresent header. */
1452 MptConfigurationPageHeader Header;
1453 /** Product specific information */
1454 } fields;
1455 } u;
1456} MptConfigurationPageManufacturing10, *PMptConfigurationPageManufacturing10;
1457#pragma pack()
1458AssertCompileSize(MptConfigurationPageManufacturing10, 4);
1459
1460/**
1461 * IO Unit page 0. - Readonly.
1462 */
1463#pragma pack(1)
1464typedef struct MptConfigurationPageIOUnit0
1465{
1466 /** Union. */
1467 union
1468 {
1469 /** Byte view. */
1470 uint8_t abPageData[12];
1471 /** Field view. */
1472 struct
1473 {
1474 /** The omnipresent header. */
1475 MptConfigurationPageHeader Header;
1476 /** A unique identifier. */
1477 uint64_t u64UniqueIdentifier;
1478 } fields;
1479 } u;
1480} MptConfigurationPageIOUnit0, *PMptConfigurationPageIOUnit0;
1481#pragma pack()
1482AssertCompileSize(MptConfigurationPageIOUnit0, 12);
1483
1484/**
1485 * IO Unit page 1. - Read/Write.
1486 */
1487#pragma pack(1)
1488typedef struct MptConfigurationPageIOUnit1
1489{
1490 /** Union. */
1491 union
1492 {
1493 /** Byte view. */
1494 uint8_t abPageData[8];
1495 /** Field view. */
1496 struct
1497 {
1498 /** The omnipresent header. */
1499 MptConfigurationPageHeader Header;
1500 /** Flag whether this is a single function PCI device. */
1501 unsigned fSingleFunction: 1;
1502 /** Flag whether all possible paths to a device are mapped. */
1503 unsigned fAllPathsMapped: 1;
1504 /** Reserved. */
1505 unsigned u4Reserved: 4;
1506 /** Flag whether all RAID functionality is disabled. */
1507 unsigned fIntegratedRAIDDisabled: 1;
1508 /** Flag whether 32bit PCI accesses are forced. */
1509 unsigned f32BitAccessForced: 1;
1510 /** Reserved. */
1511 unsigned abReserved: 24;
1512 } fields;
1513 } u;
1514} MptConfigurationPageIOUnit1, *PMptConfigurationPageIOUnit1;
1515#pragma pack()
1516AssertCompileSize(MptConfigurationPageIOUnit1, 8);
1517
1518/**
1519 * Adapter Ordering.
1520 */
1521#pragma pack(1)
1522typedef struct MptConfigurationPageIOUnit2AdapterOrdering
1523{
1524 /** PCI bus number. */
1525 unsigned u8PCIBusNumber: 8;
1526 /** PCI device and function number. */
1527 unsigned u8PCIDevFn: 8;
1528 /** Flag whether the adapter is embedded. */
1529 unsigned fAdapterEmbedded: 1;
1530 /** Flag whether the adapter is enabled. */
1531 unsigned fAdapterEnabled: 1;
1532 /** Reserved. */
1533 unsigned u6Reserved: 6;
1534 /** Reserved. */
1535 unsigned u8Reserved: 8;
1536} MptConfigurationPageIOUnit2AdapterOrdering, *PMptConfigurationPageIOUnit2AdapterOrdering;
1537#pragma pack()
1538AssertCompileSize(MptConfigurationPageIOUnit2AdapterOrdering, 4);
1539
1540/**
1541 * IO Unit page 2. - Read/Write.
1542 */
1543#pragma pack(1)
1544typedef struct MptConfigurationPageIOUnit2
1545{
1546 /** Union. */
1547 union
1548 {
1549 /** Byte view. */
1550 uint8_t abPageData[28];
1551 /** Field view. */
1552 struct
1553 {
1554 /** The omnipresent header. */
1555 MptConfigurationPageHeader Header;
1556 /** Reserved. */
1557 unsigned fReserved: 1;
1558 /** Flag whether Pause on error is enabled. */
1559 unsigned fPauseOnError: 1;
1560 /** Flag whether verbose mode is enabled. */
1561 unsigned fVerboseModeEnabled: 1;
1562 /** Set to disable color video. */
1563 unsigned fDisableColorVideo: 1;
1564 /** Flag whether int 40h is hooked. */
1565 unsigned fNotHookInt40h: 1;
1566 /** Reserved. */
1567 unsigned u3Reserved: 3;
1568 /** Reserved. */
1569 unsigned abReserved: 24;
1570 /** BIOS version. */
1571 uint32_t u32BIOSVersion;
1572 /** Adapter ordering. */
1573 MptConfigurationPageIOUnit2AdapterOrdering aAdapterOrder[4];
1574 } fields;
1575 } u;
1576} MptConfigurationPageIOUnit2, *PMptConfigurationPageIOUnit2;
1577#pragma pack()
1578AssertCompileSize(MptConfigurationPageIOUnit2, 28);
1579
1580/*
1581 * IO Unit page 3. - Read/Write.
1582 */
1583#pragma pack(1)
1584typedef struct MptConfigurationPageIOUnit3
1585{
1586 /** Union. */
1587 union
1588 {
1589 /** Byte view. */
1590 uint8_t abPageData[8];
1591 /** Field view. */
1592 struct
1593 {
1594 /** The omnipresent header. */
1595 MptConfigurationPageHeader Header;
1596 /** Number of GPIO values. */
1597 uint8_t u8GPIOCount;
1598 /** Reserved. */
1599 uint8_t abReserved[3];
1600 } fields;
1601 } u;
1602} MptConfigurationPageIOUnit3, *PMptConfigurationPageIOUnit3;
1603#pragma pack()
1604AssertCompileSize(MptConfigurationPageIOUnit3, 8);
1605
1606/*
1607 * IO Unit page 4. - Readonly for everyone except the BIOS.
1608 */
1609#pragma pack(1)
1610typedef struct MptConfigurationPageIOUnit4
1611{
1612 /** Union. */
1613 union
1614 {
1615 /** Byte view. */
1616 uint8_t abPageData[20];
1617 /** Field view. */
1618 struct
1619 {
1620 /** The omnipresent header. */
1621 MptConfigurationPageHeader Header;
1622 /** Reserved */
1623 uint32_t u32Reserved;
1624 /** SG entry describing the Firmware location. */
1625 MptSGEntrySimple64 FWImageSGE;
1626 } fields;
1627 } u;
1628} MptConfigurationPageIOUnit4, *PMptConfigurationPageIOUnit4;
1629#pragma pack()
1630AssertCompileSize(MptConfigurationPageIOUnit4, 20);
1631
1632/**
1633 * IOC page 0. - Readonly
1634 */
1635#pragma pack(1)
1636typedef struct MptConfigurationPageIOC0
1637{
1638 /** Union. */
1639 union
1640 {
1641 /** Byte view. */
1642 uint8_t abPageData[28];
1643 /** Field view. */
1644 struct
1645 {
1646 /** The omnipresent header. */
1647 MptConfigurationPageHeader Header;
1648 /** Total ammount of NV memory in bytes. */
1649 uint32_t u32TotalNVStore;
1650 /** Number of free bytes in the NV store. */
1651 uint32_t u32FreeNVStore;
1652 /** PCI vendor ID. */
1653 uint16_t u16VendorId;
1654 /** PCI device ID. */
1655 uint16_t u16DeviceId;
1656 /** PCI revision ID. */
1657 uint8_t u8RevisionId;
1658 /** Reserved. */
1659 uint8_t abReserved[3];
1660 /** PCI class code. */
1661 uint32_t u32ClassCode;
1662 /** Subsystem vendor Id. */
1663 uint16_t u16SubsystemVendorId;
1664 /** Subsystem Id. */
1665 uint16_t u16SubsystemId;
1666 } fields;
1667 } u;
1668} MptConfigurationPageIOC0, *PMptConfigurationPageIOC0;
1669#pragma pack()
1670AssertCompileSize(MptConfigurationPageIOC0, 28);
1671
1672/**
1673 * IOC page 1. - Read/Write
1674 */
1675#pragma pack(1)
1676typedef struct MptConfigurationPageIOC1
1677{
1678 /** Union. */
1679 union
1680 {
1681 /** Byte view. */
1682 uint8_t abPageData[16];
1683 /** Field view. */
1684 struct
1685 {
1686 /** The omnipresent header. */
1687 MptConfigurationPageHeader Header;
1688 /** Flag whether reply coalescing is enabled. */
1689 unsigned fReplyCoalescingEnabled: 1;
1690 /** Reserved. */
1691 unsigned u31Reserved: 31;
1692 /** Coalescing Timeout in microseconds. */
1693 unsigned u32CoalescingTimeout: 32;
1694 /** Coalescing depth. */
1695 unsigned u8CoalescingDepth: 8;
1696 /** Reserved. */
1697 unsigned u8Reserved0: 8;
1698 unsigned u8Reserved1: 8;
1699 unsigned u8Reserved2: 8;
1700 } fields;
1701 } u;
1702} MptConfigurationPageIOC1, *PMptConfigurationPageIOC1;
1703#pragma pack()
1704AssertCompileSize(MptConfigurationPageIOC1, 16);
1705
1706/**
1707 * IOC page 2. - Readonly
1708 */
1709#pragma pack(1)
1710typedef struct MptConfigurationPageIOC2
1711{
1712 /** Union. */
1713 union
1714 {
1715 /** Byte view. */
1716 uint8_t abPageData[12];
1717 /** Field view. */
1718 struct
1719 {
1720 /** The omnipresent header. */
1721 MptConfigurationPageHeader Header;
1722 /** Flag whether striping is supported. */
1723 unsigned fStripingSupported: 1;
1724 /** Flag whether enhanced mirroring is supported. */
1725 unsigned fEnhancedMirroringSupported: 1;
1726 /** Flag whether mirroring is supported. */
1727 unsigned fMirroringSupported: 1;
1728 /** Reserved. */
1729 unsigned u26Reserved: 26;
1730 /** Flag whether SES is supported. */
1731 unsigned fSESSupported: 1;
1732 /** Flag whether SAF-TE is supported. */
1733 unsigned fSAFTESupported: 1;
1734 /** Flag whether cross channel volumes are supported. */
1735 unsigned fCrossChannelVolumesSupported: 1;
1736 /** Number of active integrated RAID volumes. */
1737 unsigned u8NumActiveVolumes: 8;
1738 /** Maximum number of integrated RAID volumes supported. */
1739 unsigned u8MaxVolumes: 8;
1740 /** Number of active integrated RAID physical disks. */
1741 unsigned u8NumActivePhysDisks: 8;
1742 /** Maximum number of integrated RAID physical disks supported. */
1743 unsigned u8MaxPhysDisks: 8;
1744 /** RAID volumes... - not supported. */
1745 } fields;
1746 } u;
1747} MptConfigurationPageIOC2, *PMptConfigurationPageIOC2;
1748#pragma pack()
1749AssertCompileSize(MptConfigurationPageIOC2, 12);
1750
1751/**
1752 * IOC page 3. - Readonly
1753 */
1754#pragma pack(1)
1755typedef struct MptConfigurationPageIOC3
1756{
1757 /** Union. */
1758 union
1759 {
1760 /** Byte view. */
1761 uint8_t abPageData[8];
1762 /** Field view. */
1763 struct
1764 {
1765 /** The omnipresent header. */
1766 MptConfigurationPageHeader Header;
1767 /** Number of active integrated RAID physical disks. */
1768 uint8_t u8NumPhysDisks;
1769 /** Reserved. */
1770 uint8_t abReserved[3];
1771 } fields;
1772 } u;
1773} MptConfigurationPageIOC3, *PMptConfigurationPageIOC3;
1774#pragma pack()
1775AssertCompileSize(MptConfigurationPageIOC3, 8);
1776
1777/**
1778 * IOC page 4. - Read/Write
1779 */
1780#pragma pack(1)
1781typedef struct MptConfigurationPageIOC4
1782{
1783 /** Union. */
1784 union
1785 {
1786 /** Byte view. */
1787 uint8_t abPageData[8];
1788 /** Field view. */
1789 struct
1790 {
1791 /** The omnipresent header. */
1792 MptConfigurationPageHeader Header;
1793 /** Number of SEP entries in this page. */
1794 uint8_t u8ActiveSEP;
1795 /** Maximum number of SEp entries supported. */
1796 uint8_t u8MaxSEP;
1797 /** Reserved. */
1798 uint16_t u16Reserved;
1799 /** SEP entries... - not supported. */
1800 } fields;
1801 } u;
1802} MptConfigurationPageIOC4, *PMptConfigurationPageIOC4;
1803#pragma pack()
1804AssertCompileSize(MptConfigurationPageIOC4, 8);
1805
1806/**
1807 * IOC page 6. - Read/Write
1808 */
1809#pragma pack(1)
1810typedef struct MptConfigurationPageIOC6
1811{
1812 /** Union. */
1813 union
1814 {
1815 /** Byte view. */
1816 uint8_t abPageData[60];
1817 /** Field view. */
1818 struct
1819 {
1820 /** The omnipresent header. */
1821 MptConfigurationPageHeader Header;
1822 uint32_t u32CapabilitiesFlags;
1823 uint8_t u8MaxDrivesIS;
1824 uint8_t u8MaxDrivesIM;
1825 uint8_t u8MaxDrivesIME;
1826 uint8_t u8Reserved1;
1827 uint8_t u8MinDrivesIS;
1828 uint8_t u8MinDrivesIM;
1829 uint8_t u8MinDrivesIME;
1830 uint8_t u8Reserved2;
1831 uint8_t u8MaxGlobalHotSpares;
1832 uint8_t u8Reserved3;
1833 uint16_t u16Reserved4;
1834 uint32_t u32Reserved5;
1835 uint32_t u32SupportedStripeSizeMapIS;
1836 uint32_t u32SupportedStripeSizeMapIME;
1837 uint32_t u32Reserved6;
1838 uint8_t u8MetadataSize;
1839 uint8_t u8Reserved7;
1840 uint16_t u16Reserved8;
1841 uint16_t u16MaxBadBlockTableEntries;
1842 uint16_t u16Reserved9;
1843 uint16_t u16IRNvsramUsage;
1844 uint16_t u16Reserved10;
1845 uint32_t u32IRNvsramVersion;
1846 uint32_t u32Reserved11;
1847 } fields;
1848 } u;
1849} MptConfigurationPageIOC6, *PMptConfigurationPageIOC6;
1850#pragma pack()
1851AssertCompileSize(MptConfigurationPageIOC6, 60);
1852
1853/**
1854 * BIOS page 1 - Read/write.
1855 */
1856#pragma pack(1)
1857typedef struct MptConfigurationPageBIOS1
1858{
1859 /** Union. */
1860 union
1861 {
1862 /** Byte view. */
1863 uint8_t abPageData[48];
1864 /** Field view. */
1865 struct
1866 {
1867 /** The omnipresent header. */
1868 MptConfigurationPageHeader Header;
1869 /** BIOS options */
1870 uint32_t u32BiosOptions;
1871 /** IOC settings */
1872 uint32_t u32IOCSettings;
1873 /** Reserved */
1874 uint32_t u32Reserved;
1875 /** Device settings */
1876 uint32_t u32DeviceSettings;
1877 /** Number of devices */
1878 uint16_t u16NumberOfDevices;
1879 /** Expander spinup */
1880 uint8_t u8ExpanderSpinup;
1881 /** Reserved */
1882 uint8_t u8Reserved;
1883 /** I/O timeout of block devices without removable media */
1884 uint16_t u16IOTimeoutBlockDevicesNonRM;
1885 /** I/O timeout sequential */
1886 uint16_t u16IOTimeoutSequential;
1887 /** I/O timeout other */
1888 uint16_t u16IOTimeoutOther;
1889 /** I/O timeout of block devices with removable media */
1890 uint16_t u16IOTimeoutBlockDevicesRM;
1891 } fields;
1892 } u;
1893} MptConfigurationPageBIOS1, *PMptConfigurationPageBIOS1;
1894#pragma pack()
1895AssertCompileSize(MptConfigurationPageBIOS1, 48);
1896
1897#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_DISABLE RT_BIT(0)
1898#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_SCAN_FROM_HIGH_TO_LOW RT_BIT(1)
1899#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_SAS_SUPPORT RT_BIT(8)
1900#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_FC_SUPPORT RT_BIT(9)
1901#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_SPI_SUPPORT RT_BIT(10)
1902
1903#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ALTERNATE_CHS RT_BIT(3)
1904
1905#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_SET(x) ((x) << 4)
1906#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_DISABLED 0x00
1907#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_BIOS_ONLY 0x01
1908#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_OS_ONLY 0x02
1909#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_BOT 0x03
1910
1911#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_SET(x) ((x) << 6)
1912#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_NO_INT13H 0x00
1913#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_BOOT_MEDIA_INT13H 0x01
1914#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_INT13H 0x02
1915
1916#define LSILOGICSCSI_BIOS1_IOCSETTINGS_SPINUP_DELAY_SET(x) ((x & 0xF) << 8)
1917#define LSILOGICSCSI_BIOS1_IOCSETTINGS_SPINUP_DELAY_GET(x) ((x >> 8) & 0x0F)
1918#define LSILOGICSCSI_BIOS1_IOCSETTINGS_MAX_TARGET_SPINUP_SET(x) ((x & 0xF) << 12)
1919#define LSILOGICSCSI_BIOS1_IOCSETTINGS_MAX_TARGET_SPINUP_GET(x) ((x >> 12) & 0x0F)
1920
1921#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_SET(x) (((x) & 0x3) << 16)
1922#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_ENCLOSURE 0x0
1923#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_SAS_ADDRESS 0x1
1924
1925#define LSILOGICSCSI_BIOS1_IOCSETTINGS_DIRECT_ATTACH_SPINUP_MODE_ALL RT_BIT(18)
1926#define LSILOGICSCSI_BIOS1_IOCSETTINGS_AUTO_PORT_ENABLE RT_BIT(19)
1927
1928#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_REPLY_DELAY_SET(x) (((x) & 0xF) << 20)
1929#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_REPLY_DELAY_GET(x) ((x >> 20) & 0x0F)
1930
1931#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_SPINUP_DELAY_SET(x) (((x) & 0xF) << 24)
1932#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_SPINUP_DELAY_GET(x) ((x >> 24) & 0x0F)
1933
1934#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS RT_BIT(0)
1935#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS_FOR_NON_REMOVABLE_DEVICES RT_BIT(1)
1936#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS_FOR_REMOVABLE_DEVICES RT_BIT(2)
1937#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS2 RT_BIT(3)
1938#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_SMART_POLLING RT_BIT(4)
1939
1940#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_SPINUP_DELAY_SET(x) ((x) & 0x0F)
1941#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_SPINUP_DELAY_GET(x) ((x) & 0x0F)
1942#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_MAX_SPINUP_DELAY_SET(x) (((x) & 0x0F) << 4)
1943#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_MAX_SPINUP_DELAY_GET(x) ((x >> 4) & 0x0F)
1944
1945/**
1946 * BIOS page 2 - Read/write.
1947 */
1948#pragma pack(1)
1949typedef struct MptConfigurationPageBIOS2
1950{
1951 /** Union. */
1952 union
1953 {
1954 /** Byte view. */
1955 uint8_t abPageData[384];
1956 /** Field view. */
1957 struct
1958 {
1959 /** The omnipresent header. */
1960 MptConfigurationPageHeader Header;
1961 /** Reserved */
1962 uint32_t au32Reserved[6];
1963 /** Format of the boot device field. */
1964 uint8_t u8BootDeviceForm;
1965 /** Previous format of the boot device field. */
1966 uint8_t u8PrevBootDeviceForm;
1967 /** Reserved */
1968 uint16_t u16Reserved;
1969 /** Boot device fields - dependent on the format */
1970 union
1971 {
1972 /** Device for AdapterNumber:Bus:Target:LUN */
1973 struct
1974 {
1975 /** Target ID */
1976 uint8_t u8TargetID;
1977 /** Bus */
1978 uint8_t u8Bus;
1979 /** Adapter Number */
1980 uint8_t u8AdapterNumber;
1981 /** Reserved */
1982 uint8_t u8Reserved;
1983 /** Reserved */
1984 uint32_t au32Reserved[3];
1985 /** LUN */
1986 uint32_t aLUN[5];
1987 /** Reserved */
1988 uint32_t au32Reserved2[56];
1989 } AdapterNumberBusTargetLUN;
1990 /** Device for PCIAddress:Bus:Target:LUN */
1991 struct
1992 {
1993 /** Target ID */
1994 uint8_t u8TargetID;
1995 /** Bus */
1996 uint8_t u8Bus;
1997 /** Adapter Number */
1998 uint16_t u16PCIAddress;
1999 /** Reserved */
2000 uint32_t au32Reserved[3];
2001 /** LUN */
2002 uint32_t aLUN[5];
2003 /** Reserved */
2004 uint32_t au32Reserved2[56];
2005 } PCIAddressBusTargetLUN;
2006 /** Device for PCISlotNo:Bus:Target:LUN */
2007 struct
2008 {
2009 /** Target ID */
2010 uint8_t u8TargetID;
2011 /** Bus */
2012 uint8_t u8Bus;
2013 /** PCI Slot Number */
2014 uint8_t u16PCISlotNo;
2015 /** Reserved */
2016 uint32_t au32Reserved[3];
2017 /** LUN */
2018 uint32_t aLUN[5];
2019 /** Reserved */
2020 uint32_t au32Reserved2[56];
2021 } PCIAddressBusSlotLUN;
2022 /** Device for FC channel world wide name */
2023 struct
2024 {
2025 /** World wide port name low */
2026 uint32_t u32WorldWidePortNameLow;
2027 /** World wide port name high */
2028 uint32_t u32WorldWidePortNameHigh;
2029 /** Reserved */
2030 uint32_t au32Reserved[3];
2031 /** LUN */
2032 uint32_t aLUN[5];
2033 /** Reserved */
2034 uint32_t au32Reserved2[56];
2035 } FCWorldWideName;
2036 /** Device for FC channel world wide name */
2037 struct
2038 {
2039 /** SAS address */
2040 SASADDRESS SASAddress;
2041 /** Reserved */
2042 uint32_t au32Reserved[3];
2043 /** LUN */
2044 uint32_t aLUN[5];
2045 /** Reserved */
2046 uint32_t au32Reserved2[56];
2047 } SASWorldWideName;
2048 /** Device for Enclosure/Slot */
2049 struct
2050 {
2051 /** Enclosure logical ID */
2052 uint64_t u64EnclosureLogicalID;
2053 /** Reserved */
2054 uint32_t au32Reserved[3];
2055 /** LUN */
2056 uint32_t aLUN[5];
2057 /** Reserved */
2058 uint32_t au32Reserved2[56];
2059 } EnclosureSlot;
2060 } BootDevice;
2061 } fields;
2062 } u;
2063} MptConfigurationPageBIOS2, *PMptConfigurationPageBIOS2;
2064#pragma pack()
2065AssertCompileSize(MptConfigurationPageBIOS2, 384);
2066
2067#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_SET(x) ((x) & 0x0F)
2068#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_FIRST 0x0
2069#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_ADAPTER_BUS_TARGET_LUN 0x1
2070#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_PCIADDR_BUS_TARGET_LUN 0x2
2071#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_PCISLOT_BUS_TARGET_LUN 0x3
2072#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_FC_WWN 0x4
2073#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_SAS_WWN 0x5
2074#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_ENCLOSURE_SLOT 0x6
2075
2076/**
2077 * BIOS page 4 - Read/Write (Where is 3? - not defined in the spec)
2078 */
2079#pragma pack(1)
2080typedef struct MptConfigurationPageBIOS4
2081{
2082 /** Union. */
2083 union
2084 {
2085 /** Byte view. */
2086 uint8_t abPageData[12];
2087 /** Field view. */
2088 struct
2089 {
2090 /** The omnipresent header. */
2091 MptConfigurationPageHeader Header;
2092 /** Reassignment Base WWID */
2093 uint64_t u64ReassignmentBaseWWID;
2094 } fields;
2095 } u;
2096} MptConfigurationPageBIOS4, *PMptConfigurationPageBIOS4;
2097#pragma pack()
2098AssertCompileSize(MptConfigurationPageBIOS4, 12);
2099
2100/**
2101 * SCSI-SPI port page 0. - Readonly
2102 */
2103#pragma pack(1)
2104typedef struct MptConfigurationPageSCSISPIPort0
2105{
2106 /** Union. */
2107 union
2108 {
2109 /** Byte view. */
2110 uint8_t abPageData[12];
2111 /** Field view. */
2112 struct
2113 {
2114 /** The omnipresent header. */
2115 MptConfigurationPageHeader Header;
2116 /** Flag whether this port is information unit trnafsers capable. */
2117 unsigned fInformationUnitTransfersCapable: 1;
2118 /** Flag whether the port is DT (Dual Transfer) capable. */
2119 unsigned fDTCapable: 1;
2120 /** Flag whether the port is QAS (Quick Arbitrate and Select) capable. */
2121 unsigned fQASCapable: 1;
2122 /** Reserved. */
2123 unsigned u5Reserved1: 5;
2124 /** Minimum Synchronous transfer period. */
2125 unsigned u8MinimumSynchronousTransferPeriod: 8;
2126 /** Maximum synchronous offset. */
2127 unsigned u8MaximumSynchronousOffset: 8;
2128 /** Reserved. */
2129 unsigned u5Reserved2: 5;
2130 /** Flag whether indicating the width of the bus - 0 narrow and 1 for wide. */
2131 unsigned fWide: 1;
2132 /** Reserved */
2133 unsigned fReserved: 1;
2134 /** Flag whether the port is AIP (Asynchronous Information Protection) capable. */
2135 unsigned fAIPCapable: 1;
2136 /** Signaling Type. */
2137 unsigned u2SignalingType: 2;
2138 /** Reserved. */
2139 unsigned u30Reserved: 30;
2140 } fields;
2141 } u;
2142} MptConfigurationPageSCSISPIPort0, *PMptConfigurationPageSCSISPIPort0;
2143#pragma pack()
2144AssertCompileSize(MptConfigurationPageSCSISPIPort0, 12);
2145
2146/**
2147 * SCSI-SPI port page 1. - Read/Write
2148 */
2149#pragma pack(1)
2150typedef struct MptConfigurationPageSCSISPIPort1
2151{
2152 /** Union. */
2153 union
2154 {
2155 /** Byte view. */
2156 uint8_t abPageData[12];
2157 /** Field view. */
2158 struct
2159 {
2160 /** The omnipresent header. */
2161 MptConfigurationPageHeader Header;
2162 /** The SCSI ID of the port. */
2163 uint8_t u8SCSIID;
2164 /** Reserved. */
2165 uint8_t u8Reserved;
2166 /** Port response IDs Bit mask field. */
2167 uint16_t u16PortResponseIDsBitmask;
2168 /** Value for the on BUS timer. */
2169 uint32_t u32OnBusTimerValue;
2170 } fields;
2171 } u;
2172} MptConfigurationPageSCSISPIPort1, *PMptConfigurationPageSCSISPIPort1;
2173#pragma pack()
2174AssertCompileSize(MptConfigurationPageSCSISPIPort1, 12);
2175
2176/**
2177 * Device settings for one device.
2178 */
2179#pragma pack(1)
2180typedef struct MptDeviceSettings
2181{
2182 /** Timeout for I/O in seconds. */
2183 unsigned u8Timeout: 8;
2184 /** Minimum synchronous factor. */
2185 unsigned u8SyncFactor: 8;
2186 /** Flag whether disconnect is enabled. */
2187 unsigned fDisconnectEnable: 1;
2188 /** Flag whether Scan ID is enabled. */
2189 unsigned fScanIDEnable: 1;
2190 /** Flag whether Scan LUNs is enabled. */
2191 unsigned fScanLUNEnable: 1;
2192 /** Flag whether tagged queuing is enabled. */
2193 unsigned fTaggedQueuingEnabled: 1;
2194 /** Flag whether wide is enabled. */
2195 unsigned fWideDisable: 1;
2196 /** Flag whether this device is bootable. */
2197 unsigned fBootChoice: 1;
2198 /** Reserved. */
2199 unsigned u10Reserved: 10;
2200} MptDeviceSettings, *PMptDeviceSettings;
2201#pragma pack()
2202AssertCompileSize(MptDeviceSettings, 4);
2203
2204/**
2205 * SCSI-SPI port page 2. - Read/Write for the BIOS
2206 */
2207#pragma pack(1)
2208typedef struct MptConfigurationPageSCSISPIPort2
2209{
2210 /** Union. */
2211 union
2212 {
2213 /** Byte view. */
2214 uint8_t abPageData[76];
2215 /** Field view. */
2216 struct
2217 {
2218 /** The omnipresent header. */
2219 MptConfigurationPageHeader Header;
2220 /** Flag indicating the bus scan order. */
2221 unsigned fBusScanOrderHighToLow: 1;
2222 /** Reserved. */
2223 unsigned fReserved: 1;
2224 /** Flag whether SCSI Bus resets are avoided. */
2225 unsigned fAvoidSCSIBusResets: 1;
2226 /** Flag whether alternate CHS is used. */
2227 unsigned fAlternateCHS: 1;
2228 /** Flag whether termination is disabled. */
2229 unsigned fTerminationDisabled: 1;
2230 /** Reserved. */
2231 unsigned u27Reserved: 27;
2232 /** Host SCSI ID. */
2233 unsigned u4HostSCSIID: 4;
2234 /** Initialize HBA. */
2235 unsigned u2InitializeHBA: 2;
2236 /** Removeable media setting. */
2237 unsigned u2RemovableMediaSetting: 2;
2238 /** Spinup delay. */
2239 unsigned u4SpinupDelay: 4;
2240 /** Negotiating settings. */
2241 unsigned u2NegotitatingSettings: 2;
2242 /** Reserved. */
2243 unsigned u18Reserved: 18;
2244 /** Device Settings. */
2245 MptDeviceSettings aDeviceSettings[16];
2246 } fields;
2247 } u;
2248} MptConfigurationPageSCSISPIPort2, *PMptConfigurationPageSCSISPIPort2;
2249#pragma pack()
2250AssertCompileSize(MptConfigurationPageSCSISPIPort2, 76);
2251
2252/**
2253 * SCSI-SPI device page 0. - Readonly
2254 */
2255#pragma pack(1)
2256typedef struct MptConfigurationPageSCSISPIDevice0
2257{
2258 /** Union. */
2259 union
2260 {
2261 /** Byte view. */
2262 uint8_t abPageData[12];
2263 /** Field view. */
2264 struct
2265 {
2266 /** The omnipresent header. */
2267 MptConfigurationPageHeader Header;
2268 /** Negotiated Parameters. */
2269 /** Information Units enabled. */
2270 unsigned fInformationUnitsEnabled: 1;
2271 /** Dual Transfers Enabled. */
2272 unsigned fDTEnabled: 1;
2273 /** QAS enabled. */
2274 unsigned fQASEnabled: 1;
2275 /** Reserved. */
2276 unsigned u5Reserved1: 5;
2277 /** Synchronous Transfer period. */
2278 unsigned u8NegotiatedSynchronousTransferPeriod: 8;
2279 /** Synchronous offset. */
2280 unsigned u8NegotiatedSynchronousOffset: 8;
2281 /** Reserved. */
2282 unsigned u5Reserved2: 5;
2283 /** Width - 0 for narrow and 1 for wide. */
2284 unsigned fWide: 1;
2285 /** Reserved. */
2286 unsigned fReserved: 1;
2287 /** AIP enabled. */
2288 unsigned fAIPEnabled: 1;
2289 /** Flag whether negotiation occurred. */
2290 unsigned fNegotationOccured: 1;
2291 /** Flag whether a SDTR message was rejected. */
2292 unsigned fSDTRRejected: 1;
2293 /** Flag whether a WDTR message was rejected. */
2294 unsigned fWDTRRejected: 1;
2295 /** Flag whether a PPR message was rejected. */
2296 unsigned fPPRRejected: 1;
2297 /** Reserved. */
2298 unsigned u28Reserved: 28;
2299 } fields;
2300 } u;
2301} MptConfigurationPageSCSISPIDevice0, *PMptConfigurationPageSCSISPIDevice0;
2302#pragma pack()
2303AssertCompileSize(MptConfigurationPageSCSISPIDevice0, 12);
2304
2305/**
2306 * SCSI-SPI device page 1. - Read/Write
2307 */
2308#pragma pack(1)
2309typedef struct MptConfigurationPageSCSISPIDevice1
2310{
2311 /** Union. */
2312 union
2313 {
2314 /** Byte view. */
2315 uint8_t abPageData[16];
2316 /** Field view. */
2317 struct
2318 {
2319 /** The omnipresent header. */
2320 MptConfigurationPageHeader Header;
2321 /** Requested Parameters. */
2322 /** Information Units enable. */
2323 bool fInformationUnitsEnable: 1;
2324 /** Dual Transfers Enable. */
2325 bool fDTEnable: 1;
2326 /** QAS enable. */
2327 bool fQASEnable: 1;
2328 /** Reserved. */
2329 unsigned u5Reserved1: 5;
2330 /** Synchronous Transfer period. */
2331 unsigned u8NegotiatedSynchronousTransferPeriod: 8;
2332 /** Synchronous offset. */
2333 unsigned u8NegotiatedSynchronousOffset: 8;
2334 /** Reserved. */
2335 unsigned u5Reserved2: 5;
2336 /** Width - 0 for narrow and 1 for wide. */
2337 bool fWide: 1;
2338 /** Reserved. */
2339 bool fReserved1: 1;
2340 /** AIP enable. */
2341 bool fAIPEnable: 1;
2342 /** Reserved. */
2343 bool fReserved2: 1;
2344 /** WDTR disallowed. */
2345 bool fWDTRDisallowed: 1;
2346 /** SDTR disallowed. */
2347 bool fSDTRDisallowed: 1;
2348 /** Reserved. */
2349 unsigned u29Reserved: 29;
2350 } fields;
2351 } u;
2352} MptConfigurationPageSCSISPIDevice1, *PMptConfigurationPageSCSISPIDevice1;
2353#pragma pack()
2354AssertCompileSize(MptConfigurationPageSCSISPIDevice1, 16);
2355
2356/**
2357 * SCSI-SPI device page 2. - Read/Write
2358 */
2359#pragma pack(1)
2360typedef struct MptConfigurationPageSCSISPIDevice2
2361{
2362 /** Union. */
2363 union
2364 {
2365 /** Byte view. */
2366 uint8_t abPageData[16];
2367 /** Field view. */
2368 struct
2369 {
2370 /** The omnipresent header. */
2371 MptConfigurationPageHeader Header;
2372 /** Reserved. */
2373 unsigned u4Reserved: 4;
2374 /** ISI enable. */
2375 unsigned fISIEnable: 1;
2376 /** Secondary driver enable. */
2377 unsigned fSecondaryDriverEnable: 1;
2378 /** Reserved. */
2379 unsigned fReserved: 1;
2380 /** Slew reate controler. */
2381 unsigned u3SlewRateControler: 3;
2382 /** Primary drive strength controler. */
2383 unsigned u3PrimaryDriveStrengthControl: 3;
2384 /** Secondary drive strength controler. */
2385 unsigned u3SecondaryDriveStrengthControl: 3;
2386 /** Reserved. */
2387 unsigned u12Reserved: 12;
2388 /** XCLKH_ST. */
2389 unsigned fXCLKH_ST: 1;
2390 /** XCLKS_ST. */
2391 unsigned fXCLKS_ST: 1;
2392 /** XCLKH_DT. */
2393 unsigned fXCLKH_DT: 1;
2394 /** XCLKS_DT. */
2395 unsigned fXCLKS_DT: 1;
2396 /** Parity pipe select. */
2397 unsigned u2ParityPipeSelect: 2;
2398 /** Reserved. */
2399 unsigned u30Reserved: 30;
2400 /** Data bit pipeline select. */
2401 unsigned u32DataPipelineSelect: 32;
2402 } fields;
2403 } u;
2404} MptConfigurationPageSCSISPIDevice2, *PMptConfigurationPageSCSISPIDevice2;
2405#pragma pack()
2406AssertCompileSize(MptConfigurationPageSCSISPIDevice2, 16);
2407
2408/**
2409 * SCSI-SPI device page 3 (Revision G). - Readonly
2410 */
2411#pragma pack(1)
2412typedef struct MptConfigurationPageSCSISPIDevice3
2413{
2414 /** Union. */
2415 union
2416 {
2417 /** Byte view. */
2418 uint8_t abPageData[1];
2419 /** Field view. */
2420 struct
2421 {
2422 /** The omnipresent header. */
2423 MptConfigurationPageHeader Header;
2424 /** Number of times the IOC rejected a message because it doesn't support the operation. */
2425 uint16_t u16MsgRejectCount;
2426 /** Number of times the SCSI bus entered an invalid operation state. */
2427 uint16_t u16PhaseErrorCount;
2428 /** Number of parity errors. */
2429 uint16_t u16ParityCount;
2430 /** Reserved. */
2431 uint16_t u16Reserved;
2432 } fields;
2433 } u;
2434} MptConfigurationPageSCSISPIDevice3, *PMptConfigurationPageSCSISPIDevice3;
2435#pragma pack()
2436AssertCompileSize(MptConfigurationPageSCSISPIDevice3, 12);
2437
2438/**
2439 * SAS I/O Unit page 0 - Readonly
2440 */
2441#pragma pack(1)
2442typedef struct MptConfigurationPageSASIOUnit0
2443{
2444 /** Union. */
2445 union
2446 {
2447 /** Byte view - variable. */
2448 uint8_t abPageData[1];
2449 /** Field view. */
2450 struct
2451 {
2452 /** The omnipresent header. */
2453 MptExtendedConfigurationPageHeader ExtHeader;
2454 /** Nvdata version default */
2455 uint16_t u16NvdataVersionDefault;
2456 /** Nvdata version persisent */
2457 uint16_t u16NvdataVersionPersistent;
2458 /** Number of physical ports */
2459 uint8_t u8NumPhys;
2460 /** Reserved */
2461 uint8_t au8Reserved[3];
2462 /** Content for each physical port */
2463 struct
2464 {
2465 /** Port number */
2466 uint8_t u8Port;
2467 /** Port flags */
2468 uint8_t u8PortFlags;
2469 /** Phy flags */
2470 uint8_t u8PhyFlags;
2471 /** negotiated link rate */
2472 uint8_t u8NegotiatedLinkRate;
2473 /** Controller phy device info */
2474 uint32_t u32ControllerPhyDeviceInfo;
2475 /** Attached device handle */
2476 uint16_t u16AttachedDevHandle;
2477 /** Controller device handle */
2478 uint16_t u16ControllerDevHandle;
2479 /** Discovery status */
2480 uint32_t u32DiscoveryStatus;
2481 } aPHY[LSILOGICSCSI_PCI_SAS_PORTS_MAX];
2482 } fields;
2483 } u;
2484} MptConfigurationPageSASIOUnit0, *PMptConfigurationPageSASIOUnit0;
2485#pragma pack()
2486AssertCompileSize(MptConfigurationPageSASIOUnit0, 8+2+2+1+3+(LSILOGICSCSI_PCI_SAS_PORTS_MAX*16));
2487
2488#define LSILOGICSCSI_SASIOUNIT0_PORT_CONFIGURATION_AUTO RT_BIT(0)
2489#define LSILOGICSCSI_SASIOUNIT0_PORT_TARGET_IOC RT_BIT(2)
2490#define LSILOGICSCSI_SASIOUNIT0_PORT_DISCOVERY_IN_STATUS RT_BIT(3)
2491
2492#define LSILOGICSCSI_SASIOUNIT0_PHY_RX_INVERTED RT_BIT(0)
2493#define LSILOGICSCSI_SASIOUNIT0_PHY_TX_INVERTED RT_BIT(1)
2494#define LSILOGICSCSI_SASIOUNIT0_PHY_DISABLED RT_BIT(2)
2495
2496#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_SET(x) ((x) & 0x0F)
2497#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_GET(x) ((x) & 0x0F)
2498#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_UNKNOWN 0x00
2499#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_DISABLED 0x01
2500#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_FAILED 0x02
2501#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_SATA_OOB 0x03
2502#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_15GB 0x08
2503#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_30GB 0x09
2504
2505#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_SET(x) ((x) & 0x3)
2506#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_NO 0x0
2507#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_END 0x1
2508#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_EDGE_EXPANDER 0x2
2509#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2510
2511#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SATA_HOST RT_BIT(3)
2512#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SMP_INITIATOR RT_BIT(4)
2513#define LSILOGICSCSI_SASIOUNIT0_DEVICE_STP_INITIATOR RT_BIT(5)
2514#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SSP_INITIATOR RT_BIT(6)
2515#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SATA RT_BIT(7)
2516#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SMP_TARGET RT_BIT(8)
2517#define LSILOGICSCSI_SASIOUNIT0_DEVICE_STP_TARGET RT_BIT(9)
2518#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SSP_TARGET RT_BIT(10)
2519#define LSILOGICSCSI_SASIOUNIT0_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2520#define LSILOGICSCSI_SASIOUNIT0_DEVICE_LSI RT_BIT(12)
2521#define LSILOGICSCSI_SASIOUNIT0_DEVICE_ATAPI_DEVICE RT_BIT(13)
2522#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SEP_DEVICE RT_BIT(14)
2523
2524#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_LOOP RT_BIT(0)
2525#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_UNADDRESSABLE RT_BIT(1)
2526#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SAME_SAS_ADDR RT_BIT(2)
2527#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXPANDER_ERROR RT_BIT(3)
2528#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_TIMEOUT RT_BIT(4)
2529#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXP_ROUTE_OOE RT_BIT(5)
2530#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXP_ROUTE_IDX RT_BIT(6)
2531#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_FUNC_FAILED RT_BIT(7)
2532#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_CRC_ERROR RT_BIT(8)
2533#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SUBTRSCTIVE_LNK RT_BIT(9)
2534#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_TBL_LNK RT_BIT(10)
2535#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_UNSUPPORTED_DEV RT_BIT(11)
2536#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_MAX_SATA_TGTS RT_BIT(12)
2537#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_MULT_CTRLS RT_BIT(13)
2538
2539/**
2540 * SAS I/O Unit page 1 - Read/Write
2541 */
2542#pragma pack(1)
2543typedef struct MptConfigurationPageSASIOUnit1
2544{
2545 /** Union. */
2546 union
2547 {
2548 /** Byte view - variable. */
2549 uint8_t abPageData[1];
2550 /** Field view. */
2551 struct
2552 {
2553 /** The omnipresent header. */
2554 MptExtendedConfigurationPageHeader ExtHeader;
2555 /** Control flags */
2556 uint16_t u16ControlFlags;
2557 /** maximum number of SATA targets */
2558 uint16_t u16MaxNumSATATargets;
2559 /** additional control flags */
2560 uint16_t u16AdditionalControlFlags;
2561 /** Reserved */
2562 uint16_t u16Reserved;
2563 /** Number of PHYs */
2564 uint8_t u8NumPhys;
2565 /** maximum SATA queue depth */
2566 uint8_t u8SATAMaxQDepth;
2567 /** Delay for reporting missing devices. */
2568 uint8_t u8ReportDeviceMissingDelay;
2569 /** I/O device missing delay */
2570 uint8_t u8IODeviceMissingDelay;
2571 /** Content for each physical port */
2572 struct
2573 {
2574 /** Port number */
2575 uint8_t u8Port;
2576 /** Port flags */
2577 uint8_t u8PortFlags;
2578 /** Phy flags */
2579 uint8_t u8PhyFlags;
2580 /** Max link rate */
2581 uint8_t u8MaxMinLinkRate;
2582 /** Controller phy device info */
2583 uint32_t u32ControllerPhyDeviceInfo;
2584 /** Maximum target port connect time */
2585 uint16_t u16MaxTargetPortConnectTime;
2586 /** Reserved */
2587 uint16_t u16Reserved;
2588 } aPHY[LSILOGICSCSI_PCI_SAS_PORTS_MAX];
2589 } fields;
2590 } u;
2591} MptConfigurationPageSASIOUnit1, *PMptConfigurationPageSASIOUnit1;
2592#pragma pack()
2593AssertCompileSize(MptConfigurationPageSASIOUnit1, 8+12+(LSILOGICSCSI_PCI_SAS_PORTS_MAX*12));
2594
2595#define LSILOGICSCSI_SASIOUNIT1_CONTROL_CLEAR_SATA_AFFILIATION RT_BIT(0)
2596#define LSILOGICSCSI_SASIOUNIT1_CONTROL_FIRST_LEVEL_DISCOVERY_ONLY RT_BIT(1)
2597#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SUBTRACTIVE_LNK_ILLEGAL RT_BIT(2)
2598#define LSILOGICSCSI_SASIOUNIT1_CONTROL_IOC_ENABLE_HIGH_PHY RT_BIT(3)
2599#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_FUA_REQUIRED RT_BIT(4)
2600#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_NCQ_REQUIRED RT_BIT(5)
2601#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_SMART_REQUIRED RT_BIT(6)
2602#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LBA48_REQUIRED RT_BIT(7)
2603#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_INIT_POSTPONED RT_BIT(8)
2604
2605#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SET(x) (((x) & 0x3) << 9)
2606#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_GET(x) (((x) >> 9) & 0x3)
2607#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SAS_AND_SATA 0x00
2608#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SAS 0x01
2609#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SATA 0x02
2610
2611#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_EXP_ADDR RT_BIT(11)
2612#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_SETTINGS_PRESERV_REQUIRED RT_BIT(12)
2613#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LIMIT_RATE_15GB RT_BIT(13)
2614#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LIMIT_RATE_30GB RT_BIT(14)
2615#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SAS_SELF_TEST_ENABLED RT_BIT(15)
2616
2617#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_TBL_LNKS_ALLOW RT_BIT(0)
2618#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_NO_AFFIL RT_BIT(1)
2619#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_SELF_AFFIL RT_BIT(2)
2620#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_OTHER_AFFIL RT_BIT(3)
2621#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_PORT_EN_ONLY RT_BIT(4)
2622#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_HIDE_NON_ZERO_PHYS RT_BIT(5)
2623#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_ASYNC_NOTIF RT_BIT(6)
2624#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_MULT_PORTS_ILL_SAME_DOMAIN RT_BIT(7)
2625
2626#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_UNITS_16_SEC RT_BIT(7)
2627#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_SET(x) ((x) & 0x7F)
2628#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_GET(x) ((x) & 0x7F)
2629
2630#define LSILOGICSCSI_SASIOUNIT1_PORT_CONFIGURATION_AUTO RT_BIT(0)
2631#define LSILOGICSCSI_SASIOUNIT1_PORT_CONFIGURATION_IOC1 RT_BIT(2)
2632
2633#define LSILOGICSCSI_SASIOUNIT1_PHY_RX_INVERT RT_BIT(0)
2634#define LSILOGICSCSI_SASIOUNIT1_PHY_TX_INVERT RT_BIT(1)
2635#define LSILOGICSCSI_SASIOUNIT1_PHY_DISABLE RT_BIT(2)
2636
2637#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MIN_SET(x) ((x) & 0x0F)
2638#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MIN_GET(x) ((x) & 0x0F)
2639#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MAX_SET(x) (((x) & 0x0F) << 4)
2640#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MAX_GET(x) ((x >> 4) & 0x0F)
2641#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_15GB 0x8
2642#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_30GB 0x9
2643
2644#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_SET(x) ((x) & 0x3)
2645#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_GET(x) ((x) & 0x3)
2646#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_NO 0x0
2647#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_END 0x1
2648#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_EDGE_EXPANDER 0x2
2649#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2650#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SMP_INITIATOR RT_BIT(4)
2651#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_STP_INITIATOR RT_BIT(5)
2652#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SSP_INITIATOR RT_BIT(6)
2653#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SMP_TARGET RT_BIT(8)
2654#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_STP_TARGET RT_BIT(9)
2655#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SSP_TARGET RT_BIT(10)
2656#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2657#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_LSI RT_BIT(12)
2658#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_ATAPI RT_BIT(13)
2659#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SEP RT_BIT(14)
2660
2661/**
2662 * SAS I/O unit page 2 - Read/Write
2663 */
2664#pragma pack(1)
2665typedef struct MptConfigurationPageSASIOUnit2
2666{
2667 /** Union. */
2668 union
2669 {
2670 /** Byte view - variable. */
2671 uint8_t abPageData[1];
2672 /** Field view. */
2673 struct
2674 {
2675 /** The omnipresent header. */
2676 MptExtendedConfigurationPageHeader ExtHeader;
2677 /** Device numbers per enclosure */
2678 uint8_t u8NumDevsPerEnclosure;
2679 /** Boot device wait time */
2680 uint8_t u8BootDeviceWaitTime;
2681 /** Reserved */
2682 uint16_t u16Reserved;
2683 /** Maximum number of persistent Bus and target ID mappings */
2684 uint16_t u16MaxPersistentIDs;
2685 /** Number of persistent IDs used */
2686 uint16_t u16NumPersistentIDsUsed;
2687 /** Status */
2688 uint8_t u8Status;
2689 /** Flags */
2690 uint8_t u8Flags;
2691 /** Maximum number of physical mapped IDs */
2692 uint16_t u16MaxNumPhysicalMappedIDs;
2693 } fields;
2694 } u;
2695} MptConfigurationPageSASIOUnit2, *PMptConfigurationPageSASIOUnit2;
2696#pragma pack()
2697AssertCompileSize(MptConfigurationPageSASIOUnit2, 20);
2698
2699#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_MAP_TBL_FULL RT_BIT(0)
2700#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_MAP_DISABLED RT_BIT(1)
2701#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_ENC_DEV_UNMAPPED RT_BIT(2)
2702#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_DEV_LIMIT_EXCEEDED RT_BIT(3)
2703
2704#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_MAP_DISABLE RT_BIT(0)
2705#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_SET(x) ((x & 0x7) << 1)
2706#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_GET(x) ((x >> 1) & 0x7)
2707#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_NO 0x0
2708#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_DIRECT_ATTACHED 0x1
2709#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_ENC 0x2
2710#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_HOST 0x7
2711#define LSILOGICSCSI_SASIOUNIT2_FLAGS_RESERVE_TARGET_ID_ZERO RT_BIT(4)
2712#define LSILOGICSCSI_SASIOUNIT2_FLAGS_START_SLOT_NUMBER_ONE RT_BIT(5)
2713
2714/**
2715 * SAS I/O unit page 3 - Read/Write
2716 */
2717#pragma pack(1)
2718typedef struct MptConfigurationPageSASIOUnit3
2719{
2720 /** Union. */
2721 union
2722 {
2723 /** Byte view - variable. */
2724 uint8_t abPageData[1];
2725 /** Field view. */
2726 struct
2727 {
2728 /** The omnipresent header. */
2729 MptExtendedConfigurationPageHeader ExtHeader;
2730 /** Reserved */
2731 uint32_t u32Reserved;
2732 uint32_t u32MaxInvalidDwordCount;
2733 uint32_t u32InvalidDwordCountTime;
2734 uint32_t u32MaxRunningDisparityErrorCount;
2735 uint32_t u32RunningDisparityErrorTime;
2736 uint32_t u32MaxLossDwordSynchCount;
2737 uint32_t u32LossDwordSynchCountTime;
2738 uint32_t u32MaxPhysResetProblemCount;
2739 uint32_t u32PhyResetProblemTime;
2740 } fields;
2741 } u;
2742} MptConfigurationPageSASIOUnit3, *PMptConfigurationPageSASIOUnit3;
2743#pragma pack()
2744AssertCompileSize(MptConfigurationPageSASIOUnit3, 44);
2745
2746/**
2747 * SAS PHY page 0 - Readonly
2748 */
2749#pragma pack(1)
2750typedef struct MptConfigurationPageSASPHY0
2751{
2752 /** Union. */
2753 union
2754 {
2755 /** Byte view - variable. */
2756 uint8_t abPageData[1];
2757 /** Field view. */
2758 struct
2759 {
2760 /** The omnipresent header. */
2761 MptExtendedConfigurationPageHeader ExtHeader;
2762 /** Owner dev handle. */
2763 uint16_t u16OwnerDevHandle;
2764 /** Reserved */
2765 uint16_t u16Reserved0;
2766 /** SAS address */
2767 SASADDRESS SASAddress;
2768 /** Attached device handle */
2769 uint16_t u16AttachedDevHandle;
2770 /** Attached phy identifier */
2771 uint8_t u8AttachedPhyIdentifier;
2772 /** Reserved */
2773 uint8_t u8Reserved1;
2774 /** Attached device information */
2775 uint32_t u32AttachedDeviceInfo;
2776 /** Programmed link rate */
2777 uint8_t u8ProgrammedLinkRate;
2778 /** Hardware link rate */
2779 uint8_t u8HwLinkRate;
2780 /** Change count */
2781 uint8_t u8ChangeCount;
2782 /** Flags */
2783 uint8_t u8Flags;
2784 /** Phy information */
2785 uint32_t u32PhyInfo;
2786 } fields;
2787 } u;
2788} MptConfigurationPageSASPHY0, *PMptConfigurationPageSASPHY0;
2789#pragma pack()
2790AssertCompileSize(MptConfigurationPageSASPHY0, 36);
2791
2792#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_SET(x) ((x) & 0x3)
2793#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_GET(x) ((x) & 0x3)
2794#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_NO 0x0
2795#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_END 0x1
2796#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_EDGE_EXPANDER 0x2
2797#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2798#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SMP_INITIATOR RT_BIT(4)
2799#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_STP_INITIATOR RT_BIT(5)
2800#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SSP_INITIATOR RT_BIT(6)
2801#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SMP_TARGET RT_BIT(8)
2802#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_STP_TARGET RT_BIT(9)
2803#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SSP_TARGET RT_BIT(10)
2804#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2805#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_LSI RT_BIT(12)
2806#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_ATAPI RT_BIT(13)
2807#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SEP RT_BIT(14)
2808
2809/**
2810 * SAS PHY page 1 - Readonly
2811 */
2812#pragma pack(1)
2813typedef struct MptConfigurationPageSASPHY1
2814{
2815 /** Union. */
2816 union
2817 {
2818 /** Byte view - variable. */
2819 uint8_t abPageData[1];
2820 /** Field view. */
2821 struct
2822 {
2823 /** The omnipresent header. */
2824 MptExtendedConfigurationPageHeader ExtHeader;
2825 /** Reserved */
2826 uint32_t u32Reserved0;
2827 uint32_t u32InvalidDwordCound;
2828 uint32_t u32RunningDisparityErrorCount;
2829 uint32_t u32LossDwordSynchCount;
2830 uint32_t u32PhyResetProblemCount;
2831 } fields;
2832 } u;
2833} MptConfigurationPageSASPHY1, *PMptConfigurationPageSASPHY1;
2834#pragma pack()
2835AssertCompileSize(MptConfigurationPageSASPHY1, 28);
2836
2837/**
2838 * SAS Device page 0 - Readonly
2839 */
2840#pragma pack(1)
2841typedef struct MptConfigurationPageSASDevice0
2842{
2843 /** Union. */
2844 union
2845 {
2846 /** Byte view - variable. */
2847 uint8_t abPageData[1];
2848 /** Field view. */
2849 struct
2850 {
2851 /** The omnipresent header. */
2852 MptExtendedConfigurationPageHeader ExtHeader;
2853 /** Slot number */
2854 uint16_t u16Slot;
2855 /** Enclosure handle. */
2856 uint16_t u16EnclosureHandle;
2857 /** SAS address */
2858 SASADDRESS SASAddress;
2859 /** Parent device handle */
2860 uint16_t u16ParentDevHandle;
2861 /** Phy number */
2862 uint8_t u8PhyNum;
2863 /** Access status */
2864 uint8_t u8AccessStatus;
2865 /** Device handle */
2866 uint16_t u16DevHandle;
2867 /** Target ID */
2868 uint8_t u8TargetID;
2869 /** Bus */
2870 uint8_t u8Bus;
2871 /** Device info */
2872 uint32_t u32DeviceInfo;
2873 /** Flags */
2874 uint16_t u16Flags;
2875 /** Physical port */
2876 uint8_t u8PhysicalPort;
2877 /** Reserved */
2878 uint8_t u8Reserved0;
2879 } fields;
2880 } u;
2881} MptConfigurationPageSASDevice0, *PMptConfigurationPageSASDevice0;
2882#pragma pack()
2883AssertCompileSize(MptConfigurationPageSASDevice0, 36);
2884
2885#define LSILOGICSCSI_SASDEVICE0_STATUS_NO_ERRORS (0x00)
2886
2887#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_SET(x) ((x) & 0x3)
2888#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_GET(x) ((x) & 0x3)
2889#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_NO 0x0
2890#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_END 0x1
2891#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_EDGE_EXPANDER 0x2
2892#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2893#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SMP_INITIATOR RT_BIT(4)
2894#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_STP_INITIATOR RT_BIT(5)
2895#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SSP_INITIATOR RT_BIT(6)
2896#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SMP_TARGET RT_BIT(8)
2897#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_STP_TARGET RT_BIT(9)
2898#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SSP_TARGET RT_BIT(10)
2899#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2900#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_LSI RT_BIT(12)
2901#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_ATAPI RT_BIT(13)
2902#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SEP RT_BIT(14)
2903
2904#define LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_PRESENT (RT_BIT(0))
2905#define LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_MAPPED_TO_BUS_AND_TARGET_ID (RT_BIT(1))
2906#define LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_MAPPING_PERSISTENT (RT_BIT(2))
2907
2908/**
2909 * SAS Device page 1 - Readonly
2910 */
2911#pragma pack(1)
2912typedef struct MptConfigurationPageSASDevice1
2913{
2914 /** Union. */
2915 union
2916 {
2917 /** Byte view - variable. */
2918 uint8_t abPageData[1];
2919 /** Field view. */
2920 struct
2921 {
2922 /** The omnipresent header. */
2923 MptExtendedConfigurationPageHeader ExtHeader;
2924 /** Reserved */
2925 uint32_t u32Reserved0;
2926 /** SAS address */
2927 SASADDRESS SASAddress;
2928 /** Reserved */
2929 uint32_t u32Reserved;
2930 /** Device handle */
2931 uint16_t u16DevHandle;
2932 /** Target ID */
2933 uint8_t u8TargetID;
2934 /** Bus */
2935 uint8_t u8Bus;
2936 /** Initial REgister device FIS */
2937 uint32_t au32InitialRegDeviceFIS[5];
2938 } fields;
2939 } u;
2940} MptConfigurationPageSASDevice1, *PMptConfigurationPageSASDevice1;
2941#pragma pack()
2942AssertCompileSize(MptConfigurationPageSASDevice1, 48);
2943
2944/**
2945 * SAS Device page 2 - Read/Write persistent
2946 */
2947#pragma pack(1)
2948typedef struct MptConfigurationPageSASDevice2
2949{
2950 /** Union. */
2951 union
2952 {
2953 /** Byte view - variable. */
2954 uint8_t abPageData[1];
2955 /** Field view. */
2956 struct
2957 {
2958 /** The omnipresent header. */
2959 MptExtendedConfigurationPageHeader ExtHeader;
2960 /** Physical identifier */
2961 SASADDRESS SASAddress;
2962 /** Enclosure mapping */
2963 uint32_t u32EnclosureMapping;
2964 } fields;
2965 } u;
2966} MptConfigurationPageSASDevice2, *PMptConfigurationPageSASDevice2;
2967#pragma pack()
2968AssertCompileSize(MptConfigurationPageSASDevice2, 20);
2969
2970/**
2971 * A device entitiy containing all pages.
2972 */
2973typedef struct MptSASDevice
2974{
2975 /** Pointer to the next device if any. */
2976 struct MptSASDevice *pNext;
2977 /** Pointer to the previous device if any. */
2978 struct MptSASDevice *pPrev;
2979
2980 MptConfigurationPageSASDevice0 SASDevicePage0;
2981 MptConfigurationPageSASDevice1 SASDevicePage1;
2982 MptConfigurationPageSASDevice2 SASDevicePage2;
2983} MptSASDevice, *PMptSASDevice;
2984
2985/**
2986 * SAS Expander page 0 - Readonly
2987 */
2988#pragma pack(1)
2989typedef struct MptConfigurationPageSASExpander0
2990{
2991 /** Union. */
2992 union
2993 {
2994 /** Byte view - variable. */
2995 uint8_t abPageData[1];
2996 /** Field view. */
2997 struct
2998 {
2999 /** The omnipresent header. */
3000 MptExtendedConfigurationPageHeader ExtHeader;
3001 /** Physical port */
3002 uint8_t u8PhysicalPort;
3003 /** Reserved */
3004 uint8_t u8Reserved0;
3005 /** Enclosure handle */
3006 uint16_t u16EnclosureHandle;
3007 /** SAS address */
3008 SASADDRESS SASAddress;
3009 /** Discovery status */
3010 uint32_t u32DiscoveryStatus;
3011 /** Device handle. */
3012 uint16_t u16DevHandle;
3013 /** Parent device handle */
3014 uint16_t u16ParentDevHandle;
3015 /** Expander change count */
3016 uint16_t u16ExpanderChangeCount;
3017 /** Expander route indexes */
3018 uint16_t u16ExpanderRouteIndexes;
3019 /** Number of PHys in this expander */
3020 uint8_t u8NumPhys;
3021 /** SAS level */
3022 uint8_t u8SASLevel;
3023 /** Flags */
3024 uint8_t u8Flags;
3025 /** Reserved */
3026 uint8_t u8Reserved1;
3027 } fields;
3028 } u;
3029} MptConfigurationPageSASExpander0, *PMptConfigurationPageSASExpander0;
3030#pragma pack()
3031AssertCompileSize(MptConfigurationPageSASExpander0, 36);
3032
3033/**
3034 * SAS Expander page 1 - Readonly
3035 */
3036#pragma pack(1)
3037typedef struct MptConfigurationPageSASExpander1
3038{
3039 /** Union. */
3040 union
3041 {
3042 /** Byte view - variable. */
3043 uint8_t abPageData[1];
3044 /** Field view. */
3045 struct
3046 {
3047 /** The omnipresent header. */
3048 MptExtendedConfigurationPageHeader ExtHeader;
3049 /** Physical port */
3050 uint8_t u8PhysicalPort;
3051 /** Reserved */
3052 uint8_t u8Reserved0[3];
3053 /** Number of PHYs */
3054 uint8_t u8NumPhys;
3055 /** Number of the Phy the information in this page is for. */
3056 uint8_t u8Phy;
3057 /** Number of routing table entries */
3058 uint16_t u16NumTableEntriesProgrammed;
3059 /** Programmed link rate */
3060 uint8_t u8ProgrammedLinkRate;
3061 /** Hardware link rate */
3062 uint8_t u8HwLinkRate;
3063 /** Attached device handle */
3064 uint16_t u16AttachedDevHandle;
3065 /** Phy information */
3066 uint32_t u32PhyInfo;
3067 /** Attached device information */
3068 uint32_t u32AttachedDeviceInfo;
3069 /** Owner device handle. */
3070 uint16_t u16OwnerDevHandle;
3071 /** Change count */
3072 uint8_t u8ChangeCount;
3073 /** Negotiated link rate */
3074 uint8_t u8NegotiatedLinkRate;
3075 /** Phy identifier */
3076 uint8_t u8PhyIdentifier;
3077 /** Attached phy identifier */
3078 uint8_t u8AttachedPhyIdentifier;
3079 /** Reserved */
3080 uint8_t u8Reserved1;
3081 /** Discovery information */
3082 uint8_t u8DiscoveryInfo;
3083 /** Reserved */
3084 uint32_t u32Reserved;
3085 } fields;
3086 } u;
3087} MptConfigurationPageSASExpander1, *PMptConfigurationPageSASExpander1;
3088#pragma pack()
3089AssertCompileSize(MptConfigurationPageSASExpander1, 40);
3090
3091/**
3092 * Structure of all supported pages for the SCSI SPI controller.
3093 * Used to load the device state from older versions.
3094 */
3095typedef struct MptConfigurationPagesSupported_SSM_V2
3096{
3097 MptConfigurationPageManufacturing0 ManufacturingPage0;
3098 MptConfigurationPageManufacturing1 ManufacturingPage1;
3099 MptConfigurationPageManufacturing2 ManufacturingPage2;
3100 MptConfigurationPageManufacturing3 ManufacturingPage3;
3101 MptConfigurationPageManufacturing4 ManufacturingPage4;
3102 MptConfigurationPageIOUnit0 IOUnitPage0;
3103 MptConfigurationPageIOUnit1 IOUnitPage1;
3104 MptConfigurationPageIOUnit2 IOUnitPage2;
3105 MptConfigurationPageIOUnit3 IOUnitPage3;
3106 MptConfigurationPageIOC0 IOCPage0;
3107 MptConfigurationPageIOC1 IOCPage1;
3108 MptConfigurationPageIOC2 IOCPage2;
3109 MptConfigurationPageIOC3 IOCPage3;
3110 MptConfigurationPageIOC4 IOCPage4;
3111 MptConfigurationPageIOC6 IOCPage6;
3112 struct
3113 {
3114 MptConfigurationPageSCSISPIPort0 SCSISPIPortPage0;
3115 MptConfigurationPageSCSISPIPort1 SCSISPIPortPage1;
3116 MptConfigurationPageSCSISPIPort2 SCSISPIPortPage2;
3117 } aPortPages[1]; /* Currently only one port supported. */
3118 struct
3119 {
3120 struct
3121 {
3122 MptConfigurationPageSCSISPIDevice0 SCSISPIDevicePage0;
3123 MptConfigurationPageSCSISPIDevice1 SCSISPIDevicePage1;
3124 MptConfigurationPageSCSISPIDevice2 SCSISPIDevicePage2;
3125 MptConfigurationPageSCSISPIDevice3 SCSISPIDevicePage3;
3126 } aDevicePages[LSILOGICSCSI_PCI_SPI_DEVICES_MAX];
3127 } aBuses[1]; /* Only one bus at the moment. */
3128} MptConfigurationPagesSupported_SSM_V2, *PMptConfigurationPagesSupported_SSM_V2;
3129
3130typedef struct MptConfigurationPagesSpi
3131{
3132 struct
3133 {
3134 MptConfigurationPageSCSISPIPort0 SCSISPIPortPage0;
3135 MptConfigurationPageSCSISPIPort1 SCSISPIPortPage1;
3136 MptConfigurationPageSCSISPIPort2 SCSISPIPortPage2;
3137 } aPortPages[1]; /* Currently only one port supported. */
3138 struct
3139 {
3140 struct
3141 {
3142 MptConfigurationPageSCSISPIDevice0 SCSISPIDevicePage0;
3143 MptConfigurationPageSCSISPIDevice1 SCSISPIDevicePage1;
3144 MptConfigurationPageSCSISPIDevice2 SCSISPIDevicePage2;
3145 MptConfigurationPageSCSISPIDevice3 SCSISPIDevicePage3;
3146 } aDevicePages[LSILOGICSCSI_PCI_SPI_DEVICES_MAX];
3147 } aBuses[1]; /* Only one bus at the moment. */
3148} MptConfigurationPagesSpi, *PMptConfigurationPagesSpi;
3149
3150#pragma pack(1)
3151typedef struct MptConfigurationPagesSas
3152{
3153 MptConfigurationPageSASIOUnit0 SASIOUnitPage0;
3154 MptConfigurationPageSASIOUnit1 SASIOUnitPage1;
3155 MptConfigurationPageSASIOUnit2 SASIOUnitPage2;
3156 MptConfigurationPageSASIOUnit3 SASIOUnitPage3;
3157 struct
3158 {
3159 MptConfigurationPageSASPHY0 SASPHYPage0;
3160 MptConfigurationPageSASPHY1 SASPHYPage1;
3161 } aPHY[LSILOGICSCSI_PCI_SAS_PORTS_MAX];
3162
3163 /** Number of devices detected. */
3164 uint32_t cDevices;
3165 /** Pointer to the first SAS device. */
3166 R3PTRTYPE(PMptSASDevice) pSASDeviceHead;
3167 /** Pointer to the last SAS device. */
3168 R3PTRTYPE(PMptSASDevice) pSASDeviceTail;
3169} MptConfigurationPagesSas, *PMptConfigurationPagesSas;
3170#pragma pack()
3171
3172/**
3173 * Structure of all supported pages for both controllers.
3174 */
3175typedef struct MptConfigurationPagesSupported
3176{
3177 MptConfigurationPageManufacturing0 ManufacturingPage0;
3178 MptConfigurationPageManufacturing1 ManufacturingPage1;
3179 MptConfigurationPageManufacturing2 ManufacturingPage2;
3180 MptConfigurationPageManufacturing3 ManufacturingPage3;
3181 MptConfigurationPageManufacturing4 ManufacturingPage4;
3182 MptConfigurationPageManufacturing5 ManufacturingPage5;
3183 MptConfigurationPageManufacturing6 ManufacturingPage6;
3184 MptConfigurationPageManufacturing7 ManufacturingPage7;
3185 MptConfigurationPageManufacturing8 ManufacturingPage8;
3186 MptConfigurationPageManufacturing9 ManufacturingPage9;
3187 MptConfigurationPageManufacturing10 ManufacturingPage10;
3188 MptConfigurationPageIOUnit0 IOUnitPage0;
3189 MptConfigurationPageIOUnit1 IOUnitPage1;
3190 MptConfigurationPageIOUnit2 IOUnitPage2;
3191 MptConfigurationPageIOUnit3 IOUnitPage3;
3192 MptConfigurationPageIOUnit4 IOUnitPage4;
3193 MptConfigurationPageIOC0 IOCPage0;
3194 MptConfigurationPageIOC1 IOCPage1;
3195 MptConfigurationPageIOC2 IOCPage2;
3196 MptConfigurationPageIOC3 IOCPage3;
3197 MptConfigurationPageIOC4 IOCPage4;
3198 MptConfigurationPageIOC6 IOCPage6;
3199 /* BIOS page 0 is not described */
3200 MptConfigurationPageBIOS1 BIOSPage1;
3201 MptConfigurationPageBIOS2 BIOSPage2;
3202 /* BIOS page 3 is not described */
3203 MptConfigurationPageBIOS4 BIOSPage4;
3204
3205 /** Controller dependent data. */
3206 union
3207 {
3208 MptConfigurationPagesSpi SpiPages;
3209 MptConfigurationPagesSas SasPages;
3210 } u;
3211} MptConfigurationPagesSupported, *PMptConfigurationPagesSupported;
3212
3213/**
3214 * Possible SG element types.
3215 */
3216enum MPTSGENTRYTYPE
3217{
3218 MPTSGENTRYTYPE_TRANSACTION_CONTEXT = 0x00,
3219 MPTSGENTRYTYPE_SIMPLE = 0x01,
3220 MPTSGENTRYTYPE_CHAIN = 0x03
3221};
3222
3223/**
3224 * Register interface.
3225 */
3226
3227/**
3228 * Defined states that the SCSI controller can have.
3229 */
3230typedef enum LSILOGICSTATE
3231{
3232 /** Reset state. */
3233 LSILOGICSTATE_RESET = 0x00,
3234 /** Ready state. */
3235 LSILOGICSTATE_READY = 0x01,
3236 /** Operational state. */
3237 LSILOGICSTATE_OPERATIONAL = 0x02,
3238 /** Fault state. */
3239 LSILOGICSTATE_FAULT = 0x04,
3240 /** 32bit size hack */
3241 LSILOGICSTATE_32BIT_HACK = 0x7fffffff
3242} LSILOGICSTATE;
3243
3244/**
3245 * Which entity needs to initialize the controller
3246 * to get into the operational state.
3247 */
3248typedef enum LSILOGICWHOINIT
3249{
3250 /** Not initialized. */
3251 LSILOGICWHOINIT_NOT_INITIALIZED = 0x00,
3252 /** System BIOS. */
3253 LSILOGICWHOINIT_SYSTEM_BIOS = 0x01,
3254 /** ROM Bios. */
3255 LSILOGICWHOINIT_ROM_BIOS = 0x02,
3256 /** PCI Peer. */
3257 LSILOGICWHOINIT_PCI_PEER = 0x03,
3258 /** Host driver. */
3259 LSILOGICWHOINIT_HOST_DRIVER = 0x04,
3260 /** Manufacturing. */
3261 LSILOGICWHOINIT_MANUFACTURING = 0x05,
3262 /** 32bit size hack. */
3263 LSILOGICWHOINIT_32BIT_HACK = 0x7fffffff
3264} LSILOGICWHOINIT;
3265
3266
3267/**
3268 * IOC status codes.
3269 */
3270#define LSILOGIC_IOCSTATUS_SUCCESS 0x0000
3271#define LSILOGIC_IOCSTATUS_INVALID_FUNCTION 0x0001
3272#define LSILOGIC_IOCSTATUS_BUSY 0x0002
3273#define LSILOGIC_IOCSTATUS_INVALID_SGL 0x0003
3274#define LSILOGIC_IOCSTATUS_INTERNAL_ERROR 0x0004
3275#define LSILOGIC_IOCSTATUS_RESERVED 0x0005
3276#define LSILOGIC_IOCSTATUS_INSUFFICIENT_RESOURCES 0x0006
3277#define LSILOGIC_IOCSTATUS_INVALID_FIELD 0x0007
3278#define LSILOGIC_IOCSTATUS_INVALID_STATE 0x0008
3279#define LSILOGIC_IOCSTATUS_OP_STATE_NOT_SUPPOTED 0x0009
3280
3281/**
3282 * Size of the I/O and MMIO space.
3283 */
3284#define LSILOGIC_PCI_SPACE_IO_SIZE 256
3285#define LSILOGIC_PCI_SPACE_MEM_SIZE 128 * _1K
3286
3287/**
3288 * Doorbell register - Used to get the status of the controller and
3289 * initialise it.
3290 */
3291#define LSILOGIC_REG_DOORBELL 0x00
3292# define LSILOGIC_REG_DOORBELL_SET_STATE(enmState) (((enmState) & 0x0f) << 28)
3293# define LSILOGIC_REG_DOORBELL_SET_USED(fUsed) (((fUsed) ? 1 : 0) << 27)
3294# define LSILOGIC_REG_DOORBELL_SET_WHOINIT(enmWhoInit) (((enmWhoInit) & 0x07) << 24)
3295# define LSILOGIC_REG_DOORBELL_SET_FAULT_CODE(u16Code) (u16Code)
3296# define LSILOGIC_REG_DOORBELL_GET_FUNCTION(x) (((x) & 0xff000000) >> 24)
3297# define LSILOGIC_REG_DOORBELL_GET_SIZE(x) (((x) & 0x00ff0000) >> 16)
3298
3299/**
3300 * Functions which can be passed through the system doorbell.
3301 */
3302#define LSILOGIC_DOORBELL_FUNCTION_IOC_MSG_UNIT_RESET 0x40
3303#define LSILOGIC_DOORBELL_FUNCTION_IO_UNIT_RESET 0x41
3304#define LSILOGIC_DOORBELL_FUNCTION_HANDSHAKE 0x42
3305#define LSILOGIC_DOORBELL_FUNCTION_REPLY_FRAME_REMOVAL 0x43
3306
3307/**
3308 * Write sequence register for the diagnostic register.
3309 */
3310#define LSILOGIC_REG_WRITE_SEQUENCE 0x04
3311
3312/**
3313 * Diagnostic register - used to reset the controller.
3314 */
3315#define LSILOGIC_REG_HOST_DIAGNOSTIC 0x08
3316# define LSILOGIC_REG_HOST_DIAGNOSTIC_DIAG_MEM_ENABLE (RT_BIT(0))
3317# define LSILOGIC_REG_HOST_DIAGNOSTIC_DISABLE_ARM (RT_BIT(1))
3318# define LSILOGIC_REG_HOST_DIAGNOSTIC_RESET_ADAPTER (RT_BIT(2))
3319# define LSILOGIC_REG_HOST_DIAGNOSTIC_DIAG_RW_ENABLE (RT_BIT(4))
3320# define LSILOGIC_REG_HOST_DIAGNOSTIC_RESET_HISTORY (RT_BIT(5))
3321# define LSILOGIC_REG_HOST_DIAGNOSTIC_FLASH_BAD_SIG (RT_BIT(6))
3322# define LSILOGIC_REG_HOST_DIAGNOSTIC_DRWE (RT_BIT(7))
3323# define LSILOGIC_REG_HOST_DIAGNOSTIC_PREVENT_IOC_BOOT (RT_BIT(9))
3324# define LSILOGIC_REG_HOST_DIAGNOSTIC_CLEAR_FLASH_BAD_SIG (RT_BIT(10))
3325
3326#define LSILOGIC_REG_TEST_BASE_ADDRESS 0x0c
3327#define LSILOGIC_REG_DIAG_RW_DATA 0x10
3328#define LSILOGIC_REG_DIAG_RW_ADDRESS 0x14
3329
3330/**
3331 * Interrupt status register.
3332 */
3333#define LSILOGIC_REG_HOST_INTR_STATUS 0x30
3334# define LSILOGIC_REG_HOST_INTR_STATUS_W_MASK (RT_BIT(3))
3335# define LSILOGIC_REG_HOST_INTR_STATUS_DOORBELL_STS (RT_BIT(31))
3336# define LSILOGIC_REG_HOST_INTR_STATUS_REPLY_INTR (RT_BIT(3))
3337# define LSILOGIC_REG_HOST_INTR_STATUS_SYSTEM_DOORBELL (RT_BIT(0))
3338
3339/**
3340 * Interrupt mask register.
3341 */
3342#define LSILOGIC_REG_HOST_INTR_MASK 0x34
3343# define LSILOGIC_REG_HOST_INTR_MASK_W_MASK (RT_BIT(0) | RT_BIT(3) | RT_BIT(8) | RT_BIT(9))
3344# define LSILOGIC_REG_HOST_INTR_MASK_IRQ_ROUTING (RT_BIT(8) | RT_BIT(9))
3345# define LSILOGIC_REG_HOST_INTR_MASK_DOORBELL RT_BIT(0)
3346# define LSILOGIC_REG_HOST_INTR_MASK_REPLY RT_BIT(3)
3347
3348/**
3349 * Queue registers.
3350 */
3351#define LSILOGIC_REG_REQUEST_QUEUE 0x40
3352#define LSILOGIC_REG_REPLY_QUEUE 0x44
3353
3354#endif /* __DEVLSILOGICSCSI_H__ */
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