VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/vmsvga_include/svga3d_cmd.h@ 106889

最後變更 在這個檔案從106889是 105575,由 vboxsync 提交於 8 月 前

Devices/Graphics,WDDM: Implemented DEFINE_RASTERIZER_STATE_V2
  • 屬性 svn:eol-style 設為 native
檔案大小: 69.9 KB
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1/* SPDX-License-Identifier: GPL-2.0 OR MIT */
2/**********************************************************
3 * Copyright 1998-2020 VMware, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person
6 * obtaining a copy of this software and associated documentation
7 * files (the "Software"), to deal in the Software without
8 * restriction, including without limitation the rights to use, copy,
9 * modify, merge, publish, distribute, sublicense, and/or sell copies
10 * of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
20 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
21 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 **********************************************************/
26
27/*
28 * svga3d_cmd.h --
29 *
30 * SVGA 3d hardware cmd definitions
31 */
32
33#ifndef _SVGA3D_CMD_H_
34#define _SVGA3D_CMD_H_
35
36#define INCLUDE_ALLOW_MODULE
37#define INCLUDE_ALLOW_USERLEVEL
38#define INCLUDE_ALLOW_VMCORE
39
40#include "includeCheck.h"
41#include "svga3d_types.h"
42
43/*
44 * Identifiers for commands in the command FIFO.
45 *
46 * IDs between 1000 and 1039 (inclusive) were used by obsolete versions of
47 * the SVGA3D protocol and remain reserved; they should not be used in the
48 * future.
49 *
50 * IDs between 1040 and 2999 (inclusive) are available for use by the
51 * current SVGA3D protocol.
52 *
53 * FIFO clients other than SVGA3D should stay below 1000, or at 3000
54 * and up.
55 */
56
57typedef enum {
58 SVGA_3D_CMD_LEGACY_BASE = 1000,
59 SVGA_3D_CMD_BASE = 1040,
60
61 SVGA_3D_CMD_SURFACE_DEFINE = 1040,
62 SVGA_3D_CMD_SURFACE_DESTROY = 1041,
63 SVGA_3D_CMD_SURFACE_COPY = 1042,
64 SVGA_3D_CMD_SURFACE_STRETCHBLT = 1043,
65 SVGA_3D_CMD_SURFACE_DMA = 1044,
66 SVGA_3D_CMD_CONTEXT_DEFINE = 1045,
67 SVGA_3D_CMD_CONTEXT_DESTROY = 1046,
68 SVGA_3D_CMD_SETTRANSFORM = 1047,
69 SVGA_3D_CMD_SETZRANGE = 1048,
70 SVGA_3D_CMD_SETRENDERSTATE = 1049,
71 SVGA_3D_CMD_SETRENDERTARGET = 1050,
72 SVGA_3D_CMD_SETTEXTURESTATE = 1051,
73 SVGA_3D_CMD_SETMATERIAL = 1052,
74 SVGA_3D_CMD_SETLIGHTDATA = 1053,
75 SVGA_3D_CMD_SETLIGHTENABLED = 1054,
76 SVGA_3D_CMD_SETVIEWPORT = 1055,
77 SVGA_3D_CMD_SETCLIPPLANE = 1056,
78 SVGA_3D_CMD_CLEAR = 1057,
79 SVGA_3D_CMD_PRESENT = 1058,
80 SVGA_3D_CMD_SHADER_DEFINE = 1059,
81 SVGA_3D_CMD_SHADER_DESTROY = 1060,
82 SVGA_3D_CMD_SET_SHADER = 1061,
83 SVGA_3D_CMD_SET_SHADER_CONST = 1062,
84 SVGA_3D_CMD_DRAW_PRIMITIVES = 1063,
85 SVGA_3D_CMD_SETSCISSORRECT = 1064,
86 SVGA_3D_CMD_BEGIN_QUERY = 1065,
87 SVGA_3D_CMD_END_QUERY = 1066,
88 SVGA_3D_CMD_WAIT_FOR_QUERY = 1067,
89 SVGA_3D_CMD_PRESENT_READBACK = 1068,
90 SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN = 1069,
91 SVGA_3D_CMD_SURFACE_DEFINE_V2 = 1070,
92 SVGA_3D_CMD_GENERATE_MIPMAPS = 1071,
93 SVGA_3D_CMD_DEAD4 = 1072,
94 SVGA_3D_CMD_DEAD5 = 1073,
95 SVGA_3D_CMD_DEAD6 = 1074,
96 SVGA_3D_CMD_DEAD7 = 1075,
97 SVGA_3D_CMD_DEAD8 = 1076,
98 SVGA_3D_CMD_DEAD9 = 1077,
99 SVGA_3D_CMD_DEAD10 = 1078,
100 SVGA_3D_CMD_DEAD11 = 1079,
101 SVGA_3D_CMD_ACTIVATE_SURFACE = 1080,
102 SVGA_3D_CMD_DEACTIVATE_SURFACE = 1081,
103 SVGA_3D_CMD_SCREEN_DMA = 1082,
104#ifndef VBOX
105 SVGA_3D_CMD_DEAD1 = 1083,
106#else
107 SVGA_3D_CMD_VB_DX_CLEAR_RENDERTARGET_VIEW_REGION = 1083,
108#endif
109 SVGA_3D_CMD_DEAD2 = 1084,
110
111 SVGA_3D_CMD_DEAD12 = 1085,
112 SVGA_3D_CMD_DEAD13 = 1086,
113 SVGA_3D_CMD_DEAD14 = 1087,
114 SVGA_3D_CMD_DEAD15 = 1088,
115 SVGA_3D_CMD_DEAD16 = 1089,
116 SVGA_3D_CMD_DEAD17 = 1090,
117
118 SVGA_3D_CMD_SET_OTABLE_BASE = 1091,
119 SVGA_3D_CMD_READBACK_OTABLE = 1092,
120
121 SVGA_3D_CMD_DEFINE_GB_MOB = 1093,
122 SVGA_3D_CMD_DESTROY_GB_MOB = 1094,
123 SVGA_3D_CMD_DEAD3 = 1095,
124 SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING = 1096,
125
126 SVGA_3D_CMD_DEFINE_GB_SURFACE = 1097,
127 SVGA_3D_CMD_DESTROY_GB_SURFACE = 1098,
128 SVGA_3D_CMD_BIND_GB_SURFACE = 1099,
129 SVGA_3D_CMD_COND_BIND_GB_SURFACE = 1100,
130 SVGA_3D_CMD_UPDATE_GB_IMAGE = 1101,
131 SVGA_3D_CMD_UPDATE_GB_SURFACE = 1102,
132 SVGA_3D_CMD_READBACK_GB_IMAGE = 1103,
133 SVGA_3D_CMD_READBACK_GB_SURFACE = 1104,
134 SVGA_3D_CMD_INVALIDATE_GB_IMAGE = 1105,
135 SVGA_3D_CMD_INVALIDATE_GB_SURFACE = 1106,
136
137 SVGA_3D_CMD_DEFINE_GB_CONTEXT = 1107,
138 SVGA_3D_CMD_DESTROY_GB_CONTEXT = 1108,
139 SVGA_3D_CMD_BIND_GB_CONTEXT = 1109,
140 SVGA_3D_CMD_READBACK_GB_CONTEXT = 1110,
141 SVGA_3D_CMD_INVALIDATE_GB_CONTEXT = 1111,
142
143 SVGA_3D_CMD_DEFINE_GB_SHADER = 1112,
144 SVGA_3D_CMD_DESTROY_GB_SHADER = 1113,
145 SVGA_3D_CMD_BIND_GB_SHADER = 1114,
146
147 SVGA_3D_CMD_SET_OTABLE_BASE64 = 1115,
148
149 SVGA_3D_CMD_BEGIN_GB_QUERY = 1116,
150 SVGA_3D_CMD_END_GB_QUERY = 1117,
151 SVGA_3D_CMD_WAIT_FOR_GB_QUERY = 1118,
152
153 SVGA_3D_CMD_NOP = 1119,
154
155 SVGA_3D_CMD_ENABLE_GART = 1120,
156 SVGA_3D_CMD_DISABLE_GART = 1121,
157 SVGA_3D_CMD_MAP_MOB_INTO_GART = 1122,
158 SVGA_3D_CMD_UNMAP_GART_RANGE = 1123,
159
160 SVGA_3D_CMD_DEFINE_GB_SCREENTARGET = 1124,
161 SVGA_3D_CMD_DESTROY_GB_SCREENTARGET = 1125,
162 SVGA_3D_CMD_BIND_GB_SCREENTARGET = 1126,
163 SVGA_3D_CMD_UPDATE_GB_SCREENTARGET = 1127,
164
165 SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL = 1128,
166 SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL = 1129,
167
168 SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE = 1130,
169
170 SVGA_3D_CMD_GB_SCREEN_DMA = 1131,
171 SVGA_3D_CMD_BIND_GB_SURFACE_WITH_PITCH = 1132,
172 SVGA_3D_CMD_GB_MOB_FENCE = 1133,
173 SVGA_3D_CMD_DEFINE_GB_SURFACE_V2 = 1134,
174 SVGA_3D_CMD_DEFINE_GB_MOB64 = 1135,
175 SVGA_3D_CMD_REDEFINE_GB_MOB64 = 1136,
176 SVGA_3D_CMD_NOP_ERROR = 1137,
177
178 SVGA_3D_CMD_SET_VERTEX_STREAMS = 1138,
179 SVGA_3D_CMD_SET_VERTEX_DECLS = 1139,
180 SVGA_3D_CMD_SET_VERTEX_DIVISORS = 1140,
181 SVGA_3D_CMD_DRAW = 1141,
182 SVGA_3D_CMD_DRAW_INDEXED = 1142,
183
184 /*
185 * DX10 Commands
186 */
187 SVGA_3D_CMD_DX_MIN = 1143,
188 SVGA_3D_CMD_DX_DEFINE_CONTEXT = 1143,
189 SVGA_3D_CMD_DX_DESTROY_CONTEXT = 1144,
190 SVGA_3D_CMD_DX_BIND_CONTEXT = 1145,
191 SVGA_3D_CMD_DX_READBACK_CONTEXT = 1146,
192 SVGA_3D_CMD_DX_INVALIDATE_CONTEXT = 1147,
193 SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER = 1148,
194 SVGA_3D_CMD_DX_SET_SHADER_RESOURCES = 1149,
195 SVGA_3D_CMD_DX_SET_SHADER = 1150,
196 SVGA_3D_CMD_DX_SET_SAMPLERS = 1151,
197 SVGA_3D_CMD_DX_DRAW = 1152,
198 SVGA_3D_CMD_DX_DRAW_INDEXED = 1153,
199 SVGA_3D_CMD_DX_DRAW_INSTANCED = 1154,
200 SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED = 1155,
201 SVGA_3D_CMD_DX_DRAW_AUTO = 1156,
202 SVGA_3D_CMD_DX_SET_INPUT_LAYOUT = 1157,
203 SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS = 1158,
204 SVGA_3D_CMD_DX_SET_INDEX_BUFFER = 1159,
205 SVGA_3D_CMD_DX_SET_TOPOLOGY = 1160,
206 SVGA_3D_CMD_DX_SET_RENDERTARGETS = 1161,
207 SVGA_3D_CMD_DX_SET_BLEND_STATE = 1162,
208 SVGA_3D_CMD_DX_SET_DEPTHSTENCIL_STATE = 1163,
209 SVGA_3D_CMD_DX_SET_RASTERIZER_STATE = 1164,
210 SVGA_3D_CMD_DX_DEFINE_QUERY = 1165,
211 SVGA_3D_CMD_DX_DESTROY_QUERY = 1166,
212 SVGA_3D_CMD_DX_BIND_QUERY = 1167,
213 SVGA_3D_CMD_DX_SET_QUERY_OFFSET = 1168,
214 SVGA_3D_CMD_DX_BEGIN_QUERY = 1169,
215 SVGA_3D_CMD_DX_END_QUERY = 1170,
216 SVGA_3D_CMD_DX_READBACK_QUERY = 1171,
217 SVGA_3D_CMD_DX_SET_PREDICATION = 1172,
218 SVGA_3D_CMD_DX_SET_SOTARGETS = 1173,
219 SVGA_3D_CMD_DX_SET_VIEWPORTS = 1174,
220 SVGA_3D_CMD_DX_SET_SCISSORRECTS = 1175,
221 SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW = 1176,
222 SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW = 1177,
223 SVGA_3D_CMD_DX_PRED_COPY_REGION = 1178,
224 SVGA_3D_CMD_DX_PRED_COPY = 1179,
225 SVGA_3D_CMD_DX_PRESENTBLT = 1180,
226 SVGA_3D_CMD_DX_GENMIPS = 1181,
227 SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE = 1182,
228 SVGA_3D_CMD_DX_READBACK_SUBRESOURCE = 1183,
229 SVGA_3D_CMD_DX_INVALIDATE_SUBRESOURCE = 1184,
230 SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW = 1185,
231 SVGA_3D_CMD_DX_DESTROY_SHADERRESOURCE_VIEW = 1186,
232 SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW = 1187,
233 SVGA_3D_CMD_DX_DESTROY_RENDERTARGET_VIEW = 1188,
234 SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW = 1189,
235 SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_VIEW = 1190,
236 SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT = 1191,
237 SVGA_3D_CMD_DX_DESTROY_ELEMENTLAYOUT = 1192,
238 SVGA_3D_CMD_DX_DEFINE_BLEND_STATE = 1193,
239 SVGA_3D_CMD_DX_DESTROY_BLEND_STATE = 1194,
240 SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_STATE = 1195,
241 SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_STATE = 1196,
242 SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE = 1197,
243 SVGA_3D_CMD_DX_DESTROY_RASTERIZER_STATE = 1198,
244 SVGA_3D_CMD_DX_DEFINE_SAMPLER_STATE = 1199,
245 SVGA_3D_CMD_DX_DESTROY_SAMPLER_STATE = 1200,
246 SVGA_3D_CMD_DX_DEFINE_SHADER = 1201,
247 SVGA_3D_CMD_DX_DESTROY_SHADER = 1202,
248 SVGA_3D_CMD_DX_BIND_SHADER = 1203,
249 SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT = 1204,
250 SVGA_3D_CMD_DX_DESTROY_STREAMOUTPUT = 1205,
251 SVGA_3D_CMD_DX_SET_STREAMOUTPUT = 1206,
252 SVGA_3D_CMD_DX_SET_COTABLE = 1207,
253 SVGA_3D_CMD_DX_READBACK_COTABLE = 1208,
254 SVGA_3D_CMD_DX_BUFFER_COPY = 1209,
255 SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER = 1210,
256 SVGA_3D_CMD_DX_SURFACE_COPY_AND_READBACK = 1211,
257 SVGA_3D_CMD_DX_MOVE_QUERY = 1212,
258 SVGA_3D_CMD_DX_BIND_ALL_QUERY = 1213,
259 SVGA_3D_CMD_DX_READBACK_ALL_QUERY = 1214,
260 SVGA_3D_CMD_DX_PRED_TRANSFER_FROM_BUFFER = 1215,
261 SVGA_3D_CMD_DX_MOB_FENCE_64 = 1216,
262 SVGA_3D_CMD_DX_BIND_ALL_SHADER = 1217,
263 SVGA_3D_CMD_DX_HINT = 1218,
264 SVGA_3D_CMD_DX_BUFFER_UPDATE = 1219,
265 SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET = 1220,
266 SVGA_3D_CMD_DX_SET_PS_CONSTANT_BUFFER_OFFSET = 1221,
267 SVGA_3D_CMD_DX_SET_GS_CONSTANT_BUFFER_OFFSET = 1222,
268 SVGA_3D_CMD_DX_SET_HS_CONSTANT_BUFFER_OFFSET = 1223,
269 SVGA_3D_CMD_DX_SET_DS_CONSTANT_BUFFER_OFFSET = 1224,
270 SVGA_3D_CMD_DX_SET_CS_CONSTANT_BUFFER_OFFSET = 1225,
271
272 SVGA_3D_CMD_DX_COND_BIND_ALL_SHADER = 1226,
273 SVGA_3D_CMD_DX_MAX = 1227,
274
275 SVGA_3D_CMD_SCREEN_COPY = 1227,
276
277 SVGA_3D_CMD_RESERVED1 = 1228,
278 SVGA_3D_CMD_RESERVED2 = 1229,
279 SVGA_3D_CMD_RESERVED3 = 1230,
280 SVGA_3D_CMD_RESERVED4 = 1231,
281 SVGA_3D_CMD_RESERVED5 = 1232,
282 SVGA_3D_CMD_RESERVED6 = 1233,
283 SVGA_3D_CMD_RESERVED7 = 1234,
284 SVGA_3D_CMD_RESERVED8 = 1235,
285
286 SVGA_3D_CMD_GROW_OTABLE = 1236,
287 SVGA_3D_CMD_DX_GROW_COTABLE = 1237,
288 SVGA_3D_CMD_INTRA_SURFACE_COPY = 1238,
289
290 SVGA_3D_CMD_DEFINE_GB_SURFACE_V3 = 1239,
291
292 SVGA_3D_CMD_DX_RESOLVE_COPY = 1240,
293 SVGA_3D_CMD_DX_PRED_RESOLVE_COPY = 1241,
294 SVGA_3D_CMD_DX_PRED_CONVERT_REGION = 1242,
295 SVGA_3D_CMD_DX_PRED_CONVERT = 1243,
296 SVGA_3D_CMD_WHOLE_SURFACE_COPY = 1244,
297
298 SVGA_3D_CMD_DX_DEFINE_UA_VIEW = 1245,
299 SVGA_3D_CMD_DX_DESTROY_UA_VIEW = 1246,
300 SVGA_3D_CMD_DX_CLEAR_UA_VIEW_UINT = 1247,
301 SVGA_3D_CMD_DX_CLEAR_UA_VIEW_FLOAT = 1248,
302 SVGA_3D_CMD_DX_COPY_STRUCTURE_COUNT = 1249,
303 SVGA_3D_CMD_DX_SET_UA_VIEWS = 1250,
304
305 SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED_INDIRECT = 1251,
306 SVGA_3D_CMD_DX_DRAW_INSTANCED_INDIRECT = 1252,
307 SVGA_3D_CMD_DX_DISPATCH = 1253,
308 SVGA_3D_CMD_DX_DISPATCH_INDIRECT = 1254,
309
310 SVGA_3D_CMD_WRITE_ZERO_SURFACE = 1255,
311 SVGA_3D_CMD_HINT_ZERO_SURFACE = 1256,
312 SVGA_3D_CMD_DX_TRANSFER_TO_BUFFER = 1257,
313 SVGA_3D_CMD_DX_SET_STRUCTURE_COUNT = 1258,
314
315 SVGA_3D_CMD_LOGICOPS_BITBLT = 1259,
316 SVGA_3D_CMD_LOGICOPS_TRANSBLT = 1260,
317 SVGA_3D_CMD_LOGICOPS_STRETCHBLT = 1261,
318 SVGA_3D_CMD_LOGICOPS_COLORFILL = 1262,
319 SVGA_3D_CMD_LOGICOPS_ALPHABLEND = 1263,
320 SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND = 1264,
321
322 SVGA_3D_CMD_RESERVED2_1 = 1265,
323
324 SVGA_3D_CMD_RESERVED2_2 = 1266,
325 SVGA_3D_CMD_DEFINE_GB_SURFACE_V4 = 1267,
326 SVGA_3D_CMD_DX_SET_CS_UA_VIEWS = 1268,
327 SVGA_3D_CMD_DX_SET_MIN_LOD = 1269,
328 SVGA_3D_CMD_RESERVED2_3 = 1270,
329 SVGA_3D_CMD_RESERVED2_4 = 1271,
330 SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW_V2 = 1272,
331 SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT_WITH_MOB = 1273,
332 SVGA_3D_CMD_DX_SET_SHADER_IFACE = 1274,
333 SVGA_3D_CMD_DX_BIND_STREAMOUTPUT = 1275,
334 SVGA_3D_CMD_SURFACE_STRETCHBLT_NON_MS_TO_MS = 1276,
335 SVGA_3D_CMD_DX_BIND_SHADER_IFACE = 1277,
336
337 SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE_V2 = 1288,
338
339 SVGA_3D_CMD_MAX = 1303,
340 SVGA_3D_CMD_FUTURE_MAX = 3000
341
342#ifdef VBOX
343 ,
344 /* VirtualBox commands */
345 VBSVGA_3D_CMD_BASE = 1000000, /* Arbitrary */
346 VBSVGA_3D_CMD_MIN = VBSVGA_3D_CMD_BASE,
347 VBSVGA_3D_CMD_DX_DEFINE_VIDEO_PROCESSOR = VBSVGA_3D_CMD_BASE + 0,
348 VBSVGA_3D_CMD_DX_DEFINE_VIDEO_DECODER_OUTPUT_VIEW = VBSVGA_3D_CMD_BASE + 1,
349 VBSVGA_3D_CMD_DX_DEFINE_VIDEO_DECODER = VBSVGA_3D_CMD_BASE + 2,
350 VBSVGA_3D_CMD_DX_VIDEO_DECODER_BEGIN_FRAME = VBSVGA_3D_CMD_BASE + 3,
351 VBSVGA_3D_CMD_DX_VIDEO_DECODER_SUBMIT_BUFFERS = VBSVGA_3D_CMD_BASE + 4,
352 VBSVGA_3D_CMD_DX_VIDEO_DECODER_END_FRAME = VBSVGA_3D_CMD_BASE + 5,
353 VBSVGA_3D_CMD_DX_DEFINE_VIDEO_PROCESSOR_INPUT_VIEW = VBSVGA_3D_CMD_BASE + 6,
354 VBSVGA_3D_CMD_DX_DEFINE_VIDEO_PROCESSOR_OUTPUT_VIEW = VBSVGA_3D_CMD_BASE + 7,
355 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_BLT = VBSVGA_3D_CMD_BASE + 8,
356 VBSVGA_3D_CMD_DX_DESTROY_VIDEO_DECODER = VBSVGA_3D_CMD_BASE + 9,
357 VBSVGA_3D_CMD_DX_DESTROY_VIDEO_DECODER_OUTPUT_VIEW = VBSVGA_3D_CMD_BASE + 10,
358 VBSVGA_3D_CMD_DX_DESTROY_VIDEO_PROCESSOR = VBSVGA_3D_CMD_BASE + 11,
359 VBSVGA_3D_CMD_DX_DESTROY_VIDEO_PROCESSOR_INPUT_VIEW = VBSVGA_3D_CMD_BASE + 12,
360 VBSVGA_3D_CMD_DX_DESTROY_VIDEO_PROCESSOR_OUTPUT_VIEW = VBSVGA_3D_CMD_BASE + 13,
361 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_TARGET_RECT = VBSVGA_3D_CMD_BASE + 14,
362 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_BACKGROUND_COLOR = VBSVGA_3D_CMD_BASE + 15,
363 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_COLOR_SPACE = VBSVGA_3D_CMD_BASE + 16,
364 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_ALPHA_FILL_MODE = VBSVGA_3D_CMD_BASE + 17,
365 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_CONSTRICTION = VBSVGA_3D_CMD_BASE + 18,
366 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_STEREO_MODE = VBSVGA_3D_CMD_BASE + 19,
367 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_FRAME_FORMAT = VBSVGA_3D_CMD_BASE + 20,
368 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_COLOR_SPACE = VBSVGA_3D_CMD_BASE + 21,
369 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_OUTPUT_RATE = VBSVGA_3D_CMD_BASE + 22,
370 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_SOURCE_RECT = VBSVGA_3D_CMD_BASE + 23,
371 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_DEST_RECT = VBSVGA_3D_CMD_BASE + 24,
372 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_ALPHA = VBSVGA_3D_CMD_BASE + 25,
373 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_PALETTE = VBSVGA_3D_CMD_BASE + 26,
374 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_PIXEL_ASPECT_RATIO = VBSVGA_3D_CMD_BASE + 27,
375 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_LUMA_KEY = VBSVGA_3D_CMD_BASE + 28,
376 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_STEREO_FORMAT = VBSVGA_3D_CMD_BASE + 29,
377 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_AUTO_PROCESSING_MODE = VBSVGA_3D_CMD_BASE + 30,
378 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_FILTER = VBSVGA_3D_CMD_BASE + 31,
379 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_ROTATION = VBSVGA_3D_CMD_BASE + 32,
380 VBSVGA_3D_CMD_DX_GET_VIDEO_CAPABILITY = VBSVGA_3D_CMD_BASE + 33,
381 VBSVGA_3D_CMD_DX_CLEAR_RTV = VBSVGA_3D_CMD_BASE + 34,
382 VBSVGA_3D_CMD_DX_CLEAR_UAV = VBSVGA_3D_CMD_BASE + 35,
383 VBSVGA_3D_CMD_DX_CLEAR_VDOV = VBSVGA_3D_CMD_BASE + 36,
384 VBSVGA_3D_CMD_DX_CLEAR_VPIV = VBSVGA_3D_CMD_BASE + 37,
385 VBSVGA_3D_CMD_DX_CLEAR_VPOV = VBSVGA_3D_CMD_BASE + 38,
386 VBSVGA_3D_CMD_MAX = VBSVGA_3D_CMD_BASE + 39
387#endif
388} SVGAFifo3dCmdId;
389
390#define SVGA_NUM_3D_CMD (SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE)
391#ifdef VBOX
392#define VBSVGA_NUM_COMMANDS (SVGA_NUM_3D_CMD + (VBSVGA_3D_CMD_MAX - VBSVGA_3D_CMD_BASE))
393#endif
394
395/*
396 * FIFO command format definitions:
397 */
398
399/*
400 * The data size header following cmdNum for every 3d command
401 */
402typedef
403#include "vmware_pack_begin.h"
404struct {
405 uint32 id;
406 uint32 size;
407}
408#include "vmware_pack_end.h"
409SVGA3dCmdHeader;
410
411typedef
412#include "vmware_pack_begin.h"
413struct {
414 uint32 numMipLevels;
415}
416#include "vmware_pack_end.h"
417SVGA3dSurfaceFace;
418
419typedef
420#include "vmware_pack_begin.h"
421struct {
422 uint32 sid;
423 SVGA3dSurface1Flags surfaceFlags;
424 SVGA3dSurfaceFormat format;
425
426 /*
427 * If surfaceFlags has SVGA3D_SURFACE_CUBEMAP bit set, all SVGA3dSurfaceFace
428 * structures must have the same value of numMipLevels field.
429 * Otherwise, all but the first SVGA3dSurfaceFace structures must have the
430 * numMipLevels set to 0.
431 */
432 SVGA3dSurfaceFace face[SVGA3D_MAX_SURFACE_FACES];
433
434 /*
435 * Followed by an SVGA3dSize structure for each mip level in each face.
436 *
437 * A note on surface sizes: Sizes are always specified in pixels,
438 * even if the true surface size is not a multiple of the minimum
439 * block size of the surface's format. For example, a 3x3x1 DXT1
440 * compressed texture would actually be stored as a 4x4x1 image in
441 * memory.
442 */
443}
444#include "vmware_pack_end.h"
445SVGA3dCmdDefineSurface; /* SVGA_3D_CMD_SURFACE_DEFINE */
446
447typedef
448#include "vmware_pack_begin.h"
449struct {
450 uint32 sid;
451 SVGA3dSurface1Flags surfaceFlags;
452 SVGA3dSurfaceFormat format;
453
454 /*
455 * If surfaceFlags has SVGA3D_SURFACE_CUBEMAP bit set, all SVGA3dSurfaceFace
456 * structures must have the same value of numMipLevels field.
457 * Otherwise, all but the first SVGA3dSurfaceFace structures must have the
458 * numMipLevels set to 0.
459 */
460 SVGA3dSurfaceFace face[SVGA3D_MAX_SURFACE_FACES];
461 uint32 multisampleCount;
462 SVGA3dTextureFilter autogenFilter;
463
464 /*
465 * Followed by an SVGA3dSize structure for each mip level in each face.
466 *
467 * A note on surface sizes: Sizes are always specified in pixels,
468 * even if the true surface size is not a multiple of the minimum
469 * block size of the surface's format. For example, a 3x3x1 DXT1
470 * compressed texture would actually be stored as a 4x4x1 image in
471 * memory.
472 */
473}
474#include "vmware_pack_end.h"
475SVGA3dCmdDefineSurface_v2; /* SVGA_3D_CMD_SURFACE_DEFINE_V2 */
476
477typedef
478#include "vmware_pack_begin.h"
479struct {
480 uint32 sid;
481}
482#include "vmware_pack_end.h"
483SVGA3dCmdDestroySurface; /* SVGA_3D_CMD_SURFACE_DESTROY */
484
485typedef
486#include "vmware_pack_begin.h"
487struct {
488 uint32 cid;
489}
490#include "vmware_pack_end.h"
491SVGA3dCmdDefineContext; /* SVGA_3D_CMD_CONTEXT_DEFINE */
492
493typedef
494#include "vmware_pack_begin.h"
495struct {
496 uint32 cid;
497}
498#include "vmware_pack_end.h"
499SVGA3dCmdDestroyContext; /* SVGA_3D_CMD_CONTEXT_DESTROY */
500
501typedef
502#include "vmware_pack_begin.h"
503struct {
504 uint32 cid;
505 SVGA3dClearFlag clearFlag;
506 uint32 color;
507 float depth;
508 uint32 stencil;
509 /* Followed by variable number of SVGA3dRect structures */
510}
511#include "vmware_pack_end.h"
512SVGA3dCmdClear; /* SVGA_3D_CMD_CLEAR */
513
514typedef
515#include "vmware_pack_begin.h"
516struct {
517 SVGA3dLightType type;
518 SVGA3dBool inWorldSpace;
519 float diffuse[4];
520 float specular[4];
521 float ambient[4];
522 float position[4];
523 float direction[4];
524 float range;
525 float falloff;
526 float attenuation0;
527 float attenuation1;
528 float attenuation2;
529 float theta;
530 float phi;
531}
532#include "vmware_pack_end.h"
533SVGA3dLightData;
534
535typedef
536#include "vmware_pack_begin.h"
537struct {
538 uint32 sid;
539 /* Followed by variable number of SVGA3dCopyRect structures */
540}
541#include "vmware_pack_end.h"
542SVGA3dCmdPresent; /* SVGA_3D_CMD_PRESENT */
543
544typedef
545#include "vmware_pack_begin.h"
546struct {
547 SVGA3dRenderStateName state;
548 union {
549 uint32 uintValue;
550 float floatValue;
551 };
552}
553#include "vmware_pack_end.h"
554SVGA3dRenderState;
555
556typedef
557#include "vmware_pack_begin.h"
558struct {
559 uint32 cid;
560 /* Followed by variable number of SVGA3dRenderState structures */
561}
562#include "vmware_pack_end.h"
563SVGA3dCmdSetRenderState; /* SVGA_3D_CMD_SETRENDERSTATE */
564
565typedef
566#include "vmware_pack_begin.h"
567struct {
568 uint32 cid;
569 SVGA3dRenderTargetType type;
570 SVGA3dSurfaceImageId target;
571}
572#include "vmware_pack_end.h"
573SVGA3dCmdSetRenderTarget; /* SVGA_3D_CMD_SETRENDERTARGET */
574
575typedef
576#include "vmware_pack_begin.h"
577struct {
578 SVGA3dSurfaceImageId src;
579 SVGA3dSurfaceImageId dest;
580 /* Followed by variable number of SVGA3dCopyBox structures */
581}
582#include "vmware_pack_end.h"
583SVGA3dCmdSurfaceCopy; /* SVGA_3D_CMD_SURFACE_COPY */
584
585/*
586 * Perform a surface copy within the same image.
587 * The src/dest boxes are allowed to overlap.
588 */
589typedef
590#include "vmware_pack_begin.h"
591struct {
592 SVGA3dSurfaceImageId surface;
593 SVGA3dCopyBox box;
594}
595#include "vmware_pack_end.h"
596SVGA3dCmdIntraSurfaceCopy; /* SVGA_3D_CMD_INTRA_SURFACE_COPY */
597
598typedef
599#include "vmware_pack_begin.h"
600struct {
601 uint32 srcSid;
602 uint32 destSid;
603}
604#include "vmware_pack_end.h"
605SVGA3dCmdWholeSurfaceCopy; /* SVGA_3D_CMD_WHOLE_SURFACE_COPY */
606
607typedef
608#include "vmware_pack_begin.h"
609struct {
610 SVGA3dSurfaceImageId src;
611 SVGA3dSurfaceImageId dest;
612 SVGA3dBox boxSrc;
613 SVGA3dBox boxDest;
614}
615#include "vmware_pack_end.h"
616SVGA3dCmdSurfaceStretchBltNonMSToMS;
617/* SVGA_3D_CMD_SURFACE_STRETCHBLT_NON_MS_TO_MS */
618
619typedef
620#include "vmware_pack_begin.h"
621struct {
622 SVGA3dSurfaceImageId src;
623 SVGA3dSurfaceImageId dest;
624 SVGA3dBox boxSrc;
625 SVGA3dBox boxDest;
626 SVGA3dStretchBltMode mode;
627}
628#include "vmware_pack_end.h"
629SVGA3dCmdSurfaceStretchBlt; /* SVGA_3D_CMD_SURFACE_STRETCHBLT */
630
631typedef
632#include "vmware_pack_begin.h"
633struct {
634 /*
635 * If the discard flag is present in a surface DMA operation, the host may
636 * discard the contents of the current mipmap level and face of the target
637 * surface before applying the surface DMA contents.
638 */
639 uint32 discard : 1;
640
641 /*
642 * If the unsynchronized flag is present, the host may perform this upload
643 * without syncing to pending reads on this surface.
644 */
645 uint32 unsynchronized : 1;
646
647 /*
648 * Guests *MUST* set the reserved bits to 0 before submitting the command
649 * suffix as future flags may occupy these bits.
650 */
651 uint32 reserved : 30;
652}
653#include "vmware_pack_end.h"
654SVGA3dSurfaceDMAFlags;
655
656typedef
657#include "vmware_pack_begin.h"
658struct {
659 SVGAGuestImage guest;
660 SVGA3dSurfaceImageId host;
661 SVGA3dTransferType transfer;
662
663 /*
664 * Followed by variable number of SVGA3dCopyBox structures. For consistency
665 * in all clipping logic and coordinate translation, we define the
666 * "source" in each copyBox as the guest image and the
667 * "destination" as the host image, regardless of transfer
668 * direction.
669 *
670 * For efficiency, the SVGA3D device is free to copy more data than
671 * specified. For example, it may round copy boxes outwards such
672 * that they lie on particular alignment boundaries.
673 */
674}
675#include "vmware_pack_end.h"
676SVGA3dCmdSurfaceDMA; /* SVGA_3D_CMD_SURFACE_DMA */
677
678/*
679 * SVGA3dCmdSurfaceDMASuffix --
680 *
681 * This is a command suffix that will appear after a SurfaceDMA command in
682 * the FIFO. It contains some extra information that hosts may use to
683 * optimize performance or protect the guest. This suffix exists to preserve
684 * backwards compatibility while also allowing for new functionality to be
685 * implemented.
686 */
687
688typedef
689#include "vmware_pack_begin.h"
690struct {
691 uint32 suffixSize;
692
693 /*
694 * The maximum offset is used to determine the maximum offset from the
695 * guestPtr base address that will be accessed or written to during this
696 * surfaceDMA. If the suffix is supported, the host will respect this
697 * boundary while performing surface DMAs.
698 *
699 * Defaults to MAX_UINT32
700 */
701 uint32 maximumOffset;
702
703 /*
704 * A set of flags that describes optimizations that the host may perform
705 * while performing this surface DMA operation. The guest should never rely
706 * on behaviour that is different when these flags are set for correctness.
707 *
708 * Defaults to 0
709 */
710 SVGA3dSurfaceDMAFlags flags;
711}
712#include "vmware_pack_end.h"
713SVGA3dCmdSurfaceDMASuffix;
714
715/*
716 * SVGA_3D_CMD_DRAW_PRIMITIVES --
717 *
718 * This command is the SVGA3D device's generic drawing entry point.
719 * It can draw multiple ranges of primitives, optionally using an
720 * index buffer, using an arbitrary collection of vertex buffers.
721 *
722 * Each SVGA3dVertexDecl defines a distinct vertex array to bind
723 * during this draw call. The declarations specify which surface
724 * the vertex data lives in, what that vertex data is used for,
725 * and how to interpret it.
726 *
727 * Each SVGA3dPrimitiveRange defines a collection of primitives
728 * to render using the same vertex arrays. An index buffer is
729 * optional.
730 */
731
732typedef
733#include "vmware_pack_begin.h"
734struct {
735 /*
736 * A range hint is an optional specification for the range of indices
737 * in an SVGA3dArray that will be used. If 'last' is zero, it is assumed
738 * that the entire array will be used.
739 *
740 * These are only hints. The SVGA3D device may use them for
741 * performance optimization if possible, but it's also allowed to
742 * ignore these values.
743 */
744 uint32 first;
745 uint32 last;
746}
747#include "vmware_pack_end.h"
748SVGA3dArrayRangeHint;
749
750typedef
751#include "vmware_pack_begin.h"
752struct {
753 /*
754 * Define the origin and shape of a vertex or index array. Both
755 * 'offset' and 'stride' are in bytes. The provided surface will be
756 * reinterpreted as a flat array of bytes in the same format used
757 * by surface DMA operations. To avoid unnecessary conversions, the
758 * surface should be created with the SVGA3D_BUFFER format.
759 *
760 * Index 0 in the array starts 'offset' bytes into the surface.
761 * Index 1 begins at byte 'offset + stride', etc. Array indices may
762 * not be negative.
763 */
764 uint32 surfaceId;
765 uint32 offset;
766 uint32 stride;
767}
768#include "vmware_pack_end.h"
769SVGA3dArray;
770
771typedef
772#include "vmware_pack_begin.h"
773struct {
774 /*
775 * Describe a vertex array's data type, and define how it is to be
776 * used by the fixed function pipeline or the vertex shader. It
777 * isn't useful to have two VertexDecls with the same
778 * VertexArrayIdentity in one draw call.
779 */
780 SVGA3dDeclType type;
781 SVGA3dDeclMethod method;
782 SVGA3dDeclUsage usage;
783 uint32 usageIndex;
784}
785#include "vmware_pack_end.h"
786SVGA3dVertexArrayIdentity;
787
788typedef
789#include "vmware_pack_begin.h"
790struct SVGA3dVertexDecl {
791 SVGA3dVertexArrayIdentity identity;
792 SVGA3dArray array;
793 SVGA3dArrayRangeHint rangeHint;
794}
795#include "vmware_pack_end.h"
796SVGA3dVertexDecl;
797
798typedef
799#include "vmware_pack_begin.h"
800struct SVGA3dPrimitiveRange {
801 /*
802 * Define a group of primitives to render, from sequential indices.
803 *
804 * The value of 'primitiveType' and 'primitiveCount' imply the
805 * total number of vertices that will be rendered.
806 */
807 SVGA3dPrimitiveType primType;
808 uint32 primitiveCount;
809
810 /*
811 * Optional index buffer. If indexArray.surfaceId is
812 * SVGA3D_INVALID_ID, we render without an index buffer. Rendering
813 * without an index buffer is identical to rendering with an index
814 * buffer containing the sequence [0, 1, 2, 3, ...].
815 *
816 * If an index buffer is in use, indexWidth specifies the width in
817 * bytes of each index value. It must be less than or equal to
818 * indexArray.stride.
819 *
820 * (Currently, the SVGA3D device requires index buffers to be tightly
821 * packed. In other words, indexWidth == indexArray.stride)
822 */
823 SVGA3dArray indexArray;
824 uint32 indexWidth;
825
826 /*
827 * Optional index bias. This number is added to all indices from
828 * indexArray before they are used as vertex array indices. This
829 * can be used in multiple ways:
830 *
831 * - When not using an indexArray, this bias can be used to
832 * specify where in the vertex arrays to begin rendering.
833 *
834 * - A positive number here is equivalent to increasing the
835 * offset in each vertex array.
836 *
837 * - A negative number can be used to render using a small
838 * vertex array and an index buffer that contains large
839 * values. This may be used by some applications that
840 * crop a vertex buffer without modifying their index
841 * buffer.
842 *
843 * Note that rendering with a negative bias value may be slower and
844 * use more memory than rendering with a positive or zero bias.
845 */
846 int32 indexBias;
847}
848#include "vmware_pack_end.h"
849SVGA3dPrimitiveRange;
850
851typedef
852#include "vmware_pack_begin.h"
853struct {
854 uint32 cid;
855 uint32 numVertexDecls;
856 uint32 numRanges;
857
858 /*
859 * There are two variable size arrays after the
860 * SVGA3dCmdDrawPrimitives structure. In order,
861 * they are:
862 *
863 * 1. SVGA3dVertexDecl, quantity 'numVertexDecls', but no more than
864 * SVGA3D_MAX_VERTEX_ARRAYS;
865 * 2. SVGA3dPrimitiveRange, quantity 'numRanges', but no more than
866 * SVGA3D_MAX_DRAW_PRIMITIVE_RANGES;
867 * 3. Optionally, SVGA3dVertexDivisor, quantity 'numVertexDecls' (contains
868 * the frequency divisor for the corresponding vertex decl).
869 */
870}
871#include "vmware_pack_end.h"
872SVGA3dCmdDrawPrimitives; /* SVGA_3D_CMD_DRAWPRIMITIVES */
873
874typedef
875#include "vmware_pack_begin.h"
876struct {
877 uint32 cid;
878
879 uint32 primitiveCount; /* How many primitives to render */
880 uint32 startVertexLocation; /* Which vertex do we start rendering at. */
881
882 uint8 primitiveType; /* SVGA3dPrimitiveType */
883 uint8 padding[3];
884}
885#include "vmware_pack_end.h"
886SVGA3dCmdDraw;
887
888typedef
889#include "vmware_pack_begin.h"
890struct {
891 uint32 cid;
892
893 uint8 primitiveType; /* SVGA3dPrimitiveType */
894
895 uint32 indexBufferSid; /* Valid index buffer sid. */
896 uint32 indexBufferOffset; /* Byte offset into the vertex buffer, almost */
897 /* always 0 for pre SM guests, non-zero for OpenGL */
898 /* guests. We can't represent non-multiple of */
899 /* stride offsets in D3D9Renderer... */
900 uint8 indexBufferStride; /* Allowable values = 1, 2, or 4 */
901
902 int32 baseVertexLocation; /* Bias applied to the index when selecting a */
903 /* vertex from the streams, may be negative */
904
905 uint32 primitiveCount; /* How many primitives to render */
906 uint32 pad0;
907 uint16 pad1;
908}
909#include "vmware_pack_end.h"
910SVGA3dCmdDrawIndexed;
911
912typedef
913#include "vmware_pack_begin.h"
914struct {
915 /*
916 * Describe a vertex array's data type, and define how it is to be
917 * used by the fixed function pipeline or the vertex shader. It
918 * isn't useful to have two VertexDecls with the same
919 * VertexArrayIdentity in one draw call.
920 */
921 uint16 streamOffset;
922 uint8 stream;
923 uint8 type; /* SVGA3dDeclType */
924 uint8 method; /* SVGA3dDeclMethod */
925 uint8 usage; /* SVGA3dDeclUsage */
926 uint8 usageIndex;
927 uint8 padding;
928
929}
930#include "vmware_pack_end.h"
931SVGA3dVertexElement;
932
933/*
934 * Should the vertex element respect the stream value? The high bit of the
935 * stream should be set to indicate that the stream should be respected. If
936 * the high bit is not set, the stream will be ignored and replaced by the index
937 * of the position of the currently considered vertex element.
938 *
939 * All guests should set this bit and correctly specify the stream going
940 * forward.
941 */
942#define SVGA3D_VERTEX_ELEMENT_RESPECT_STREAM (1 << 7)
943
944typedef
945#include "vmware_pack_begin.h"
946struct {
947 uint32 cid;
948
949 uint32 numElements;
950
951 /*
952 * Followed by numElements SVGA3dVertexElement structures.
953 *
954 * If numElements < SVGA3D_MAX_VERTEX_ARRAYS, the remaining elements
955 * are cleared and will not be used by following draws.
956 */
957}
958#include "vmware_pack_end.h"
959SVGA3dCmdSetVertexDecls;
960
961typedef
962#include "vmware_pack_begin.h"
963struct {
964 uint32 sid;
965 uint32 stride;
966 uint32 offset;
967}
968#include "vmware_pack_end.h"
969SVGA3dVertexStream;
970
971typedef
972#include "vmware_pack_begin.h"
973struct {
974 uint32 cid;
975
976 uint32 numStreams;
977 /*
978 * Followed by numStream SVGA3dVertexStream structures.
979 *
980 * If numStreams < SVGA3D_MAX_VERTEX_ARRAYS, the remaining streams
981 * are cleared and will not be used by following draws.
982 */
983}
984#include "vmware_pack_end.h"
985SVGA3dCmdSetVertexStreams;
986
987typedef
988#include "vmware_pack_begin.h"
989struct {
990 uint32 cid;
991 uint32 numDivisors;
992}
993#include "vmware_pack_end.h"
994SVGA3dCmdSetVertexDivisors;
995
996typedef
997#include "vmware_pack_begin.h"
998struct {
999 uint32 stage;
1000 SVGA3dTextureStateName name;
1001 union {
1002 uint32 value;
1003 float floatValue;
1004 };
1005}
1006#include "vmware_pack_end.h"
1007SVGA3dTextureState;
1008
1009typedef
1010#include "vmware_pack_begin.h"
1011struct {
1012 uint32 cid;
1013 /* Followed by variable number of SVGA3dTextureState structures */
1014}
1015#include "vmware_pack_end.h"
1016SVGA3dCmdSetTextureState; /* SVGA_3D_CMD_SETTEXTURESTATE */
1017
1018typedef
1019#include "vmware_pack_begin.h"
1020struct {
1021 uint32 cid;
1022 SVGA3dTransformType type;
1023 float matrix[16];
1024}
1025#include "vmware_pack_end.h"
1026SVGA3dCmdSetTransform; /* SVGA_3D_CMD_SETTRANSFORM */
1027
1028typedef
1029#include "vmware_pack_begin.h"
1030struct {
1031 float min;
1032 float max;
1033}
1034#include "vmware_pack_end.h"
1035SVGA3dZRange;
1036
1037typedef
1038#include "vmware_pack_begin.h"
1039struct {
1040 uint32 cid;
1041 SVGA3dZRange zRange;
1042}
1043#include "vmware_pack_end.h"
1044SVGA3dCmdSetZRange; /* SVGA_3D_CMD_SETZRANGE */
1045
1046typedef
1047#include "vmware_pack_begin.h"
1048struct {
1049 float diffuse[4];
1050 float ambient[4];
1051 float specular[4];
1052 float emissive[4];
1053 float shininess;
1054}
1055#include "vmware_pack_end.h"
1056SVGA3dMaterial;
1057
1058typedef
1059#include "vmware_pack_begin.h"
1060struct {
1061 uint32 cid;
1062 SVGA3dFace face;
1063 SVGA3dMaterial material;
1064}
1065#include "vmware_pack_end.h"
1066SVGA3dCmdSetMaterial; /* SVGA_3D_CMD_SETMATERIAL */
1067
1068typedef
1069#include "vmware_pack_begin.h"
1070struct {
1071 uint32 cid;
1072 uint32 index;
1073 SVGA3dLightData data;
1074}
1075#include "vmware_pack_end.h"
1076SVGA3dCmdSetLightData; /* SVGA_3D_CMD_SETLIGHTDATA */
1077
1078typedef
1079#include "vmware_pack_begin.h"
1080struct {
1081 uint32 cid;
1082 uint32 index;
1083 uint32 enabled;
1084}
1085#include "vmware_pack_end.h"
1086SVGA3dCmdSetLightEnabled; /* SVGA_3D_CMD_SETLIGHTENABLED */
1087
1088typedef
1089#include "vmware_pack_begin.h"
1090struct {
1091 uint32 cid;
1092 SVGA3dRect rect;
1093}
1094#include "vmware_pack_end.h"
1095SVGA3dCmdSetViewport; /* SVGA_3D_CMD_SETVIEWPORT */
1096
1097typedef
1098#include "vmware_pack_begin.h"
1099struct {
1100 uint32 cid;
1101 SVGA3dRect rect;
1102}
1103#include "vmware_pack_end.h"
1104SVGA3dCmdSetScissorRect; /* SVGA_3D_CMD_SETSCISSORRECT */
1105
1106typedef
1107#include "vmware_pack_begin.h"
1108struct {
1109 uint32 cid;
1110 uint32 index;
1111 float plane[4];
1112}
1113#include "vmware_pack_end.h"
1114SVGA3dCmdSetClipPlane; /* SVGA_3D_CMD_SETCLIPPLANE */
1115
1116typedef
1117#include "vmware_pack_begin.h"
1118struct {
1119 uint32 cid;
1120 uint32 shid;
1121 SVGA3dShaderType type;
1122 /* Followed by variable number of DWORDs for shader bycode */
1123}
1124#include "vmware_pack_end.h"
1125SVGA3dCmdDefineShader; /* SVGA_3D_CMD_SHADER_DEFINE */
1126
1127typedef
1128#include "vmware_pack_begin.h"
1129struct {
1130 uint32 cid;
1131 uint32 shid;
1132 SVGA3dShaderType type;
1133}
1134#include "vmware_pack_end.h"
1135SVGA3dCmdDestroyShader; /* SVGA_3D_CMD_SHADER_DESTROY */
1136
1137typedef
1138#include "vmware_pack_begin.h"
1139struct {
1140 uint32 cid;
1141 uint32 reg; /* register number */
1142 SVGA3dShaderType type;
1143 SVGA3dShaderConstType ctype;
1144 uint32 values[4];
1145
1146 /*
1147 * Followed by a variable number of additional values.
1148 */
1149}
1150#include "vmware_pack_end.h"
1151SVGA3dCmdSetShaderConst; /* SVGA_3D_CMD_SET_SHADER_CONST */
1152
1153typedef
1154#include "vmware_pack_begin.h"
1155struct {
1156 uint32 cid;
1157 SVGA3dShaderType type;
1158 uint32 shid;
1159}
1160#include "vmware_pack_end.h"
1161SVGA3dCmdSetShader; /* SVGA_3D_CMD_SET_SHADER */
1162
1163typedef
1164#include "vmware_pack_begin.h"
1165struct {
1166 uint32 cid;
1167 SVGA3dQueryType type;
1168}
1169#include "vmware_pack_end.h"
1170SVGA3dCmdBeginQuery; /* SVGA_3D_CMD_BEGIN_QUERY */
1171
1172typedef
1173#include "vmware_pack_begin.h"
1174struct {
1175 uint32 cid;
1176 SVGA3dQueryType type;
1177 SVGAGuestPtr guestResult; /* Points to an SVGA3dQueryResult structure */
1178}
1179#include "vmware_pack_end.h"
1180SVGA3dCmdEndQuery; /* SVGA_3D_CMD_END_QUERY */
1181
1182
1183/*
1184 * SVGA3D_CMD_WAIT_FOR_QUERY --
1185 *
1186 * Will read the SVGA3dQueryResult structure pointed to by guestResult,
1187 * and if the state member is set to anything else than
1188 * SVGA3D_QUERYSTATE_PENDING, this command will always be a no-op.
1189 *
1190 * Otherwise, in addition to the query explicitly waited for,
1191 * All queries with the same type and issued with the same cid, for which
1192 * an SVGA_3D_CMD_END_QUERY command has previously been sent, will
1193 * be finished after execution of this command.
1194 *
1195 * A query will be identified by the gmrId and offset of the guestResult
1196 * member. If the device can't find an SVGA_3D_CMD_END_QUERY that has
1197 * been sent previously with an indentical gmrId and offset, it will
1198 * effectively end all queries with an identical type issued with the
1199 * same cid, and the SVGA3dQueryResult structure pointed to by
1200 * guestResult will not be written to. This property can be used to
1201 * implement a query barrier for a given cid and query type.
1202 */
1203
1204typedef
1205#include "vmware_pack_begin.h"
1206struct {
1207 uint32 cid; /* Same parameters passed to END_QUERY */
1208 SVGA3dQueryType type;
1209 SVGAGuestPtr guestResult;
1210}
1211#include "vmware_pack_end.h"
1212SVGA3dCmdWaitForQuery; /* SVGA_3D_CMD_WAIT_FOR_QUERY */
1213
1214typedef
1215#include "vmware_pack_begin.h"
1216struct {
1217 uint32 totalSize; /* Set by guest before query is ended. */
1218 SVGA3dQueryState state; /* Set by host or guest. See SVGA3dQueryState. */
1219 union { /* Set by host on exit from PENDING state */
1220 uint32 result32;
1221 uint32 queryCookie; /* May be used to identify which QueryGetData this
1222 result corresponds to. */
1223 };
1224}
1225#include "vmware_pack_end.h"
1226SVGA3dQueryResult;
1227
1228
1229/*
1230 * SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN --
1231 *
1232 * This is a blit from an SVGA3D surface to a Screen Object.
1233 * This blit must be directed at a specific screen.
1234 *
1235 * The blit copies from a rectangular region of an SVGA3D surface
1236 * image to a rectangular region of a screen.
1237 *
1238 * This command takes an optional variable-length list of clipping
1239 * rectangles after the body of the command. If no rectangles are
1240 * specified, there is no clipping region. The entire destRect is
1241 * drawn to. If one or more rectangles are included, they describe
1242 * a clipping region. The clip rectangle coordinates are measured
1243 * relative to the top-left corner of destRect.
1244 *
1245 * The srcImage must be from mip=0 face=0.
1246 *
1247 * This supports scaling if the src and dest are of different sizes.
1248 *
1249 * Availability:
1250 * SVGA_FIFO_CAP_SCREEN_OBJECT
1251 */
1252
1253typedef
1254#include "vmware_pack_begin.h"
1255struct {
1256 SVGA3dSurfaceImageId srcImage;
1257 SVGASignedRect srcRect;
1258 uint32 destScreenId; /* Screen Object ID */
1259 SVGASignedRect destRect;
1260 /* Clipping: zero or more SVGASignedRects follow */
1261}
1262#include "vmware_pack_end.h"
1263SVGA3dCmdBlitSurfaceToScreen; /* SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN */
1264
1265typedef
1266#include "vmware_pack_begin.h"
1267struct {
1268 uint32 sid;
1269 SVGA3dTextureFilter filter;
1270}
1271#include "vmware_pack_end.h"
1272SVGA3dCmdGenerateMipmaps; /* SVGA_3D_CMD_GENERATE_MIPMAPS */
1273
1274typedef
1275#include "vmware_pack_begin.h"
1276struct {
1277 uint32 sid;
1278}
1279#include "vmware_pack_end.h"
1280SVGA3dCmdActivateSurface; /* SVGA_3D_CMD_ACTIVATE_SURFACE */
1281
1282typedef
1283#include "vmware_pack_begin.h"
1284struct {
1285 uint32 sid;
1286}
1287#include "vmware_pack_end.h"
1288SVGA3dCmdDeactivateSurface; /* SVGA_3D_CMD_DEACTIVATE_SURFACE */
1289
1290/*
1291 * Screen DMA command
1292 *
1293 * Available with SVGA_FIFO_CAP_SCREEN_OBJECT_2. The SVGA_CAP_3D device
1294 * cap bit is not required.
1295 *
1296 * - refBuffer and destBuffer are 32bit BGRX; refBuffer and destBuffer could
1297 * be different, but it is required that guest makes sure refBuffer has
1298 * exactly the same contents that were written to when last time screen DMA
1299 * command is received by host.
1300 *
1301 * - changemap is generated by lib/blit, and it has the changes from last
1302 * received screen DMA or more.
1303 */
1304
1305typedef
1306#include "vmware_pack_begin.h"
1307struct SVGA3dCmdScreenDMA {
1308 uint32 screenId;
1309 SVGAGuestImage refBuffer;
1310 SVGAGuestImage destBuffer;
1311 SVGAGuestImage changeMap;
1312}
1313#include "vmware_pack_end.h"
1314SVGA3dCmdScreenDMA; /* SVGA_3D_CMD_SCREEN_DMA */
1315
1316/*
1317 * Logic ops
1318 */
1319
1320#define SVGA3D_LOTRANSBLT_HONORALPHA (0x01)
1321#define SVGA3D_LOSTRETCHBLT_MIRRORX (0x01)
1322#define SVGA3D_LOSTRETCHBLT_MIRRORY (0x02)
1323#define SVGA3D_LOALPHABLEND_SRCHASALPHA (0x01)
1324
1325typedef
1326#include "vmware_pack_begin.h"
1327struct SVGA3dCmdLogicOpsBitBlt {
1328 /*
1329 * All LogicOps surfaces are one-level
1330 * surfaces so mipmap & face should always
1331 * be zero.
1332 */
1333 SVGA3dSurfaceImageId src;
1334 SVGA3dSurfaceImageId dst;
1335 SVGA3dLogicOp logicOp;
1336 SVGA3dLogicOpRop3 logicOpRop3;
1337 /* Followed by variable number of SVGA3dCopyBox structures */
1338}
1339#include "vmware_pack_end.h"
1340SVGA3dCmdLogicOpsBitBlt; /* SVGA_3D_CMD_LOGICOPS_BITBLT */
1341
1342
1343typedef
1344#include "vmware_pack_begin.h"
1345struct SVGA3dCmdLogicOpsTransBlt {
1346 /*
1347 * All LogicOps surfaces are one-level
1348 * surfaces so mipmap & face should always
1349 * be zero.
1350 */
1351 SVGA3dSurfaceImageId src;
1352 SVGA3dSurfaceImageId dst;
1353 uint32 color;
1354 uint32 flags;
1355 SVGA3dBox srcBox;
1356 SVGA3dSignedBox dstBox;
1357 SVGA3dBox clipBox;
1358}
1359#include "vmware_pack_end.h"
1360SVGA3dCmdLogicOpsTransBlt; /* SVGA_3D_CMD_LOGICOPS_TRANSBLT */
1361
1362
1363typedef
1364#include "vmware_pack_begin.h"
1365struct SVGA3dCmdLogicOpsStretchBlt {
1366 /*
1367 * All LogicOps surfaces are one-level
1368 * surfaces so mipmap & face should always
1369 * be zero.
1370 */
1371 SVGA3dSurfaceImageId src;
1372 SVGA3dSurfaceImageId dst;
1373 uint16 mode;
1374 uint16 flags;
1375 SVGA3dBox srcBox;
1376 SVGA3dSignedBox dstBox;
1377 SVGA3dBox clipBox;
1378}
1379#include "vmware_pack_end.h"
1380SVGA3dCmdLogicOpsStretchBlt; /* SVGA_3D_CMD_LOGICOPS_STRETCHBLT */
1381
1382
1383typedef
1384#include "vmware_pack_begin.h"
1385struct SVGA3dCmdLogicOpsColorFill {
1386 /*
1387 * All LogicOps surfaces are one-level
1388 * surfaces so mipmap & face should always
1389 * be zero.
1390 */
1391 SVGA3dSurfaceImageId dst;
1392 uint32 color;
1393 SVGA3dLogicOp logicOp;
1394 SVGA3dLogicOpRop3 logicOpRop3;
1395 /* Followed by variable number of SVGA3dRect structures. */
1396}
1397#include "vmware_pack_end.h"
1398SVGA3dCmdLogicOpsColorFill; /* SVGA_3D_CMD_LOGICOPS_COLORFILL */
1399
1400
1401typedef
1402#include "vmware_pack_begin.h"
1403struct SVGA3dCmdLogicOpsAlphaBlend {
1404 /*
1405 * All LogicOps surfaces are one-level
1406 * surfaces so mipmap & face should always
1407 * be zero.
1408 */
1409 SVGA3dSurfaceImageId src;
1410 SVGA3dSurfaceImageId dst;
1411 uint32 alphaVal;
1412 uint32 flags;
1413 SVGA3dBox srcBox;
1414 SVGA3dSignedBox dstBox;
1415 SVGA3dBox clipBox;
1416}
1417#include "vmware_pack_end.h"
1418SVGA3dCmdLogicOpsAlphaBlend; /* SVGA_3D_CMD_LOGICOPS_ALPHABLEND */
1419
1420#define SVGA3D_CLEARTYPE_INVALID_GAMMA_INDEX 0xFFFFFFFF
1421
1422#define SVGA3D_CLEARTYPE_GAMMA_WIDTH 512
1423#define SVGA3D_CLEARTYPE_GAMMA_HEIGHT 16
1424
1425typedef
1426#include "vmware_pack_begin.h"
1427struct SVGA3dCmdLogicOpsClearTypeBlend {
1428 /*
1429 * All LogicOps surfaces are one-level
1430 * surfaces so mipmap & face should always
1431 * be zero.
1432 */
1433 SVGA3dSurfaceImageId tmp;
1434 SVGA3dSurfaceImageId dst;
1435 SVGA3dSurfaceImageId gammaSurf;
1436 SVGA3dSurfaceImageId alphaSurf;
1437 uint32 gamma;
1438 uint32 color;
1439 uint32 color2;
1440 int32 alphaOffsetX;
1441 int32 alphaOffsetY;
1442 /* Followed by variable number of SVGA3dBox structures */
1443}
1444#include "vmware_pack_end.h"
1445SVGA3dCmdLogicOpsClearTypeBlend; /* SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND */
1446
1447
1448/*
1449 * Guest-backed objects definitions.
1450 */
1451
1452typedef
1453#include "vmware_pack_begin.h"
1454struct {
1455 SVGAMobFormat ptDepth;
1456 uint32 sizeInBytes;
1457 PPN64 base;
1458}
1459#include "vmware_pack_end.h"
1460SVGAOTableMobEntry;
1461#define SVGA3D_OTABLE_MOB_ENTRY_SIZE (sizeof(SVGAOTableMobEntry))
1462
1463typedef
1464#include "vmware_pack_begin.h"
1465struct {
1466 SVGA3dSurfaceFormat format;
1467 SVGA3dSurface1Flags surface1Flags;
1468 uint32 numMipLevels;
1469 uint32 multisampleCount;
1470 SVGA3dTextureFilter autogenFilter;
1471 SVGA3dSize size;
1472 SVGAMobId mobid;
1473 uint32 arraySize;
1474 uint32 mobPitch;
1475 SVGA3dSurface2Flags surface2Flags;
1476 uint8 multisamplePattern;
1477 uint8 qualityLevel;
1478 uint16 bufferByteStride;
1479 float minLOD;
1480 uint32 pad0[2];
1481}
1482#include "vmware_pack_end.h"
1483SVGAOTableSurfaceEntry;
1484#define SVGA3D_OTABLE_SURFACE_ENTRY_SIZE (sizeof(SVGAOTableSurfaceEntry))
1485
1486typedef
1487#include "vmware_pack_begin.h"
1488struct {
1489 uint32 cid;
1490 SVGAMobId mobid;
1491}
1492#include "vmware_pack_end.h"
1493SVGAOTableContextEntry;
1494#define SVGA3D_OTABLE_CONTEXT_ENTRY_SIZE (sizeof(SVGAOTableContextEntry))
1495
1496typedef
1497#include "vmware_pack_begin.h"
1498struct {
1499 SVGA3dShaderType type;
1500 uint32 sizeInBytes;
1501 uint32 offsetInBytes;
1502 SVGAMobId mobid;
1503}
1504#include "vmware_pack_end.h"
1505SVGAOTableShaderEntry;
1506#define SVGA3D_OTABLE_SHADER_ENTRY_SIZE (sizeof(SVGAOTableShaderEntry))
1507
1508#define SVGA_STFLAG_PRIMARY (1 << 0)
1509#define SVGA_STFLAG_RESERVED (1 << 1) /* Added with cap SVGA_CAP_HP_CMD_QUEUE */
1510typedef uint32 SVGAScreenTargetFlags;
1511
1512typedef
1513#include "vmware_pack_begin.h"
1514struct {
1515 SVGA3dSurfaceImageId image;
1516 uint32 width;
1517 uint32 height;
1518 int32 xRoot;
1519 int32 yRoot;
1520 SVGAScreenTargetFlags flags;
1521 uint32 dpi;
1522 uint32 pad[7];
1523}
1524#include "vmware_pack_end.h"
1525SVGAOTableScreenTargetEntry;
1526#define SVGA3D_OTABLE_SCREEN_TARGET_ENTRY_SIZE \
1527 (sizeof(SVGAOTableScreenTargetEntry))
1528
1529typedef
1530#include "vmware_pack_begin.h"
1531struct {
1532 float value[4];
1533}
1534#include "vmware_pack_end.h"
1535SVGA3dShaderConstFloat;
1536
1537typedef
1538#include "vmware_pack_begin.h"
1539struct {
1540 int32 value[4];
1541}
1542#include "vmware_pack_end.h"
1543SVGA3dShaderConstInt;
1544
1545typedef
1546#include "vmware_pack_begin.h"
1547struct {
1548 uint32 value;
1549}
1550#include "vmware_pack_end.h"
1551SVGA3dShaderConstBool;
1552
1553typedef
1554#include "vmware_pack_begin.h"
1555struct {
1556 uint16 streamOffset;
1557 uint8 stream;
1558 uint8 type;
1559 uint8 methodUsage;
1560 uint8 usageIndex;
1561}
1562#include "vmware_pack_end.h"
1563SVGAGBVertexElement;
1564
1565typedef
1566#include "vmware_pack_begin.h"
1567struct {
1568 uint32 sid;
1569 uint16 stride;
1570 uint32 offset;
1571}
1572#include "vmware_pack_end.h"
1573SVGAGBVertexStream;
1574typedef
1575#include "vmware_pack_begin.h"
1576struct {
1577 SVGA3dRect viewport;
1578 SVGA3dRect scissorRect;
1579 SVGA3dZRange zRange;
1580
1581 SVGA3dSurfaceImageId renderTargets[SVGA3D_RT_MAX];
1582 SVGAGBVertexElement decl1[4];
1583
1584 uint32 renderStates[SVGA3D_RS_MAX];
1585 SVGAGBVertexElement decl2[18];
1586 uint32 pad0[2];
1587
1588 struct {
1589 SVGA3dFace face;
1590 SVGA3dMaterial material;
1591 } material;
1592
1593 float clipPlanes[SVGA3D_NUM_CLIPPLANES][4];
1594 float matrices[SVGA3D_TRANSFORM_MAX][16];
1595
1596 SVGA3dBool lightEnabled[SVGA3D_NUM_LIGHTS];
1597 SVGA3dLightData lightData[SVGA3D_NUM_LIGHTS];
1598
1599 /*
1600 * Shaders currently bound
1601 */
1602 uint32 shaders[SVGA3D_NUM_SHADERTYPE_PREDX];
1603 SVGAGBVertexElement decl3[10];
1604 uint32 pad1[3];
1605
1606 uint32 occQueryActive;
1607 uint32 occQueryValue;
1608
1609 /*
1610 * Int/Bool Shader constants
1611 */
1612 SVGA3dShaderConstInt pShaderIValues[SVGA3D_CONSTINTREG_MAX];
1613 SVGA3dShaderConstInt vShaderIValues[SVGA3D_CONSTINTREG_MAX];
1614 uint16 pShaderBValues;
1615 uint16 vShaderBValues;
1616
1617
1618 SVGAGBVertexStream streams[SVGA3D_MAX_VERTEX_ARRAYS];
1619 SVGA3dVertexDivisor divisors[SVGA3D_MAX_VERTEX_ARRAYS];
1620 uint32 numVertexDecls;
1621 uint32 numVertexStreams;
1622 uint32 numVertexDivisors;
1623 uint32 pad2[30];
1624
1625 /*
1626 * Texture Stages
1627 *
1628 * SVGA3D_TS_INVALID through SVGA3D_TS_CONSTANT are in the
1629 * textureStages array.
1630 * SVGA3D_TS_COLOR_KEY is in tsColorKey.
1631 */
1632 uint32 tsColorKey[SVGA3D_NUM_TEXTURE_UNITS];
1633 uint32 textureStages[SVGA3D_NUM_TEXTURE_UNITS][SVGA3D_TS_CONSTANT + 1];
1634 uint32 tsColorKeyEnable[SVGA3D_NUM_TEXTURE_UNITS];
1635
1636 /*
1637 * Float Shader constants.
1638 */
1639 SVGA3dShaderConstFloat pShaderFValues[SVGA3D_CONSTREG_MAX];
1640 SVGA3dShaderConstFloat vShaderFValues[SVGA3D_CONSTREG_MAX];
1641}
1642#include "vmware_pack_end.h"
1643SVGAGBContextData;
1644#define SVGA3D_CONTEXT_DATA_SIZE (sizeof(SVGAGBContextData))
1645
1646/*
1647 * SVGA3dCmdSetOTableBase --
1648 *
1649 * This command allows the guest to specify the base PPN of the
1650 * specified object table.
1651 */
1652
1653typedef
1654#include "vmware_pack_begin.h"
1655struct {
1656 SVGAOTableType type;
1657 PPN32 baseAddress;
1658 uint32 sizeInBytes;
1659 uint32 validSizeInBytes;
1660 SVGAMobFormat ptDepth;
1661}
1662#include "vmware_pack_end.h"
1663SVGA3dCmdSetOTableBase; /* SVGA_3D_CMD_SET_OTABLE_BASE */
1664
1665typedef
1666#include "vmware_pack_begin.h"
1667struct {
1668 SVGAOTableType type;
1669 PPN64 baseAddress;
1670 uint32 sizeInBytes;
1671 uint32 validSizeInBytes;
1672 SVGAMobFormat ptDepth;
1673}
1674#include "vmware_pack_end.h"
1675SVGA3dCmdSetOTableBase64; /* SVGA_3D_CMD_SET_OTABLE_BASE64 */
1676
1677/*
1678 * Guests using SVGA_3D_CMD_GROW_OTABLE are promising that
1679 * the new OTable contains the same contents as the old one, except possibly
1680 * for some new invalid entries at the end.
1681 *
1682 * (Otherwise, guests should use one of the SetOTableBase commands.)
1683 */
1684typedef
1685#include "vmware_pack_begin.h"
1686struct {
1687 SVGAOTableType type;
1688 PPN64 baseAddress;
1689 uint32 sizeInBytes;
1690 uint32 validSizeInBytes;
1691 SVGAMobFormat ptDepth;
1692}
1693#include "vmware_pack_end.h"
1694SVGA3dCmdGrowOTable; /* SVGA_3D_CMD_GROW_OTABLE */
1695
1696typedef
1697#include "vmware_pack_begin.h"
1698struct {
1699 SVGAOTableType type;
1700}
1701#include "vmware_pack_end.h"
1702SVGA3dCmdReadbackOTable; /* SVGA_3D_CMD_READBACK_OTABLE */
1703
1704/*
1705 * Define a memory object (Mob) in the OTable.
1706 */
1707
1708typedef
1709#include "vmware_pack_begin.h"
1710struct SVGA3dCmdDefineGBMob {
1711 SVGAMobId mobid;
1712 SVGAMobFormat ptDepth;
1713 PPN32 base;
1714 uint32 sizeInBytes;
1715}
1716#include "vmware_pack_end.h"
1717SVGA3dCmdDefineGBMob; /* SVGA_3D_CMD_DEFINE_GB_MOB */
1718
1719
1720/*
1721 * Destroys an object in the OTable.
1722 */
1723
1724typedef
1725#include "vmware_pack_begin.h"
1726struct SVGA3dCmdDestroyGBMob {
1727 SVGAMobId mobid;
1728}
1729#include "vmware_pack_end.h"
1730SVGA3dCmdDestroyGBMob; /* SVGA_3D_CMD_DESTROY_GB_MOB */
1731
1732/*
1733 * Define a memory object (Mob) in the OTable with a PPN64 base.
1734 */
1735
1736typedef
1737#include "vmware_pack_begin.h"
1738struct SVGA3dCmdDefineGBMob64 {
1739 SVGAMobId mobid;
1740 SVGAMobFormat ptDepth;
1741 PPN64 base;
1742 uint32 sizeInBytes;
1743}
1744#include "vmware_pack_end.h"
1745SVGA3dCmdDefineGBMob64; /* SVGA_3D_CMD_DEFINE_GB_MOB64 */
1746
1747/*
1748 * Redefine an object in the OTable with PPN64 base.
1749 */
1750
1751typedef
1752#include "vmware_pack_begin.h"
1753struct SVGA3dCmdRedefineGBMob64 {
1754 SVGAMobId mobid;
1755 SVGAMobFormat ptDepth;
1756 PPN64 base;
1757 uint32 sizeInBytes;
1758}
1759#include "vmware_pack_end.h"
1760SVGA3dCmdRedefineGBMob64; /* SVGA_3D_CMD_REDEFINE_GB_MOB64 */
1761
1762/*
1763 * Notification that the page tables have been modified.
1764 */
1765
1766typedef
1767#include "vmware_pack_begin.h"
1768struct SVGA3dCmdUpdateGBMobMapping {
1769 SVGAMobId mobid;
1770}
1771#include "vmware_pack_end.h"
1772SVGA3dCmdUpdateGBMobMapping; /* SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING */
1773
1774/*
1775 * Define a guest-backed surface.
1776 */
1777
1778typedef
1779#include "vmware_pack_begin.h"
1780struct SVGA3dCmdDefineGBSurface {
1781 uint32 sid;
1782 SVGA3dSurface1Flags surfaceFlags;
1783 SVGA3dSurfaceFormat format;
1784 uint32 numMipLevels;
1785 uint32 multisampleCount;
1786 SVGA3dTextureFilter autogenFilter;
1787 SVGA3dSize size;
1788}
1789#include "vmware_pack_end.h"
1790SVGA3dCmdDefineGBSurface; /* SVGA_3D_CMD_DEFINE_GB_SURFACE */
1791
1792/*
1793 * Defines a guest-backed surface, adding the arraySize field.
1794 */
1795typedef
1796#include "vmware_pack_begin.h"
1797struct SVGA3dCmdDefineGBSurface_v2 {
1798 uint32 sid;
1799 SVGA3dSurface1Flags surfaceFlags;
1800 SVGA3dSurfaceFormat format;
1801 uint32 numMipLevels;
1802 uint32 multisampleCount;
1803 SVGA3dTextureFilter autogenFilter;
1804 SVGA3dSize size;
1805 uint32 arraySize;
1806 uint32 pad;
1807}
1808#include "vmware_pack_end.h"
1809SVGA3dCmdDefineGBSurface_v2; /* SVGA_3D_CMD_DEFINE_GB_SURFACE_V2 */
1810
1811/*
1812 * Defines a guest-backed surface, adding the larger flags.
1813 */
1814typedef
1815#include "vmware_pack_begin.h"
1816struct SVGA3dCmdDefineGBSurface_v3 {
1817 uint32 sid;
1818 SVGA3dSurfaceAllFlags surfaceFlags;
1819 SVGA3dSurfaceFormat format;
1820 uint32 numMipLevels;
1821 uint32 multisampleCount;
1822 SVGA3dMSPattern multisamplePattern;
1823 SVGA3dMSQualityLevel qualityLevel;
1824 SVGA3dTextureFilter autogenFilter;
1825 SVGA3dSize size;
1826 uint32 arraySize;
1827}
1828#include "vmware_pack_end.h"
1829SVGA3dCmdDefineGBSurface_v3; /* SVGA_3D_CMD_DEFINE_GB_SURFACE_V3 */
1830
1831/*
1832 * Defines a guest-backed surface, adding buffer byte stride.
1833 */
1834typedef
1835#include "vmware_pack_begin.h"
1836struct SVGA3dCmdDefineGBSurface_v4 {
1837 uint32 sid;
1838 SVGA3dSurfaceAllFlags surfaceFlags;
1839 SVGA3dSurfaceFormat format;
1840 uint32 numMipLevels;
1841 uint32 multisampleCount;
1842 SVGA3dMSPattern multisamplePattern;
1843 SVGA3dMSQualityLevel qualityLevel;
1844 SVGA3dTextureFilter autogenFilter;
1845 SVGA3dSize size;
1846 uint32 arraySize;
1847 uint32 bufferByteStride;
1848}
1849#include "vmware_pack_end.h"
1850SVGA3dCmdDefineGBSurface_v4; /* SVGA_3D_CMD_DEFINE_GB_SURFACE_V4 */
1851
1852/*
1853 * Destroy a guest-backed surface.
1854 */
1855
1856typedef
1857#include "vmware_pack_begin.h"
1858struct SVGA3dCmdDestroyGBSurface {
1859 uint32 sid;
1860}
1861#include "vmware_pack_end.h"
1862SVGA3dCmdDestroyGBSurface; /* SVGA_3D_CMD_DESTROY_GB_SURFACE */
1863
1864/*
1865 * Bind a guest-backed surface to a mob.
1866 */
1867
1868typedef
1869#include "vmware_pack_begin.h"
1870struct SVGA3dCmdBindGBSurface {
1871 uint32 sid;
1872 SVGAMobId mobid;
1873}
1874#include "vmware_pack_end.h"
1875SVGA3dCmdBindGBSurface; /* SVGA_3D_CMD_BIND_GB_SURFACE */
1876
1877typedef
1878#include "vmware_pack_begin.h"
1879struct SVGA3dCmdBindGBSurfaceWithPitch {
1880 uint32 sid;
1881 SVGAMobId mobid;
1882 uint32 baseLevelPitch;
1883}
1884#include "vmware_pack_end.h"
1885SVGA3dCmdBindGBSurfaceWithPitch; /* SVGA_3D_CMD_BIND_GB_SURFACE_WITH_PITCH */
1886
1887/*
1888 * Conditionally bind a mob to a guest-backed surface if testMobid
1889 * matches the currently bound mob. Optionally issue a
1890 * readback/update on the surface while it is still bound to the old
1891 * mobid if the mobid is changed by this command.
1892 */
1893
1894#define SVGA3D_COND_BIND_GB_SURFACE_FLAG_READBACK (1 << 0)
1895#define SVGA3D_COND_BIND_GB_SURFACE_FLAG_UPDATE (1 << 1)
1896
1897typedef
1898#include "vmware_pack_begin.h"
1899struct SVGA3dCmdCondBindGBSurface {
1900 uint32 sid;
1901 SVGAMobId testMobid;
1902 SVGAMobId mobid;
1903 uint32 flags;
1904}
1905#include "vmware_pack_end.h"
1906SVGA3dCmdCondBindGBSurface; /* SVGA_3D_CMD_COND_BIND_GB_SURFACE */
1907
1908/*
1909 * Update an image in a guest-backed surface.
1910 * (Inform the device that the guest-contents have been updated.)
1911 */
1912
1913typedef
1914#include "vmware_pack_begin.h"
1915struct SVGA3dCmdUpdateGBImage {
1916 SVGA3dSurfaceImageId image;
1917 SVGA3dBox box;
1918}
1919#include "vmware_pack_end.h"
1920SVGA3dCmdUpdateGBImage; /* SVGA_3D_CMD_UPDATE_GB_IMAGE */
1921
1922/*
1923 * Update an entire guest-backed surface.
1924 * (Inform the device that the guest-contents have been updated.)
1925 */
1926
1927typedef
1928#include "vmware_pack_begin.h"
1929struct SVGA3dCmdUpdateGBSurface {
1930 uint32 sid;
1931}
1932#include "vmware_pack_end.h"
1933SVGA3dCmdUpdateGBSurface; /* SVGA_3D_CMD_UPDATE_GB_SURFACE */
1934
1935/*
1936 * Readback an image in a guest-backed surface.
1937 * (Request the device to flush the dirty contents into the guest.)
1938 */
1939
1940typedef
1941#include "vmware_pack_begin.h"
1942struct SVGA3dCmdReadbackGBImage {
1943 SVGA3dSurfaceImageId image;
1944}
1945#include "vmware_pack_end.h"
1946SVGA3dCmdReadbackGBImage; /* SVGA_3D_CMD_READBACK_GB_IMAGE */
1947
1948/*
1949 * Readback an entire guest-backed surface.
1950 * (Request the device to flush the dirty contents into the guest.)
1951 */
1952
1953typedef
1954#include "vmware_pack_begin.h"
1955struct SVGA3dCmdReadbackGBSurface {
1956 uint32 sid;
1957}
1958#include "vmware_pack_end.h"
1959SVGA3dCmdReadbackGBSurface; /* SVGA_3D_CMD_READBACK_GB_SURFACE */
1960
1961/*
1962 * Readback a sub rect of an image in a guest-backed surface. After
1963 * issuing this command the driver is required to issue an update call
1964 * of the same region before issuing any other commands that reference
1965 * this surface or rendering is not guaranteed.
1966 */
1967
1968typedef
1969#include "vmware_pack_begin.h"
1970struct SVGA3dCmdReadbackGBImagePartial {
1971 SVGA3dSurfaceImageId image;
1972 SVGA3dBox box;
1973 uint32 invertBox;
1974}
1975#include "vmware_pack_end.h"
1976SVGA3dCmdReadbackGBImagePartial; /* SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL */
1977
1978
1979/*
1980 * Invalidate an image in a guest-backed surface.
1981 * (Notify the device that the contents can be lost.)
1982 */
1983
1984typedef
1985#include "vmware_pack_begin.h"
1986struct SVGA3dCmdInvalidateGBImage {
1987 SVGA3dSurfaceImageId image;
1988}
1989#include "vmware_pack_end.h"
1990SVGA3dCmdInvalidateGBImage; /* SVGA_3D_CMD_INVALIDATE_GB_IMAGE */
1991
1992/*
1993 * Invalidate an entire guest-backed surface.
1994 * (Notify the device that the contents if all images can be lost.)
1995 */
1996
1997typedef
1998#include "vmware_pack_begin.h"
1999struct SVGA3dCmdInvalidateGBSurface {
2000 uint32 sid;
2001}
2002#include "vmware_pack_end.h"
2003SVGA3dCmdInvalidateGBSurface; /* SVGA_3D_CMD_INVALIDATE_GB_SURFACE */
2004
2005/*
2006 * Invalidate a sub rect of an image in a guest-backed surface. After
2007 * issuing this command the driver is required to issue an update call
2008 * of the same region before issuing any other commands that reference
2009 * this surface or rendering is not guaranteed.
2010 */
2011
2012typedef
2013#include "vmware_pack_begin.h"
2014struct SVGA3dCmdInvalidateGBImagePartial {
2015 SVGA3dSurfaceImageId image;
2016 SVGA3dBox box;
2017 uint32 invertBox;
2018}
2019#include "vmware_pack_end.h"
2020SVGA3dCmdInvalidateGBImagePartial; /* SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL */
2021
2022
2023/*
2024 * Define a guest-backed context.
2025 */
2026
2027typedef
2028#include "vmware_pack_begin.h"
2029struct SVGA3dCmdDefineGBContext {
2030 uint32 cid;
2031}
2032#include "vmware_pack_end.h"
2033SVGA3dCmdDefineGBContext; /* SVGA_3D_CMD_DEFINE_GB_CONTEXT */
2034
2035/*
2036 * Destroy a guest-backed context.
2037 */
2038
2039typedef
2040#include "vmware_pack_begin.h"
2041struct SVGA3dCmdDestroyGBContext {
2042 uint32 cid;
2043}
2044#include "vmware_pack_end.h"
2045SVGA3dCmdDestroyGBContext; /* SVGA_3D_CMD_DESTROY_GB_CONTEXT */
2046
2047/*
2048 * Bind a guest-backed context.
2049 *
2050 * validContents should be set to 0 for new contexts,
2051 * and 1 if this is an old context which is getting paged
2052 * back on to the device.
2053 *
2054 * For new contexts, it is recommended that the driver
2055 * issue commands to initialize all interesting state
2056 * prior to rendering.
2057 */
2058
2059typedef
2060#include "vmware_pack_begin.h"
2061struct SVGA3dCmdBindGBContext {
2062 uint32 cid;
2063 SVGAMobId mobid;
2064 uint32 validContents;
2065}
2066#include "vmware_pack_end.h"
2067SVGA3dCmdBindGBContext; /* SVGA_3D_CMD_BIND_GB_CONTEXT */
2068
2069/*
2070 * Readback a guest-backed context.
2071 * (Request that the device flush the contents back into guest memory.)
2072 */
2073
2074typedef
2075#include "vmware_pack_begin.h"
2076struct SVGA3dCmdReadbackGBContext {
2077 uint32 cid;
2078}
2079#include "vmware_pack_end.h"
2080SVGA3dCmdReadbackGBContext; /* SVGA_3D_CMD_READBACK_GB_CONTEXT */
2081
2082/*
2083 * Invalidate a guest-backed context.
2084 */
2085typedef
2086#include "vmware_pack_begin.h"
2087struct SVGA3dCmdInvalidateGBContext {
2088 uint32 cid;
2089}
2090#include "vmware_pack_end.h"
2091SVGA3dCmdInvalidateGBContext; /* SVGA_3D_CMD_INVALIDATE_GB_CONTEXT */
2092
2093/*
2094 * Define a guest-backed shader.
2095 */
2096
2097typedef
2098#include "vmware_pack_begin.h"
2099struct SVGA3dCmdDefineGBShader {
2100 uint32 shid;
2101 SVGA3dShaderType type;
2102 uint32 sizeInBytes;
2103}
2104#include "vmware_pack_end.h"
2105SVGA3dCmdDefineGBShader; /* SVGA_3D_CMD_DEFINE_GB_SHADER */
2106
2107/*
2108 * Bind a guest-backed shader.
2109 */
2110
2111typedef
2112#include "vmware_pack_begin.h"
2113struct SVGA3dCmdBindGBShader {
2114 uint32 shid;
2115 SVGAMobId mobid;
2116 uint32 offsetInBytes;
2117}
2118#include "vmware_pack_end.h"
2119SVGA3dCmdBindGBShader; /* SVGA_3D_CMD_BIND_GB_SHADER */
2120
2121/*
2122 * Destroy a guest-backed shader.
2123 */
2124
2125typedef
2126#include "vmware_pack_begin.h"
2127struct SVGA3dCmdDestroyGBShader {
2128 uint32 shid;
2129}
2130#include "vmware_pack_end.h"
2131SVGA3dCmdDestroyGBShader; /* SVGA_3D_CMD_DESTROY_GB_SHADER */
2132
2133typedef
2134#include "vmware_pack_begin.h"
2135struct {
2136 uint32 cid;
2137 uint32 regStart;
2138 SVGA3dShaderType shaderType;
2139 SVGA3dShaderConstType constType;
2140
2141 /*
2142 * Followed by a variable number of shader constants.
2143 *
2144 * Note that FLOAT and INT constants are 4-dwords in length, while
2145 * BOOL constants are 1-dword in length.
2146 */
2147}
2148#include "vmware_pack_end.h"
2149SVGA3dCmdSetGBShaderConstInline; /* SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE */
2150
2151
2152typedef
2153#include "vmware_pack_begin.h"
2154struct {
2155 uint32 cid;
2156 SVGA3dQueryType type;
2157}
2158#include "vmware_pack_end.h"
2159SVGA3dCmdBeginGBQuery; /* SVGA_3D_CMD_BEGIN_GB_QUERY */
2160
2161typedef
2162#include "vmware_pack_begin.h"
2163struct {
2164 uint32 cid;
2165 SVGA3dQueryType type;
2166 SVGAMobId mobid;
2167 uint32 offset;
2168}
2169#include "vmware_pack_end.h"
2170SVGA3dCmdEndGBQuery; /* SVGA_3D_CMD_END_GB_QUERY */
2171
2172
2173/*
2174 * SVGA_3D_CMD_WAIT_FOR_GB_QUERY --
2175 *
2176 * The semantics of this command are identical to the
2177 * SVGA_3D_CMD_WAIT_FOR_QUERY except that the results are written
2178 * to a Mob instead of a GMR.
2179 */
2180
2181typedef
2182#include "vmware_pack_begin.h"
2183struct {
2184 uint32 cid;
2185 SVGA3dQueryType type;
2186 SVGAMobId mobid;
2187 uint32 offset;
2188}
2189#include "vmware_pack_end.h"
2190SVGA3dCmdWaitForGBQuery; /* SVGA_3D_CMD_WAIT_FOR_GB_QUERY */
2191
2192
2193typedef
2194#include "vmware_pack_begin.h"
2195struct {
2196 SVGAMobId mobid;
2197 uint32 mustBeZero;
2198 uint32 initialized;
2199}
2200#include "vmware_pack_end.h"
2201SVGA3dCmdEnableGart; /* SVGA_3D_CMD_ENABLE_GART */
2202
2203typedef
2204#include "vmware_pack_begin.h"
2205struct {
2206 SVGAMobId mobid;
2207 uint32 gartOffset;
2208}
2209#include "vmware_pack_end.h"
2210SVGA3dCmdMapMobIntoGart; /* SVGA_3D_CMD_MAP_MOB_INTO_GART */
2211
2212
2213typedef
2214#include "vmware_pack_begin.h"
2215struct {
2216 uint32 gartOffset;
2217 uint32 numPages;
2218}
2219#include "vmware_pack_end.h"
2220SVGA3dCmdUnmapGartRange; /* SVGA_3D_CMD_UNMAP_GART_RANGE */
2221
2222
2223/*
2224 * Screen Targets
2225 */
2226
2227typedef
2228#include "vmware_pack_begin.h"
2229struct {
2230 uint32 stid;
2231 uint32 width;
2232 uint32 height;
2233 int32 xRoot;
2234 int32 yRoot;
2235 SVGAScreenTargetFlags flags;
2236
2237 /*
2238 * The physical DPI that the guest expects this screen displayed at.
2239 *
2240 * Guests which are not DPI-aware should set this to zero.
2241 */
2242 uint32 dpi;
2243}
2244#include "vmware_pack_end.h"
2245SVGA3dCmdDefineGBScreenTarget; /* SVGA_3D_CMD_DEFINE_GB_SCREENTARGET */
2246
2247typedef
2248#include "vmware_pack_begin.h"
2249struct {
2250 uint32 stid;
2251}
2252#include "vmware_pack_end.h"
2253SVGA3dCmdDestroyGBScreenTarget; /* SVGA_3D_CMD_DESTROY_GB_SCREENTARGET */
2254
2255typedef
2256#include "vmware_pack_begin.h"
2257struct {
2258 uint32 stid;
2259 SVGA3dSurfaceImageId image;
2260}
2261#include "vmware_pack_end.h"
2262SVGA3dCmdBindGBScreenTarget; /* SVGA_3D_CMD_BIND_GB_SCREENTARGET */
2263
2264typedef
2265#include "vmware_pack_begin.h"
2266struct {
2267 uint32 stid;
2268 SVGA3dRect rect;
2269}
2270#include "vmware_pack_end.h"
2271SVGA3dCmdUpdateGBScreenTarget; /* SVGA_3D_CMD_UPDATE_GB_SCREENTARGET */
2272
2273typedef
2274#include "vmware_pack_begin.h"
2275struct SVGA3dCmdGBScreenDMA {
2276 uint32 screenId;
2277 uint32 dead;
2278 SVGAMobId destMobID;
2279 uint32 destPitch;
2280 SVGAMobId changeMapMobID;
2281}
2282#include "vmware_pack_end.h"
2283SVGA3dCmdGBScreenDMA; /* SVGA_3D_CMD_GB_SCREEN_DMA */
2284
2285typedef
2286#include "vmware_pack_begin.h"
2287struct {
2288 uint32 value;
2289 uint32 mobId;
2290 uint32 mobOffset;
2291}
2292#include "vmware_pack_end.h"
2293SVGA3dCmdGBMobFence; /* SVGA_3D_CMD_GB_MOB_FENCE */
2294
2295typedef
2296#include "vmware_pack_begin.h"
2297struct {
2298 uint32 stid;
2299 SVGA3dSurfaceImageId dest;
2300
2301 uint32 statusMobId;
2302 uint32 statusMobOffset;
2303
2304 /* Reserved fields */
2305 uint32 mustBeInvalidId;
2306 uint32 mustBeZero;
2307}
2308#include "vmware_pack_end.h"
2309SVGA3dCmdScreenCopy; /* SVGA_3D_CMD_SCREEN_COPY */
2310
2311#define SVGA_SCREEN_COPY_STATUS_FAILURE 0x00
2312#define SVGA_SCREEN_COPY_STATUS_SUCCESS 0x01
2313#define SVGA_SCREEN_COPY_STATUS_INVALID 0xFFFFFFFF
2314
2315typedef
2316#include "vmware_pack_begin.h"
2317struct {
2318 uint32 sid;
2319}
2320#include "vmware_pack_end.h"
2321SVGA3dCmdWriteZeroSurface; /* SVGA_3D_CMD_WRITE_ZERO_SURFACE */
2322
2323typedef
2324#include "vmware_pack_begin.h"
2325struct {
2326 uint32 sid;
2327}
2328#include "vmware_pack_end.h"
2329SVGA3dCmdHintZeroSurface; /* SVGA_3D_CMD_HINT_ZERO_SURFACE */
2330
2331#endif /* _SVGA3D_CMD_H_ */
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