VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-win-dx.cpp@ 91364

最後變更 在這個檔案從91364是 91364,由 vboxsync 提交於 3 年 前

Devices/Graphics: use a define for test breakpoints: bugref:9830
  • 屬性 svn:eol-style 設為 native
  • 屬性 svn:keywords 設為 Author Date Id Revision
檔案大小: 263.8 KB
行 
1/* $Id: DevVGA-SVGA3d-win-dx.cpp 91364 2021-09-24 14:19:45Z vboxsync $ */
2/** @file
3 * DevVMWare - VMWare SVGA device
4 */
5
6/*
7 * Copyright (C) 2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.alldomusa.eu.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <VBox/log.h>
25#include <VBox/vmm/pdmdev.h>
26#include <VBox/vmm/pgm.h>
27
28#include <iprt/assert.h>
29#include <iprt/avl.h>
30#include <iprt/errcore.h>
31#include <iprt/mem.h>
32
33#include <VBoxVideo.h> /* required by DevVGA.h */
34#include <VBoxVideo3D.h>
35
36/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
37#include "DevVGA.h"
38
39#include "DevVGA-SVGA.h"
40#include "DevVGA-SVGA3d.h"
41#include "DevVGA-SVGA3d-internal.h"
42#include "DevVGA-SVGA3d-dx-shader.h"
43
44#include <d3d11.h>
45
46
47/** Fake ID for the backend DX context. The context creates all shared textures. */
48#define DX_CID_BACKEND UINT32_C(0xfffffffe)
49
50#define DX_RELEASE_ARRAY(a_Count, a_papArray) do { \
51 for (uint32_t i = 0; i < (a_Count); ++i) \
52 D3D_RELEASE((a_papArray)[i]); \
53} while (0)
54
55typedef struct DXDEVICE
56{
57 ID3D11Device *pDevice; /* Device. */
58 ID3D11DeviceContext *pImmediateContext; /* Corresponding context. */
59 IDXGIFactory *pDxgiFactory; /* DXGI Factory. */
60 D3D_FEATURE_LEVEL FeatureLevel;
61} DXDEVICE;
62
63/* What kind of resource has been created for the VMSVGA3D surface. */
64typedef enum VMSVGA3DBACKRESTYPE
65{
66 VMSVGA3D_RESTYPE_NONE = 0,
67 VMSVGA3D_RESTYPE_SCREEN_TARGET = 1,
68 VMSVGA3D_RESTYPE_TEXTURE_1D = 2,
69 VMSVGA3D_RESTYPE_TEXTURE = 3,
70 VMSVGA3D_RESTYPE_CUBE_TEXTURE = 4,
71 VMSVGA3D_RESTYPE_TEXTURE_3D = 5,
72 VMSVGA3D_RESTYPE_BUFFER = 6,
73} VMSVGA3DBACKRESTYPE;
74
75typedef struct VMSVGA3DBACKENDSURFACE
76{
77 VMSVGA3DBACKRESTYPE enmResType;
78 DXGI_FORMAT enmDxgiFormat;
79 union
80 {
81 ID3D11Resource *pResource;
82 ID3D11Texture2D *pTexture2D;
83 ID3D11Texture3D *pTexture3D;
84 ID3D11Buffer *pBuffer;
85 } u;
86
87 ID3D11Texture2D *pDynamicTexture; /* For screen updates from memory. */ /** @todo One for all screens. */
88 ID3D11Texture2D *pStagingTexture; /* For Reading the screen content. */ /** @todo One for all screens. */
89 ID3D11Texture3D *pDynamicTexture3D; /* For screen updates from memory. */ /** @todo One for all screens. */
90 ID3D11Texture3D *pStagingTexture3D; /* For Reading the screen content. */ /** @todo One for all screens. */
91
92 /* Screen targets are created as shared surfaces. */
93 HANDLE SharedHandle; /* The shared handle of this structure. */
94
95 /* DX context which last rendered to the texture.
96 * This is only for render targets and screen targets, which can be shared between contexts.
97 * The backend context (cid == DX_CID_BACKEND) can also be a drawing context.
98 */
99 uint32_t cidDrawing;
100
101 /** AVL tree containing DXSHAREDTEXTURE structures. */
102 AVLU32TREE SharedTextureTree;
103
104} VMSVGA3DBACKENDSURFACE;
105
106/* "The only resources that can be shared are 2D non-mipmapped textures." */
107typedef struct DXSHAREDTEXTURE
108{
109 AVLU32NODECORE Core; /* Key is context id which opened this texture. */
110 ID3D11Texture2D *pTexture; /* The opened shared texture. */
111 uint32_t sid; /* Surface id. */
112} DXSHAREDTEXTURE;
113
114
115typedef struct VMSVGAHWSCREEN
116{
117 ID3D11Texture2D *pTexture; /* Shared texture for the screen content. Only used as CopyResource target. */
118 IDXGIResource *pDxgiResource; /* Interface of the texture. */
119 IDXGIKeyedMutex *pDXGIKeyedMutex; /* Synchronization interface for the render device. */
120 HANDLE SharedHandle; /* The shared handle of this structure. */
121 uint32_t sidScreenTarget; /* The source surface for this screen. */
122} VMSVGAHWSCREEN;
123
124
125typedef struct DXELEMENTLAYOUT
126{
127 ID3D11InputLayout *pElementLayout;
128 uint32_t cElementDesc;
129 D3D11_INPUT_ELEMENT_DESC aElementDesc[32];
130} DXELEMENTLAYOUT;
131
132typedef struct DXSHADER
133{
134 SVGA3dShaderType enmShaderType;
135 union
136 {
137 ID3D11DeviceChild *pShader; /* All. */
138 ID3D11VertexShader *pVertexShader; /* SVGA3D_SHADERTYPE_VS */
139 ID3D11PixelShader *pPixelShader; /* SVGA3D_SHADERTYPE_PS */
140 ID3D11GeometryShader *pGeometryShader; /* SVGA3D_SHADERTYPE_GS */
141 ID3D11HullShader *pHullShader; /* SVGA3D_SHADERTYPE_HS */
142 ID3D11DomainShader *pDomainShader; /* SVGA3D_SHADERTYPE_DS */
143 ID3D11ComputeShader *pComputeShader; /* SVGA3D_SHADERTYPE_CS */
144 };
145 void *pvDXBC;
146 uint32_t cbDXBC;
147} DXSHADER;
148
149typedef struct VMSVGA3DBACKENDDXCONTEXT
150{
151 DXDEVICE device; /* DX device interfaces for this context operations. */
152
153 /* Arrays for Context-Object Tables. Number of entries depends on COTable size. */
154 uint32_t cBlendState; /* Number of entries in the papBlendState array. */
155 uint32_t cDepthStencilState; /* papDepthStencilState */
156 uint32_t cSamplerState; /* papSamplerState */
157 uint32_t cRasterizerState; /* papRasterizerState */
158 uint32_t cElementLayout; /* papElementLayout */
159 uint32_t cRenderTargetView; /* papRenderTargetView */
160 uint32_t cDepthStencilView; /* papDepthStencilView */
161 uint32_t cShaderResourceView; /* papShaderResourceView */
162 uint32_t cQuery; /* papQuery */
163 uint32_t cShader; /* papShader */
164 ID3D11BlendState **papBlendState;
165 ID3D11DepthStencilState **papDepthStencilState;
166 ID3D11SamplerState **papSamplerState;
167 ID3D11RasterizerState **papRasterizerState;
168 DXELEMENTLAYOUT *paElementLayout;
169 ID3D11RenderTargetView **papRenderTargetView;
170 ID3D11DepthStencilView **papDepthStencilView;
171 ID3D11ShaderResourceView **papShaderResourceView;
172 ID3D11Query **papQuery;
173 DXSHADER *paShader;
174} VMSVGA3DBACKENDDXCONTEXT;
175
176typedef HRESULT FN_D3D_DISASSEMBLE(LPCVOID pSrcData, SIZE_T SrcDataSize, UINT Flags, LPCSTR szComments, ID3D10Blob **ppDisassembly);
177typedef FN_D3D_DISASSEMBLE *PFN_D3D_DISASSEMBLE;
178
179typedef struct VMSVGA3DBACKEND
180{
181 RTLDRMOD hD3D11;
182 PFN_D3D11_CREATE_DEVICE pfnD3D11CreateDevice;
183
184 RTLDRMOD hD3DCompiler;
185 PFN_D3D_DISASSEMBLE pfnD3DDisassemble;
186
187 DXDEVICE device; /* Device for the VMSVGA3D context independent operation. */
188} VMSVGA3DBACKEND;
189
190
191static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface);
192
193
194DECLINLINE(D3D11_TEXTURECUBE_FACE) vmsvga3dCubemapFaceFromIndex(uint32_t iFace)
195{
196 D3D11_TEXTURECUBE_FACE Face;
197 switch (iFace)
198 {
199 case 0: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_X; break;
200 case 1: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_X; break;
201 case 2: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Y; break;
202 case 3: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Y; break;
203 case 4: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Z; break;
204 default:
205 case 5: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Z; break;
206 }
207 return Face;
208}
209
210#define DX_REPLACE_X8_WITH_A8
211static DXGI_FORMAT vmsvgaDXSurfaceFormat2Dxgi(SVGA3dSurfaceFormat format)
212{
213 /* Ensure that correct headers are used.
214 * SVGA3D_AYUV was equal to 45, then replaced with SVGA3D_FORMAT_DEAD2 = 45, and redefined as SVGA3D_AYUV = 152.
215 */
216 AssertCompile(SVGA3D_AYUV == 152);
217
218#define DXGI_FORMAT_ DXGI_FORMAT_UNKNOWN
219 /** @todo More formats. */
220 switch (format)
221 {
222#ifdef DX_REPLACE_X8_WITH_A8
223 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
224#else
225 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8X8_UNORM;
226#endif
227 case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
228 case SVGA3D_R5G6B5: return DXGI_FORMAT_B5G6R5_UNORM;
229 case SVGA3D_X1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
230 case SVGA3D_A1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
231 case SVGA3D_A4R4G4B4: break; // 11.1 return DXGI_FORMAT_B4G4R4A4_UNORM;
232 case SVGA3D_Z_D32: break;
233 case SVGA3D_Z_D16: return DXGI_FORMAT_D16_UNORM;
234 case SVGA3D_Z_D24S8: return DXGI_FORMAT_D24_UNORM_S8_UINT;
235 case SVGA3D_Z_D15S1: break;
236 case SVGA3D_LUMINANCE8: return DXGI_FORMAT_;
237 case SVGA3D_LUMINANCE4_ALPHA4: return DXGI_FORMAT_;
238 case SVGA3D_LUMINANCE16: return DXGI_FORMAT_;
239 case SVGA3D_LUMINANCE8_ALPHA8: return DXGI_FORMAT_;
240 case SVGA3D_DXT1: return DXGI_FORMAT_;
241 case SVGA3D_DXT2: return DXGI_FORMAT_;
242 case SVGA3D_DXT3: return DXGI_FORMAT_;
243 case SVGA3D_DXT4: return DXGI_FORMAT_;
244 case SVGA3D_DXT5: return DXGI_FORMAT_;
245 case SVGA3D_BUMPU8V8: return DXGI_FORMAT_;
246 case SVGA3D_BUMPL6V5U5: return DXGI_FORMAT_;
247 case SVGA3D_BUMPX8L8V8U8: return DXGI_FORMAT_;
248 case SVGA3D_FORMAT_DEAD1: break;
249 case SVGA3D_ARGB_S10E5: return DXGI_FORMAT_;
250 case SVGA3D_ARGB_S23E8: return DXGI_FORMAT_;
251 case SVGA3D_A2R10G10B10: return DXGI_FORMAT_;
252 case SVGA3D_V8U8: return DXGI_FORMAT_;
253 case SVGA3D_Q8W8V8U8: return DXGI_FORMAT_;
254 case SVGA3D_CxV8U8: return DXGI_FORMAT_;
255 case SVGA3D_X8L8V8U8: return DXGI_FORMAT_;
256 case SVGA3D_A2W10V10U10: return DXGI_FORMAT_;
257 case SVGA3D_ALPHA8: return DXGI_FORMAT_;
258 case SVGA3D_R_S10E5: return DXGI_FORMAT_;
259 case SVGA3D_R_S23E8: return DXGI_FORMAT_;
260 case SVGA3D_RG_S10E5: return DXGI_FORMAT_;
261 case SVGA3D_RG_S23E8: return DXGI_FORMAT_;
262 case SVGA3D_BUFFER: return DXGI_FORMAT_;
263 case SVGA3D_Z_D24X8: return DXGI_FORMAT_;
264 case SVGA3D_V16U16: return DXGI_FORMAT_;
265 case SVGA3D_G16R16: return DXGI_FORMAT_;
266 case SVGA3D_A16B16G16R16: return DXGI_FORMAT_;
267 case SVGA3D_UYVY: return DXGI_FORMAT_;
268 case SVGA3D_YUY2: return DXGI_FORMAT_;
269 case SVGA3D_NV12: return DXGI_FORMAT_;
270 case SVGA3D_FORMAT_DEAD2: break; /* Old SVGA3D_AYUV */
271 case SVGA3D_R32G32B32A32_TYPELESS: return DXGI_FORMAT_R32G32B32A32_TYPELESS;
272 case SVGA3D_R32G32B32A32_UINT: return DXGI_FORMAT_R32G32B32A32_UINT;
273 case SVGA3D_R32G32B32A32_SINT: return DXGI_FORMAT_R32G32B32A32_SINT;
274 case SVGA3D_R32G32B32_TYPELESS: return DXGI_FORMAT_R32G32B32_TYPELESS;
275 case SVGA3D_R32G32B32_FLOAT: return DXGI_FORMAT_R32G32B32_FLOAT;
276 case SVGA3D_R32G32B32_UINT: return DXGI_FORMAT_R32G32B32_UINT;
277 case SVGA3D_R32G32B32_SINT: return DXGI_FORMAT_R32G32B32_SINT;
278 case SVGA3D_R16G16B16A16_TYPELESS: return DXGI_FORMAT_R16G16B16A16_TYPELESS;
279 case SVGA3D_R16G16B16A16_UINT: return DXGI_FORMAT_R16G16B16A16_UINT;
280 case SVGA3D_R16G16B16A16_SNORM: return DXGI_FORMAT_R16G16B16A16_SNORM;
281 case SVGA3D_R16G16B16A16_SINT: return DXGI_FORMAT_R16G16B16A16_SINT;
282 case SVGA3D_R32G32_TYPELESS: return DXGI_FORMAT_R32G32_TYPELESS;
283 case SVGA3D_R32G32_UINT: return DXGI_FORMAT_R32G32_UINT;
284 case SVGA3D_R32G32_SINT: return DXGI_FORMAT_R32G32_SINT;
285 case SVGA3D_R32G8X24_TYPELESS: return DXGI_FORMAT_R32G8X24_TYPELESS;
286 case SVGA3D_D32_FLOAT_S8X24_UINT: return DXGI_FORMAT_D32_FLOAT_S8X24_UINT;
287 case SVGA3D_R32_FLOAT_X8X24: return DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS;
288 case SVGA3D_X32_G8X24_UINT: return DXGI_FORMAT_X32_TYPELESS_G8X24_UINT;
289 case SVGA3D_R10G10B10A2_TYPELESS: return DXGI_FORMAT_R10G10B10A2_TYPELESS;
290 case SVGA3D_R10G10B10A2_UINT: return DXGI_FORMAT_R10G10B10A2_UINT;
291 case SVGA3D_R11G11B10_FLOAT: return DXGI_FORMAT_R11G11B10_FLOAT;
292 case SVGA3D_R8G8B8A8_TYPELESS: return DXGI_FORMAT_R8G8B8A8_TYPELESS;
293 case SVGA3D_R8G8B8A8_UNORM: return DXGI_FORMAT_R8G8B8A8_UNORM;
294 case SVGA3D_R8G8B8A8_UNORM_SRGB: return DXGI_FORMAT_R8G8B8A8_UNORM_SRGB;
295 case SVGA3D_R8G8B8A8_UINT: return DXGI_FORMAT_R8G8B8A8_UINT;
296 case SVGA3D_R8G8B8A8_SINT: return DXGI_FORMAT_R8G8B8A8_SINT;
297 case SVGA3D_R16G16_TYPELESS: return DXGI_FORMAT_R16G16_TYPELESS;
298 case SVGA3D_R16G16_UINT: return DXGI_FORMAT_R16G16_UINT;
299 case SVGA3D_R16G16_SINT: return DXGI_FORMAT_R16G16_SINT;
300 case SVGA3D_R32_TYPELESS: return DXGI_FORMAT_R32_TYPELESS;
301 case SVGA3D_D32_FLOAT: return DXGI_FORMAT_D32_FLOAT;
302 case SVGA3D_R32_UINT: return DXGI_FORMAT_R32_UINT;
303 case SVGA3D_R32_SINT: return DXGI_FORMAT_R32_SINT;
304 case SVGA3D_R24G8_TYPELESS: return DXGI_FORMAT_R24G8_TYPELESS;
305 case SVGA3D_D24_UNORM_S8_UINT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
306 case SVGA3D_R24_UNORM_X8: return DXGI_FORMAT_R24_UNORM_X8_TYPELESS;
307 case SVGA3D_X24_G8_UINT: return DXGI_FORMAT_X24_TYPELESS_G8_UINT;
308 case SVGA3D_R8G8_TYPELESS: return DXGI_FORMAT_R8G8_TYPELESS;
309 case SVGA3D_R8G8_UNORM: return DXGI_FORMAT_R8G8_UNORM;
310 case SVGA3D_R8G8_UINT: return DXGI_FORMAT_R8G8_UINT;
311 case SVGA3D_R8G8_SINT: return DXGI_FORMAT_R8G8_SINT;
312 case SVGA3D_R16_TYPELESS: return DXGI_FORMAT_R16_TYPELESS;
313 case SVGA3D_R16_UNORM: return DXGI_FORMAT_R16_UNORM;
314 case SVGA3D_R16_UINT: return DXGI_FORMAT_R16_UINT;
315 case SVGA3D_R16_SNORM: return DXGI_FORMAT_R16_SNORM;
316 case SVGA3D_R16_SINT: return DXGI_FORMAT_R16_SINT;
317 case SVGA3D_R8_TYPELESS: return DXGI_FORMAT_R8_TYPELESS;
318 case SVGA3D_R8_UNORM: return DXGI_FORMAT_R8_UNORM;
319 case SVGA3D_R8_UINT: return DXGI_FORMAT_R8_UINT;
320 case SVGA3D_R8_SNORM: return DXGI_FORMAT_R8_SNORM;
321 case SVGA3D_R8_SINT: return DXGI_FORMAT_R8_SINT;
322 case SVGA3D_P8: break;
323 case SVGA3D_R9G9B9E5_SHAREDEXP: return DXGI_FORMAT_R9G9B9E5_SHAREDEXP;
324 case SVGA3D_R8G8_B8G8_UNORM: return DXGI_FORMAT_R8G8_B8G8_UNORM;
325 case SVGA3D_G8R8_G8B8_UNORM: return DXGI_FORMAT_G8R8_G8B8_UNORM;
326 case SVGA3D_BC1_TYPELESS: return DXGI_FORMAT_BC1_TYPELESS;
327 case SVGA3D_BC1_UNORM_SRGB: return DXGI_FORMAT_BC1_UNORM_SRGB;
328 case SVGA3D_BC2_TYPELESS: return DXGI_FORMAT_BC2_TYPELESS;
329 case SVGA3D_BC2_UNORM_SRGB: return DXGI_FORMAT_BC2_UNORM_SRGB;
330 case SVGA3D_BC3_TYPELESS: return DXGI_FORMAT_BC3_TYPELESS;
331 case SVGA3D_BC3_UNORM_SRGB: return DXGI_FORMAT_BC3_UNORM_SRGB;
332 case SVGA3D_BC4_TYPELESS: return DXGI_FORMAT_BC4_TYPELESS;
333 case SVGA3D_ATI1: break;
334 case SVGA3D_BC4_SNORM: return DXGI_FORMAT_BC4_SNORM;
335 case SVGA3D_BC5_TYPELESS: return DXGI_FORMAT_BC5_TYPELESS;
336 case SVGA3D_ATI2: break;
337 case SVGA3D_BC5_SNORM: return DXGI_FORMAT_BC5_SNORM;
338 case SVGA3D_R10G10B10_XR_BIAS_A2_UNORM: return DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM;
339 case SVGA3D_B8G8R8A8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
340 case SVGA3D_B8G8R8A8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
341#ifdef DX_REPLACE_X8_WITH_A8
342 case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
343 case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
344#else
345 case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8X8_TYPELESS;
346 case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8X8_UNORM_SRGB;
347#endif
348 case SVGA3D_Z_DF16: break;
349 case SVGA3D_Z_DF24: break;
350 case SVGA3D_Z_D24S8_INT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
351 case SVGA3D_YV12: break;
352 case SVGA3D_R32G32B32A32_FLOAT: return DXGI_FORMAT_R32G32B32A32_FLOAT;
353 case SVGA3D_R16G16B16A16_FLOAT: return DXGI_FORMAT_R16G16B16A16_FLOAT;
354 case SVGA3D_R16G16B16A16_UNORM: return DXGI_FORMAT_R16G16B16A16_UNORM;
355 case SVGA3D_R32G32_FLOAT: return DXGI_FORMAT_R32G32_FLOAT;
356 case SVGA3D_R10G10B10A2_UNORM: return DXGI_FORMAT_R10G10B10A2_UNORM;
357 case SVGA3D_R8G8B8A8_SNORM: return DXGI_FORMAT_R8G8B8A8_SNORM;
358 case SVGA3D_R16G16_FLOAT: return DXGI_FORMAT_R16G16_FLOAT;
359 case SVGA3D_R16G16_UNORM: return DXGI_FORMAT_R16G16_UNORM;
360 case SVGA3D_R16G16_SNORM: return DXGI_FORMAT_R16G16_SNORM;
361 case SVGA3D_R32_FLOAT: return DXGI_FORMAT_R32_FLOAT;
362 case SVGA3D_R8G8_SNORM: return DXGI_FORMAT_R8G8_SNORM;
363 case SVGA3D_R16_FLOAT: return DXGI_FORMAT_R16_FLOAT;
364 case SVGA3D_D16_UNORM: return DXGI_FORMAT_D16_UNORM;
365 case SVGA3D_A8_UNORM: return DXGI_FORMAT_A8_UNORM;
366 case SVGA3D_BC1_UNORM: return DXGI_FORMAT_BC1_UNORM;
367 case SVGA3D_BC2_UNORM: return DXGI_FORMAT_BC2_UNORM;
368 case SVGA3D_BC3_UNORM: return DXGI_FORMAT_BC3_UNORM;
369 case SVGA3D_B5G6R5_UNORM: return DXGI_FORMAT_B5G6R5_UNORM;
370 case SVGA3D_B5G5R5A1_UNORM: return DXGI_FORMAT_B5G5R5A1_UNORM;
371 case SVGA3D_B8G8R8A8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
372#ifdef DX_REPLACE_X8_WITH_A8
373 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
374#else
375 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8X8_UNORM;
376#endif
377 case SVGA3D_BC4_UNORM: return DXGI_FORMAT_BC4_UNORM;
378 case SVGA3D_BC5_UNORM: return DXGI_FORMAT_BC5_UNORM;
379
380 case SVGA3D_B4G4R4A4_UNORM: return DXGI_FORMAT_;
381 case SVGA3D_BC6H_TYPELESS: return DXGI_FORMAT_;
382 case SVGA3D_BC6H_UF16: return DXGI_FORMAT_;
383 case SVGA3D_BC6H_SF16: return DXGI_FORMAT_;
384 case SVGA3D_BC7_TYPELESS: return DXGI_FORMAT_;
385 case SVGA3D_BC7_UNORM: return DXGI_FORMAT_;
386 case SVGA3D_BC7_UNORM_SRGB: return DXGI_FORMAT_;
387 case SVGA3D_AYUV: return DXGI_FORMAT_;
388
389 case SVGA3D_FORMAT_INVALID:
390 case SVGA3D_FORMAT_MAX: break;
391 }
392 // AssertFailed();
393 return DXGI_FORMAT_UNKNOWN;
394#undef DXGI_FORMAT_
395}
396
397
398static SVGA3dSurfaceFormat vmsvgaDXDevCapSurfaceFmt2Format(SVGA3dDevCapIndex enmDevCap)
399{
400 switch (enmDevCap)
401 {
402 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
403 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
404 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
405 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
406 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
407 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
408 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5: return SVGA3D_R5G6B5;
409 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
410 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
411 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8: return SVGA3D_ALPHA8;
412 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
413 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16: return SVGA3D_Z_D16;
414 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8: return SVGA3D_Z_D24S8;
415 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8: return SVGA3D_Z_D24X8;
416 case SVGA3D_DEVCAP_SURFACEFMT_DXT1: return SVGA3D_DXT1;
417 case SVGA3D_DEVCAP_SURFACEFMT_DXT2: return SVGA3D_DXT2;
418 case SVGA3D_DEVCAP_SURFACEFMT_DXT3: return SVGA3D_DXT3;
419 case SVGA3D_DEVCAP_SURFACEFMT_DXT4: return SVGA3D_DXT4;
420 case SVGA3D_DEVCAP_SURFACEFMT_DXT5: return SVGA3D_DXT5;
421 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
422 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
423 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
424 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
425 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8: return SVGA3D_CxV8U8;
426 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5: return SVGA3D_R_S10E5;
427 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8: return SVGA3D_R_S23E8;
428 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5: return SVGA3D_RG_S10E5;
429 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8: return SVGA3D_RG_S23E8;
430 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
431 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
432 case SVGA3D_DEVCAP_SURFACEFMT_V16U16: return SVGA3D_V16U16;
433 case SVGA3D_DEVCAP_SURFACEFMT_G16R16: return SVGA3D_G16R16;
434 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
435 case SVGA3D_DEVCAP_SURFACEFMT_UYVY: return SVGA3D_UYVY;
436 case SVGA3D_DEVCAP_SURFACEFMT_YUY2: return SVGA3D_YUY2;
437 case SVGA3D_DEVCAP_SURFACEFMT_NV12: return SVGA3D_NV12;
438 case SVGA3D_DEVCAP_DEAD10: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_SURFACEFMT_AYUV -> SVGA3D_AYUV */
439 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16: return SVGA3D_Z_DF16;
440 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24: return SVGA3D_Z_DF24;
441 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
442 case SVGA3D_DEVCAP_SURFACEFMT_ATI1: return SVGA3D_ATI1;
443 case SVGA3D_DEVCAP_SURFACEFMT_ATI2: return SVGA3D_ATI2;
444 case SVGA3D_DEVCAP_SURFACEFMT_YV12: return SVGA3D_YV12;
445 default:
446 AssertFailed();
447 break;
448 }
449 return SVGA3D_FORMAT_INVALID;
450}
451
452
453static SVGA3dSurfaceFormat vmsvgaDXDevCapDxfmt2Format(SVGA3dDevCapIndex enmDevCap)
454{
455 switch (enmDevCap)
456 {
457 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
458 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
459 case SVGA3D_DEVCAP_DXFMT_R5G6B5: return SVGA3D_R5G6B5;
460 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
461 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
462 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
463 case SVGA3D_DEVCAP_DXFMT_Z_D32: return SVGA3D_Z_D32;
464 case SVGA3D_DEVCAP_DXFMT_Z_D16: return SVGA3D_Z_D16;
465 case SVGA3D_DEVCAP_DXFMT_Z_D24S8: return SVGA3D_Z_D24S8;
466 case SVGA3D_DEVCAP_DXFMT_Z_D15S1: return SVGA3D_Z_D15S1;
467 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
468 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4: return SVGA3D_LUMINANCE4_ALPHA4;
469 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
470 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
471 case SVGA3D_DEVCAP_DXFMT_DXT1: return SVGA3D_DXT1;
472 case SVGA3D_DEVCAP_DXFMT_DXT2: return SVGA3D_DXT2;
473 case SVGA3D_DEVCAP_DXFMT_DXT3: return SVGA3D_DXT3;
474 case SVGA3D_DEVCAP_DXFMT_DXT4: return SVGA3D_DXT4;
475 case SVGA3D_DEVCAP_DXFMT_DXT5: return SVGA3D_DXT5;
476 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
477 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5: return SVGA3D_BUMPL6V5U5;
478 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
479 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1: return SVGA3D_FORMAT_DEAD1;
480 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
481 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
482 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
483 case SVGA3D_DEVCAP_DXFMT_V8U8: return SVGA3D_V8U8;
484 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
485 case SVGA3D_DEVCAP_DXFMT_CxV8U8: return SVGA3D_CxV8U8;
486 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8: return SVGA3D_X8L8V8U8;
487 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
488 case SVGA3D_DEVCAP_DXFMT_ALPHA8: return SVGA3D_ALPHA8;
489 case SVGA3D_DEVCAP_DXFMT_R_S10E5: return SVGA3D_R_S10E5;
490 case SVGA3D_DEVCAP_DXFMT_R_S23E8: return SVGA3D_R_S23E8;
491 case SVGA3D_DEVCAP_DXFMT_RG_S10E5: return SVGA3D_RG_S10E5;
492 case SVGA3D_DEVCAP_DXFMT_RG_S23E8: return SVGA3D_RG_S23E8;
493 case SVGA3D_DEVCAP_DXFMT_BUFFER: return SVGA3D_BUFFER;
494 case SVGA3D_DEVCAP_DXFMT_Z_D24X8: return SVGA3D_Z_D24X8;
495 case SVGA3D_DEVCAP_DXFMT_V16U16: return SVGA3D_V16U16;
496 case SVGA3D_DEVCAP_DXFMT_G16R16: return SVGA3D_G16R16;
497 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
498 case SVGA3D_DEVCAP_DXFMT_UYVY: return SVGA3D_UYVY;
499 case SVGA3D_DEVCAP_DXFMT_YUY2: return SVGA3D_YUY2;
500 case SVGA3D_DEVCAP_DXFMT_NV12: return SVGA3D_NV12;
501 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_DXFMT_AYUV -> SVGA3D_AYUV */
502 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS: return SVGA3D_R32G32B32A32_TYPELESS;
503 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT: return SVGA3D_R32G32B32A32_UINT;
504 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT: return SVGA3D_R32G32B32A32_SINT;
505 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS: return SVGA3D_R32G32B32_TYPELESS;
506 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT: return SVGA3D_R32G32B32_FLOAT;
507 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT: return SVGA3D_R32G32B32_UINT;
508 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT: return SVGA3D_R32G32B32_SINT;
509 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS: return SVGA3D_R16G16B16A16_TYPELESS;
510 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT: return SVGA3D_R16G16B16A16_UINT;
511 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM: return SVGA3D_R16G16B16A16_SNORM;
512 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT: return SVGA3D_R16G16B16A16_SINT;
513 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS: return SVGA3D_R32G32_TYPELESS;
514 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT: return SVGA3D_R32G32_UINT;
515 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT: return SVGA3D_R32G32_SINT;
516 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS: return SVGA3D_R32G8X24_TYPELESS;
517 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT: return SVGA3D_D32_FLOAT_S8X24_UINT;
518 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24: return SVGA3D_R32_FLOAT_X8X24;
519 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT: return SVGA3D_X32_G8X24_UINT;
520 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS: return SVGA3D_R10G10B10A2_TYPELESS;
521 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT: return SVGA3D_R10G10B10A2_UINT;
522 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT: return SVGA3D_R11G11B10_FLOAT;
523 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS: return SVGA3D_R8G8B8A8_TYPELESS;
524 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM: return SVGA3D_R8G8B8A8_UNORM;
525 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB: return SVGA3D_R8G8B8A8_UNORM_SRGB;
526 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT: return SVGA3D_R8G8B8A8_UINT;
527 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT: return SVGA3D_R8G8B8A8_SINT;
528 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS: return SVGA3D_R16G16_TYPELESS;
529 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT: return SVGA3D_R16G16_UINT;
530 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT: return SVGA3D_R16G16_SINT;
531 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS: return SVGA3D_R32_TYPELESS;
532 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT: return SVGA3D_D32_FLOAT;
533 case SVGA3D_DEVCAP_DXFMT_R32_UINT: return SVGA3D_R32_UINT;
534 case SVGA3D_DEVCAP_DXFMT_R32_SINT: return SVGA3D_R32_SINT;
535 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS: return SVGA3D_R24G8_TYPELESS;
536 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT: return SVGA3D_D24_UNORM_S8_UINT;
537 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8: return SVGA3D_R24_UNORM_X8;
538 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT: return SVGA3D_X24_G8_UINT;
539 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS: return SVGA3D_R8G8_TYPELESS;
540 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM: return SVGA3D_R8G8_UNORM;
541 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT: return SVGA3D_R8G8_UINT;
542 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT: return SVGA3D_R8G8_SINT;
543 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS: return SVGA3D_R16_TYPELESS;
544 case SVGA3D_DEVCAP_DXFMT_R16_UNORM: return SVGA3D_R16_UNORM;
545 case SVGA3D_DEVCAP_DXFMT_R16_UINT: return SVGA3D_R16_UINT;
546 case SVGA3D_DEVCAP_DXFMT_R16_SNORM: return SVGA3D_R16_SNORM;
547 case SVGA3D_DEVCAP_DXFMT_R16_SINT: return SVGA3D_R16_SINT;
548 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS: return SVGA3D_R8_TYPELESS;
549 case SVGA3D_DEVCAP_DXFMT_R8_UNORM: return SVGA3D_R8_UNORM;
550 case SVGA3D_DEVCAP_DXFMT_R8_UINT: return SVGA3D_R8_UINT;
551 case SVGA3D_DEVCAP_DXFMT_R8_SNORM: return SVGA3D_R8_SNORM;
552 case SVGA3D_DEVCAP_DXFMT_R8_SINT: return SVGA3D_R8_SINT;
553 case SVGA3D_DEVCAP_DXFMT_P8: return SVGA3D_P8;
554 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP: return SVGA3D_R9G9B9E5_SHAREDEXP;
555 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM: return SVGA3D_R8G8_B8G8_UNORM;
556 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM: return SVGA3D_G8R8_G8B8_UNORM;
557 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS: return SVGA3D_BC1_TYPELESS;
558 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB: return SVGA3D_BC1_UNORM_SRGB;
559 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS: return SVGA3D_BC2_TYPELESS;
560 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB: return SVGA3D_BC2_UNORM_SRGB;
561 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS: return SVGA3D_BC3_TYPELESS;
562 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB: return SVGA3D_BC3_UNORM_SRGB;
563 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS: return SVGA3D_BC4_TYPELESS;
564 case SVGA3D_DEVCAP_DXFMT_ATI1: return SVGA3D_ATI1;
565 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM: return SVGA3D_BC4_SNORM;
566 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS: return SVGA3D_BC5_TYPELESS;
567 case SVGA3D_DEVCAP_DXFMT_ATI2: return SVGA3D_ATI2;
568 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM: return SVGA3D_BC5_SNORM;
569 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM: return SVGA3D_R10G10B10_XR_BIAS_A2_UNORM;
570 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS: return SVGA3D_B8G8R8A8_TYPELESS;
571 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB: return SVGA3D_B8G8R8A8_UNORM_SRGB;
572 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS: return SVGA3D_B8G8R8X8_TYPELESS;
573 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB: return SVGA3D_B8G8R8X8_UNORM_SRGB;
574 case SVGA3D_DEVCAP_DXFMT_Z_DF16: return SVGA3D_Z_DF16;
575 case SVGA3D_DEVCAP_DXFMT_Z_DF24: return SVGA3D_Z_DF24;
576 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
577 case SVGA3D_DEVCAP_DXFMT_YV12: return SVGA3D_YV12;
578 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT: return SVGA3D_R32G32B32A32_FLOAT;
579 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT: return SVGA3D_R16G16B16A16_FLOAT;
580 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM: return SVGA3D_R16G16B16A16_UNORM;
581 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT: return SVGA3D_R32G32_FLOAT;
582 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM: return SVGA3D_R10G10B10A2_UNORM;
583 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM: return SVGA3D_R8G8B8A8_SNORM;
584 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT: return SVGA3D_R16G16_FLOAT;
585 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM: return SVGA3D_R16G16_UNORM;
586 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM: return SVGA3D_R16G16_SNORM;
587 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT: return SVGA3D_R32_FLOAT;
588 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM: return SVGA3D_R8G8_SNORM;
589 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT: return SVGA3D_R16_FLOAT;
590 case SVGA3D_DEVCAP_DXFMT_D16_UNORM: return SVGA3D_D16_UNORM;
591 case SVGA3D_DEVCAP_DXFMT_A8_UNORM: return SVGA3D_A8_UNORM;
592 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM: return SVGA3D_BC1_UNORM;
593 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM: return SVGA3D_BC2_UNORM;
594 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM: return SVGA3D_BC3_UNORM;
595 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM: return SVGA3D_B5G6R5_UNORM;
596 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM: return SVGA3D_B5G5R5A1_UNORM;
597 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM: return SVGA3D_B8G8R8A8_UNORM;
598 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM: return SVGA3D_B8G8R8X8_UNORM;
599 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM: return SVGA3D_BC4_UNORM;
600 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM: return SVGA3D_BC5_UNORM;
601 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS: return SVGA3D_BC6H_TYPELESS;
602 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16: return SVGA3D_BC6H_UF16;
603 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16: return SVGA3D_BC6H_SF16;
604 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS: return SVGA3D_BC7_TYPELESS;
605 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM: return SVGA3D_BC7_UNORM;
606 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB: return SVGA3D_BC7_UNORM_SRGB;
607 default:
608 AssertFailed();
609 break;
610 }
611 return SVGA3D_FORMAT_INVALID;
612}
613
614
615static int vmsvgaDXCheckFormatSupportPreDX(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
616{
617 int rc = VINF_SUCCESS;
618
619 *pu32DevCap = 0;
620
621 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
622 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
623 {
624 RT_NOREF(pState);
625 /** @todo Implement */
626 }
627 else
628 rc = VERR_NOT_SUPPORTED;
629 return rc;
630}
631
632static int vmsvgaDXCheckFormatSupport(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
633{
634 int rc = VINF_SUCCESS;
635
636 *pu32DevCap = 0;
637
638 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
639 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
640 {
641 ID3D11Device *pDevice = pState->pBackend->device.pDevice;
642 UINT FormatSupport = 0;
643 HRESULT hr = pDevice->CheckFormatSupport(dxgiFormat, &FormatSupport);
644 if (SUCCEEDED(hr))
645 {
646 *pu32DevCap |= SVGA3D_DXFMT_SUPPORTED;
647
648 if (FormatSupport & D3D11_FORMAT_SUPPORT_SHADER_SAMPLE)
649 *pu32DevCap |= SVGA3D_DXFMT_SHADER_SAMPLE;
650
651 if (FormatSupport & D3D11_FORMAT_SUPPORT_RENDER_TARGET)
652 *pu32DevCap |= SVGA3D_DXFMT_COLOR_RENDERTARGET;
653
654 if (FormatSupport & D3D11_FORMAT_SUPPORT_DEPTH_STENCIL)
655 *pu32DevCap |= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
656
657 if (FormatSupport & D3D11_FORMAT_SUPPORT_BLENDABLE)
658 *pu32DevCap |= SVGA3D_DXFMT_BLENDABLE;
659
660 if (FormatSupport & D3D11_FORMAT_SUPPORT_MIP)
661 *pu32DevCap |= SVGA3D_DXFMT_MIPS;
662
663 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURECUBE)
664 *pu32DevCap |= SVGA3D_DXFMT_ARRAY;
665
666 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURE3D)
667 *pu32DevCap |= SVGA3D_DXFMT_VOLUME;
668
669 if (FormatSupport & D3D11_FORMAT_SUPPORT_IA_VERTEX_BUFFER)
670 *pu32DevCap |= SVGA3D_DXFMT_DX_VERTEX_BUFFER;
671
672 UINT NumQualityLevels;
673 hr = pDevice->CheckMultisampleQualityLevels(dxgiFormat, 2, &NumQualityLevels);
674 if (SUCCEEDED(hr) && NumQualityLevels != 0)
675 *pu32DevCap |= SVGA3D_DXFMT_MULTISAMPLE;
676 }
677 else
678 AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
679 }
680 else
681 rc = VERR_NOT_SUPPORTED;
682 return rc;
683}
684
685
686static int dxDeviceCreate(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
687{
688 int rc = VINF_SUCCESS;
689
690 IDXGIAdapter *pAdapter = NULL; /* Default adapter. */
691 static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
692 {
693 /// @todo Requires a Windows 8+ _SDKS: D3D_FEATURE_LEVEL_11_1,
694 D3D_FEATURE_LEVEL_11_0
695 };
696 UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
697#ifdef DEBUG
698 Flags |= D3D11_CREATE_DEVICE_DEBUG;
699#endif
700
701 HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
702 D3D_DRIVER_TYPE_HARDWARE,
703 NULL,
704 Flags,
705 s_aFeatureLevels,
706 RT_ELEMENTS(s_aFeatureLevels),
707 D3D11_SDK_VERSION,
708 &pDevice->pDevice,
709 &pDevice->FeatureLevel,
710 &pDevice->pImmediateContext);
711 if (SUCCEEDED(hr))
712 {
713 LogRel(("VMSVGA: Feature level %#x\n", pDevice->FeatureLevel));
714
715#ifdef DEBUG
716 /* Break into debugger when DX runtime detects anything unusual. */
717 HRESULT hr2;
718 ID3D11Debug *pDebug = 0;
719 hr2 = pDevice->pDevice->QueryInterface(__uuidof(ID3D11Debug), (void**)&pDebug);
720 if (SUCCEEDED(hr2))
721 {
722 ID3D11InfoQueue *pInfoQueue = 0;
723 hr2 = pDebug->QueryInterface(__uuidof(ID3D11InfoQueue), (void**)&pInfoQueue);
724 if (SUCCEEDED(hr2))
725 {
726 pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_CORRUPTION, true);
727 pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_ERROR, true);
728 pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_WARNING, true);
729
730 D3D11_MESSAGE_ID saIgnoredMessageIds[] =
731 {
732 /* Message ID: Caused by: */
733 D3D11_MESSAGE_ID_CREATEINPUTLAYOUT_TYPE_MISMATCH, /* Autogenerated input signatures. */
734 };
735
736 D3D11_INFO_QUEUE_FILTER filter;
737 RT_ZERO(filter);
738 filter.DenyList.NumIDs = RT_ELEMENTS(saIgnoredMessageIds);
739 filter.DenyList.pIDList = saIgnoredMessageIds;
740 pInfoQueue->AddStorageFilterEntries(&filter);
741
742 D3D_RELEASE(pInfoQueue);
743 }
744 D3D_RELEASE(pDebug);
745 }
746#endif
747
748 IDXGIDevice *pDxgiDevice = 0;
749 hr = pDevice->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
750 if (SUCCEEDED(hr))
751 {
752 IDXGIAdapter *pDxgiAdapter = 0;
753 hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
754 if (SUCCEEDED(hr))
755 {
756 hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pDevice->pDxgiFactory);
757 D3D_RELEASE(pDxgiAdapter);
758 }
759
760 D3D_RELEASE(pDxgiDevice);
761 }
762 }
763
764 if (FAILED(hr))
765 rc = VERR_NOT_SUPPORTED;
766
767 return rc;
768}
769
770
771static void dxDeviceDestroy(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
772{
773 RT_NOREF(pBackend);
774 D3D_RELEASE(pDevice->pDevice);
775 D3D_RELEASE(pDevice->pImmediateContext);
776 D3D_RELEASE(pDevice->pDxgiFactory);
777 RT_ZERO(*pDevice);
778}
779
780
781DECLINLINE(bool) dxIsSurfaceShareable(PVMSVGA3DSURFACE pSurface)
782{
783 /* It is not expected that volume textures will be shared between contexts. */
784 if (pSurface->surfaceFlags & SVGA3D_SURFACE_VOLUME)
785 return false;
786
787 return pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET
788 || pSurface->surfaceFlags & SVGA3D_SURFACE_BIND_RENDER_TARGET;
789}
790
791
792DXDEVICE *dxDeviceFromCid(uint32_t cid, PVMSVGA3DSTATE pState)
793{
794 if (cid != DX_CID_BACKEND)
795 {
796 VMSVGA3DDXCONTEXT *pDXContext;
797 int rc = vmsvga3dDXContextFromCid(pState, cid, &pDXContext);
798 if (RT_SUCCESS(rc))
799 return &pDXContext->pBackendDXContext->device;
800 }
801 else
802 return &pState->pBackend->device;
803
804 AssertFailed();
805 return NULL;
806}
807
808
809static int dxDeviceFlush(DXDEVICE *pDevice)
810{
811 /** @todo Should the flush follow the query submission? */
812 pDevice->pImmediateContext->Flush();
813
814 ID3D11Query *pQuery = 0;
815 D3D11_QUERY_DESC qd;
816 RT_ZERO(qd);
817 qd.Query = D3D11_QUERY_EVENT;
818
819 HRESULT hr = pDevice->pDevice->CreateQuery(&qd, &pQuery);
820 Assert(hr == S_OK); RT_NOREF(hr);
821 pDevice->pImmediateContext->End(pQuery);
822
823 BOOL queryData;
824 while (pDevice->pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
825 RTThreadYield();
826
827 D3D_RELEASE(pQuery);
828
829 return VINF_SUCCESS;
830}
831
832
833static int dxContextWait(uint32_t cidDrawing, PVMSVGA3DSTATE pState)
834{
835 /* Flush cidDrawing context and issue a query. */
836 DXDEVICE *pDXDevice = dxDeviceFromCid(cidDrawing, pState);
837 return dxDeviceFlush(pDXDevice);
838}
839
840
841static ID3D11Resource *dxResource(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface, VMSVGA3DDXCONTEXT *pDXContext)
842{
843 VMSVGA3DBACKENDSURFACE *pBackendSurface = pSurface->pBackendSurface;
844 if (!pBackendSurface)
845 AssertFailedReturn(NULL);
846
847 uint32_t const cidRequesting = pDXContext ? pDXContext->cid : DX_CID_BACKEND;
848 if (cidRequesting == pSurface->idAssociatedContext)
849 return pBackendSurface->u.pResource;
850
851 AssertReturn(pDXContext, NULL);
852
853 /*
854 * Another context is requesting.
855 */
856 Assert(dxIsSurfaceShareable(pSurface));
857 Assert(pSurface->idAssociatedContext == DX_CID_BACKEND);
858
859 DXSHAREDTEXTURE *pSharedTexture = (DXSHAREDTEXTURE *)RTAvlU32Get(&pBackendSurface->SharedTextureTree, pDXContext->cid);
860 if (!pSharedTexture)
861 {
862 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
863 AssertReturn(pDevice->pDevice, NULL);
864
865 AssertReturn(pBackendSurface->SharedHandle, NULL);
866
867 /* This context has not yet opened the texture. */
868 pSharedTexture = (DXSHAREDTEXTURE *)RTMemAllocZ(sizeof(DXSHAREDTEXTURE));
869 AssertReturn(pSharedTexture, NULL);
870
871 pSharedTexture->Core.Key = pDXContext->cid;
872 bool const fSuccess = RTAvlU32Insert(&pBackendSurface->SharedTextureTree, &pSharedTexture->Core);
873 AssertReturn(fSuccess, NULL);
874
875 HRESULT hr = pDevice->pDevice->OpenSharedResource(pBackendSurface->SharedHandle, __uuidof(ID3D11Texture2D), (void**)&pSharedTexture->pTexture);
876 Assert(SUCCEEDED(hr));
877 if (SUCCEEDED(hr))
878 pSharedTexture->sid = pSurface->id;
879 else
880 {
881 RTAvlU32Remove(&pBackendSurface->SharedTextureTree, pDXContext->cid);
882 RTMemFree(pSharedTexture);
883 return NULL;
884 }
885 }
886
887 /* Wait for drawing to finish. */
888 if (pBackendSurface->cidDrawing != SVGA_ID_INVALID)
889 {
890 if (pBackendSurface->cidDrawing != pDXContext->cid)
891 {
892 dxContextWait(pBackendSurface->cidDrawing, pState);
893 pBackendSurface->cidDrawing = SVGA_ID_INVALID;
894 }
895 }
896
897 return pSharedTexture->pTexture;
898}
899
900
901static int dxTrackRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
902{
903 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
904 AssertReturn(pState, VERR_INVALID_STATE);
905
906 for (int i = 0; i < RT_ELEMENTS(pDXContext->svgaDXContext.renderState.renderTargetViewIds); ++i)
907 {
908 uint32_t const renderTargetViewId = pDXContext->svgaDXContext.renderState.renderTargetViewIds[i];
909 if (renderTargetViewId == SVGA_ID_INVALID)
910 continue;
911
912 AssertContinue(renderTargetViewId < pDXContext->cot.cRTView);
913
914 SVGACOTableDXRTViewEntry const *pRTViewEntry = &pDXContext->cot.paRTView[renderTargetViewId];
915
916 PVMSVGA3DSURFACE pSurface;
917 int rc = vmsvga3dSurfaceFromSid(pState, pRTViewEntry->sid, &pSurface);
918 if ( RT_SUCCESS(rc)
919 && pSurface->pBackendSurface)
920 {
921 pSurface->pBackendSurface->cidDrawing = pDXContext->cid;
922 }
923 }
924 return VINF_SUCCESS;
925}
926
927static D3D11_BLEND dxBlendFactorAlpha(uint8_t svgaBlend)
928{
929 /* "Blend options that end in _COLOR are not allowed." but the guest sometimes sends them. */
930 switch (svgaBlend)
931 {
932 case SVGA3D_BLENDOP_SRCCOLOR: return D3D11_BLEND_SRC_ALPHA;
933 case SVGA3D_BLENDOP_INVSRCCOLOR: return D3D11_BLEND_INV_SRC_ALPHA;
934 case SVGA3D_BLENDOP_DESTCOLOR: return D3D11_BLEND_DEST_ALPHA;
935 case SVGA3D_BLENDOP_INVDESTCOLOR: return D3D11_BLEND_INV_DEST_ALPHA;
936 case SVGA3D_BLENDOP_SRC1COLOR: return D3D11_BLEND_SRC1_ALPHA;
937 case SVGA3D_BLENDOP_INVSRC1COLOR: return D3D11_BLEND_INV_SRC1_ALPHA;
938 default:
939 break;
940 }
941 return (D3D11_BLEND)svgaBlend;
942}
943
944static D3D11_BLEND dxBlendFactorColor(uint8_t svgaBlend)
945{
946 return (D3D11_BLEND)svgaBlend;
947}
948
949static D3D11_BLEND_OP dxBlendOp(uint8_t svgaBlendEq)
950{
951 return (D3D11_BLEND_OP)svgaBlendEq;
952}
953
954/** @todo AssertCompile for types like D3D11_COMPARISON_FUNC and SVGA3dComparisonFunc */
955static HRESULT dxBlendStateCreate(DXDEVICE *pDevice, SVGACOTableDXBlendStateEntry const *pEntry, ID3D11BlendState **pp)
956{
957 D3D11_BLEND_DESC BlendDesc;
958 BlendDesc.AlphaToCoverageEnable = RT_BOOL(pEntry->alphaToCoverageEnable);
959 BlendDesc.IndependentBlendEnable = RT_BOOL(pEntry->independentBlendEnable);
960 for (int i = 0; i < SVGA3D_MAX_RENDER_TARGETS; ++i)
961 {
962 BlendDesc.RenderTarget[i].BlendEnable = RT_BOOL(pEntry->perRT[i].blendEnable);
963 BlendDesc.RenderTarget[i].SrcBlend = dxBlendFactorColor(pEntry->perRT[i].srcBlend);
964 BlendDesc.RenderTarget[i].DestBlend = dxBlendFactorColor(pEntry->perRT[i].destBlend);
965 BlendDesc.RenderTarget[i].BlendOp = dxBlendOp (pEntry->perRT[i].blendOp);
966 BlendDesc.RenderTarget[i].SrcBlendAlpha = dxBlendFactorAlpha(pEntry->perRT[i].srcBlendAlpha);
967 BlendDesc.RenderTarget[i].DestBlendAlpha = dxBlendFactorAlpha(pEntry->perRT[i].destBlendAlpha);
968 BlendDesc.RenderTarget[i].BlendOpAlpha = dxBlendOp (pEntry->perRT[i].blendOpAlpha);
969 BlendDesc.RenderTarget[i].RenderTargetWriteMask = pEntry->perRT[i].renderTargetWriteMask;
970 /** @todo logicOpEnable and logicOp */
971 }
972
973 HRESULT hr = pDevice->pDevice->CreateBlendState(&BlendDesc, pp);
974 Assert(SUCCEEDED(hr));
975 return hr;
976}
977
978
979static HRESULT dxDepthStencilStateCreate(DXDEVICE *pDevice, SVGACOTableDXDepthStencilEntry const *pEntry, ID3D11DepthStencilState **pp)
980{
981 D3D11_DEPTH_STENCIL_DESC desc;
982 desc.DepthEnable = pEntry->depthEnable;
983 desc.DepthWriteMask = (D3D11_DEPTH_WRITE_MASK)pEntry->depthWriteMask;
984 desc.DepthFunc = (D3D11_COMPARISON_FUNC)pEntry->depthFunc;
985 desc.StencilEnable = pEntry->stencilEnable;
986 desc.StencilReadMask = pEntry->stencilReadMask;
987 desc.StencilWriteMask = pEntry->stencilWriteMask;
988 desc.FrontFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilFailOp;
989 desc.FrontFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilDepthFailOp;
990 desc.FrontFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->frontStencilPassOp;
991 desc.FrontFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->frontStencilFunc;
992 desc.BackFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->backStencilFailOp;
993 desc.BackFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->backStencilDepthFailOp;
994 desc.BackFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->backStencilPassOp;
995 desc.BackFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->backStencilFunc;
996 /** @todo frontEnable, backEnable */
997
998 HRESULT hr = pDevice->pDevice->CreateDepthStencilState(&desc, pp);
999 Assert(SUCCEEDED(hr));
1000 return hr;
1001}
1002
1003
1004static HRESULT dxSamplerStateCreate(DXDEVICE *pDevice, SVGACOTableDXSamplerEntry const *pEntry, ID3D11SamplerState **pp)
1005{
1006 D3D11_SAMPLER_DESC desc;
1007 /* Guest sometimes sends inconsistent (from D3D11 point of view) set of filter flags. */
1008 if (pEntry->filter & SVGA3D_FILTER_ANISOTROPIC)
1009 desc.Filter = (pEntry->filter & SVGA3D_FILTER_COMPARE)
1010 ? D3D11_FILTER_COMPARISON_ANISOTROPIC
1011 : D3D11_FILTER_ANISOTROPIC;
1012 else
1013 desc.Filter = (D3D11_FILTER)pEntry->filter;
1014 desc.AddressU = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressU;
1015 desc.AddressV = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressV;
1016 desc.AddressW = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressW;
1017 desc.MipLODBias = pEntry->mipLODBias;
1018 desc.MaxAnisotropy = RT_CLAMP(pEntry->maxAnisotropy, 1, 16); /* "Valid values are between 1 and 16" */
1019 desc.ComparisonFunc = (D3D11_COMPARISON_FUNC)pEntry->comparisonFunc;
1020 desc.BorderColor[0] = pEntry->borderColor.value[0];
1021 desc.BorderColor[1] = pEntry->borderColor.value[1];
1022 desc.BorderColor[2] = pEntry->borderColor.value[2];
1023 desc.BorderColor[3] = pEntry->borderColor.value[3];
1024 desc.MinLOD = pEntry->minLOD;
1025 desc.MaxLOD = pEntry->maxLOD;
1026
1027 HRESULT hr = pDevice->pDevice->CreateSamplerState(&desc, pp);
1028 Assert(SUCCEEDED(hr));
1029 return hr;
1030}
1031
1032
1033static HRESULT dxRasterizerStateCreate(DXDEVICE *pDevice, SVGACOTableDXRasterizerStateEntry const *pEntry, ID3D11RasterizerState **pp)
1034{
1035 D3D11_RASTERIZER_DESC desc;
1036 desc.FillMode = (D3D11_FILL_MODE)pEntry->fillMode;
1037 desc.CullMode = (D3D11_CULL_MODE)pEntry->cullMode;
1038 desc.FrontCounterClockwise = pEntry->frontCounterClockwise;
1039 /** @todo provokingVertexLast */
1040 desc.DepthBias = pEntry->depthBias;
1041 desc.DepthBiasClamp = pEntry->depthBiasClamp;
1042 desc.SlopeScaledDepthBias = pEntry->slopeScaledDepthBias;
1043 desc.DepthClipEnable = pEntry->depthClipEnable;
1044 desc.ScissorEnable = pEntry->scissorEnable;
1045 desc.MultisampleEnable = pEntry->multisampleEnable;
1046 desc.AntialiasedLineEnable = pEntry->antialiasedLineEnable;
1047 /** @todo lineWidth lineStippleEnable lineStippleFactor lineStipplePattern forcedSampleCount */
1048
1049 HRESULT hr = pDevice->pDevice->CreateRasterizerState(&desc, pp);
1050 Assert(SUCCEEDED(hr));
1051 return hr;
1052}
1053
1054
1055static HRESULT dxRenderTargetViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXRTViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11RenderTargetView **pp)
1056{
1057 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1058
1059 ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1060
1061 D3D11_RENDER_TARGET_VIEW_DESC desc;
1062 RT_ZERO(desc);
1063 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1064 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
1065 switch (pEntry->resourceDimension)
1066 {
1067 case SVGA3D_RESOURCE_BUFFER:
1068 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
1069 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1070 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1071 break;
1072 case SVGA3D_RESOURCE_TEXTURE1D:
1073 if (pEntry->desc.tex.arraySize <= 1)
1074 {
1075 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1D;
1076 desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
1077 }
1078 else
1079 {
1080 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1DARRAY;
1081 desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
1082 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1083 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1084 }
1085 break;
1086 case SVGA3D_RESOURCE_TEXTURE2D:
1087 if (pEntry->desc.tex.arraySize <= 1)
1088 {
1089 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2D;
1090 desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
1091 }
1092 else
1093 {
1094 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
1095 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1096 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1097 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1098 }
1099 break;
1100 case SVGA3D_RESOURCE_TEXTURE3D:
1101 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE3D;
1102 desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
1103 desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
1104 desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
1105 break;
1106 case SVGA3D_RESOURCE_TEXTURECUBE:
1107 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
1108 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
1109 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1110 desc.Texture2DArray.FirstArraySlice = 0;
1111 desc.Texture2DArray.ArraySize = 6;
1112 break;
1113 case SVGA3D_RESOURCE_BUFFEREX:
1114 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
1115 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
1116 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1117 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1118 break;
1119 default:
1120 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1121 }
1122
1123 HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pResource, &desc, pp);
1124 Assert(SUCCEEDED(hr));
1125 return hr;
1126}
1127
1128
1129static HRESULT dxShaderResourceViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXSRViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11ShaderResourceView **pp)
1130{
1131 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1132
1133 ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1134
1135 D3D11_SHADER_RESOURCE_VIEW_DESC desc;
1136 RT_ZERO(desc);
1137 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1138 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
1139
1140 switch (pEntry->resourceDimension)
1141 {
1142 case SVGA3D_RESOURCE_BUFFER:
1143 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFER;
1144 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1145 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1146 break;
1147 case SVGA3D_RESOURCE_TEXTURE1D:
1148 if (pEntry->desc.tex.arraySize <= 1)
1149 {
1150 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1D;
1151 desc.Texture1D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1152 desc.Texture1D.MipLevels = pEntry->desc.tex.mipLevels;
1153 }
1154 else
1155 {
1156 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1DARRAY;
1157 desc.Texture1DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1158 desc.Texture1DArray.MipLevels = pEntry->desc.tex.mipLevels;
1159 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1160 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1161 }
1162 break;
1163 case SVGA3D_RESOURCE_TEXTURE2D:
1164 if (pEntry->desc.tex.arraySize <= 1)
1165 {
1166 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2D;
1167 desc.Texture2D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1168 desc.Texture2D.MipLevels = pEntry->desc.tex.mipLevels;
1169 }
1170 else
1171 {
1172 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2DARRAY;
1173 desc.Texture2DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1174 desc.Texture2DArray.MipLevels = pEntry->desc.tex.mipLevels;
1175 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1176 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1177 }
1178 break;
1179 case SVGA3D_RESOURCE_TEXTURE3D:
1180 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE3D;
1181 desc.Texture3D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1182 desc.Texture3D.MipLevels = pEntry->desc.tex.mipLevels;
1183 break;
1184 case SVGA3D_RESOURCE_TEXTURECUBE:
1185 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBE;
1186 desc.TextureCube.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1187 desc.TextureCube.MipLevels = pEntry->desc.tex.mipLevels;
1188 break;
1189 case SVGA3D_RESOURCE_BUFFEREX:
1190 AssertFailed(); /** @todo test. */
1191 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFEREX;
1192 desc.BufferEx.FirstElement = pEntry->desc.bufferex.firstElement;
1193 desc.BufferEx.NumElements = pEntry->desc.bufferex.numElements;
1194 desc.BufferEx.Flags = pEntry->desc.bufferex.flags;
1195 break;
1196 default:
1197 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1198 }
1199
1200 HRESULT hr = pDevice->pDevice->CreateShaderResourceView(pResource, &desc, pp);
1201 Assert(SUCCEEDED(hr));
1202 return hr;
1203}
1204
1205
1206static HRESULT dxDepthStencilViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXDSViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11DepthStencilView **pp)
1207{
1208 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1209
1210 ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1211
1212 D3D11_DEPTH_STENCIL_VIEW_DESC desc;
1213 RT_ZERO(desc);
1214 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1215 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
1216 desc.Flags = pEntry->flags;
1217 switch (pEntry->resourceDimension)
1218 {
1219 case SVGA3D_RESOURCE_TEXTURE1D:
1220 if (pEntry->arraySize <= 1)
1221 {
1222 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1D;
1223 desc.Texture1D.MipSlice = pEntry->mipSlice;
1224 }
1225 else
1226 {
1227 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1DARRAY;
1228 desc.Texture1DArray.MipSlice = pEntry->mipSlice;
1229 desc.Texture1DArray.FirstArraySlice = pEntry->firstArraySlice;
1230 desc.Texture1DArray.ArraySize = pEntry->arraySize;
1231 }
1232 break;
1233 case SVGA3D_RESOURCE_TEXTURE2D:
1234 if (pEntry->arraySize <= 1)
1235 {
1236 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2D;
1237 desc.Texture2D.MipSlice = pEntry->mipSlice;
1238 }
1239 else
1240 {
1241 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2DARRAY;
1242 desc.Texture2DArray.MipSlice = pEntry->mipSlice;
1243 desc.Texture2DArray.FirstArraySlice = pEntry->firstArraySlice;
1244 desc.Texture2DArray.ArraySize = pEntry->arraySize;
1245 }
1246 break;
1247 default:
1248 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1249 }
1250
1251 HRESULT hr = pDevice->pDevice->CreateDepthStencilView(pResource, &desc, pp);
1252 Assert(SUCCEEDED(hr));
1253 return hr;
1254}
1255
1256
1257static HRESULT dxShaderCreate(DXDEVICE *pDevice, PVMSVGA3DSHADER pShader, DXSHADER *pDXShader)
1258{
1259 HRESULT hr = S_OK;
1260
1261 switch (pShader->type)
1262 {
1263 case SVGA3D_SHADERTYPE_VS:
1264 hr = pDevice->pDevice->CreateVertexShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pVertexShader);
1265 Assert(SUCCEEDED(hr));
1266 break;
1267 case SVGA3D_SHADERTYPE_PS:
1268 hr = pDevice->pDevice->CreatePixelShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pPixelShader);
1269 Assert(SUCCEEDED(hr));
1270 break;
1271 case SVGA3D_SHADERTYPE_GS:
1272 case SVGA3D_SHADERTYPE_HS:
1273 case SVGA3D_SHADERTYPE_DS:
1274 case SVGA3D_SHADERTYPE_CS:
1275 default:
1276 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1277 }
1278
1279 return hr;
1280}
1281
1282
1283static void dxShaderSet(DXDEVICE *pDevice, SVGA3dShaderType type, DXSHADER *pDXShader)
1284{
1285 switch (type)
1286 {
1287 case SVGA3D_SHADERTYPE_VS:
1288 pDevice->pImmediateContext->VSSetShader(pDXShader ? pDXShader->pVertexShader : NULL, NULL, 0);
1289 break;
1290 case SVGA3D_SHADERTYPE_PS:
1291 pDevice->pImmediateContext->PSSetShader(pDXShader ? pDXShader->pPixelShader : NULL, NULL, 0);
1292 break;
1293 case SVGA3D_SHADERTYPE_GS:
1294 case SVGA3D_SHADERTYPE_HS:
1295 case SVGA3D_SHADERTYPE_DS:
1296 case SVGA3D_SHADERTYPE_CS:
1297 default:
1298 ASSERT_GUEST_FAILED_RETURN_VOID();
1299 }
1300}
1301
1302
1303static void dxConstantBufferSet(DXDEVICE *pDevice, uint32_t slot, SVGA3dShaderType type, ID3D11Buffer *pConstantBuffer)
1304{
1305 switch (type)
1306 {
1307 case SVGA3D_SHADERTYPE_VS:
1308 pDevice->pImmediateContext->VSSetConstantBuffers(slot, 1, &pConstantBuffer);
1309 break;
1310 case SVGA3D_SHADERTYPE_PS:
1311 pDevice->pImmediateContext->PSSetConstantBuffers(slot, 1, &pConstantBuffer);
1312 break;
1313 case SVGA3D_SHADERTYPE_GS:
1314 case SVGA3D_SHADERTYPE_HS:
1315 case SVGA3D_SHADERTYPE_DS:
1316 case SVGA3D_SHADERTYPE_CS:
1317 default:
1318 ASSERT_GUEST_FAILED_RETURN_VOID();
1319 }
1320}
1321
1322
1323static void dxSamplerSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startSampler, uint32_t cSampler, ID3D11SamplerState * const *papSampler)
1324{
1325 switch (type)
1326 {
1327 case SVGA3D_SHADERTYPE_VS:
1328 pDevice->pImmediateContext->VSSetSamplers(startSampler, cSampler, papSampler);
1329 break;
1330 case SVGA3D_SHADERTYPE_PS:
1331 pDevice->pImmediateContext->PSSetSamplers(startSampler, cSampler, papSampler);
1332 break;
1333 case SVGA3D_SHADERTYPE_GS:
1334 case SVGA3D_SHADERTYPE_HS:
1335 case SVGA3D_SHADERTYPE_DS:
1336 case SVGA3D_SHADERTYPE_CS:
1337 default:
1338 ASSERT_GUEST_FAILED_RETURN_VOID();
1339 }
1340}
1341
1342
1343static void dxShaderResourceViewSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startView, uint32_t cShaderResourceView, ID3D11ShaderResourceView * const *papShaderResourceView)
1344{
1345 switch (type)
1346 {
1347 case SVGA3D_SHADERTYPE_VS:
1348 pDevice->pImmediateContext->VSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
1349 break;
1350 case SVGA3D_SHADERTYPE_PS:
1351 pDevice->pImmediateContext->PSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
1352 break;
1353 case SVGA3D_SHADERTYPE_GS:
1354 case SVGA3D_SHADERTYPE_HS:
1355 case SVGA3D_SHADERTYPE_DS:
1356 case SVGA3D_SHADERTYPE_CS:
1357 default:
1358 ASSERT_GUEST_FAILED_RETURN_VOID();
1359 }
1360}
1361
1362
1363static int dxBackendSurfaceAlloc(PVMSVGA3DBACKENDSURFACE *ppBackendSurface)
1364{
1365 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1366 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1367 pBackendSurface->cidDrawing = SVGA_ID_INVALID;
1368 *ppBackendSurface = pBackendSurface;
1369 return VINF_SUCCESS;
1370}
1371
1372
1373static int vmsvga3dBackSurfaceCreateScreenTarget(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
1374{
1375 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1376 AssertReturn(p3dState, VERR_INVALID_STATE);
1377
1378 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
1379 AssertReturn(pBackend, VERR_INVALID_STATE);
1380
1381 DXDEVICE *pDXDevice = &pBackend->device;
1382 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
1383
1384 /* Surface must have SCREEN_TARGET flag. */
1385 ASSERT_GUEST_RETURN(RT_BOOL(pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET), VERR_INVALID_PARAMETER);
1386
1387 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1388 {
1389 AssertFailed(); /* Should the function not be used like that? */
1390 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
1391 }
1392
1393 PVMSVGA3DBACKENDSURFACE pBackendSurface;
1394 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
1395 AssertRCReturn(rc, rc);
1396
1397 D3D11_TEXTURE2D_DESC td;
1398 RT_ZERO(td);
1399 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1400 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1401 Assert(pSurface->cLevels == 1);
1402 td.MipLevels = 1;
1403 td.ArraySize = 1;
1404 td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
1405 td.SampleDesc.Count = 1;
1406 td.SampleDesc.Quality = 0;
1407 td.Usage = D3D11_USAGE_DEFAULT;
1408 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1409 td.CPUAccessFlags = 0;
1410 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED;
1411
1412 HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.pTexture2D);
1413 Assert(SUCCEEDED(hr));
1414 if (SUCCEEDED(hr))
1415 {
1416 /* Map-able texture. */
1417 td.Usage = D3D11_USAGE_DYNAMIC;
1418 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1419 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1420 td.MiscFlags = 0;
1421 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->pDynamicTexture);
1422 Assert(SUCCEEDED(hr));
1423 }
1424
1425 if (SUCCEEDED(hr))
1426 {
1427 /* Staging texture. */
1428 td.Usage = D3D11_USAGE_STAGING;
1429 td.BindFlags = 0; /* No flags allowed. */
1430 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1431 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->pStagingTexture);
1432 Assert(SUCCEEDED(hr));
1433 }
1434
1435 if (SUCCEEDED(hr))
1436 {
1437 /* Get the shared handle. */
1438 IDXGIResource *pDxgiResource = NULL;
1439 hr = pBackendSurface->u.pTexture2D->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
1440 Assert(SUCCEEDED(hr));
1441 if (SUCCEEDED(hr))
1442 {
1443 hr = pDxgiResource->GetSharedHandle(&pBackendSurface->SharedHandle);
1444 Assert(SUCCEEDED(hr));
1445 D3D_RELEASE(pDxgiResource);
1446 }
1447 }
1448
1449 if (SUCCEEDED(hr))
1450 {
1451 /*
1452 * Success.
1453 */
1454 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
1455 pBackendSurface->enmDxgiFormat = td.Format;
1456 pSurface->pBackendSurface = pBackendSurface;
1457 pSurface->idAssociatedContext = DX_CID_BACKEND;
1458 pSurface->fDirty = true;
1459 return VINF_SUCCESS;
1460 }
1461
1462 /* Failure. */
1463 D3D_RELEASE(pBackendSurface->pStagingTexture);
1464 D3D_RELEASE(pBackendSurface->pDynamicTexture);
1465 D3D_RELEASE(pBackendSurface->u.pTexture2D);
1466 RTMemFree(pBackendSurface);
1467 return VERR_NO_MEMORY;
1468}
1469
1470
1471static UINT dxBindFlags(SVGA3dSurfaceAllFlags surfaceFlags)
1472{
1473 /* Catch unimplemented flags. */
1474 Assert(!RT_BOOL(surfaceFlags & (SVGA3D_SURFACE_BIND_LOGICOPS | SVGA3D_SURFACE_BIND_RAW_VIEWS)));
1475
1476 UINT BindFlags = 0;
1477
1478 if (surfaceFlags & SVGA3D_SURFACE_BIND_VERTEX_BUFFER) BindFlags |= D3D11_BIND_VERTEX_BUFFER;
1479 if (surfaceFlags & SVGA3D_SURFACE_BIND_INDEX_BUFFER) BindFlags |= D3D11_BIND_INDEX_BUFFER;
1480 if (surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) BindFlags |= D3D11_BIND_CONSTANT_BUFFER;
1481 if (surfaceFlags & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) BindFlags |= D3D11_BIND_SHADER_RESOURCE;
1482 if (surfaceFlags & SVGA3D_SURFACE_BIND_RENDER_TARGET) BindFlags |= D3D11_BIND_RENDER_TARGET;
1483 if (surfaceFlags & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) BindFlags |= D3D11_BIND_DEPTH_STENCIL;
1484 if (surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) BindFlags |= D3D11_BIND_STREAM_OUTPUT;
1485 if (surfaceFlags & SVGA3D_SURFACE_BIND_UAVIEW) BindFlags |= D3D11_BIND_UNORDERED_ACCESS;
1486
1487 return BindFlags;
1488}
1489
1490
1491static int vmsvga3dBackSurfaceCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1492{
1493 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1494 AssertReturn(p3dState, VERR_INVALID_STATE);
1495
1496 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
1497 AssertReturn(pBackend, VERR_INVALID_STATE);
1498
1499 UINT MiscFlags;
1500 DXDEVICE *pDXDevice;
1501 if (dxIsSurfaceShareable(pSurface))
1502 {
1503 pDXDevice = &pBackend->device;
1504 MiscFlags = D3D11_RESOURCE_MISC_SHARED;
1505 }
1506 else
1507 {
1508 pDXDevice = &pDXContext->pBackendDXContext->device;
1509 MiscFlags = 0;
1510 }
1511 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
1512
1513 if (pSurface->pBackendSurface != NULL)
1514 {
1515 AssertFailed(); /** @todo Should the function not be used like that? */
1516 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
1517 }
1518
1519 PVMSVGA3DBACKENDSURFACE pBackendSurface;
1520 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
1521 AssertRCReturn(rc, rc);
1522
1523 uint32_t const cWidth = pSurface->paMipmapLevels[0].mipmapSize.width;
1524 uint32_t const cHeight = pSurface->paMipmapLevels[0].mipmapSize.height;
1525 uint32_t const cDepth = pSurface->paMipmapLevels[0].mipmapSize.depth;
1526 uint32_t const numMipLevels = pSurface->cLevels;
1527
1528 DXGI_FORMAT dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
1529 AssertReturn(dxgiFormat != DXGI_FORMAT_UNKNOWN, E_FAIL);
1530
1531 /*
1532 * Create D3D11 texture object.
1533 */
1534 HRESULT hr = S_OK;
1535 if (pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET)
1536 {
1537 /*
1538 * Create the texture in backend device and open for the specified context.
1539 */
1540 D3D11_TEXTURE2D_DESC td;
1541 RT_ZERO(td);
1542 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1543 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1544 Assert(pSurface->cLevels == 1);
1545 td.MipLevels = 1;
1546 td.ArraySize = 1;
1547 td.Format = dxgiFormat;
1548 td.SampleDesc.Count = 1;
1549 td.SampleDesc.Quality = 0;
1550 td.Usage = D3D11_USAGE_DEFAULT;
1551 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1552 td.CPUAccessFlags = 0;
1553 td.MiscFlags = MiscFlags;
1554
1555 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.pTexture2D);
1556 Assert(SUCCEEDED(hr));
1557 if (SUCCEEDED(hr))
1558 {
1559 /* Map-able texture. */
1560 td.Usage = D3D11_USAGE_DYNAMIC;
1561 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1562 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1563 td.MiscFlags = 0;
1564 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->pDynamicTexture);
1565 Assert(SUCCEEDED(hr));
1566 }
1567
1568 if (SUCCEEDED(hr))
1569 {
1570 /* Staging texture. */
1571 td.Usage = D3D11_USAGE_STAGING;
1572 td.BindFlags = 0; /* No flags allowed. */
1573 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1574 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->pStagingTexture);
1575 Assert(SUCCEEDED(hr));
1576 }
1577
1578 if (SUCCEEDED(hr))
1579 {
1580 /* Get the shared handle. */
1581 IDXGIResource *pDxgiResource = NULL;
1582 hr = pBackendSurface->u.pTexture2D->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
1583 Assert(SUCCEEDED(hr));
1584 if (SUCCEEDED(hr))
1585 {
1586 hr = pDxgiResource->GetSharedHandle(&pBackendSurface->SharedHandle);
1587 Assert(SUCCEEDED(hr));
1588 D3D_RELEASE(pDxgiResource);
1589 }
1590 }
1591
1592 if (SUCCEEDED(hr))
1593 {
1594 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
1595 }
1596 }
1597 else if (pSurface->surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
1598 {
1599 Assert(pSurface->cFaces == 6);
1600 Assert(cWidth == cHeight);
1601 Assert(cDepth == 1);
1602//DEBUG_BREAKPOINT_TEST();
1603 D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
1604 D3D11_SUBRESOURCE_DATA aInitialData[6 * SVGA3D_MAX_MIP_LEVELS];
1605 if (pSurface->paMipmapLevels[0].pSurfaceData)
1606 {
1607 /** @todo Can happen for a non GBO surface or if GBO texture was updated prior to creation if the hardware resource. Test this. */
1608 /** @todo for (i = 0; i < pSurface->cFaces * numMipLevels; ++i) */
1609 for (uint32_t iFace = 0; iFace < 6; ++iFace)
1610 {
1611 for (uint32_t i = 0; i < numMipLevels; ++i)
1612 {
1613 uint32_t const iSubresource = vmsvga3dCalcSubresource(i, iFace, numMipLevels);
1614
1615 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[iSubresource];
1616 D3D11_SUBRESOURCE_DATA *p = &aInitialData[iSubresource];
1617 p->pSysMem = pMipmapLevel->pSurfaceData;
1618 p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
1619 p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
1620 }
1621 }
1622 paInitialData = &aInitialData[0];
1623 }
1624
1625 D3D11_TEXTURE2D_DESC td;
1626 RT_ZERO(td);
1627 td.Width = cWidth;
1628 td.Height = cHeight;
1629 td.MipLevels = numMipLevels;
1630 td.ArraySize = 6;
1631 td.Format = dxgiFormat;
1632 td.SampleDesc.Count = 1;
1633 td.SampleDesc.Quality = 0;
1634 td.Usage = D3D11_USAGE_DEFAULT;
1635 td.BindFlags = dxBindFlags(pSurface->surfaceFlags);
1636 td.CPUAccessFlags = 0; /** @todo */
1637 td.MiscFlags = MiscFlags | D3D11_RESOURCE_MISC_TEXTURECUBE; /** @todo */
1638 if ( numMipLevels > 1
1639 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
1640 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
1641
1642 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
1643 Assert(SUCCEEDED(hr));
1644 if (SUCCEEDED(hr))
1645 {
1646 /* Map-able texture. */
1647 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
1648 td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
1649 td.Usage = D3D11_USAGE_DYNAMIC;
1650 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1651 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1652 td.MiscFlags = 0;
1653 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->pDynamicTexture);
1654 Assert(SUCCEEDED(hr));
1655 }
1656
1657 if (SUCCEEDED(hr))
1658 {
1659 /* Staging texture. */
1660 td.Usage = D3D11_USAGE_STAGING;
1661 td.BindFlags = 0; /* No flags allowed. */
1662 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1663 td.MiscFlags = 0;
1664 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->pStagingTexture);
1665 Assert(SUCCEEDED(hr));
1666 }
1667
1668 if ( SUCCEEDED(hr)
1669 && MiscFlags == D3D11_RESOURCE_MISC_SHARED)
1670 {
1671 /* Get the shared handle. */
1672 IDXGIResource *pDxgiResource = NULL;
1673 hr = pBackendSurface->u.pTexture2D->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
1674 Assert(SUCCEEDED(hr));
1675 if (SUCCEEDED(hr))
1676 {
1677 hr = pDxgiResource->GetSharedHandle(&pBackendSurface->SharedHandle);
1678 Assert(SUCCEEDED(hr));
1679 D3D_RELEASE(pDxgiResource);
1680 }
1681 }
1682
1683 if (SUCCEEDED(hr))
1684 {
1685 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_CUBE_TEXTURE;
1686 }
1687 }
1688 else if (pSurface->surfaceFlags & SVGA3D_SURFACE_1D)
1689 {
1690 AssertFailed(); /** @todo implement */
1691 hr = E_FAIL;
1692 }
1693 else
1694 {
1695 if (cDepth > 1)
1696 {
1697 /*
1698 * Volume texture.
1699 */
1700 Assert(pSurface->cFaces == 1);
1701
1702 D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
1703 D3D11_SUBRESOURCE_DATA aInitialData[SVGA3D_MAX_MIP_LEVELS];
1704 if (pSurface->paMipmapLevels[0].pSurfaceData)
1705 {
1706 /** @todo Can happen for a non GBO surface or if GBO texture was updated prior to creation if the hardware resource. Test this. */
1707 for (uint32_t i = 0; i < numMipLevels; ++i)
1708 {
1709 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1710 D3D11_SUBRESOURCE_DATA *p = &aInitialData[i];
1711 p->pSysMem = pMipmapLevel->pSurfaceData;
1712 p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
1713 p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
1714 }
1715 paInitialData = &aInitialData[0];
1716 }
1717
1718 D3D11_TEXTURE3D_DESC td;
1719 RT_ZERO(td);
1720 td.Width = cWidth;
1721 td.Height = cHeight;
1722 td.Depth = cDepth;
1723 td.MipLevels = numMipLevels;
1724 td.Format = dxgiFormat;
1725 td.Usage = D3D11_USAGE_DEFAULT;
1726 td.BindFlags = dxBindFlags(pSurface->surfaceFlags);
1727 td.CPUAccessFlags = 0; /** @todo */
1728 td.MiscFlags = MiscFlags; /** @todo */
1729 if ( numMipLevels > 1
1730 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
1731 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
1732
1733 hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->u.pTexture3D);
1734 Assert(SUCCEEDED(hr));
1735 if (SUCCEEDED(hr))
1736 {
1737 /* Map-able texture. */
1738 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
1739 td.Usage = D3D11_USAGE_DYNAMIC;
1740 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1741 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1742 td.MiscFlags = 0;
1743 hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->pDynamicTexture3D);
1744 Assert(SUCCEEDED(hr));
1745 }
1746
1747 if (SUCCEEDED(hr))
1748 {
1749 /* Staging texture. */
1750 td.Usage = D3D11_USAGE_STAGING;
1751 td.BindFlags = 0; /* No flags allowed. */
1752 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1753 td.MiscFlags = 0;
1754 hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->pStagingTexture3D);
1755 Assert(SUCCEEDED(hr));
1756 }
1757
1758 if ( SUCCEEDED(hr)
1759 && MiscFlags == D3D11_RESOURCE_MISC_SHARED)
1760 {
1761 /* Get the shared handle. */
1762 IDXGIResource *pDxgiResource = NULL;
1763 hr = pBackendSurface->u.pTexture3D->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
1764 Assert(SUCCEEDED(hr));
1765 if (SUCCEEDED(hr))
1766 {
1767 hr = pDxgiResource->GetSharedHandle(&pBackendSurface->SharedHandle);
1768 Assert(SUCCEEDED(hr));
1769 D3D_RELEASE(pDxgiResource);
1770 }
1771 }
1772
1773 if (SUCCEEDED(hr))
1774 {
1775 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_3D;
1776 }
1777 }
1778 else
1779 {
1780 /*
1781 * 2D texture.
1782 */
1783 Assert(pSurface->cFaces == 1);
1784
1785 D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
1786 D3D11_SUBRESOURCE_DATA aInitialData[SVGA3D_MAX_MIP_LEVELS];
1787 if (pSurface->paMipmapLevels[0].pSurfaceData)
1788 {
1789 /** @todo Can happen for a non GBO surface or if GBO texture was updated prior to creation if the hardware resource. Test this. */
1790 for (uint32_t i = 0; i < numMipLevels; ++i)
1791 {
1792 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1793 D3D11_SUBRESOURCE_DATA *p = &aInitialData[i];
1794 p->pSysMem = pMipmapLevel->pSurfaceData;
1795 p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
1796 p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
1797 }
1798 paInitialData = &aInitialData[0];
1799 }
1800
1801 D3D11_TEXTURE2D_DESC td;
1802 RT_ZERO(td);
1803 td.Width = cWidth;
1804 td.Height = cHeight;
1805 td.MipLevels = numMipLevels;
1806 td.ArraySize = 1; /** @todo */
1807 td.Format = dxgiFormat;
1808 td.SampleDesc.Count = 1;
1809 td.SampleDesc.Quality = 0;
1810 td.Usage = D3D11_USAGE_DEFAULT;
1811 td.BindFlags = dxBindFlags(pSurface->surfaceFlags);
1812 td.CPUAccessFlags = 0; /** @todo */
1813 td.MiscFlags = MiscFlags; /** @todo */
1814 if ( numMipLevels > 1
1815 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
1816 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
1817
1818 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
1819 Assert(SUCCEEDED(hr));
1820 if (SUCCEEDED(hr))
1821 {
1822 /* Map-able texture. */
1823 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
1824 td.Usage = D3D11_USAGE_DYNAMIC;
1825 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1826 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1827 td.MiscFlags = 0;
1828 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->pDynamicTexture);
1829 Assert(SUCCEEDED(hr));
1830 }
1831
1832 if (SUCCEEDED(hr))
1833 {
1834 /* Staging texture. */
1835 td.Usage = D3D11_USAGE_STAGING;
1836 td.BindFlags = 0; /* No flags allowed. */
1837 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1838 td.MiscFlags = 0;
1839 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->pStagingTexture);
1840 Assert(SUCCEEDED(hr));
1841 }
1842
1843 if ( SUCCEEDED(hr)
1844 && MiscFlags == D3D11_RESOURCE_MISC_SHARED)
1845 {
1846 /* Get the shared handle. */
1847 IDXGIResource *pDxgiResource = NULL;
1848 hr = pBackendSurface->u.pTexture2D->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
1849 Assert(SUCCEEDED(hr));
1850 if (SUCCEEDED(hr))
1851 {
1852 hr = pDxgiResource->GetSharedHandle(&pBackendSurface->SharedHandle);
1853 Assert(SUCCEEDED(hr));
1854 D3D_RELEASE(pDxgiResource);
1855 }
1856 }
1857
1858 if (SUCCEEDED(hr))
1859 {
1860 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE;
1861 }
1862 }
1863 }
1864
1865 Assert(hr == S_OK);
1866
1867 if (pSurface->autogenFilter != SVGA3D_TEX_FILTER_NONE)
1868 {
1869 }
1870
1871 if (SUCCEEDED(hr))
1872 {
1873 /*
1874 * Success.
1875 */
1876 pBackendSurface->enmDxgiFormat = dxgiFormat;
1877 pSurface->pBackendSurface = pBackendSurface;
1878 if (RT_BOOL(MiscFlags & D3D11_RESOURCE_MISC_SHARED))
1879 pSurface->idAssociatedContext = DX_CID_BACKEND;
1880 else
1881 pSurface->idAssociatedContext = pDXContext->cid;
1882 return VINF_SUCCESS;
1883 }
1884
1885 /* Failure. */
1886 D3D_RELEASE(pBackendSurface->pStagingTexture);
1887 D3D_RELEASE(pBackendSurface->pDynamicTexture);
1888 D3D_RELEASE(pBackendSurface->u.pTexture2D);
1889 RTMemFree(pBackendSurface);
1890 return VERR_NO_MEMORY;
1891}
1892
1893
1894static int vmsvga3dBackSurfaceCreateDepthStencilTexture(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1895{
1896 DXDEVICE *pDXDevice = &pDXContext->pBackendDXContext->device;
1897 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
1898
1899 if (pSurface->pBackendSurface != NULL)
1900 {
1901 AssertFailed(); /** @todo Should the function not be used like that? */
1902 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
1903 }
1904
1905 PVMSVGA3DBACKENDSURFACE pBackendSurface;
1906 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
1907 AssertRCReturn(rc, rc);
1908
1909 uint32_t const cWidth = pSurface->paMipmapLevels[0].mipmapSize.width;
1910 uint32_t const cHeight = pSurface->paMipmapLevels[0].mipmapSize.height;
1911 uint32_t const numMipLevels = pSurface->cLevels;
1912
1913 D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
1914 D3D11_SUBRESOURCE_DATA aInitialData[SVGA3D_MAX_MIP_LEVELS];
1915 if (pSurface->paMipmapLevels[0].pSurfaceData)
1916 {
1917 /** @todo Can happen for a non GBO surface or if GBO texture was updated prior to creation if the hardware resource. Test this. */
1918 for (uint32_t i = 0; i < numMipLevels; ++i)
1919 {
1920 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1921 D3D11_SUBRESOURCE_DATA *p = &aInitialData[i];
1922 p->pSysMem = pMipmapLevel->pSurfaceData;
1923 p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
1924 p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
1925 }
1926 paInitialData = &aInitialData[0];
1927 }
1928
1929 D3D11_TEXTURE2D_DESC td;
1930 RT_ZERO(td);
1931 td.Width = cWidth;
1932 td.Height = cHeight;
1933 Assert(pSurface->cLevels == 1);
1934 td.MipLevels = 1;
1935 td.ArraySize = 1;
1936 td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
1937 AssertReturn(td.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
1938 td.SampleDesc.Count = 1;
1939 td.SampleDesc.Quality = 0;
1940 td.Usage = D3D11_USAGE_DEFAULT;
1941 td.BindFlags = dxBindFlags(pSurface->surfaceFlags);
1942 td.CPUAccessFlags = 0;
1943 td.MiscFlags = 0;
1944
1945 HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.pTexture2D);
1946 Assert(SUCCEEDED(hr));
1947 if (SUCCEEDED(hr))
1948 {
1949 /* Map-able texture. */
1950 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
1951 td.Usage = D3D11_USAGE_DYNAMIC;
1952 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1953 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1954 td.MiscFlags = 0;
1955 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->pDynamicTexture);
1956 Assert(SUCCEEDED(hr));
1957 }
1958
1959 if (SUCCEEDED(hr))
1960 {
1961 /* Staging texture. */
1962 td.Usage = D3D11_USAGE_STAGING;
1963 td.BindFlags = 0; /* No flags allowed. */
1964 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1965 td.MiscFlags = 0;
1966 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->pStagingTexture);
1967 Assert(SUCCEEDED(hr));
1968 }
1969
1970 if (SUCCEEDED(hr))
1971 {
1972 /*
1973 * Success.
1974 */
1975 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE;
1976 pBackendSurface->enmDxgiFormat = td.Format;
1977 pSurface->pBackendSurface = pBackendSurface;
1978 pSurface->idAssociatedContext = pDXContext->cid;
1979 //pSurface->fDirty = true;
1980 return VINF_SUCCESS;
1981 }
1982
1983 /* Failure. */
1984 D3D_RELEASE(pBackendSurface->pStagingTexture);
1985 D3D_RELEASE(pBackendSurface->pDynamicTexture);
1986 D3D_RELEASE(pBackendSurface->u.pTexture2D);
1987 RTMemFree(pBackendSurface);
1988 return VERR_NO_MEMORY;
1989}
1990
1991
1992static int vmsvga3dBackSurfaceCreateBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1993{
1994 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1995 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1996
1997 /* Buffers should be created as such. */
1998 AssertReturn(RT_BOOL(pSurface->surfaceFlags & ( SVGA3D_SURFACE_HINT_INDEXBUFFER
1999 | SVGA3D_SURFACE_HINT_VERTEXBUFFER
2000 | SVGA3D_SURFACE_BIND_VERTEX_BUFFER
2001 | SVGA3D_SURFACE_BIND_INDEX_BUFFER
2002 /// @todo only for constant buffers| SVGA3D_SURFACE_BIND_CONSTANT_BUFFER
2003 //| SVGA3D_SURFACE_BIND_STREAM_OUTPUT
2004 )), VERR_INVALID_PARAMETER);
2005
2006 if (pSurface->pBackendSurface != NULL)
2007 {
2008 AssertFailed(); /** @todo Should the function not be used like that? */
2009 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
2010 }
2011
2012 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2013 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2014 AssertRCReturn(rc, rc);
2015
2016 D3D11_BUFFER_DESC bd;
2017 RT_ZERO(bd);
2018 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
2019 bd.Usage = D3D11_USAGE_DYNAMIC;
2020 bd.BindFlags = D3D11_BIND_VERTEX_BUFFER
2021 | D3D11_BIND_INDEX_BUFFER
2022 //| D3D11_BIND_CONSTANT_BUFFER
2023 //| D3D11_BIND_STREAM_OUTPUT
2024 ;
2025 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2026 bd.MiscFlags = 0;
2027 bd.StructureByteStride = 0;
2028
2029 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.pBuffer);
2030 if (SUCCEEDED(hr))
2031 {
2032 /*
2033 * Success.
2034 */
2035 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2036 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2037 pSurface->pBackendSurface = pBackendSurface;
2038 pSurface->idAssociatedContext = pDXContext->cid;
2039 pSurface->fDirty = true;
2040 return VINF_SUCCESS;
2041 }
2042
2043 /* Failure. */
2044 D3D_RELEASE(pBackendSurface->u.pBuffer);
2045 RTMemFree(pBackendSurface);
2046 return VERR_NO_MEMORY;
2047}
2048
2049
2050static int vmsvga3dBackSurfaceCreateConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2051{
2052 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
2053 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2054
2055 /* Buffers should be created as such. */
2056 AssertReturn(RT_BOOL(pSurface->surfaceFlags & ( SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)), VERR_INVALID_PARAMETER);
2057
2058 if (pSurface->pBackendSurface != NULL)
2059 {
2060 AssertFailed(); /** @todo Should the function not be used like that? */
2061 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
2062 }
2063
2064 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2065 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2066 AssertRCReturn(rc, rc);
2067
2068 D3D11_BUFFER_DESC bd;
2069 RT_ZERO(bd);
2070 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
2071 bd.Usage = D3D11_USAGE_DYNAMIC;
2072 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
2073 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2074 bd.MiscFlags = 0;
2075 bd.StructureByteStride = 0;
2076
2077 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.pBuffer);
2078 if (SUCCEEDED(hr))
2079 {
2080 /*
2081 * Success.
2082 */
2083 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2084 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2085 pSurface->pBackendSurface = pBackendSurface;
2086 pSurface->idAssociatedContext = pDXContext->cid;
2087 pSurface->fDirty = true;
2088 return VINF_SUCCESS;
2089 }
2090
2091 /* Failure. */
2092 D3D_RELEASE(pBackendSurface->u.pBuffer);
2093 RTMemFree(pBackendSurface);
2094 return VERR_NO_MEMORY;
2095}
2096
2097
2098static HRESULT dxCreateConstantBuffer(DXDEVICE *pDevice, VMSVGA3DSURFACE const *pSurface, PVMSVGA3DBACKENDSURFACE pBackendSurface)
2099{
2100 D3D11_SUBRESOURCE_DATA *pInitialData = NULL; /** @todo */
2101 D3D11_BUFFER_DESC bd;
2102 RT_ZERO(bd);
2103 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
2104 bd.Usage = D3D11_USAGE_DYNAMIC; /** @todo HINT_STATIC */
2105 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
2106 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2107 bd.MiscFlags = 0;
2108 bd.StructureByteStride = 0;
2109
2110 return pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
2111}
2112
2113
2114static HRESULT dxCreateBuffer(DXDEVICE *pDevice, VMSVGA3DSURFACE const *pSurface, PVMSVGA3DBACKENDSURFACE pBackendSurface)
2115{
2116 D3D11_SUBRESOURCE_DATA *pInitialData = NULL; /** @todo */
2117 D3D11_BUFFER_DESC bd;
2118 RT_ZERO(bd);
2119 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
2120 bd.Usage = D3D11_USAGE_DYNAMIC; /** @todo HINT_STATIC */
2121 bd.BindFlags = D3D11_BIND_VERTEX_BUFFER
2122 | D3D11_BIND_INDEX_BUFFER;
2123 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2124 bd.MiscFlags = 0;
2125 bd.StructureByteStride = 0;
2126
2127 return pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
2128}
2129
2130
2131static int vmsvga3dBackSurfaceCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2132{
2133 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
2134 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2135
2136 if (pSurface->pBackendSurface != NULL)
2137 {
2138 AssertFailed(); /** @todo Should the function not be used like that? */
2139 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
2140 }
2141
2142 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2143 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2144 AssertRCReturn(rc, rc);
2145
2146 HRESULT hr;
2147
2148 /*
2149 * Figure out the type of the surface.
2150 */
2151 if (pSurface->surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)
2152 {
2153 hr = dxCreateConstantBuffer(pDevice, pSurface, pBackendSurface);
2154 if (SUCCEEDED(hr))
2155 {
2156 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2157 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2158 }
2159 else
2160 D3D_RELEASE(pBackendSurface->u.pBuffer);
2161 }
2162 else if (pSurface->surfaceFlags & ( SVGA3D_SURFACE_BIND_VERTEX_BUFFER
2163 | SVGA3D_SURFACE_BIND_INDEX_BUFFER
2164 | SVGA3D_SURFACE_HINT_VERTEXBUFFER
2165 | SVGA3D_SURFACE_HINT_INDEXBUFFER))
2166 {
2167 hr = dxCreateBuffer(pDevice, pSurface, pBackendSurface);
2168 if (SUCCEEDED(hr))
2169 {
2170 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2171 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2172 }
2173 else
2174 D3D_RELEASE(pBackendSurface->u.pBuffer);
2175 }
2176 else
2177 {
2178 AssertFailed(); /** @todo implement */
2179 hr = E_FAIL;
2180 }
2181
2182 if (SUCCEEDED(hr))
2183 {
2184 /*
2185 * Success.
2186 */
2187 pSurface->pBackendSurface = pBackendSurface;
2188 pSurface->idAssociatedContext = pDXContext->cid;
2189 return VINF_SUCCESS;
2190 }
2191
2192 /* Failure. */
2193 RTMemFree(pBackendSurface);
2194 return VERR_NO_MEMORY;
2195}
2196
2197
2198static DECLCALLBACK(int) vmsvga3dBackInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
2199{
2200 RT_NOREF(pDevIns, pThis);
2201
2202 PVMSVGA3DSTATE pState = (PVMSVGA3DSTATE)RTMemAllocZ(sizeof(VMSVGA3DSTATE));
2203 AssertReturn(pState, VERR_NO_MEMORY);
2204 pThisCC->svga.p3dState = pState;
2205
2206 PVMSVGA3DBACKEND pBackend = (PVMSVGA3DBACKEND)RTMemAllocZ(sizeof(VMSVGA3DBACKEND));
2207 AssertReturn(pBackend, VERR_NO_MEMORY);
2208 pState->pBackend = pBackend;
2209
2210 int rc = RTLdrLoadSystem("d3d11", /* fNoUnload = */ true, &pBackend->hD3D11);
2211 AssertRC(rc);
2212 if (RT_SUCCESS(rc))
2213 {
2214 rc = RTLdrGetSymbol(pBackend->hD3D11, "D3D11CreateDevice", (void **)&pBackend->pfnD3D11CreateDevice);
2215 AssertRC(rc);
2216 }
2217
2218 if (RT_SUCCESS(rc))
2219 {
2220 /* Failure to load the shader disassembler is ignored. */
2221 int rc2 = RTLdrLoadSystem("D3DCompiler_47", /* fNoUnload = */ true, &pBackend->hD3DCompiler);
2222 AssertRC(rc2);
2223 if (RT_SUCCESS(rc2))
2224 {
2225 rc2 = RTLdrGetSymbol(pBackend->hD3DCompiler, "D3DDisassemble", (void **)&pBackend->pfnD3DDisassemble);
2226 AssertRC(rc2);
2227 }
2228 Log6Func(("Load D3DDisassemble: %Rrc\n", rc2));
2229 }
2230//DEBUG_BREAKPOINT_TEST();
2231 return rc;
2232}
2233
2234
2235static DECLCALLBACK(int) vmsvga3dBackPowerOn(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
2236{
2237 RT_NOREF(pDevIns, pThis);
2238
2239 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2240 AssertReturn(pState, VERR_INVALID_STATE);
2241
2242 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2243 AssertReturn(pBackend, VERR_INVALID_STATE);
2244
2245 int rc = dxDeviceCreate(pBackend, &pBackend->device);
2246 return rc;
2247}
2248
2249
2250static DECLCALLBACK(int) vmsvga3dBackTerminate(PVGASTATECC pThisCC)
2251{
2252 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2253 AssertReturn(pState, VERR_INVALID_STATE);
2254
2255 if (pState->pBackend)
2256 {
2257 /** @todo Clean up backends. */
2258
2259 dxDeviceDestroy(pState->pBackend, &pState->pBackend->device);
2260
2261 RTMemFree(pState->pBackend);
2262 pState->pBackend = NULL;
2263 }
2264
2265 return VINF_SUCCESS;
2266}
2267
2268
2269static DECLCALLBACK(int) vmsvga3dBackReset(PVGASTATECC pThisCC)
2270{
2271 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2272 AssertReturn(pState, VERR_INVALID_STATE);
2273
2274 /** @todo Cleanup all resources and recreate Device, ImmediateContext etc to be at the same state as after poweron. */
2275
2276 return VINF_SUCCESS;
2277}
2278
2279
2280static int vmsvga3dDrvNotifyDefineScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
2281{
2282 /** @todo Such structures must be in VBoxVideo3D.h */
2283 typedef struct VBOX3DNOTIFYDEFINESCREEN
2284 {
2285 VBOX3DNOTIFY Core;
2286 uint32_t cWidth;
2287 uint32_t cHeight;
2288 int32_t xRoot;
2289 int32_t yRoot;
2290 uint32_t fPrimary;
2291 uint32_t cDpi;
2292 } VBOX3DNOTIFYDEFINESCREEN;
2293
2294 VBOX3DNOTIFYDEFINESCREEN n;
2295 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_CREATED;
2296 n.Core.iDisplay = pScreen->idScreen;
2297 n.Core.u32Reserved = 0;
2298 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
2299 RT_ZERO(n.Core.au8Data);
2300 n.cWidth = pScreen->cWidth;
2301 n.cHeight = pScreen->cHeight;
2302 n.xRoot = pScreen->xOrigin;
2303 n.yRoot = pScreen->yOrigin;
2304 n.fPrimary = RT_BOOL(pScreen->fuScreen & SVGA_SCREEN_IS_PRIMARY);
2305 n.cDpi = pScreen->cDpi;
2306
2307 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
2308}
2309
2310
2311static int vmsvga3dDrvNotifyDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
2312{
2313 VBOX3DNOTIFY n;
2314 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_DESTROYED;
2315 n.iDisplay = pScreen->idScreen;
2316 n.u32Reserved = 0;
2317 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
2318 RT_ZERO(n.au8Data);
2319
2320 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
2321}
2322
2323
2324static int vmsvga3dDrvNotifyBindSurface(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, HANDLE hSharedSurface)
2325{
2326 VBOX3DNOTIFY n;
2327 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_BIND_SURFACE;
2328 n.iDisplay = pScreen->idScreen;
2329 n.u32Reserved = 0;
2330 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
2331 *(uint64_t *)&n.au8Data[0] = (uint64_t)hSharedSurface;
2332
2333 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
2334}
2335
2336
2337static int vmsvga3dDrvNotifyUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
2338 uint32_t x, uint32_t y, uint32_t w, uint32_t h)
2339{
2340 typedef struct VBOX3DNOTIFYUPDATE
2341 {
2342 VBOX3DNOTIFY Core;
2343 uint32_t x;
2344 uint32_t y;
2345 uint32_t w;
2346 uint32_t h;
2347 } VBOX3DNOTIFYUPDATE;
2348
2349 VBOX3DNOTIFYUPDATE n;
2350 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_UPDATE_END;
2351 n.Core.iDisplay = pScreen->idScreen;
2352 n.Core.u32Reserved = 0;
2353 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
2354 RT_ZERO(n.Core.au8Data);
2355 n.x = x;
2356 n.y = y;
2357 n.w = w;
2358 n.h = h;
2359
2360 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
2361}
2362
2363static int vmsvga3dHwScreenCreate(PVMSVGA3DSTATE pState, uint32_t cWidth, uint32_t cHeight, VMSVGAHWSCREEN *p)
2364{
2365 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2366
2367 DXDEVICE *pDXDevice = &pBackend->device;
2368 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
2369
2370 D3D11_TEXTURE2D_DESC td;
2371 RT_ZERO(td);
2372 td.Width = cWidth;
2373 td.Height = cHeight;
2374 td.MipLevels = 1;
2375 td.ArraySize = 1;
2376 td.Format = DXGI_FORMAT_B8G8R8A8_UNORM;
2377 td.SampleDesc.Count = 1;
2378 td.SampleDesc.Quality = 0;
2379 td.Usage = D3D11_USAGE_DEFAULT;
2380 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
2381 td.CPUAccessFlags = 0;
2382 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED_KEYEDMUTEX;
2383
2384 HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &p->pTexture);
2385 if (SUCCEEDED(hr))
2386 {
2387 /* Get the shared handle. */
2388 hr = p->pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&p->pDxgiResource);
2389 if (SUCCEEDED(hr))
2390 {
2391 hr = p->pDxgiResource->GetSharedHandle(&p->SharedHandle);
2392 if (SUCCEEDED(hr))
2393 hr = p->pTexture->QueryInterface(__uuidof(IDXGIKeyedMutex), (void**)&p->pDXGIKeyedMutex);
2394 }
2395 }
2396
2397 if (SUCCEEDED(hr))
2398 return VINF_SUCCESS;
2399
2400 AssertFailed();
2401 return VERR_NOT_SUPPORTED;
2402}
2403
2404
2405static void vmsvga3dHwScreenDestroy(PVMSVGA3DSTATE pState, VMSVGAHWSCREEN *p)
2406{
2407 RT_NOREF(pState);
2408 D3D_RELEASE(p->pDXGIKeyedMutex);
2409 D3D_RELEASE(p->pDxgiResource);
2410 D3D_RELEASE(p->pTexture);
2411 p->SharedHandle = 0;
2412 p->sidScreenTarget = SVGA_ID_INVALID;
2413}
2414
2415
2416static DECLCALLBACK(int) vmsvga3dBackDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
2417{
2418 RT_NOREF(pThis, pThisCC, pScreen);
2419
2420 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: screen %u\n", pScreen->idScreen));
2421
2422 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2423 AssertReturn(pState, VERR_INVALID_STATE);
2424
2425 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2426 AssertReturn(pBackend, VERR_INVALID_STATE);
2427
2428 Assert(pScreen->pHwScreen == NULL);
2429
2430 VMSVGAHWSCREEN *p = (VMSVGAHWSCREEN *)RTMemAllocZ(sizeof(VMSVGAHWSCREEN));
2431 AssertPtrReturn(p, VERR_NO_MEMORY);
2432
2433 p->sidScreenTarget = SVGA_ID_INVALID;
2434
2435 int rc = vmsvga3dDrvNotifyDefineScreen(pThisCC, pScreen);
2436 if (RT_SUCCESS(rc))
2437 {
2438 /* The frontend supports the screen. Create the actual resource. */
2439 rc = vmsvga3dHwScreenCreate(pState, pScreen->cWidth, pScreen->cHeight, p);
2440 if (RT_SUCCESS(rc))
2441 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: created\n"));
2442 }
2443
2444 if (RT_SUCCESS(rc))
2445 {
2446 LogRel(("VMSVGA: Using HW accelerated screen %u\n", pScreen->idScreen));
2447 pScreen->pHwScreen = p;
2448 }
2449 else
2450 {
2451 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: %Rrc\n", rc));
2452 vmsvga3dHwScreenDestroy(pState, p);
2453 RTMemFree(p);
2454 }
2455
2456 return rc;
2457}
2458
2459
2460static DECLCALLBACK(int) vmsvga3dBackDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
2461{
2462 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2463 AssertReturn(pState, VERR_INVALID_STATE);
2464
2465 vmsvga3dDrvNotifyDestroyScreen(pThisCC, pScreen);
2466
2467 if (pScreen->pHwScreen)
2468 {
2469 vmsvga3dHwScreenDestroy(pState, pScreen->pHwScreen);
2470 RTMemFree(pScreen->pHwScreen);
2471 pScreen->pHwScreen = NULL;
2472 }
2473
2474 return VINF_SUCCESS;
2475}
2476
2477
2478static DECLCALLBACK(int) vmsvga3dBackSurfaceBlitToScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
2479 SVGASignedRect destRect, SVGA3dSurfaceImageId srcImage,
2480 SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *paRects)
2481{
2482 RT_NOREF(pThisCC, pScreen, destRect, srcImage, srcRect, cRects, paRects);
2483
2484 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2485 AssertReturn(pState, VERR_INVALID_STATE);
2486
2487 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2488 AssertReturn(pBackend, VERR_INVALID_STATE);
2489
2490 VMSVGAHWSCREEN *p = pScreen->pHwScreen;
2491 AssertReturn(p, VERR_NOT_SUPPORTED);
2492
2493 PVMSVGA3DSURFACE pSurface;
2494 int rc = vmsvga3dSurfaceFromSid(pState, srcImage.sid, &pSurface);
2495 AssertRCReturn(rc, rc);
2496
2497 /** @todo Implement. */
2498 AssertFailed();
2499 return VERR_NOT_IMPLEMENTED;
2500}
2501
2502
2503static DECLCALLBACK(int) vmsvga3dBackSurfaceMap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, SVGA3dBox const *pBox,
2504 VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
2505{
2506 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2507 AssertReturn(pState, VERR_INVALID_STATE);
2508
2509 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2510 AssertReturn(pBackend, VERR_INVALID_STATE);
2511
2512 PVMSVGA3DSURFACE pSurface;
2513 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
2514 AssertRCReturn(rc, rc);
2515
2516 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2517 AssertPtrReturn(pBackendSurface, VERR_INVALID_STATE);
2518
2519 PVMSVGA3DMIPMAPLEVEL pMipLevel;
2520 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
2521 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
2522
2523 /* A surface is always mapped by the DX context which has created the surface. */
2524 DXDEVICE *pDevice = dxDeviceFromCid(pSurface->idAssociatedContext, pState);
2525 AssertReturn(pDevice && pDevice->pDevice, VERR_INVALID_STATE);
2526
2527 SVGA3dBox clipBox;
2528 if (pBox)
2529 {
2530 clipBox = *pBox;
2531 vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
2532 ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
2533 }
2534 else
2535 {
2536 clipBox.x = 0;
2537 clipBox.y = 0;
2538 clipBox.z = 0;
2539 clipBox.w = pMipLevel->mipmapSize.width;
2540 clipBox.h = pMipLevel->mipmapSize.height;
2541 clipBox.d = pMipLevel->mipmapSize.depth;
2542 }
2543
2544 /** @todo D3D11_MAP_WRITE does not work with D3D11_USAGE_DYNAMIC resources. Probably VMSVGA3D_SURFACE_MAP_WRITE is not necessary. */
2545 D3D11_MAP d3d11MapType;
2546 switch (enmMapType)
2547 {
2548 case VMSVGA3D_SURFACE_MAP_READ: d3d11MapType = D3D11_MAP_READ; break;
2549 case VMSVGA3D_SURFACE_MAP_WRITE: d3d11MapType = D3D11_MAP_WRITE; break;
2550 case VMSVGA3D_SURFACE_MAP_READ_WRITE: d3d11MapType = D3D11_MAP_READ_WRITE; break;
2551 case VMSVGA3D_SURFACE_MAP_WRITE_DISCARD: d3d11MapType = D3D11_MAP_WRITE_DISCARD; break;
2552 default:
2553 AssertFailed();
2554 return VERR_INVALID_PARAMETER;
2555 }
2556
2557 D3D11_MAPPED_SUBRESOURCE mappedResource;
2558 RT_ZERO(mappedResource);
2559
2560 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
2561 {
2562 Assert(pImage->face == 0 && pImage->mipmap == 0);
2563
2564 ID3D11Texture2D *pMappedTexture;
2565 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2566 {
2567 pMappedTexture = pBackendSurface->pStagingTexture;
2568
2569 /* Wait for the surface to finish drawing. */
2570 if (pBackendSurface->cidDrawing != SVGA_ID_INVALID)
2571 {
2572 dxContextWait(pBackendSurface->cidDrawing, pState);
2573 pBackendSurface->cidDrawing = SVGA_ID_INVALID;
2574 }
2575
2576 /* Copy the texture content to the staging texture. */
2577 pDevice->pImmediateContext->CopyResource(pBackendSurface->pStagingTexture, pBackendSurface->u.pTexture2D);
2578 }
2579 else
2580 pMappedTexture = pBackendSurface->pDynamicTexture;
2581
2582 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2583 HRESULT hr = pDevice->pImmediateContext->Map(pMappedTexture, Subresource,
2584 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
2585 if (SUCCEEDED(hr))
2586 {
2587 pMap->enmMapType = enmMapType;
2588 pMap->box = clipBox;
2589 pMap->cbPixel = pSurface->cbBlock;
2590 pMap->cbRowPitch = mappedResource.RowPitch;
2591 pMap->cbDepthPitch = mappedResource.DepthPitch;
2592 pMap->pvData = (uint8_t *)mappedResource.pData
2593 + pMap->box.x * pMap->cbPixel
2594 + pMap->box.y * pMap->cbRowPitch
2595 + pMap->box.z * pMap->cbDepthPitch;
2596 }
2597 else
2598 rc = VERR_NOT_SUPPORTED;
2599 }
2600 else if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE
2601 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_CUBE_TEXTURE
2602 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
2603 {
2604//Assert(pImage->face == 0 && pImage->mipmap == 0);
2605if (!pBackendSurface->pStagingTexture || !pBackendSurface->pDynamicTexture) return VERR_NOT_IMPLEMENTED;
2606 ID3D11Texture2D *pMappedTexture;
2607 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2608 {
2609 pMappedTexture = pBackendSurface->pStagingTexture;
2610
2611 /* Wait for the surface to finish drawing. */
2612 if (pBackendSurface->cidDrawing != SVGA_ID_INVALID)
2613 {
2614 dxContextWait(pBackendSurface->cidDrawing, pState);
2615 pBackendSurface->cidDrawing = SVGA_ID_INVALID;
2616 }
2617
2618 /* Copy the texture content to the staging texture.
2619 * The requested miplevel of the texture is copied to the miplevel 0 of the staging texture,
2620 * because the staging (and dynamic) structures do not have miplevels.
2621 * Always copy entire miplevel so all Dst are zero and pSrcBox is NULL, as D3D11 requires.
2622 */
2623 ID3D11Resource *pDstResource = pBackendSurface->pStagingTexture;
2624 UINT DstSubresource = 0;
2625 UINT DstX = 0;
2626 UINT DstY = 0;
2627 UINT DstZ = 0;
2628 ID3D11Resource *pSrcResource = pBackendSurface->u.pTexture2D;
2629 UINT SrcSubresource = D3D11CalcSubresource(pImage->mipmap, pImage->face, pSurface->cLevels);
2630 D3D11_BOX *pSrcBox = NULL;
2631 //D3D11_BOX SrcBox;
2632 //SrcBox.left = 0;
2633 //SrcBox.top = 0;
2634 //SrcBox.front = 0;
2635 //SrcBox.right = pMipLevel->mipmapSize.width;
2636 //SrcBox.bottom = pMipLevel->mipmapSize.height;
2637 //SrcBox.back = pMipLevel->mipmapSize.depth;
2638 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
2639 pSrcResource, SrcSubresource, pSrcBox);
2640 }
2641 else
2642 pMappedTexture = pBackendSurface->pDynamicTexture;
2643
2644 UINT const Subresource = 0;
2645 HRESULT hr = pDevice->pImmediateContext->Map(pMappedTexture, Subresource,
2646 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
2647 if (SUCCEEDED(hr))
2648 {
2649 pMap->enmMapType = enmMapType;
2650 pMap->box = clipBox;
2651 pMap->cbPixel = pSurface->cbBlock;
2652 pMap->cbRowPitch = mappedResource.RowPitch;
2653 pMap->cbDepthPitch = mappedResource.DepthPitch;
2654 pMap->pvData = (uint8_t *)mappedResource.pData
2655 + pMap->box.x * pMap->cbPixel
2656 + pMap->box.y * pMap->cbRowPitch
2657 + pMap->box.z * pMap->cbDepthPitch;
2658 }
2659 else
2660 rc = VERR_NOT_SUPPORTED;
2661 }
2662 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
2663 {
2664 UINT const Subresource = 0; /* Buffers have only one subresource. */
2665 HRESULT hr = pDevice->pImmediateContext->Map(pSurface->pBackendSurface->u.pBuffer, Subresource,
2666 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
2667 if (SUCCEEDED(hr))
2668 {
2669 pMap->enmMapType = enmMapType;
2670 pMap->box = clipBox;
2671 pMap->cbPixel = pSurface->cbBlock;
2672 pMap->cbRowPitch = mappedResource.RowPitch;
2673 pMap->cbDepthPitch = mappedResource.DepthPitch;
2674 pMap->pvData = (uint8_t *)mappedResource.pData
2675 + pMap->box.x * pMap->cbPixel
2676 + pMap->box.y * pMap->cbRowPitch
2677 + pMap->box.z * pMap->cbDepthPitch;
2678 }
2679 else
2680 rc = VERR_NOT_SUPPORTED;
2681 }
2682 else
2683 {
2684 // UINT D3D11CalcSubresource(UINT MipSlice, UINT ArraySlice, UINT MipLevels);
2685 /** @todo Implement. */
2686 AssertFailed();
2687 rc = VERR_NOT_IMPLEMENTED;
2688 }
2689
2690 return rc;
2691}
2692
2693
2694static DECLCALLBACK(int) vmsvga3dBackSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, VMSVGA3D_MAPPED_SURFACE *pMap, bool fWritten)
2695{
2696 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2697 AssertReturn(pState, VERR_INVALID_STATE);
2698
2699 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2700 AssertReturn(pBackend, VERR_INVALID_STATE);
2701
2702 PVMSVGA3DSURFACE pSurface;
2703 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
2704 AssertRCReturn(rc, rc);
2705
2706 /* The called should not use the function for system memory surfaces. */
2707 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2708 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
2709
2710 PVMSVGA3DMIPMAPLEVEL pMipLevel;
2711 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
2712 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
2713
2714 /* A surface is always mapped by the DX context which has created the surface. */
2715 DXDEVICE *pDevice = dxDeviceFromCid(pSurface->idAssociatedContext, pState);
2716 AssertReturn(pDevice && pDevice->pDevice, VERR_INVALID_STATE);
2717
2718 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
2719 {
2720 ID3D11Texture2D *pMappedTexture;
2721 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2722 pMappedTexture = pBackendSurface->pStagingTexture;
2723 else
2724 pMappedTexture = pBackendSurface->pDynamicTexture;
2725
2726 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2727 pDevice->pImmediateContext->Unmap(pMappedTexture, Subresource);
2728
2729 if ( fWritten
2730 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
2731 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
2732 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
2733 {
2734 ID3D11Resource *pDstResource = pBackendSurface->u.pTexture2D;
2735 UINT DstSubresource = Subresource;
2736 UINT DstX = pMap->box.x;
2737 UINT DstY = pMap->box.y;
2738 UINT DstZ = pMap->box.z;
2739 ID3D11Resource *pSrcResource = pBackendSurface->pDynamicTexture;
2740 UINT SrcSubresource = Subresource;
2741 D3D11_BOX SrcBox;
2742 SrcBox.left = pMap->box.x;
2743 SrcBox.top = pMap->box.y;
2744 SrcBox.front = pMap->box.z;
2745 SrcBox.right = pMap->box.x + pMap->box.w;
2746 SrcBox.bottom = pMap->box.y + pMap->box.h;
2747 SrcBox.back = pMap->box.z + pMap->box.d;
2748
2749 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
2750 pSrcResource, SrcSubresource, &SrcBox);
2751
2752 pBackendSurface->cidDrawing = pSurface->idAssociatedContext;
2753 }
2754 }
2755 else if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE
2756 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_CUBE_TEXTURE
2757 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
2758 {
2759 ID3D11Texture2D *pMappedTexture;
2760 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2761 pMappedTexture = pBackendSurface->pStagingTexture;
2762 else
2763 pMappedTexture = pBackendSurface->pDynamicTexture;
2764
2765 UINT const Subresource = 0; /* Staging or dynamic textures have one subresource. */
2766 pDevice->pImmediateContext->Unmap(pMappedTexture, Subresource);
2767
2768 if ( fWritten
2769 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
2770 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
2771 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
2772 {
2773 ID3D11Resource *pDstResource = pBackendSurface->u.pTexture2D;
2774 UINT DstSubresource = D3D11CalcSubresource(pImage->mipmap, pImage->face, pSurface->cLevels);
2775 UINT DstX = pMap->box.x;
2776 UINT DstY = pMap->box.y;
2777 UINT DstZ = pMap->box.z;
2778 ID3D11Resource *pSrcResource = pBackendSurface->pDynamicTexture;
2779 UINT SrcSubresource = Subresource;
2780 D3D11_BOX SrcBox;
2781 SrcBox.left = pMap->box.x;
2782 SrcBox.top = pMap->box.y;
2783 SrcBox.front = pMap->box.z;
2784 SrcBox.right = pMap->box.x + pMap->box.w;
2785 SrcBox.bottom = pMap->box.y + pMap->box.h;
2786 SrcBox.back = pMap->box.z + pMap->box.d;
2787
2788 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
2789 pSrcResource, SrcSubresource, &SrcBox);
2790
2791 pBackendSurface->cidDrawing = pSurface->idAssociatedContext;
2792 }
2793 }
2794 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
2795 {
2796 UINT const Subresource = 0; /* Buffers have only one subresource. */
2797 pDevice->pImmediateContext->Unmap(pBackendSurface->u.pBuffer, Subresource);
2798 }
2799 else
2800 {
2801 AssertFailed();
2802 rc = VERR_NOT_IMPLEMENTED;
2803 }
2804
2805 return rc;
2806}
2807
2808
2809static DECLCALLBACK(int) vmsvga3dScreenTargetBind(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, uint32_t sid)
2810{
2811 int rc = VINF_SUCCESS;
2812
2813 PVMSVGA3DSURFACE pSurface;
2814 if (sid != SVGA_ID_INVALID)
2815 {
2816 /* Create the surface if does not yet exist. */
2817 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2818 AssertReturn(pState, VERR_INVALID_STATE);
2819
2820 rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
2821 AssertRCReturn(rc, rc);
2822
2823 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
2824 {
2825 /* Create the actual texture. */
2826 rc = vmsvga3dBackSurfaceCreateScreenTarget(pThisCC, pSurface);
2827 AssertRCReturn(rc, rc);
2828 }
2829 }
2830 else
2831 pSurface = NULL;
2832
2833 /* Notify the HW accelerated screen if it is used. */
2834 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
2835 if (!pHwScreen)
2836 return VINF_SUCCESS;
2837
2838 /* Same surface -> do nothing. */
2839 if (pHwScreen->sidScreenTarget == sid)
2840 return VINF_SUCCESS;
2841
2842 if (sid != SVGA_ID_INVALID)
2843 {
2844 AssertReturn( pSurface->pBackendSurface
2845 && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
2846
2847 HANDLE const hSharedSurface = pHwScreen->SharedHandle;
2848 rc = vmsvga3dDrvNotifyBindSurface(pThisCC, pScreen, hSharedSurface);
2849 }
2850
2851 if (RT_SUCCESS(rc))
2852 {
2853 pHwScreen->sidScreenTarget = sid;
2854 }
2855
2856 return rc;
2857}
2858
2859
2860static DECLCALLBACK(int) vmsvga3dScreenTargetUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, SVGA3dRect const *pRect)
2861{
2862 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
2863 AssertReturn(pHwScreen, VERR_NOT_SUPPORTED);
2864
2865 if (pHwScreen->sidScreenTarget == SVGA_ID_INVALID)
2866 return VINF_SUCCESS; /* No surface bound. */
2867
2868 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2869 AssertReturn(pState, VERR_INVALID_STATE);
2870
2871 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2872 AssertReturn(pBackend, VERR_INVALID_STATE);
2873
2874 PVMSVGA3DSURFACE pSurface;
2875 int rc = vmsvga3dSurfaceFromSid(pState, pHwScreen->sidScreenTarget, &pSurface);
2876 AssertRCReturn(rc, rc);
2877
2878 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2879 AssertReturn(pBackendSurface && pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
2880
2881 SVGA3dRect boundRect;
2882 boundRect.x = 0;
2883 boundRect.y = 0;
2884 boundRect.w = pSurface->paMipmapLevels[0].mipmapSize.width;
2885 boundRect.h = pSurface->paMipmapLevels[0].mipmapSize.height;
2886 SVGA3dRect clipRect = *pRect;
2887 vmsvgaR3Clip3dRect(&boundRect, &clipRect);
2888 ASSERT_GUEST_RETURN(clipRect.w && clipRect.h, VERR_INVALID_PARAMETER);
2889
2890 /* Wait for the surface to finish drawing. */
2891 if (pBackendSurface->cidDrawing != SVGA_ID_INVALID)
2892 {
2893 dxContextWait(pBackendSurface->cidDrawing, pState);
2894 pBackendSurface->cidDrawing = SVGA_ID_INVALID;
2895 }
2896
2897 /* Copy the screen texture to the shared surface. */
2898 DWORD result = pHwScreen->pDXGIKeyedMutex->AcquireSync(0, 10000);
2899 if (result == WAIT_OBJECT_0)
2900 {
2901 pBackend->device.pImmediateContext->CopyResource(pHwScreen->pTexture, pBackendSurface->u.pTexture2D);
2902
2903 dxDeviceFlush(&pBackend->device);
2904
2905 result = pHwScreen->pDXGIKeyedMutex->ReleaseSync(1);
2906 }
2907 else
2908 AssertFailed();
2909
2910 rc = vmsvga3dDrvNotifyUpdate(pThisCC, pScreen, pRect->x, pRect->y, pRect->w, pRect->h);
2911 return rc;
2912}
2913
2914
2915/*
2916 *
2917 * 3D interface.
2918 *
2919 */
2920
2921static DECLCALLBACK(int) vmsvga3dBackQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
2922{
2923 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2924 AssertReturn(pState, VERR_INVALID_STATE);
2925
2926 int rc = VINF_SUCCESS;
2927
2928 *pu32Val = 0;
2929
2930 if (idx3dCaps > SVGA3D_DEVCAP_MAX)
2931 {
2932 LogRelMax(16, ("VMSVGA: unsupported SVGA3D_DEVCAP %d\n", idx3dCaps));
2933 return VERR_NOT_SUPPORTED;
2934 }
2935
2936 D3D_FEATURE_LEVEL const FeatureLevel = pState->pBackend->device.FeatureLevel;
2937
2938 /* Most values are taken from:
2939 * https://docs.microsoft.com/en-us/windows/win32/direct3d11/overviews-direct3d-11-devices-downlevel-intro
2940 *
2941 * Shader values are from
2942 * https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-models
2943 */
2944
2945 switch (idx3dCaps)
2946 {
2947 case SVGA3D_DEVCAP_3D:
2948 *pu32Val = 1;
2949 break;
2950
2951 case SVGA3D_DEVCAP_MAX_LIGHTS:
2952 *pu32Val = SVGA3D_NUM_LIGHTS; /* VGPU9. Not applicable to DX11. */
2953 break;
2954
2955 case SVGA3D_DEVCAP_MAX_TEXTURES:
2956 *pu32Val = SVGA3D_NUM_TEXTURE_UNITS; /* VGPU9. Not applicable to DX11. */
2957 break;
2958
2959 case SVGA3D_DEVCAP_MAX_CLIP_PLANES:
2960 *pu32Val = SVGA3D_NUM_CLIPPLANES;
2961 break;
2962
2963 case SVGA3D_DEVCAP_VERTEX_SHADER_VERSION:
2964 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2965 *pu32Val = SVGA3DVSVERSION_40;
2966 else
2967 *pu32Val = SVGA3DVSVERSION_30;
2968 break;
2969
2970 case SVGA3D_DEVCAP_VERTEX_SHADER:
2971 *pu32Val = 1;
2972 break;
2973
2974 case SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION:
2975 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2976 *pu32Val = SVGA3DPSVERSION_40;
2977 else
2978 *pu32Val = SVGA3DPSVERSION_30;
2979 break;
2980
2981 case SVGA3D_DEVCAP_FRAGMENT_SHADER:
2982 *pu32Val = 1;
2983 break;
2984
2985 case SVGA3D_DEVCAP_MAX_RENDER_TARGETS:
2986 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2987 *pu32Val = 8;
2988 else
2989 *pu32Val = 4;
2990 break;
2991
2992 case SVGA3D_DEVCAP_S23E8_TEXTURES:
2993 case SVGA3D_DEVCAP_S10E5_TEXTURES:
2994 /* Must be obsolete by now; surface format caps specify the same thing. */
2995 break;
2996
2997 case SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND:
2998 /* Obsolete */
2999 break;
3000
3001 /*
3002 * 2. The BUFFER_FORMAT capabilities are deprecated, and they always
3003 * return TRUE. Even on physical hardware that does not support
3004 * these formats natively, the SVGA3D device will provide an emulation
3005 * which should be invisible to the guest OS.
3006 */
3007 case SVGA3D_DEVCAP_D16_BUFFER_FORMAT:
3008 case SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT:
3009 case SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT:
3010 *pu32Val = 1;
3011 break;
3012
3013 case SVGA3D_DEVCAP_QUERY_TYPES:
3014 /* Obsolete */
3015 break;
3016
3017 case SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING:
3018 /* Obsolete */
3019 break;
3020
3021 case SVGA3D_DEVCAP_MAX_POINT_SIZE:
3022 AssertCompile(sizeof(uint32_t) == sizeof(float));
3023 *(float *)pu32Val = 256.0f; /* VGPU9. Not applicable to DX11. */
3024 break;
3025
3026 case SVGA3D_DEVCAP_MAX_SHADER_TEXTURES:
3027 /* Obsolete */
3028 break;
3029
3030 case SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH:
3031 case SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT:
3032 if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
3033 *pu32Val = 16384;
3034 else if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3035 *pu32Val = 8192;
3036 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
3037 *pu32Val = 4096;
3038 else
3039 *pu32Val = 2048;
3040 break;
3041
3042 case SVGA3D_DEVCAP_MAX_VOLUME_EXTENT:
3043 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3044 *pu32Val = 2048;
3045 else
3046 *pu32Val = 256;
3047 break;
3048
3049 case SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT:
3050 if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
3051 *pu32Val = 16384;
3052 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
3053 *pu32Val = 8192;
3054 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
3055 *pu32Val = 2048;
3056 else
3057 *pu32Val = 128;
3058 break;
3059
3060 case SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO:
3061 /* Obsolete */
3062 break;
3063
3064 case SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY:
3065 if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
3066 *pu32Val = D3D11_REQ_MAXANISOTROPY;
3067 else
3068 *pu32Val = 2; // D3D_FL9_1_DEFAULT_MAX_ANISOTROPY;
3069 break;
3070
3071 case SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT:
3072 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3073 *pu32Val = UINT32_MAX;
3074 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
3075 *pu32Val = 1048575; // D3D_FL9_2_IA_PRIMITIVE_MAX_COUNT;
3076 else
3077 *pu32Val = 65535; // D3D_FL9_1_IA_PRIMITIVE_MAX_COUNT;
3078 break;
3079
3080 case SVGA3D_DEVCAP_MAX_VERTEX_INDEX:
3081 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3082 *pu32Val = UINT32_MAX;
3083 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
3084 *pu32Val = 1048575;
3085 else
3086 *pu32Val = 65534;
3087 break;
3088
3089 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS:
3090 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3091 *pu32Val = UINT32_MAX;
3092 else
3093 *pu32Val = 512;
3094 break;
3095
3096 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS:
3097 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3098 *pu32Val = UINT32_MAX;
3099 else
3100 *pu32Val = 512;
3101 break;
3102
3103 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS:
3104 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3105 *pu32Val = 4096;
3106 else
3107 *pu32Val = 32;
3108 break;
3109
3110 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS:
3111 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3112 *pu32Val = 4096;
3113 else
3114 *pu32Val = 32;
3115 break;
3116
3117 case SVGA3D_DEVCAP_TEXTURE_OPS:
3118 /* Obsolete */
3119 break;
3120
3121 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8:
3122 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8:
3123 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10:
3124 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5:
3125 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5:
3126 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4:
3127 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5:
3128 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16:
3129 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8:
3130 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8:
3131 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8:
3132 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16:
3133 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8:
3134 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8:
3135 case SVGA3D_DEVCAP_SURFACEFMT_DXT1:
3136 case SVGA3D_DEVCAP_SURFACEFMT_DXT2:
3137 case SVGA3D_DEVCAP_SURFACEFMT_DXT3:
3138 case SVGA3D_DEVCAP_SURFACEFMT_DXT4:
3139 case SVGA3D_DEVCAP_SURFACEFMT_DXT5:
3140 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8:
3141 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10:
3142 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8:
3143 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8:
3144 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8:
3145 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5:
3146 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8:
3147 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5:
3148 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8:
3149 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5:
3150 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8:
3151 case SVGA3D_DEVCAP_SURFACEFMT_V16U16:
3152 case SVGA3D_DEVCAP_SURFACEFMT_G16R16:
3153 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16:
3154 case SVGA3D_DEVCAP_SURFACEFMT_UYVY:
3155 case SVGA3D_DEVCAP_SURFACEFMT_YUY2:
3156 case SVGA3D_DEVCAP_SURFACEFMT_NV12:
3157 case SVGA3D_DEVCAP_DEAD10: /* SVGA3D_DEVCAP_SURFACEFMT_AYUV */
3158 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16:
3159 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24:
3160 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT:
3161 case SVGA3D_DEVCAP_SURFACEFMT_ATI1:
3162 case SVGA3D_DEVCAP_SURFACEFMT_ATI2:
3163 case SVGA3D_DEVCAP_SURFACEFMT_YV12:
3164 {
3165 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapSurfaceFmt2Format(idx3dCaps);
3166 rc = vmsvgaDXCheckFormatSupportPreDX(pState, enmFormat, pu32Val);
3167 break;
3168 }
3169
3170 case SVGA3D_DEVCAP_MISSING62:
3171 /* Unused */
3172 break;
3173
3174 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES:
3175 /* Obsolete */
3176 break;
3177
3178 case SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS:
3179 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3180 *pu32Val = 8;
3181 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
3182 *pu32Val = 4; // D3D_FL9_3_SIMULTANEOUS_RENDER_TARGET_COUNT
3183 else
3184 *pu32Val = 1; // D3D_FL9_1_SIMULTANEOUS_RENDER_TARGET_COUNT
3185 break;
3186
3187 case SVGA3D_DEVCAP_DEAD4: /* SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES */
3188 case SVGA3D_DEVCAP_DEAD5: /* SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES */
3189 *pu32Val = (1 << (2-1)) | (1 << (4-1)) | (1 << (8-1)); /* 2x, 4x, 8x */
3190 break;
3191
3192 case SVGA3D_DEVCAP_DEAD7: /* SVGA3D_DEVCAP_ALPHATOCOVERAGE */
3193 /* Obsolete */
3194 break;
3195
3196 case SVGA3D_DEVCAP_DEAD6: /* SVGA3D_DEVCAP_SUPERSAMPLE */
3197 /* Obsolete */
3198 break;
3199
3200 case SVGA3D_DEVCAP_AUTOGENMIPMAPS:
3201 *pu32Val = 1;
3202 break;
3203
3204 case SVGA3D_DEVCAP_MAX_CONTEXT_IDS:
3205 *pu32Val = SVGA3D_MAX_CONTEXT_IDS;
3206 break;
3207
3208 case SVGA3D_DEVCAP_MAX_SURFACE_IDS:
3209 *pu32Val = SVGA3D_MAX_SURFACE_IDS;
3210 break;
3211
3212 case SVGA3D_DEVCAP_DEAD1:
3213 /* Obsolete */
3214 break;
3215
3216 case SVGA3D_DEVCAP_DEAD8: /* SVGA3D_DEVCAP_VIDEO_DECODE */
3217 /* Obsolete */
3218 break;
3219
3220 case SVGA3D_DEVCAP_DEAD9: /* SVGA3D_DEVCAP_VIDEO_PROCESS */
3221 /* Obsolete */
3222 break;
3223
3224 case SVGA3D_DEVCAP_LINE_AA:
3225 *pu32Val = 1;
3226 break;
3227
3228 case SVGA3D_DEVCAP_LINE_STIPPLE:
3229 *pu32Val = 0; /* DX11 does not seem to support this directly. */
3230 break;
3231
3232 case SVGA3D_DEVCAP_MAX_LINE_WIDTH:
3233 AssertCompile(sizeof(uint32_t) == sizeof(float));
3234 *(float *)pu32Val = 1.0f;
3235 break;
3236
3237 case SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH:
3238 AssertCompile(sizeof(uint32_t) == sizeof(float));
3239 *(float *)pu32Val = 1.0f;
3240 break;
3241
3242 case SVGA3D_DEVCAP_DEAD3: /* Old SVGA3D_DEVCAP_LOGICOPS */
3243 /* Deprecated. */
3244 AssertCompile(SVGA3D_DEVCAP_DEAD3 == 92); /* Newer SVGA headers redefine this. */
3245 break;
3246
3247 case SVGA3D_DEVCAP_TS_COLOR_KEY:
3248 *pu32Val = 0; /* DX11 does not seem to support this directly. */
3249 break;
3250
3251 case SVGA3D_DEVCAP_DEAD2:
3252 break;
3253
3254 case SVGA3D_DEVCAP_DXCONTEXT:
3255 *pu32Val = 1;
3256 break;
3257
3258 case SVGA3D_DEVCAP_DEAD11: /* SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE */
3259 *pu32Val = D3D11_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION;
3260 break;
3261
3262 case SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS:
3263 *pu32Val = D3D11_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT;
3264 break;
3265
3266 case SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS:
3267 *pu32Val = D3D11_COMMONSHADER_CONSTANT_BUFFER_HW_SLOT_COUNT;
3268 break;
3269
3270 case SVGA3D_DEVCAP_DX_PROVOKING_VERTEX:
3271 *pu32Val = 0; /* boolean */
3272 break;
3273
3274 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8:
3275 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8:
3276 case SVGA3D_DEVCAP_DXFMT_R5G6B5:
3277 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5:
3278 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5:
3279 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4:
3280 case SVGA3D_DEVCAP_DXFMT_Z_D32:
3281 case SVGA3D_DEVCAP_DXFMT_Z_D16:
3282 case SVGA3D_DEVCAP_DXFMT_Z_D24S8:
3283 case SVGA3D_DEVCAP_DXFMT_Z_D15S1:
3284 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8:
3285 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4:
3286 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16:
3287 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8:
3288 case SVGA3D_DEVCAP_DXFMT_DXT1:
3289 case SVGA3D_DEVCAP_DXFMT_DXT2:
3290 case SVGA3D_DEVCAP_DXFMT_DXT3:
3291 case SVGA3D_DEVCAP_DXFMT_DXT4:
3292 case SVGA3D_DEVCAP_DXFMT_DXT5:
3293 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8:
3294 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5:
3295 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8:
3296 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1:
3297 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5:
3298 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8:
3299 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10:
3300 case SVGA3D_DEVCAP_DXFMT_V8U8:
3301 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8:
3302 case SVGA3D_DEVCAP_DXFMT_CxV8U8:
3303 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8:
3304 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10:
3305 case SVGA3D_DEVCAP_DXFMT_ALPHA8:
3306 case SVGA3D_DEVCAP_DXFMT_R_S10E5:
3307 case SVGA3D_DEVCAP_DXFMT_R_S23E8:
3308 case SVGA3D_DEVCAP_DXFMT_RG_S10E5:
3309 case SVGA3D_DEVCAP_DXFMT_RG_S23E8:
3310 case SVGA3D_DEVCAP_DXFMT_BUFFER:
3311 case SVGA3D_DEVCAP_DXFMT_Z_D24X8:
3312 case SVGA3D_DEVCAP_DXFMT_V16U16:
3313 case SVGA3D_DEVCAP_DXFMT_G16R16:
3314 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16:
3315 case SVGA3D_DEVCAP_DXFMT_UYVY:
3316 case SVGA3D_DEVCAP_DXFMT_YUY2:
3317 case SVGA3D_DEVCAP_DXFMT_NV12:
3318 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: /* SVGA3D_DEVCAP_DXFMT_AYUV */
3319 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS:
3320 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT:
3321 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT:
3322 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS:
3323 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT:
3324 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT:
3325 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT:
3326 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS:
3327 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT:
3328 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM:
3329 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT:
3330 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS:
3331 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT:
3332 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT:
3333 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS:
3334 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT:
3335 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24:
3336 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT:
3337 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS:
3338 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT:
3339 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT:
3340 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS:
3341 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM:
3342 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB:
3343 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT:
3344 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT:
3345 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS:
3346 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT:
3347 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT:
3348 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS:
3349 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT:
3350 case SVGA3D_DEVCAP_DXFMT_R32_UINT:
3351 case SVGA3D_DEVCAP_DXFMT_R32_SINT:
3352 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS:
3353 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT:
3354 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8:
3355 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT:
3356 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS:
3357 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM:
3358 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT:
3359 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT:
3360 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS:
3361 case SVGA3D_DEVCAP_DXFMT_R16_UNORM:
3362 case SVGA3D_DEVCAP_DXFMT_R16_UINT:
3363 case SVGA3D_DEVCAP_DXFMT_R16_SNORM:
3364 case SVGA3D_DEVCAP_DXFMT_R16_SINT:
3365 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS:
3366 case SVGA3D_DEVCAP_DXFMT_R8_UNORM:
3367 case SVGA3D_DEVCAP_DXFMT_R8_UINT:
3368 case SVGA3D_DEVCAP_DXFMT_R8_SNORM:
3369 case SVGA3D_DEVCAP_DXFMT_R8_SINT:
3370 case SVGA3D_DEVCAP_DXFMT_P8:
3371 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP:
3372 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM:
3373 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM:
3374 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS:
3375 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB:
3376 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS:
3377 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB:
3378 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS:
3379 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB:
3380 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS:
3381 case SVGA3D_DEVCAP_DXFMT_ATI1:
3382 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM:
3383 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS:
3384 case SVGA3D_DEVCAP_DXFMT_ATI2:
3385 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM:
3386 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM:
3387 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS:
3388 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB:
3389 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS:
3390 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB:
3391 case SVGA3D_DEVCAP_DXFMT_Z_DF16:
3392 case SVGA3D_DEVCAP_DXFMT_Z_DF24:
3393 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT:
3394 case SVGA3D_DEVCAP_DXFMT_YV12:
3395 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT:
3396 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT:
3397 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM:
3398 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT:
3399 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM:
3400 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM:
3401 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT:
3402 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM:
3403 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM:
3404 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT:
3405 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM:
3406 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT:
3407 case SVGA3D_DEVCAP_DXFMT_D16_UNORM:
3408 case SVGA3D_DEVCAP_DXFMT_A8_UNORM:
3409 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM:
3410 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM:
3411 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM:
3412 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM:
3413 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM:
3414 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM:
3415 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM:
3416 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM:
3417 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM:
3418 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS:
3419 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16:
3420 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16:
3421 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS:
3422 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM:
3423 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB:
3424 {
3425 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapDxfmt2Format(idx3dCaps);
3426 rc = vmsvgaDXCheckFormatSupport(pState, enmFormat, pu32Val);
3427 break;
3428 }
3429
3430 case SVGA3D_DEVCAP_SM41:
3431 *pu32Val = 0; /* boolean */
3432 break;
3433
3434 case SVGA3D_DEVCAP_MULTISAMPLE_2X:
3435 *pu32Val = 0; /* boolean */
3436 break;
3437
3438 case SVGA3D_DEVCAP_MULTISAMPLE_4X:
3439 *pu32Val = 0; /* boolean */
3440 break;
3441
3442 case SVGA3D_DEVCAP_MS_FULL_QUALITY:
3443 *pu32Val = 0; /* boolean */
3444 break;
3445
3446 case SVGA3D_DEVCAP_LOGICOPS:
3447 AssertCompile(SVGA3D_DEVCAP_LOGICOPS == 248);
3448 *pu32Val = 0; /* boolean */
3449 break;
3450
3451 case SVGA3D_DEVCAP_LOGIC_BLENDOPS:
3452 *pu32Val = 0; /* boolean */
3453 break;
3454
3455 case SVGA3D_DEVCAP_RESERVED_1:
3456 break;
3457
3458 case SVGA3D_DEVCAP_RESERVED_2:
3459 break;
3460
3461 case SVGA3D_DEVCAP_SM5:
3462 *pu32Val = 0; /* boolean */
3463 break;
3464
3465 case SVGA3D_DEVCAP_MULTISAMPLE_8X:
3466 *pu32Val = 0; /* boolean */
3467 break;
3468
3469 case SVGA3D_DEVCAP_MAX:
3470 case SVGA3D_DEVCAP_INVALID:
3471 rc = VERR_NOT_SUPPORTED;
3472 break;
3473 }
3474
3475 return rc;
3476}
3477
3478
3479static DECLCALLBACK(int) vmsvga3dBackChangeMode(PVGASTATECC pThisCC)
3480{
3481 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3482 AssertReturn(pState, VERR_INVALID_STATE);
3483
3484 return VINF_SUCCESS;
3485}
3486
3487
3488static DECLCALLBACK(int) vmsvga3dBackSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src,
3489 uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
3490{
3491 RT_NOREF(cCopyBoxes, pBox);
3492
3493 LogFunc(("src sid %d -> dst sid %d\n", src.sid, dest.sid));
3494
3495 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3496 AssertReturn(pState, VERR_INVALID_STATE);
3497
3498 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3499
3500 PVMSVGA3DSURFACE pSrcSurface;
3501 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, src.sid, &pSrcSurface);
3502 AssertRCReturn(rc, rc);
3503
3504 PVMSVGA3DSURFACE pDstSurface;
3505 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dest.sid, &pDstSurface);
3506 AssertRCReturn(rc, rc);
3507
3508 LogFunc(("src%s cid %d -> dst%s cid %d\n",
3509 pSrcSurface->pBackendSurface ? "" : " sysmem",
3510 pSrcSurface ? pSrcSurface->idAssociatedContext : SVGA_ID_INVALID,
3511 pDstSurface->pBackendSurface ? "" : " sysmem",
3512 pDstSurface ? pDstSurface->idAssociatedContext : SVGA_ID_INVALID));
3513
3514 //DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3515 //AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3516
3517 if (pSrcSurface->pBackendSurface)
3518 {
3519 if (pDstSurface->pBackendSurface == NULL)
3520 {
3521 /* Create the target if it can be used as a device context shared resource (render or screen target). */
3522 if (dxIsSurfaceShareable(pDstSurface))
3523 {
3524 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, NULL, pDstSurface);
3525 AssertRCReturn(rc, rc);
3526 }
3527 }
3528
3529 if (pDstSurface->pBackendSurface)
3530 {
3531 /* Surface -> Surface. */
3532 /* Expect both of them to be shared surfaces created by the backend context. */
3533 Assert(pSrcSurface->idAssociatedContext == DX_CID_BACKEND && pDstSurface->idAssociatedContext == DX_CID_BACKEND);
3534
3535 DXDEVICE *pDXDevice = &pBackend->device;
3536
3537 /* Clip the box. */
3538 PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
3539 rc = vmsvga3dMipmapLevel(pSrcSurface, src.face, src.mipmap, &pSrcMipLevel);
3540 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
3541
3542 PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
3543 rc = vmsvga3dMipmapLevel(pDstSurface, dest.face, dest.mipmap, &pDstMipLevel);
3544 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
3545
3546 SVGA3dCopyBox clipBox = *pBox;
3547 vmsvgaR3ClipCopyBox(&pSrcMipLevel->mipmapSize, &pDstMipLevel->mipmapSize, &clipBox);
3548
3549 UINT DstSubresource = vmsvga3dCalcSubresource(dest.mipmap, dest.face, pDstSurface->cLevels);
3550 UINT DstX = clipBox.x;
3551 UINT DstY = clipBox.y;
3552 UINT DstZ = clipBox.z;
3553
3554 UINT SrcSubresource = vmsvga3dCalcSubresource(src.mipmap, src.face, pSrcSurface->cLevels);
3555 D3D11_BOX SrcBox;
3556 SrcBox.left = clipBox.srcx;
3557 SrcBox.top = clipBox.srcy;
3558 SrcBox.front = clipBox.srcz;
3559 SrcBox.right = clipBox.srcx + clipBox.w;
3560 SrcBox.bottom = clipBox.srcy + clipBox.h;
3561 SrcBox.back = clipBox.srcz + clipBox.d;
3562
3563 Assert(cCopyBoxes == 1); /** @todo */
3564
3565 ID3D11Resource *pDstResource;
3566 ID3D11Resource *pSrcResource;
3567 pDstResource = dxResource(pState, pDstSurface, NULL);
3568 pSrcResource = dxResource(pState, pSrcSurface, NULL);
3569
3570 pDXDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3571 pSrcResource, SrcSubresource, &SrcBox);
3572
3573 pDstSurface->pBackendSurface->cidDrawing = DX_CID_BACKEND;
3574 }
3575 else
3576 {
3577 /* Surface -> Memory. */
3578 AssertFailed(); /** @todo implement */
3579 }
3580 }
3581 else
3582 {
3583 /* Memory -> Surface. */
3584 AssertFailed(); /** @todo implement */
3585 }
3586
3587 return rc;
3588}
3589
3590
3591static DECLCALLBACK(void) vmsvga3dBackUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
3592{
3593 RT_NOREF(pThisCC, idScreen, pOldViewport);
3594 /** @todo Scroll the screen content without requiring the guest to redraw. */
3595}
3596
3597
3598static DECLCALLBACK(int) vmsvga3dBackSurfaceUpdateHeapBuffers(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
3599{
3600 /** @todo */
3601 RT_NOREF(pThisCC, pSurface);
3602 return VERR_NOT_IMPLEMENTED;
3603}
3604
3605
3606/**
3607 * Create a new 3d context
3608 *
3609 * @returns VBox status code.
3610 * @param pThisCC The VGA/VMSVGA state for ring-3.
3611 * @param cid Context id
3612 */
3613static DECLCALLBACK(int) vmsvga3dBackContextDefine(PVGASTATECC pThisCC, uint32_t cid)
3614{
3615 RT_NOREF(cid);
3616
3617 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3618 AssertReturn(pState, VERR_INVALID_STATE);
3619
3620 AssertFailed();
3621 return VERR_NOT_IMPLEMENTED;
3622}
3623
3624
3625/**
3626 * Destroy an existing 3d context
3627 *
3628 * @returns VBox status code.
3629 * @param pThisCC The VGA/VMSVGA state for ring-3.
3630 * @param cid Context id
3631 */
3632static DECLCALLBACK(int) vmsvga3dBackContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
3633{
3634 RT_NOREF(cid);
3635
3636 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3637 AssertReturn(pState, VERR_INVALID_STATE);
3638
3639 AssertFailed();
3640 return VINF_SUCCESS;
3641}
3642
3643
3644static DECLCALLBACK(int) vmsvga3dBackSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
3645{
3646 RT_NOREF(cid, type, matrix);
3647
3648 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3649 AssertReturn(pState, VERR_INVALID_STATE);
3650
3651 AssertFailed();
3652 return VINF_SUCCESS;
3653}
3654
3655
3656static DECLCALLBACK(int) vmsvga3dBackSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
3657{
3658 RT_NOREF(cid, zRange);
3659
3660 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3661 AssertReturn(pState, VERR_INVALID_STATE);
3662
3663 AssertFailed();
3664 return VINF_SUCCESS;
3665}
3666
3667
3668static DECLCALLBACK(int) vmsvga3dBackSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
3669{
3670 RT_NOREF(cid, cRenderStates, pRenderState);
3671
3672 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3673 AssertReturn(pState, VERR_INVALID_STATE);
3674
3675 AssertFailed();
3676 return VINF_SUCCESS;
3677}
3678
3679
3680static DECLCALLBACK(int) vmsvga3dBackSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
3681{
3682 RT_NOREF(cid, type, target);
3683
3684 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3685 AssertReturn(pState, VERR_INVALID_STATE);
3686
3687 AssertFailed();
3688 return VINF_SUCCESS;
3689}
3690
3691
3692static DECLCALLBACK(int) vmsvga3dBackSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
3693{
3694 RT_NOREF(cid, cTextureStates, pTextureState);
3695
3696 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3697 AssertReturn(pState, VERR_INVALID_STATE);
3698
3699 AssertFailed();
3700 return VINF_SUCCESS;
3701}
3702
3703
3704static DECLCALLBACK(int) vmsvga3dBackSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
3705{
3706 RT_NOREF(cid, face, pMaterial);
3707
3708 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3709 AssertReturn(pState, VERR_INVALID_STATE);
3710
3711 AssertFailed();
3712 return VINF_SUCCESS;
3713}
3714
3715
3716static DECLCALLBACK(int) vmsvga3dBackSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
3717{
3718 RT_NOREF(cid, index, pData);
3719
3720 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3721 AssertReturn(pState, VERR_INVALID_STATE);
3722
3723 AssertFailed();
3724 return VINF_SUCCESS;
3725}
3726
3727
3728static DECLCALLBACK(int) vmsvga3dBackSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
3729{
3730 RT_NOREF(cid, index, enabled);
3731
3732 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3733 AssertReturn(pState, VERR_INVALID_STATE);
3734
3735 AssertFailed();
3736 return VINF_SUCCESS;
3737}
3738
3739
3740static DECLCALLBACK(int) vmsvga3dBackSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
3741{
3742 RT_NOREF(cid, pRect);
3743
3744 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3745 AssertReturn(pState, VERR_INVALID_STATE);
3746
3747 AssertFailed();
3748 return VINF_SUCCESS;
3749}
3750
3751
3752static DECLCALLBACK(int) vmsvga3dBackSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
3753{
3754 RT_NOREF(cid, index, plane);
3755
3756 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3757 AssertReturn(pState, VERR_INVALID_STATE);
3758
3759 AssertFailed();
3760 return VINF_SUCCESS;
3761}
3762
3763
3764static DECLCALLBACK(int) vmsvga3dBackCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth,
3765 uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
3766{
3767 /* From SVGA3D_BeginClear comments:
3768 *
3769 * Clear is not affected by clipping, depth test, or other
3770 * render state which affects the fragment pipeline.
3771 *
3772 * Therefore this code must ignore the current scissor rect.
3773 */
3774
3775 RT_NOREF(cid, clearFlag, color, depth, stencil, cRects, pRect);
3776
3777 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3778 AssertReturn(pState, VERR_INVALID_STATE);
3779
3780 AssertFailed();
3781 return VINF_SUCCESS;
3782}
3783
3784
3785static DECLCALLBACK(int) vmsvga3dBackDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl,
3786 uint32_t numRanges, SVGA3dPrimitiveRange *pRange,
3787 uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
3788{
3789 RT_NOREF(cid, numVertexDecls, pVertexDecl, numRanges, pRange, cVertexDivisor, pVertexDivisor);
3790
3791 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3792 AssertReturn(pState, VERR_INVALID_STATE);
3793
3794 AssertFailed();
3795 return VINF_SUCCESS;
3796}
3797
3798
3799static DECLCALLBACK(int) vmsvga3dBackSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
3800{
3801 RT_NOREF(cid, pRect);
3802
3803 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3804 AssertReturn(pState, VERR_INVALID_STATE);
3805
3806 AssertFailed();
3807 return VINF_SUCCESS;
3808}
3809
3810
3811static DECLCALLBACK(int) vmsvga3dBackGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
3812{
3813 RT_NOREF(sid, filter);
3814
3815 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3816 AssertReturn(pState, VERR_INVALID_STATE);
3817
3818 AssertFailed();
3819 return VINF_SUCCESS;
3820}
3821
3822
3823static DECLCALLBACK(int) vmsvga3dBackShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type,
3824 uint32_t cbData, uint32_t *pShaderData)
3825{
3826 RT_NOREF(cid, shid, type, cbData, pShaderData);
3827
3828 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3829 AssertReturn(pState, VERR_INVALID_STATE);
3830
3831 AssertFailed();
3832 return VINF_SUCCESS;
3833}
3834
3835
3836static DECLCALLBACK(int) vmsvga3dBackShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
3837{
3838 RT_NOREF(cid, shid, type);
3839
3840 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3841 AssertReturn(pState, VERR_INVALID_STATE);
3842
3843 AssertFailed();
3844 return VINF_SUCCESS;
3845}
3846
3847
3848static DECLCALLBACK(int) vmsvga3dBackShaderSet(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
3849{
3850 RT_NOREF(pContext, cid, type, shid);
3851
3852 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3853 AssertReturn(pState, VERR_INVALID_STATE);
3854
3855 AssertFailed();
3856 return VINF_SUCCESS;
3857}
3858
3859
3860static DECLCALLBACK(int) vmsvga3dBackShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type,
3861 SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
3862{
3863 RT_NOREF(cid, reg, type, ctype, cRegisters, pValues);
3864
3865 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3866 AssertReturn(pState, VERR_INVALID_STATE);
3867
3868 AssertFailed();
3869 return VINF_SUCCESS;
3870}
3871
3872
3873/**
3874 * Destroy backend specific surface bits (part of SVGA_3D_CMD_SURFACE_DESTROY).
3875 *
3876 * @param pThisCC The device context.
3877 * @param pSurface The surface being destroyed.
3878 */
3879static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
3880{
3881 RT_NOREF(pThisCC);
3882
3883 /* The caller should not use the function for system memory surfaces. */
3884 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3885 if (!pBackendSurface)
3886 return;
3887 pSurface->pBackendSurface = NULL;
3888
3889 LogFunc(("sid=%u\n", pSurface->id));
3890
3891 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3892 {
3893 D3D_RELEASE(pBackendSurface->pStagingTexture);
3894 D3D_RELEASE(pBackendSurface->pDynamicTexture);
3895 D3D_RELEASE(pBackendSurface->u.pTexture2D);
3896 }
3897 else if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE
3898 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_CUBE_TEXTURE)
3899 {
3900 D3D_RELEASE(pBackendSurface->pStagingTexture);
3901 D3D_RELEASE(pBackendSurface->pDynamicTexture);
3902 D3D_RELEASE(pBackendSurface->u.pTexture2D);
3903 }
3904 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3905 {
3906 D3D_RELEASE(pBackendSurface->pStagingTexture3D);
3907 D3D_RELEASE(pBackendSurface->pDynamicTexture3D);
3908 D3D_RELEASE(pBackendSurface->u.pTexture3D);
3909 }
3910 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3911 {
3912 D3D_RELEASE(pBackendSurface->u.pBuffer);
3913 }
3914 else
3915 {
3916 AssertFailed();
3917 }
3918
3919 RTMemFree(pBackendSurface);
3920
3921 /* No context has created the surface, because the surface does not exist anymore. */
3922 pSurface->idAssociatedContext = SVGA_ID_INVALID;
3923}
3924
3925
3926/**
3927 * Backend worker for implementing SVGA_3D_CMD_SURFACE_STRETCHBLT.
3928 *
3929 * @returns VBox status code.
3930 * @param pThis The VGA device instance.
3931 * @param pState The VMSVGA3d state.
3932 * @param pDstSurface The destination host surface.
3933 * @param uDstFace The destination face (valid).
3934 * @param uDstMipmap The destination mipmap level (valid).
3935 * @param pDstBox The destination box.
3936 * @param pSrcSurface The source host surface.
3937 * @param uSrcFace The destination face (valid).
3938 * @param uSrcMipmap The source mimap level (valid).
3939 * @param pSrcBox The source box.
3940 * @param enmMode The strecht blt mode .
3941 * @param pContext The VMSVGA3d context (already current for OGL).
3942 */
3943static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBlt(PVGASTATE pThis, PVMSVGA3DSTATE pState,
3944 PVMSVGA3DSURFACE pDstSurface, uint32_t uDstFace, uint32_t uDstMipmap, SVGA3dBox const *pDstBox,
3945 PVMSVGA3DSURFACE pSrcSurface, uint32_t uSrcFace, uint32_t uSrcMipmap, SVGA3dBox const *pSrcBox,
3946 SVGA3dStretchBltMode enmMode, PVMSVGA3DCONTEXT pContext)
3947{
3948 RT_NOREF(pThis, pState, pDstSurface, uDstFace, uDstMipmap, pDstBox,
3949 pSrcSurface, uSrcFace, uSrcMipmap, pSrcBox, enmMode, pContext);
3950
3951 AssertFailed();
3952 return VINF_SUCCESS;
3953}
3954
3955
3956/**
3957 * Backend worker for implementing SVGA_3D_CMD_SURFACE_DMA that copies one box.
3958 *
3959 * @returns Failure status code or @a rc.
3960 * @param pThis The shared VGA/VMSVGA instance data.
3961 * @param pThisCC The VGA/VMSVGA state for ring-3.
3962 * @param pState The VMSVGA3d state.
3963 * @param pSurface The host surface.
3964 * @param pMipLevel Mipmap level. The caller knows it already.
3965 * @param uHostFace The host face (valid).
3966 * @param uHostMipmap The host mipmap level (valid).
3967 * @param GuestPtr The guest pointer.
3968 * @param cbGuestPitch The guest pitch.
3969 * @param transfer The transfer direction.
3970 * @param pBox The box to copy (clipped, valid, except for guest's srcx, srcy, srcz).
3971 * @param pContext The context (for OpenGL).
3972 * @param rc The current rc for all boxes.
3973 * @param iBox The current box number (for Direct 3D).
3974 */
3975static DECLCALLBACK(int) vmsvga3dBackSurfaceDMACopyBox(PVGASTATE pThis, PVGASTATECC pThisCC, PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface,
3976 PVMSVGA3DMIPMAPLEVEL pMipLevel, uint32_t uHostFace, uint32_t uHostMipmap,
3977 SVGAGuestPtr GuestPtr, uint32_t cbGuestPitch, SVGA3dTransferType transfer,
3978 SVGA3dCopyBox const *pBox, PVMSVGA3DCONTEXT pContext, int rc, int iBox)
3979{
3980 RT_NOREF(pState, pMipLevel, pContext, iBox);
3981
3982 /* The called should not use the function for system memory surfaces. */
3983 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3984 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
3985
3986 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3987 {
3988 /** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
3989 AssertReturn(uHostFace == 0 && uHostMipmap == 0, VERR_INVALID_PARAMETER);
3990 AssertReturn(transfer == SVGA3D_WRITE_HOST_VRAM, VERR_NOT_IMPLEMENTED); /** @todo Implement */
3991
3992 uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
3993 uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
3994 Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
3995 Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
3996 uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3997 uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3998 AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
3999
4000 /* vmsvgaR3GmrTransfer verifies uGuestOffset.
4001 * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
4002 * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
4003 */
4004 uint64_t const uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
4005 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
4006
4007 SVGA3dSurfaceImageId image;
4008 image.sid = pSurface->id;
4009 image.face = uHostFace;
4010 image.mipmap = uHostMipmap;
4011
4012 SVGA3dBox box;
4013 box.x = pBox->x;
4014 box.y = pBox->y;
4015 box.z = 0;
4016 box.w = pBox->w;
4017 box.h = pBox->h;
4018 box.d = 1;
4019
4020 VMSVGA3D_MAPPED_SURFACE map;
4021 rc = vmsvga3dBackSurfaceMap(pThisCC, &image, &box, VMSVGA3D_SURFACE_MAP_WRITE_DISCARD, &map);
4022 if (RT_SUCCESS(rc))
4023 {
4024 /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
4025 * and offset of the first scanline.
4026 */
4027 uint32_t const cbLockedBuf = map.cbRowPitch * cBlocksY;
4028 uint8_t *pu8LockedBuf = (uint8_t *)map.pvData;
4029 uint32_t const offLockedBuf = 0;
4030
4031 rc = vmsvgaR3GmrTransfer(pThis,
4032 pThisCC,
4033 transfer,
4034 pu8LockedBuf,
4035 cbLockedBuf,
4036 offLockedBuf,
4037 map.cbRowPitch,
4038 GuestPtr,
4039 (uint32_t)uGuestOffset,
4040 cbGuestPitch,
4041 cBlocksX * pSurface->cbBlock,
4042 cBlocksY);
4043 AssertRC(rc);
4044
4045 // Log4(("first line:\n%.*Rhxd\n", cBlocksX * pSurface->cbBlock, LockedRect.pBits));
4046
4047 //vmsvga3dMapWriteBmpFile(&map, "Dynamic");
4048
4049 vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ true);
4050 }
4051#if 0
4052 //DEBUG_BREAKPOINT_TEST();
4053 rc = vmsvga3dBackSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
4054 if (RT_SUCCESS(rc))
4055 {
4056 vmsvga3dMapWriteBmpFile(&map, "Staging");
4057
4058 vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
4059 }
4060#endif
4061 }
4062 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
4063 {
4064 /** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
4065 AssertReturn(uHostFace == 0 && uHostMipmap == 0, VERR_INVALID_PARAMETER);
4066
4067 uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
4068 uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
4069 Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
4070 Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
4071 uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
4072 uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
4073 AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
4074
4075 /* vmsvgaR3GmrTransfer verifies uGuestOffset.
4076 * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
4077 * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
4078 */
4079 uint64_t const uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
4080 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
4081
4082 SVGA3dSurfaceImageId image;
4083 image.sid = pSurface->id;
4084 image.face = uHostFace;
4085 image.mipmap = uHostMipmap;
4086
4087 SVGA3dBox box;
4088 box.x = pBox->x;
4089 box.y = pBox->y;
4090 box.z = 0;
4091 box.w = pBox->w;
4092 box.h = pBox->h;
4093 box.d = 1;
4094
4095 VMSVGA3D_SURFACE_MAP const enmMap = transfer == SVGA3D_WRITE_HOST_VRAM
4096 ? VMSVGA3D_SURFACE_MAP_WRITE_DISCARD
4097 : VMSVGA3D_SURFACE_MAP_READ;
4098
4099 VMSVGA3D_MAPPED_SURFACE map;
4100 rc = vmsvga3dBackSurfaceMap(pThisCC, &image, &box, enmMap, &map);
4101 if (RT_SUCCESS(rc))
4102 {
4103 /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
4104 * and offset of the first scanline.
4105 */
4106 uint32_t const cbLockedBuf = map.cbRowPitch * cBlocksY;
4107 uint8_t *pu8LockedBuf = (uint8_t *)map.pvData;
4108 uint32_t const offLockedBuf = 0;
4109
4110 rc = vmsvgaR3GmrTransfer(pThis,
4111 pThisCC,
4112 transfer,
4113 pu8LockedBuf,
4114 cbLockedBuf,
4115 offLockedBuf,
4116 map.cbRowPitch,
4117 GuestPtr,
4118 (uint32_t)uGuestOffset,
4119 cbGuestPitch,
4120 cBlocksX * pSurface->cbBlock,
4121 cBlocksY);
4122 AssertRC(rc);
4123
4124 bool const fWritten = (transfer == SVGA3D_WRITE_HOST_VRAM);
4125 vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, fWritten);
4126 }
4127 }
4128 else
4129 {
4130 AssertMsgFailed(("Unsupported surface type %d\n", pBackendSurface->enmResType));
4131 rc = VERR_NOT_IMPLEMENTED;
4132 }
4133
4134 return rc;
4135}
4136
4137
4138/**
4139 * Create D3D/OpenGL texture object for the specified surface.
4140 *
4141 * Surfaces are created when needed.
4142 *
4143 * @param pThisCC The device context.
4144 * @param pContext The context.
4145 * @param idAssociatedContext Probably the same as pContext->id.
4146 * @param pSurface The surface to create the texture for.
4147 */
4148static DECLCALLBACK(int) vmsvga3dBackCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t idAssociatedContext,
4149 PVMSVGA3DSURFACE pSurface)
4150
4151{
4152 RT_NOREF(pThisCC, pContext, idAssociatedContext, pSurface);
4153
4154 AssertFailed();
4155 return VINF_SUCCESS;
4156}
4157
4158
4159static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryCreate(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4160{
4161 RT_NOREF(pThisCC, pContext);
4162 AssertFailed();
4163 return VINF_SUCCESS;
4164}
4165
4166
4167static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryBegin(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4168{
4169 RT_NOREF(pThisCC, pContext);
4170 AssertFailed();
4171 return VINF_SUCCESS;
4172}
4173
4174
4175static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryEnd(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4176{
4177 RT_NOREF(pThisCC, pContext);
4178 AssertFailed();
4179 return VINF_SUCCESS;
4180}
4181
4182
4183static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryGetData(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t *pu32Pixels)
4184{
4185 RT_NOREF(pThisCC, pContext);
4186 *pu32Pixels = 0;
4187 AssertFailed();
4188 return VINF_SUCCESS;
4189}
4190
4191
4192static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryDelete(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4193{
4194 RT_NOREF(pThisCC, pContext);
4195 AssertFailed();
4196 return VINF_SUCCESS;
4197}
4198
4199
4200/*
4201 * DX callbacks.
4202 */
4203
4204static DECLCALLBACK(int) vmsvga3dBackDXDefineContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4205{
4206 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4207
4208 /* Allocate a backend specific context structure. */
4209 PVMSVGA3DBACKENDDXCONTEXT pBackendDXContext = (PVMSVGA3DBACKENDDXCONTEXT)RTMemAllocZ(sizeof(VMSVGA3DBACKENDDXCONTEXT));
4210 AssertPtrReturn(pBackendDXContext, VERR_NO_MEMORY);
4211 pDXContext->pBackendDXContext = pBackendDXContext;
4212
4213 LogFunc(("cid %d\n", pDXContext->cid));
4214
4215 int rc = dxDeviceCreate(pBackend, &pBackendDXContext->device);
4216 return rc;
4217}
4218
4219
4220static DECLCALLBACK(int) vmsvga3dBackDXDestroyContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4221{
4222 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4223
4224 LogFunc(("cid %d\n", pDXContext->cid));
4225
4226 if (pDXContext->pBackendDXContext)
4227 {
4228 /* Clean up context resources. */
4229 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
4230
4231 if (pBackendDXContext->papRenderTargetView)
4232 DX_RELEASE_ARRAY(pBackendDXContext->cRenderTargetView, pBackendDXContext->papRenderTargetView);
4233 if (pBackendDXContext->papDepthStencilView)
4234 DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilView, pBackendDXContext->papDepthStencilView);
4235 if (pBackendDXContext->papShaderResourceView)
4236 DX_RELEASE_ARRAY(pBackendDXContext->cShaderResourceView, pBackendDXContext->papShaderResourceView);
4237 if (pBackendDXContext->paElementLayout)
4238 {
4239 for (uint32_t i = 0; i < pBackendDXContext->cElementLayout; ++i)
4240 D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
4241 }
4242 if (pBackendDXContext->papBlendState)
4243 DX_RELEASE_ARRAY(pBackendDXContext->cBlendState, pBackendDXContext->papBlendState);
4244 if (pBackendDXContext->papDepthStencilState)
4245 DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilState, pBackendDXContext->papDepthStencilState);
4246 if (pBackendDXContext->papRasterizerState)
4247 DX_RELEASE_ARRAY(pBackendDXContext->cRasterizerState, pBackendDXContext->papRasterizerState);
4248 if (pBackendDXContext->papSamplerState)
4249 DX_RELEASE_ARRAY(pBackendDXContext->cSamplerState, pBackendDXContext->papSamplerState);
4250 if (pBackendDXContext->papQuery)
4251 DX_RELEASE_ARRAY(pBackendDXContext->cQuery, pBackendDXContext->papQuery);
4252 if (pBackendDXContext->paShader)
4253 {
4254 for (uint32_t i = 0; i < pBackendDXContext->cShader; ++i)
4255 D3D_RELEASE(pBackendDXContext->paShader[i].pShader);
4256 }
4257
4258 RTMemFreeZ(pBackendDXContext->papBlendState, sizeof(pBackendDXContext->papBlendState[0]) * pBackendDXContext->cBlendState);
4259 RTMemFreeZ(pBackendDXContext->papDepthStencilState, sizeof(pBackendDXContext->papDepthStencilState[0]) * pBackendDXContext->cDepthStencilState);
4260 RTMemFreeZ(pBackendDXContext->papSamplerState, sizeof(pBackendDXContext->papSamplerState[0]) * pBackendDXContext->cSamplerState);
4261 RTMemFreeZ(pBackendDXContext->papRasterizerState, sizeof(pBackendDXContext->papRasterizerState[0]) * pBackendDXContext->cRasterizerState);
4262 RTMemFreeZ(pBackendDXContext->paElementLayout, sizeof(pBackendDXContext->paElementLayout[0]) * pBackendDXContext->cElementLayout);
4263 RTMemFreeZ(pBackendDXContext->papRenderTargetView, sizeof(pBackendDXContext->papRenderTargetView[0]) * pBackendDXContext->cRenderTargetView);
4264 RTMemFreeZ(pBackendDXContext->papDepthStencilView, sizeof(pBackendDXContext->papDepthStencilView[0]) * pBackendDXContext->cDepthStencilView);
4265 RTMemFreeZ(pBackendDXContext->papShaderResourceView, sizeof(pBackendDXContext->papShaderResourceView[0]) * pBackendDXContext->cShaderResourceView);
4266 RTMemFreeZ(pBackendDXContext->papQuery, sizeof(pBackendDXContext->papQuery[0]) * pBackendDXContext->cQuery);
4267 RTMemFreeZ(pBackendDXContext->paShader, sizeof(pBackendDXContext->paShader[0]) * pBackendDXContext->cShader);
4268
4269 /* Destroy backend surfaces which belong to this context. */
4270 /** @todo The context should have a list of surfaces (and also shared resources). */
4271 for (uint32_t sid = 0; sid < pThisCC->svga.p3dState->cSurfaces; ++sid)
4272 {
4273 PVMSVGA3DSURFACE const pSurface = pThisCC->svga.p3dState->papSurfaces[sid];
4274 if ( pSurface
4275 && pSurface->id == sid)
4276 {
4277 if (pSurface->idAssociatedContext == pDXContext->cid)
4278 {
4279 Assert(pSurface->pBackendSurface);
4280 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
4281 }
4282 else if (pSurface->idAssociatedContext == DX_CID_BACKEND)
4283 {
4284 /* May have shared resources in this context. */
4285 Assert(pSurface->pBackendSurface);
4286 DXSHAREDTEXTURE *pSharedTexture = (DXSHAREDTEXTURE *)RTAvlU32Get(&pSurface->pBackendSurface->SharedTextureTree, pDXContext->cid);
4287 if (pSharedTexture)
4288 {
4289 Assert(pSharedTexture->sid == sid);
4290 RTAvlU32Remove(&pSurface->pBackendSurface->SharedTextureTree, pDXContext->cid);
4291 D3D_RELEASE(pSharedTexture->pTexture);
4292 RTMemFreeZ(pSharedTexture, sizeof(*pSharedTexture));
4293 }
4294 }
4295 }
4296 }
4297
4298 dxDeviceDestroy(pBackend, &pBackendDXContext->device);
4299
4300 RTMemFreeZ(pBackendDXContext, sizeof(*pBackendDXContext));
4301 pDXContext->pBackendDXContext = NULL;
4302 }
4303 return VINF_SUCCESS;
4304}
4305
4306
4307static DECLCALLBACK(int) vmsvga3dBackDXBindContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4308{
4309 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4310 RT_NOREF(pBackend, pDXContext);
4311 return VINF_SUCCESS;
4312}
4313
4314
4315static DECLCALLBACK(int) vmsvga3dBackDXReadbackContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4316{
4317 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4318 RT_NOREF(pBackend, pDXContext);
4319 return VINF_SUCCESS;
4320}
4321
4322
4323static DECLCALLBACK(int) vmsvga3dBackDXInvalidateContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4324{
4325 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4326
4327 RT_NOREF(pBackend, pDXContext);
4328 AssertFailed(); /** @todo Implement */
4329 return VERR_NOT_IMPLEMENTED;
4330}
4331
4332
4333static DECLCALLBACK(int) vmsvga3dBackDXSetSingleConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t slot, SVGA3dShaderType type, SVGA3dSurfaceId sid, uint32_t offsetInBytes, uint32_t sizeInBytes)
4334{
4335 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4336 RT_NOREF(pBackend);
4337
4338 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4339 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4340
4341 if (sid == SVGA_ID_INVALID)
4342 {
4343 dxConstantBufferSet(pDevice, slot, type, NULL);
4344 return VINF_SUCCESS;
4345 }
4346
4347 PVMSVGA3DSURFACE pSurface;
4348 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
4349 AssertRCReturn(rc, rc);
4350
4351 uint32_t const cbSurface = pSurface->paMipmapLevels[0].cbSurface;
4352 ASSERT_GUEST_RETURN( offsetInBytes < cbSurface
4353 && sizeInBytes <= cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
4354
4355 if (pSurface->pBackendSurface == NULL)
4356 {
4357 /* Create the resource. */
4358 rc = vmsvga3dBackSurfaceCreateConstantBuffer(pThisCC, pDXContext, pSurface);
4359 AssertRCReturn(rc, rc);
4360 }
4361
4362 if (pSurface->fDirty)
4363 {
4364 /* Get mobid for the surface and read from the MOB. */
4365 SVGA3dSurfaceImageId imageId;
4366 imageId.sid = sid;
4367 imageId.face = 0;
4368 imageId.mipmap = 0;
4369
4370 SVGA3dPoint ptSrc;
4371 ptSrc.x = offsetInBytes / pSurface->cbBlock;
4372 ptSrc.y = 0;
4373 ptSrc.z = 0;
4374
4375 SVGA3dBox boxDst;
4376 boxDst.x = 0;
4377 boxDst.y = 0;
4378 boxDst.z = 0;
4379 boxDst.w = sizeInBytes / pSurface->cbBlock;
4380 boxDst.h = 1;
4381 boxDst.d = 1;
4382
4383 rc = vmsvgaR3UpdateGBSurfaceEx(pThisCC, &imageId, &boxDst, &ptSrc);
4384 AssertRCReturn(rc, rc);
4385 }
4386
4387 dxConstantBufferSet(pDevice, slot, type, pSurface->pBackendSurface->u.pBuffer);
4388 return VINF_SUCCESS;
4389}
4390
4391
4392static DECLCALLBACK(int) vmsvga3dBackDXSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startView, SVGA3dShaderType type, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
4393{
4394 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4395 RT_NOREF(pBackend);
4396
4397 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4398 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4399
4400 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
4401 ID3D11ShaderResourceView *papShaderResourceView[SVGA3D_DX_MAX_SRVIEWS];
4402 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
4403 {
4404 SVGA3dShaderResourceViewId shaderResourceViewId = paShaderResourceViewId[i];
4405 if (shaderResourceViewId != SVGA3D_INVALID_ID)
4406 {
4407 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->pBackendDXContext->cShaderResourceView, VERR_INVALID_PARAMETER);
4408 papShaderResourceView[i] = pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId];
4409 }
4410 else
4411 papShaderResourceView[i] = NULL;
4412
4413 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[startView + i] = shaderResourceViewId;
4414 }
4415
4416 dxShaderResourceViewSet(pDevice, type, startView, cShaderResourceViewId, papShaderResourceView);
4417 return VINF_SUCCESS;
4418}
4419
4420
4421static DECLCALLBACK(int) vmsvga3dBackDXSetShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type, PVMSVGA3DSHADER pShader)
4422{
4423 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4424 RT_NOREF(pBackend);
4425
4426 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4427 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4428
4429 DXSHADER *pDXShader;
4430 if (pShader)
4431 {
4432 pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
4433 Assert(pDXShader->enmShaderType >= SVGA3D_SHADERTYPE_MIN && pDXShader->enmShaderType < SVGA3D_SHADERTYPE_MAX);
4434 uint32_t const idxShaderState = pDXShader->enmShaderType - SVGA3D_SHADERTYPE_MIN;
4435 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId = pShader->id;
4436 }
4437 else
4438 pDXShader = NULL;
4439
4440 dxShaderSet(pDevice, type, pDXShader);
4441 return VINF_SUCCESS;
4442}
4443
4444
4445static DECLCALLBACK(int) vmsvga3dBackDXSetSamplers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startSampler, SVGA3dShaderType type, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
4446{
4447 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4448 RT_NOREF(pBackend);
4449
4450 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4451 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4452
4453 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
4454 ID3D11SamplerState *papSamplerState[SVGA3D_DX_MAX_SAMPLERS];
4455 for (uint32_t i = 0; i < cSamplerId; ++i)
4456 {
4457 SVGA3dSamplerId samplerId = paSamplerId[i];
4458 if (samplerId != SVGA3D_INVALID_ID)
4459 {
4460 ASSERT_GUEST_RETURN(samplerId < pDXContext->pBackendDXContext->cSamplerState, VERR_INVALID_PARAMETER);
4461 papSamplerState[i] = pDXContext->pBackendDXContext->papSamplerState[samplerId];
4462 }
4463 else
4464 papSamplerState[i] = NULL;
4465
4466 pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[startSampler + i] = samplerId;
4467 }
4468
4469 dxSamplerSet(pDevice, type, startSampler, cSamplerId, papSamplerState);
4470 return VINF_SUCCESS;
4471}
4472
4473
4474static DECLCALLBACK(int) vmsvga3dBackDXDraw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
4475{
4476 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4477 RT_NOREF(pBackend);
4478
4479 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4480 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4481
4482 if (pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN)
4483 pDevice->pImmediateContext->Draw(vertexCount, startVertexLocation);
4484 else
4485 {
4486 /*
4487 * Emulate SVGA3D_PRIMITIVE_TRIANGLEFAN using an indexed draw of a triangle list.
4488 */
4489
4490 /* Make sure that 16 bit indices are enough. 20000 ~= 65536 / 3 */
4491 AssertReturn(vertexCount <= 20000, VERR_NOT_SUPPORTED);
4492
4493 /* Generate indices. */
4494 UINT const IndexCount = 3 * (vertexCount - 2); /* 3_per_triangle * num_triangles */
4495 UINT const cbAlloc = IndexCount * sizeof(USHORT);
4496 USHORT *paIndices = (USHORT *)RTMemAlloc(cbAlloc);
4497 AssertReturn(paIndices, VERR_NO_MEMORY);
4498 USHORT iVertex = 1;
4499 for (UINT i = 0; i < IndexCount; i+= 3)
4500 {
4501 paIndices[i] = 0;
4502 paIndices[i + 1] = iVertex;
4503 ++iVertex;
4504 paIndices[i + 2] = iVertex;
4505 }
4506
4507 D3D11_SUBRESOURCE_DATA InitData;
4508 InitData.pSysMem = paIndices;
4509 InitData.SysMemPitch = cbAlloc;
4510 InitData.SysMemSlicePitch = cbAlloc;
4511
4512 D3D11_BUFFER_DESC bd;
4513 RT_ZERO(bd);
4514 bd.ByteWidth = cbAlloc;
4515 bd.Usage = D3D11_USAGE_IMMUTABLE;
4516 bd.BindFlags = D3D11_BIND_INDEX_BUFFER;
4517 //bd.CPUAccessFlags = 0;
4518 //bd.MiscFlags = 0;
4519 //bd.StructureByteStride = 0;
4520
4521 ID3D11Buffer *pIndexBuffer = 0;
4522 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, &InitData, &pIndexBuffer);
4523 Assert(SUCCEEDED(hr));RT_NOREF(hr);
4524
4525 /* Save the current index buffer. */
4526 ID3D11Buffer *pSavedIndexBuffer = 0;
4527 DXGI_FORMAT SavedFormat = DXGI_FORMAT_UNKNOWN;
4528 UINT SavedOffset = 0;
4529 pDevice->pImmediateContext->IAGetIndexBuffer(&pSavedIndexBuffer, &SavedFormat, &SavedOffset);
4530
4531 /* Set up the device state. */
4532 pDevice->pImmediateContext->IASetIndexBuffer(pIndexBuffer, DXGI_FORMAT_R16_UINT, 0);
4533 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
4534
4535 UINT const StartIndexLocation = 0;
4536 INT const BaseVertexLocation = startVertexLocation;
4537 pDevice->pImmediateContext->DrawIndexed(IndexCount, StartIndexLocation, BaseVertexLocation);
4538
4539 /* Restore the device state. */
4540 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
4541 pDevice->pImmediateContext->IASetIndexBuffer(pSavedIndexBuffer, SavedFormat, SavedOffset);
4542 D3D_RELEASE(pSavedIndexBuffer);
4543
4544 /* Cleanup. */
4545 D3D_RELEASE(pIndexBuffer);
4546 RTMemFree(paIndices);
4547 }
4548
4549 /* Note which surfaces are being drawn. */
4550 dxTrackRenderTargets(pThisCC, pDXContext);
4551
4552 return VINF_SUCCESS;
4553}
4554
4555
4556static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
4557{
4558 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4559 RT_NOREF(pBackend);
4560
4561 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4562 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4563
4564 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
4565
4566 pDevice->pImmediateContext->DrawIndexed(indexCount, startIndexLocation, baseVertexLocation);
4567
4568 /* Note which surfaces are being drawn. */
4569 dxTrackRenderTargets(pThisCC, pDXContext);
4570
4571 return VINF_SUCCESS;
4572}
4573
4574
4575static DECLCALLBACK(int) vmsvga3dBackDXDrawInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
4576 uint32_t vertexCountPerInstance, uint32_t instanceCount, uint32_t startVertexLocation, uint32_t startInstanceLocation)
4577{
4578 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4579 RT_NOREF(pBackend);
4580
4581 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4582 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4583
4584 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
4585
4586 pDevice->pImmediateContext->DrawInstanced(vertexCountPerInstance, instanceCount, startVertexLocation, startInstanceLocation);
4587
4588 /* Note which surfaces are being drawn. */
4589 dxTrackRenderTargets(pThisCC, pDXContext);
4590
4591 return VINF_SUCCESS;
4592}
4593
4594
4595static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
4596 uint32_t indexCountPerInstance, uint32_t instanceCount, uint32_t startIndexLocation, int32_t baseVertexLocation, uint32_t startInstanceLocation)
4597{
4598 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4599 RT_NOREF(pBackend);
4600
4601 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4602 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4603
4604 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
4605
4606 pDevice->pImmediateContext->DrawIndexedInstanced(indexCountPerInstance, instanceCount, startIndexLocation, baseVertexLocation, startInstanceLocation);
4607
4608 /* Note which surfaces are being drawn. */
4609 dxTrackRenderTargets(pThisCC, pDXContext);
4610
4611 return VINF_SUCCESS;
4612}
4613
4614
4615static DECLCALLBACK(int) vmsvga3dBackDXDrawAuto(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4616{
4617 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
4618 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4619
4620 RT_NOREF(pBackend, pDXContext);
4621 AssertFailed(); /** @todo Implement */
4622 return VERR_NOT_IMPLEMENTED;
4623}
4624
4625
4626static DECLCALLBACK(int) vmsvga3dBackDXSetInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
4627{
4628 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4629 RT_NOREF(pBackend);
4630
4631 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4632 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4633
4634 pDXContext->svgaDXContext.inputAssembly.layoutId = elementLayoutId;
4635
4636 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
4637 if (!pDXElementLayout->pElementLayout)
4638 {
4639 uint32_t const idxShaderState = SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN;
4640 uint32_t const shid = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
4641 AssertReturnStmt(shid < pDXContext->pBackendDXContext->cShader,
4642 LogRelMax(16, ("VMSVGA: DX shader is not set in DXSetInputLayout: shid = 0x%x\n", shid)),
4643 VERR_INVALID_STATE);
4644 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shid];
4645 AssertReturnStmt(pDXShader->pvDXBC,
4646 LogRelMax(16, ("VMSVGA: DX shader bytecode is not available in DXSetInputLayout: shid = %u\n", shid)),
4647 VERR_INVALID_STATE);
4648 HRESULT hr = pDevice->pDevice->CreateInputLayout(pDXElementLayout->aElementDesc,
4649 pDXElementLayout->cElementDesc,
4650 pDXShader->pvDXBC,
4651 pDXShader->cbDXBC,
4652 &pDXElementLayout->pElementLayout);
4653 AssertReturn(SUCCEEDED(hr), VERR_NO_MEMORY);
4654 }
4655
4656 pDevice->pImmediateContext->IASetInputLayout(pDXElementLayout->pElementLayout);
4657 return VINF_SUCCESS;
4658}
4659
4660
4661static DECLCALLBACK(int) vmsvga3dBackDXSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
4662{
4663 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4664 RT_NOREF(pBackend);
4665
4666 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4667 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4668
4669 /* For each paVertexBuffer[i]:
4670 * If the vertex buffer object does not exist then create it.
4671 * If the surface has been updated by the guest then update the buffer object.
4672 * Use IASetVertexBuffers to set the buffers.
4673 */
4674
4675 ID3D11Buffer *paResources[SVGA3D_DX_MAX_VERTEXBUFFERS];
4676 UINT paStride[SVGA3D_DX_MAX_VERTEXBUFFERS];
4677 UINT paOffset[SVGA3D_DX_MAX_VERTEXBUFFERS];
4678
4679 for (uint32_t i = 0; i < cVertexBuffer; ++i)
4680 {
4681 uint32_t const idxVertexBuffer = startBuffer + i;
4682
4683 /* Get corresponding resource. Create the buffer if does not yet exist. */
4684 if (paVertexBuffer[i].sid != SVGA_ID_INVALID)
4685 {
4686 PVMSVGA3DSURFACE pSurface;
4687 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paVertexBuffer[i].sid, &pSurface);
4688 AssertRCReturn(rc, rc);
4689
4690 if (pSurface->pBackendSurface == NULL)
4691 {
4692 /* Create the resource. */
4693 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC, pDXContext, pSurface);
4694 AssertRCReturn(rc, rc);
4695 }
4696
4697 if (pSurface->fDirty)
4698 {
4699 /* Get mobid for the surface and read from the MOB. */
4700 SVGA3dSurfaceImageId imageId;
4701 imageId.sid = paVertexBuffer[i].sid;
4702 imageId.face = 0;
4703 imageId.mipmap = 0;
4704
4705 SVGA3dBox box;
4706 box.x = 0;
4707 box.y = 0;
4708 box.z = 0;
4709 box.w = pSurface->paMipmapLevels[0].mipmapSize.width;
4710 box.h = 1;
4711 box.d = 1;
4712
4713 rc = vmsvgaR3UpdateGBSurface(pThisCC, &imageId, &box);
4714 AssertRCReturn(rc, rc);
4715 }
4716
4717 paResources[idxVertexBuffer] = pSurface->pBackendSurface->u.pBuffer;
4718 paStride[idxVertexBuffer] = paVertexBuffer[i].stride;
4719 paOffset[idxVertexBuffer] = paVertexBuffer[i].offset;
4720 }
4721 else
4722 {
4723 paResources[idxVertexBuffer] = NULL;
4724 paStride[idxVertexBuffer] = 0;
4725 paOffset[idxVertexBuffer] = 0;
4726 }
4727
4728 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].bufferId = paVertexBuffer[i].sid;
4729 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].stride = paVertexBuffer[i].stride;
4730 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].offset = paVertexBuffer[i].offset;
4731 }
4732
4733 pDevice->pImmediateContext->IASetVertexBuffers(startBuffer, cVertexBuffer,
4734 &paResources[startBuffer], &paStride[startBuffer], &paOffset[startBuffer]);
4735
4736 return VINF_SUCCESS;
4737}
4738
4739
4740static DECLCALLBACK(int) vmsvga3dBackDXSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId sid, SVGA3dSurfaceFormat format, uint32_t offset)
4741{
4742 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4743 RT_NOREF(pBackend);
4744
4745 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4746 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4747
4748 /* Get corresponding resource. Create the buffer if does not yet exist. */
4749 ID3D11Buffer *pResource;
4750 DXGI_FORMAT enmDxgiFormat;
4751
4752 if (sid != SVGA_ID_INVALID)
4753 {
4754 PVMSVGA3DSURFACE pSurface;
4755 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
4756 AssertRCReturn(rc, rc);
4757
4758 if (pSurface->pBackendSurface == NULL)
4759 {
4760 /* Create the resource. */
4761 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC, pDXContext, pSurface);
4762 AssertRCReturn(rc, rc);
4763 }
4764
4765 if (pSurface->fDirty)
4766 {
4767 /* Get mobid for the surface and read from the MOB. */
4768 SVGA3dSurfaceImageId imageId;
4769 imageId.sid = sid;
4770 imageId.face = 0;
4771 imageId.mipmap = 0;
4772
4773 SVGA3dBox box;
4774 box.x = 0;
4775 box.y = 0;
4776 box.z = 0;
4777 box.w = pSurface->paMipmapLevels[0].mipmapSize.width;
4778 box.h = 1;
4779 box.d = 1;
4780
4781 rc = vmsvgaR3UpdateGBSurface(pThisCC, &imageId, &box);
4782 AssertRCReturn(rc, rc);
4783 }
4784
4785 pResource = pSurface->pBackendSurface->u.pBuffer;
4786 enmDxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(format);
4787 AssertReturn(enmDxgiFormat == DXGI_FORMAT_R16_UINT || enmDxgiFormat == DXGI_FORMAT_R32_UINT, VERR_INVALID_PARAMETER);
4788 }
4789 else
4790 {
4791 pResource = NULL;
4792 enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
4793 }
4794
4795 pDevice->pImmediateContext->IASetIndexBuffer(pResource, enmDxgiFormat, offset);
4796 return VINF_SUCCESS;
4797}
4798
4799static D3D11_PRIMITIVE_TOPOLOGY dxTopology(SVGA3dPrimitiveType primitiveType)
4800{
4801 static D3D11_PRIMITIVE_TOPOLOGY const aD3D11PrimitiveTopology[SVGA3D_PRIMITIVE_MAX] =
4802 {
4803 D3D11_PRIMITIVE_TOPOLOGY_UNDEFINED,
4804 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST,
4805 D3D11_PRIMITIVE_TOPOLOGY_POINTLIST,
4806 D3D11_PRIMITIVE_TOPOLOGY_LINELIST,
4807 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP,
4808 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP,
4809 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP, /* SVGA3D_PRIMITIVE_TRIANGLEFAN: No FAN in D3D11. */
4810 D3D11_PRIMITIVE_TOPOLOGY_LINELIST_ADJ,
4811 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP_ADJ,
4812 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST_ADJ,
4813 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP_ADJ,
4814 D3D11_PRIMITIVE_TOPOLOGY_1_CONTROL_POINT_PATCHLIST,
4815 D3D11_PRIMITIVE_TOPOLOGY_2_CONTROL_POINT_PATCHLIST,
4816 D3D11_PRIMITIVE_TOPOLOGY_3_CONTROL_POINT_PATCHLIST,
4817 D3D11_PRIMITIVE_TOPOLOGY_4_CONTROL_POINT_PATCHLIST,
4818 D3D11_PRIMITIVE_TOPOLOGY_5_CONTROL_POINT_PATCHLIST,
4819 D3D11_PRIMITIVE_TOPOLOGY_6_CONTROL_POINT_PATCHLIST,
4820 D3D11_PRIMITIVE_TOPOLOGY_7_CONTROL_POINT_PATCHLIST,
4821 D3D11_PRIMITIVE_TOPOLOGY_8_CONTROL_POINT_PATCHLIST,
4822 D3D11_PRIMITIVE_TOPOLOGY_9_CONTROL_POINT_PATCHLIST,
4823 D3D11_PRIMITIVE_TOPOLOGY_10_CONTROL_POINT_PATCHLIST,
4824 D3D11_PRIMITIVE_TOPOLOGY_11_CONTROL_POINT_PATCHLIST,
4825 D3D11_PRIMITIVE_TOPOLOGY_12_CONTROL_POINT_PATCHLIST,
4826 D3D11_PRIMITIVE_TOPOLOGY_13_CONTROL_POINT_PATCHLIST,
4827 D3D11_PRIMITIVE_TOPOLOGY_14_CONTROL_POINT_PATCHLIST,
4828 D3D11_PRIMITIVE_TOPOLOGY_15_CONTROL_POINT_PATCHLIST,
4829 D3D11_PRIMITIVE_TOPOLOGY_16_CONTROL_POINT_PATCHLIST,
4830 D3D11_PRIMITIVE_TOPOLOGY_17_CONTROL_POINT_PATCHLIST,
4831 D3D11_PRIMITIVE_TOPOLOGY_18_CONTROL_POINT_PATCHLIST,
4832 D3D11_PRIMITIVE_TOPOLOGY_19_CONTROL_POINT_PATCHLIST,
4833 D3D11_PRIMITIVE_TOPOLOGY_20_CONTROL_POINT_PATCHLIST,
4834 D3D11_PRIMITIVE_TOPOLOGY_21_CONTROL_POINT_PATCHLIST,
4835 D3D11_PRIMITIVE_TOPOLOGY_22_CONTROL_POINT_PATCHLIST,
4836 D3D11_PRIMITIVE_TOPOLOGY_23_CONTROL_POINT_PATCHLIST,
4837 D3D11_PRIMITIVE_TOPOLOGY_24_CONTROL_POINT_PATCHLIST,
4838 D3D11_PRIMITIVE_TOPOLOGY_25_CONTROL_POINT_PATCHLIST,
4839 D3D11_PRIMITIVE_TOPOLOGY_26_CONTROL_POINT_PATCHLIST,
4840 D3D11_PRIMITIVE_TOPOLOGY_27_CONTROL_POINT_PATCHLIST,
4841 D3D11_PRIMITIVE_TOPOLOGY_28_CONTROL_POINT_PATCHLIST,
4842 D3D11_PRIMITIVE_TOPOLOGY_29_CONTROL_POINT_PATCHLIST,
4843 D3D11_PRIMITIVE_TOPOLOGY_30_CONTROL_POINT_PATCHLIST,
4844 D3D11_PRIMITIVE_TOPOLOGY_31_CONTROL_POINT_PATCHLIST,
4845 D3D11_PRIMITIVE_TOPOLOGY_32_CONTROL_POINT_PATCHLIST,
4846 };
4847 return aD3D11PrimitiveTopology[primitiveType];
4848}
4849
4850static DECLCALLBACK(int) vmsvga3dBackDXSetTopology(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dPrimitiveType topology)
4851{
4852 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4853 RT_NOREF(pBackend);
4854
4855 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4856 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4857
4858 D3D11_PRIMITIVE_TOPOLOGY const enmTopology = dxTopology(topology);
4859 pDevice->pImmediateContext->IASetPrimitiveTopology(enmTopology);
4860 return VINF_SUCCESS;
4861}
4862
4863
4864static DECLCALLBACK(int) vmsvga3dBackDXSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
4865{
4866 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4867 RT_NOREF(pBackend);
4868
4869 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4870 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4871
4872 ID3D11RenderTargetView *papRenderTargetViews[SVGA3D_MAX_RENDER_TARGETS];
4873 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
4874 {
4875 SVGA3dRenderTargetViewId const renderTargetViewId = paRenderTargetViewId[i];
4876 if (renderTargetViewId != SVGA3D_INVALID_ID)
4877 {
4878 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->pBackendDXContext->cRenderTargetView, VERR_INVALID_PARAMETER);
4879 papRenderTargetViews[i] = pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId];
4880 }
4881 else
4882 papRenderTargetViews[i] = NULL;
4883 }
4884
4885 ID3D11DepthStencilView *pDepthStencilView;
4886 if (depthStencilViewId != SVGA_ID_INVALID)
4887 pDepthStencilView = pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId];
4888 else
4889 pDepthStencilView = NULL;
4890
4891 pDevice->pImmediateContext->OMSetRenderTargets(cRenderTargetViewId, papRenderTargetViews, pDepthStencilView);
4892 return VINF_SUCCESS;
4893}
4894
4895
4896static DECLCALLBACK(int) vmsvga3dBackDXSetBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId, float const blendFactor[4], uint32_t sampleMask)
4897{
4898 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4899 RT_NOREF(pBackend);
4900
4901 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4902 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4903
4904 ID3D11BlendState *pBlendState = pDXContext->pBackendDXContext->papBlendState[blendId];
4905 pDevice->pImmediateContext->OMSetBlendState(pBlendState, blendFactor, sampleMask);
4906
4907 pDXContext->svgaDXContext.renderState.blendStateId = blendId;
4908 memcpy(pDXContext->svgaDXContext.renderState.blendFactor, blendFactor, sizeof(blendFactor));
4909 pDXContext->svgaDXContext.renderState.sampleMask = sampleMask;
4910
4911 return VINF_SUCCESS;
4912}
4913
4914
4915static DECLCALLBACK(int) vmsvga3dBackDXSetDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, uint32_t stencilRef)
4916{
4917 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4918 RT_NOREF(pBackend);
4919
4920 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4921 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4922
4923 ID3D11DepthStencilState *pDepthStencilState = pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId];
4924 pDevice->pImmediateContext->OMSetDepthStencilState(pDepthStencilState, stencilRef);
4925
4926 pDXContext->svgaDXContext.renderState.depthStencilStateId = depthStencilId;
4927 pDXContext->svgaDXContext.renderState.stencilRef = stencilRef;
4928
4929 return VINF_SUCCESS;
4930}
4931
4932
4933static DECLCALLBACK(int) vmsvga3dBackDXSetRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
4934{
4935 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4936 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4937 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4938
4939 RT_NOREF(pBackend);
4940
4941 pDevice->pImmediateContext->RSSetState(pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
4942 return VINF_SUCCESS;
4943}
4944
4945
4946static DECLCALLBACK(int) vmsvga3dBackDXDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4947{
4948 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4949
4950 RT_NOREF(pBackend, pDXContext);
4951 AssertFailed(); /** @todo Implement */
4952 return VERR_NOT_IMPLEMENTED;
4953}
4954
4955
4956static DECLCALLBACK(int) vmsvga3dBackDXDestroyQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4957{
4958 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4959
4960 RT_NOREF(pBackend, pDXContext);
4961 AssertFailed(); /** @todo Implement */
4962 return VERR_NOT_IMPLEMENTED;
4963}
4964
4965
4966static DECLCALLBACK(int) vmsvga3dBackDXBindQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4967{
4968 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4969
4970 RT_NOREF(pBackend, pDXContext);
4971 AssertFailed(); /** @todo Implement */
4972 return VERR_NOT_IMPLEMENTED;
4973}
4974
4975
4976static DECLCALLBACK(int) vmsvga3dBackDXSetQueryOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4977{
4978 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4979
4980 RT_NOREF(pBackend, pDXContext);
4981 AssertFailed(); /** @todo Implement */
4982 return VERR_NOT_IMPLEMENTED;
4983}
4984
4985
4986static DECLCALLBACK(int) vmsvga3dBackDXBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4987{
4988 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4989
4990 RT_NOREF(pBackend, pDXContext);
4991 AssertFailed(); /** @todo Implement */
4992 return VERR_NOT_IMPLEMENTED;
4993}
4994
4995
4996static DECLCALLBACK(int) vmsvga3dBackDXEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4997{
4998 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4999
5000 RT_NOREF(pBackend, pDXContext);
5001 AssertFailed(); /** @todo Implement */
5002 return VERR_NOT_IMPLEMENTED;
5003}
5004
5005
5006static DECLCALLBACK(int) vmsvga3dBackDXReadbackQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5007{
5008 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5009
5010 RT_NOREF(pBackend, pDXContext);
5011 AssertFailed(); /** @todo Implement */
5012 return VERR_NOT_IMPLEMENTED;
5013}
5014
5015
5016static DECLCALLBACK(int) vmsvga3dBackDXSetPredication(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5017{
5018 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5019
5020 RT_NOREF(pBackend, pDXContext);
5021 AssertFailed(); /** @todo Implement */
5022 return VERR_NOT_IMPLEMENTED;
5023}
5024
5025
5026static DECLCALLBACK(int) vmsvga3dBackDXSetSOTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5027{
5028 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5029
5030 RT_NOREF(pBackend, pDXContext);
5031 AssertFailed(); /** @todo Implement */
5032 return VERR_NOT_IMPLEMENTED;
5033}
5034
5035
5036static DECLCALLBACK(int) vmsvga3dBackDXSetViewports(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
5037{
5038 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5039 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5040 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5041
5042 RT_NOREF(pBackend);
5043
5044 /* D3D11_VIEWPORT is identical to SVGA3dViewport. */
5045 D3D11_VIEWPORT *pViewports = (D3D11_VIEWPORT *)paViewport;
5046
5047 pDevice->pImmediateContext->RSSetViewports(cViewport, pViewports);
5048 return VINF_SUCCESS;
5049}
5050
5051
5052static DECLCALLBACK(int) vmsvga3dBackDXSetScissorRects(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cRect, SVGASignedRect const *paRect)
5053{
5054 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5055 RT_NOREF(pBackend);
5056
5057 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5058 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5059
5060 /* D3D11_RECT is identical to SVGASignedRect. */
5061 D3D11_RECT *pRects = (D3D11_RECT *)paRect;
5062
5063 pDevice->pImmediateContext->RSSetScissorRects(cRect, pRects);
5064 return VINF_SUCCESS;
5065}
5066
5067
5068static DECLCALLBACK(int) vmsvga3dBackDXClearRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGA3dRGBAFloat const *pRGBA)
5069{
5070 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5071 RT_NOREF(pBackend);
5072
5073 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5074 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5075
5076 ID3D11RenderTargetView *pRenderTargetView = pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId];
5077 AssertReturn(pRenderTargetView, VERR_INVALID_STATE);
5078 pDevice->pImmediateContext->ClearRenderTargetView(pRenderTargetView, pRGBA->value);
5079 return VINF_SUCCESS;
5080}
5081
5082
5083static DECLCALLBACK(int) vmsvga3dBackDXClearDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t flags, SVGA3dDepthStencilViewId depthStencilViewId, float depth, uint8_t stencil)
5084{
5085 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5086 RT_NOREF(pBackend);
5087
5088 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5089 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5090
5091 ID3D11DepthStencilView *pDepthStencilView = pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId];
5092 AssertReturn(pDepthStencilView, VERR_INVALID_STATE);
5093 pDevice->pImmediateContext->ClearDepthStencilView(pDepthStencilView, flags, depth, stencil);
5094 return VINF_SUCCESS;
5095}
5096
5097
5098static DECLCALLBACK(int) vmsvga3dBackDXPredCopyRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dCopyBox const *pBox)
5099{
5100 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5101 RT_NOREF(pBackend);
5102
5103 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5104 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5105
5106 PVMSVGA3DSURFACE pSrcSurface;
5107 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
5108 AssertRCReturn(rc, rc);
5109
5110 PVMSVGA3DSURFACE pDstSurface;
5111 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
5112 AssertRCReturn(rc, rc);
5113
5114 if (pSrcSurface->pBackendSurface == NULL)
5115 {
5116 /* Create the resource. */
5117 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSrcSurface);
5118 AssertRCReturn(rc, rc);
5119 }
5120
5121 if (pDstSurface->pBackendSurface == NULL)
5122 {
5123 /* Create the resource. */
5124 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pDstSurface);
5125 AssertRCReturn(rc, rc);
5126 }
5127
5128 LogFunc(("cid %d: src cid %d%s -> dst cid %d%s\n",
5129 pDXContext->cid, pSrcSurface->idAssociatedContext,
5130 (pSrcSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "",
5131 pDstSurface->idAssociatedContext,
5132 (pDstSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : ""));
5133
5134 /* Clip the box. */
5135 /** @todo Use [src|dst]SubResource to index p[Src|Dst]Surface->paMipmapLevels array directly. */
5136 uint32_t iSrcFace;
5137 uint32_t iSrcMipmap;
5138 vmsvga3dCalcMipmapAndFace(pSrcSurface->cLevels, srcSubResource, &iSrcMipmap, &iSrcFace);
5139
5140 uint32_t iDstFace;
5141 uint32_t iDstMipmap;
5142 vmsvga3dCalcMipmapAndFace(pDstSurface->cLevels, dstSubResource, &iDstMipmap, &iDstFace);
5143
5144 PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
5145 rc = vmsvga3dMipmapLevel(pSrcSurface, iSrcFace, iSrcMipmap, &pSrcMipLevel);
5146 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
5147
5148 PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
5149 rc = vmsvga3dMipmapLevel(pDstSurface, iDstFace, iDstMipmap, &pDstMipLevel);
5150 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
5151
5152 SVGA3dCopyBox clipBox = *pBox;
5153 vmsvgaR3ClipCopyBox(&pSrcMipLevel->mipmapSize, &pDstMipLevel->mipmapSize, &clipBox);
5154
5155 UINT DstSubresource = dstSubResource;
5156 UINT DstX = clipBox.x;
5157 UINT DstY = clipBox.y;
5158 UINT DstZ = clipBox.z;
5159
5160 UINT SrcSubresource = srcSubResource;
5161 D3D11_BOX SrcBox;
5162 SrcBox.left = clipBox.srcx;
5163 SrcBox.top = clipBox.srcy;
5164 SrcBox.front = clipBox.srcz;
5165 SrcBox.right = clipBox.srcx + clipBox.w;
5166 SrcBox.bottom = clipBox.srcy + clipBox.h;
5167 SrcBox.back = clipBox.srcz + clipBox.d;
5168
5169 ID3D11Resource *pDstResource;
5170 ID3D11Resource *pSrcResource;
5171
5172 pDstResource = dxResource(pThisCC->svga.p3dState, pDstSurface, pDXContext);
5173 pSrcResource = dxResource(pThisCC->svga.p3dState, pSrcSurface, pDXContext);
5174
5175 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
5176 pSrcResource, SrcSubresource, &SrcBox);
5177
5178 pDstSurface->pBackendSurface->cidDrawing = pDXContext->cid;
5179 return VINF_SUCCESS;
5180}
5181
5182
5183static DECLCALLBACK(int) vmsvga3dBackDXPredCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5184{
5185 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5186
5187 RT_NOREF(pBackend, pDXContext);
5188 AssertFailed(); /** @todo Implement */
5189 return VERR_NOT_IMPLEMENTED;
5190}
5191
5192
5193static DECLCALLBACK(int) vmsvga3dBackDXPresentBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5194{
5195 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5196
5197 RT_NOREF(pBackend, pDXContext);
5198 AssertFailed(); /** @todo Implement */
5199 return VERR_NOT_IMPLEMENTED;
5200}
5201
5202
5203static DECLCALLBACK(int) vmsvga3dBackDXGenMips(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
5204{
5205 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5206 RT_NOREF(pBackend);
5207
5208 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5209 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5210
5211 ID3D11ShaderResourceView *pShaderResourceView = pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId];
5212 AssertReturn(pShaderResourceView, VERR_INVALID_STATE);
5213 pDevice->pImmediateContext->GenerateMips(pShaderResourceView);
5214 return VINF_SUCCESS;
5215}
5216
5217
5218static int dxDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
5219{
5220 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
5221 PVMSVGA3DSURFACE pSurface;
5222 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
5223 AssertRCReturn(rc, rc);
5224
5225 if (pSurface->pBackendSurface == NULL)
5226 {
5227 /* Create the actual texture. */
5228 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
5229 AssertRCReturn(rc, rc);
5230 }
5231
5232 HRESULT hr = dxShaderResourceViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId]);
5233 if (SUCCEEDED(hr))
5234 return VINF_SUCCESS;
5235 return VERR_INVALID_STATE;
5236}
5237
5238
5239static DECLCALLBACK(int) vmsvga3dBackDXDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
5240{
5241 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5242 RT_NOREF(pBackend);
5243
5244 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5245 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5246
5247 return dxDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pEntry);
5248}
5249
5250
5251static DECLCALLBACK(int) vmsvga3dBackDXDestroyShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
5252{
5253 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5254 RT_NOREF(pBackend);
5255
5256 D3D_RELEASE(pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId]);
5257 return VINF_SUCCESS;
5258}
5259
5260
5261static int dxDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
5262{
5263 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
5264 PVMSVGA3DSURFACE pSurface;
5265 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
5266 AssertRCReturn(rc, rc);
5267
5268 if (pSurface->pBackendSurface == NULL)
5269 {
5270 /* Create the actual texture. */
5271 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
5272 AssertRCReturn(rc, rc);
5273 }
5274
5275 HRESULT hr = dxRenderTargetViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId]);
5276 if (SUCCEEDED(hr))
5277 return VINF_SUCCESS;
5278
5279 return VERR_INVALID_STATE;
5280}
5281
5282
5283static DECLCALLBACK(int) vmsvga3dBackDXDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
5284{
5285 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5286 RT_NOREF(pBackend);
5287
5288 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5289 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5290
5291 return dxDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
5292}
5293
5294
5295static DECLCALLBACK(int) vmsvga3dBackDXDestroyRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId)
5296{
5297 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5298 RT_NOREF(pBackend);
5299
5300 D3D_RELEASE(pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId]);
5301 return VINF_SUCCESS;
5302}
5303
5304
5305static int dxDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
5306{
5307 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
5308 PVMSVGA3DSURFACE pSurface;
5309 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
5310 AssertRCReturn(rc, rc);
5311
5312 if ( pSurface->pBackendSurface != NULL
5313 && pDXContext->cid != pSurface->idAssociatedContext)
5314 {
5315 /* Supposed to be per context. */
5316//AssertFailed(); // test
5317 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
5318 }
5319
5320 if (pSurface->pBackendSurface == NULL)
5321 {
5322 /* Create the actual texture. */
5323 rc = vmsvga3dBackSurfaceCreateDepthStencilTexture(pThisCC, pDXContext, pSurface);
5324 AssertRCReturn(rc, rc);
5325 }
5326
5327 HRESULT hr = dxDepthStencilViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId]);
5328 if (SUCCEEDED(hr))
5329 return VINF_SUCCESS;
5330 return VERR_INVALID_STATE;
5331}
5332
5333static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
5334{
5335 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5336 RT_NOREF(pBackend);
5337
5338 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5339 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5340
5341 return dxDefineDepthStencilView(pThisCC, pDXContext, depthStencilViewId, pEntry);
5342}
5343
5344
5345static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId)
5346{
5347 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5348 RT_NOREF(pBackend);
5349
5350 D3D_RELEASE(pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId]);
5351 return VINF_SUCCESS;
5352}
5353
5354
5355static int dxDefineElementLayout(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
5356{
5357 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
5358 D3D_RELEASE(pDXElementLayout->pElementLayout);
5359
5360 /* Semantic name is not interpreted by D3D, therefore arbitrary names can be used
5361 * if they are consistent between the element layout and shader input signature.
5362 * "In general, data passed between pipeline stages is completely generic and is not uniquely
5363 * interpreted by the system; arbitrary semantics are allowed ..."
5364 *
5365 * However D3D runtime insists that "SemanticName string ("POSITIO1") cannot end with a number."
5366 *
5367 * System-Value semantics ("SV_*") between shaders require proper names of course.
5368 * But they are irrelevant for input attributes.
5369 */
5370 pDXElementLayout->cElementDesc = pEntry->numDescs;
5371 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
5372 {
5373 D3D11_INPUT_ELEMENT_DESC *pDst = &pDXElementLayout->aElementDesc[i];
5374 SVGA3dInputElementDesc const *pSrc = &pEntry->descs[i];
5375 pDst->SemanticName = "ATTRIB";
5376 pDst->SemanticIndex = i; /// @todo 'pSrc->inputRegister' is unused, maybe it should somehow.
5377 pDst->Format = vmsvgaDXSurfaceFormat2Dxgi(pSrc->format);
5378 AssertReturn(pDst->Format != DXGI_FORMAT_UNKNOWN, VERR_NOT_IMPLEMENTED);
5379 pDst->InputSlot = pSrc->inputSlot;
5380 pDst->AlignedByteOffset = pSrc->alignedByteOffset;
5381 pDst->InputSlotClass = (D3D11_INPUT_CLASSIFICATION)pSrc->inputSlotClass;
5382 pDst->InstanceDataStepRate = pSrc->instanceDataStepRate;
5383 }
5384
5385 return VINF_SUCCESS;
5386}
5387
5388
5389static DECLCALLBACK(int) vmsvga3dBackDXDefineElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
5390{
5391 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5392 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5393 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5394
5395 RT_NOREF(pBackend);
5396
5397 /* Not much can be done here because ID3D11Device::CreateInputLayout requires
5398 * a pShaderBytecodeWithInputSignature which is not known at this moment.
5399 * InputLayout object will be created in SVGA_3D_CMD_DX_SET_INPUT_LAYOUT.
5400 */
5401
5402 Assert(elementLayoutId == pEntry->elid);
5403
5404 return dxDefineElementLayout(pDXContext, elementLayoutId, pEntry);
5405}
5406
5407
5408static DECLCALLBACK(int) vmsvga3dBackDXDestroyElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5409{
5410 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5411
5412 RT_NOREF(pBackend, pDXContext);
5413 AssertFailed(); /** @todo Implement */
5414 return VERR_NOT_IMPLEMENTED;
5415}
5416
5417
5418static int dxDefineBlendState(PVMSVGA3DDXCONTEXT pDXContext,
5419 SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
5420{
5421 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5422 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5423
5424 HRESULT hr = dxBlendStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papBlendState[blendId]);
5425 if (SUCCEEDED(hr))
5426 return VINF_SUCCESS;
5427 return VERR_INVALID_STATE;
5428}
5429
5430static DECLCALLBACK(int) vmsvga3dBackDXDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
5431 SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
5432{
5433 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5434 RT_NOREF(pBackend);
5435
5436 return dxDefineBlendState(pDXContext, blendId, pEntry);
5437}
5438
5439
5440static DECLCALLBACK(int) vmsvga3dBackDXDestroyBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5441{
5442 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5443
5444 RT_NOREF(pBackend, pDXContext);
5445 AssertFailed(); /** @todo Implement */
5446 return VERR_NOT_IMPLEMENTED;
5447}
5448
5449
5450static int dxDefineDepthStencilState(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry const *pEntry)
5451{
5452 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5453 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5454
5455 HRESULT hr = dxDepthStencilStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
5456 if (SUCCEEDED(hr))
5457 return VINF_SUCCESS;
5458 return VERR_INVALID_STATE;
5459}
5460
5461
5462static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry const *pEntry)
5463{
5464 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5465 RT_NOREF(pBackend);
5466
5467 return dxDefineDepthStencilState(pDXContext, depthStencilId, pEntry);
5468}
5469
5470
5471static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5472{
5473 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5474
5475 RT_NOREF(pBackend, pDXContext);
5476 AssertFailed(); /** @todo Implement */
5477 return VERR_NOT_IMPLEMENTED;
5478}
5479
5480
5481static int dxDefineRasterizerState(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
5482{
5483 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5484 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5485
5486 HRESULT hr = dxRasterizerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
5487 if (SUCCEEDED(hr))
5488 return VINF_SUCCESS;
5489 return VERR_INVALID_STATE;
5490}
5491
5492
5493static DECLCALLBACK(int) vmsvga3dBackDXDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
5494{
5495 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5496 RT_NOREF(pBackend);
5497
5498 return dxDefineRasterizerState(pDXContext, rasterizerId, pEntry);
5499}
5500
5501
5502static DECLCALLBACK(int) vmsvga3dBackDXDestroyRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5503{
5504 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5505
5506 RT_NOREF(pBackend, pDXContext);
5507 AssertFailed(); /** @todo Implement */
5508 return VERR_NOT_IMPLEMENTED;
5509}
5510
5511
5512static int dxDefineSamplerState(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
5513{
5514 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5515 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5516
5517 HRESULT hr = dxSamplerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papSamplerState[samplerId]);
5518 if (SUCCEEDED(hr))
5519 return VINF_SUCCESS;
5520 return VERR_INVALID_STATE;
5521}
5522
5523
5524static DECLCALLBACK(int) vmsvga3dBackDXDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
5525{
5526 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5527 RT_NOREF(pBackend);
5528
5529 return dxDefineSamplerState(pDXContext, samplerId, pEntry);
5530}
5531
5532
5533static DECLCALLBACK(int) vmsvga3dBackDXDestroySamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5534{
5535 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5536
5537 RT_NOREF(pBackend, pDXContext);
5538 AssertFailed(); /** @todo Implement */
5539 return VERR_NOT_IMPLEMENTED;
5540}
5541
5542
5543
5544static int dxDefineShader(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGACOTableDXShaderEntry const *pEntry)
5545{
5546 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
5547 pDXShader->enmShaderType = pEntry->type;
5548
5549 PVMSVGA3DSHADER pShader = &pDXContext->paShader[shaderId];
5550 pShader->u.pvBackendShader = pDXShader;
5551
5552 return VINF_SUCCESS;
5553}
5554
5555
5556static DECLCALLBACK(int) vmsvga3dBackDXDefineShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGACOTableDXShaderEntry const *pEntry)
5557{
5558 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5559 RT_NOREF(pBackend);
5560
5561 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
5562 D3D_RELEASE(pDXShader->pShader);
5563
5564 return dxDefineShader(pDXContext, shaderId, pEntry);
5565}
5566
5567
5568static DECLCALLBACK(int) vmsvga3dBackDXDestroyShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5569{
5570 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5571
5572 RT_NOREF(pBackend, pDXContext);
5573 AssertFailed(); /** @todo Implement */
5574 return VERR_NOT_IMPLEMENTED;
5575}
5576
5577
5578static DECLCALLBACK(int) vmsvga3dBackDXBindShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader, void const *pvShaderBytecode)
5579{
5580 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5581 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5582 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5583
5584 RT_NOREF(pBackend);
5585
5586 int rc = VINF_SUCCESS;
5587
5588 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
5589 Assert(pDXShader->enmShaderType == pShader->type);
5590
5591 if (pDXShader->pvDXBC)
5592 {
5593 RTMemFree(pDXShader->pvDXBC);
5594 pDXShader->pvDXBC = NULL;
5595 pDXShader->cbDXBC = 0;
5596 }
5597
5598 if (pvShaderBytecode)
5599 {
5600#ifdef LOG_ENABLED
5601 Log(("Shader: cid=%u shid=%u type=%d:\n", pDXContext->cid, pShader->id, pDXShader->enmShaderType));
5602 uint8_t *pu8 = (uint8_t *)pvShaderBytecode;
5603 for (uint32_t i = 0; i < pShader->cbData; ++i)
5604 {
5605 if ((i % 16) == 0)
5606 {
5607 if (i > 0)
5608 Log((",\n"));
5609
5610 Log((" %#04x", pu8[i]));
5611 }
5612 else
5613 {
5614 Log((", %#04x", pu8[i]));
5615 }
5616 }
5617 Log(("\n"));
5618#endif
5619
5620 rc = DXShaderCreateDXBC(&pShader->shaderInfo, pvShaderBytecode, pShader->cbData, &pDXShader->pvDXBC, &pDXShader->cbDXBC);
5621 if (RT_SUCCESS(rc))
5622 {
5623#ifdef LOG_ENABLED
5624 if (pBackend->pfnD3DDisassemble && LogIs6Enabled())
5625 {
5626 ID3D10Blob *pBlob = 0;
5627 HRESULT hr2 = pBackend->pfnD3DDisassemble(pDXShader->pvDXBC, pDXShader->cbDXBC, 0, NULL, &pBlob);
5628 if (SUCCEEDED(hr2) && pBlob && pBlob->GetBufferSize())
5629 {
5630 Log6(("Shader: cid=%u shid=%u type=%d:\n%s\n",
5631 pDXContext->cid, pShader->id, pDXShader->enmShaderType, pBlob->GetBufferPointer()));
5632 }
5633 else
5634 AssertFailed();
5635 D3D_RELEASE(pBlob);
5636 }
5637#endif
5638
5639 HRESULT hr = dxShaderCreate(pDevice, pShader, pDXShader);
5640 if (SUCCEEDED(hr))
5641 {
5642 }
5643 else
5644 rc = VERR_INVALID_STATE;
5645 }
5646 else
5647 rc = VERR_NO_MEMORY;
5648 }
5649
5650 return rc;
5651}
5652
5653
5654static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5655{
5656 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5657
5658 RT_NOREF(pBackend, pDXContext);
5659 AssertFailed(); /** @todo Implement */
5660 return VERR_NOT_IMPLEMENTED;
5661}
5662
5663
5664static DECLCALLBACK(int) vmsvga3dBackDXDestroyStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5665{
5666 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5667
5668 RT_NOREF(pBackend, pDXContext);
5669 AssertFailed(); /** @todo Implement */
5670 return VERR_NOT_IMPLEMENTED;
5671}
5672
5673
5674static DECLCALLBACK(int) vmsvga3dBackDXSetStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5675{
5676 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5677
5678 RT_NOREF(pBackend, pDXContext);
5679 AssertFailed(); /** @todo Implement */
5680 return VERR_NOT_IMPLEMENTED;
5681}
5682
5683
5684static int dxCOTableRealloc(void **ppvCOTable, uint32_t *pcCOTable, uint32_t cbEntry, uint32_t cEntries)
5685{
5686 if (*pcCOTable != cEntries)
5687 {
5688 /* Grow/shrink the array. */
5689 if (cEntries)
5690 {
5691 void *pvNew = RTMemRealloc(*ppvCOTable, cEntries * cbEntry);
5692 AssertReturn(pvNew, VERR_NO_MEMORY);
5693 *ppvCOTable = pvNew;
5694 }
5695 else
5696 {
5697 RTMemFree(*ppvCOTable);
5698 *ppvCOTable = NULL;
5699 }
5700
5701 *pcCOTable = cEntries;
5702 }
5703
5704 if (*ppvCOTable)
5705 memset(*ppvCOTable, 0, cEntries * cbEntry);
5706
5707 return VINF_SUCCESS;
5708}
5709
5710static DECLCALLBACK(int) vmsvga3dBackDXSetCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableType type, uint32_t cValidEntries)
5711{
5712 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5713 RT_NOREF(pBackend);
5714
5715 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
5716
5717 int rc = VINF_SUCCESS;
5718
5719 /*
5720 * 1) Release current backend table, if exists;
5721 * 2) Reallocate memory for the new backend table;
5722 * 3) If cValidEntries is not zero, then re-define corresponding backend table elements.
5723 */
5724 switch (type)
5725 {
5726 case SVGA_COTABLE_RTVIEW:
5727 /* Clear current entries. */
5728 if (pBackendDXContext->papRenderTargetView)
5729 DX_RELEASE_ARRAY(pBackendDXContext->cRenderTargetView, pBackendDXContext->papRenderTargetView);
5730
5731 rc = dxCOTableRealloc((void **)&pBackendDXContext->papRenderTargetView, &pBackendDXContext->cRenderTargetView,
5732 sizeof(pBackendDXContext->papRenderTargetView[0]), pDXContext->cot.cRTView);
5733 AssertRCBreak(rc);
5734
5735 for (uint32_t i = 0; i < cValidEntries; ++i)
5736 {
5737 SVGACOTableDXRTViewEntry const *pEntry = &pDXContext->cot.paRTView[i];
5738 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
5739 continue; /* Skip uninitialized entry. */
5740
5741 dxDefineRenderTargetView(pThisCC, pDXContext, i, pEntry);
5742 }
5743 break;
5744 case SVGA_COTABLE_DSVIEW:
5745 if (pBackendDXContext->papDepthStencilView)
5746 DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilView, pBackendDXContext->papDepthStencilView);
5747
5748 rc = dxCOTableRealloc((void **)&pBackendDXContext->papDepthStencilView, &pBackendDXContext->cDepthStencilView,
5749 sizeof(pBackendDXContext->papDepthStencilView[0]), pDXContext->cot.cDSView);
5750 AssertRCBreak(rc);
5751
5752 for (uint32_t i = 0; i < cValidEntries; ++i)
5753 {
5754 SVGACOTableDXDSViewEntry const *pEntry = &pDXContext->cot.paDSView[i];
5755 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
5756 continue; /* Skip uninitialized entry. */
5757
5758 dxDefineDepthStencilView(pThisCC, pDXContext, i, pEntry);
5759 }
5760 break;
5761 case SVGA_COTABLE_SRVIEW:
5762 if (pBackendDXContext->papShaderResourceView)
5763 DX_RELEASE_ARRAY(pBackendDXContext->cShaderResourceView, pBackendDXContext->papShaderResourceView);
5764
5765 rc = dxCOTableRealloc((void **)&pBackendDXContext->papShaderResourceView, &pBackendDXContext->cShaderResourceView,
5766 sizeof(pBackendDXContext->papShaderResourceView[0]), pDXContext->cot.cSRView);
5767 AssertRCBreak(rc);
5768
5769 for (uint32_t i = 0; i < cValidEntries; ++i)
5770 {
5771 SVGACOTableDXSRViewEntry const *pEntry = &pDXContext->cot.paSRView[i];
5772 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
5773 continue; /* Skip uninitialized entry. */
5774
5775 dxDefineShaderResourceView(pThisCC, pDXContext, i, pEntry);
5776 }
5777 break;
5778 case SVGA_COTABLE_ELEMENTLAYOUT:
5779 if (pBackendDXContext->paElementLayout)
5780 {
5781 for (uint32_t i = 0; i < pBackendDXContext->cElementLayout; ++i)
5782 D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
5783 }
5784
5785 rc = dxCOTableRealloc((void **)&pBackendDXContext->paElementLayout, &pBackendDXContext->cElementLayout,
5786 sizeof(pBackendDXContext->paElementLayout[0]), pDXContext->cot.cElementLayout);
5787 AssertRCBreak(rc);
5788
5789 for (uint32_t i = 0; i < cValidEntries; ++i)
5790 {
5791 SVGACOTableDXElementLayoutEntry const *pEntry = &pDXContext->cot.paElementLayout[i];
5792 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
5793 continue; /* Skip uninitialized entry. */
5794
5795 dxDefineElementLayout(pDXContext, i, pEntry);
5796 }
5797 break;
5798 case SVGA_COTABLE_BLENDSTATE:
5799 if (pBackendDXContext->papBlendState)
5800 DX_RELEASE_ARRAY(pBackendDXContext->cBlendState, pBackendDXContext->papBlendState);
5801
5802 rc = dxCOTableRealloc((void **)&pBackendDXContext->papBlendState, &pBackendDXContext->cBlendState,
5803 sizeof(pBackendDXContext->papBlendState[0]), pDXContext->cot.cBlendState);
5804 AssertRCBreak(rc);
5805
5806 for (uint32_t i = 0; i < cValidEntries; ++i)
5807 {
5808 SVGACOTableDXBlendStateEntry const *pEntry = &pDXContext->cot.paBlendState[i];
5809 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
5810 continue; /* Skip uninitialized entry. */
5811
5812 dxDefineBlendState(pDXContext, i, pEntry);
5813 }
5814 break;
5815 case SVGA_COTABLE_DEPTHSTENCIL:
5816 if (pBackendDXContext->papDepthStencilState)
5817 DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilState, pBackendDXContext->papDepthStencilState);
5818
5819 rc = dxCOTableRealloc((void **)&pBackendDXContext->papDepthStencilState, &pBackendDXContext->cDepthStencilState,
5820 sizeof(pBackendDXContext->papDepthStencilState[0]), pDXContext->cot.cDepthStencil);
5821 AssertRCBreak(rc);
5822
5823 for (uint32_t i = 0; i < cValidEntries; ++i)
5824 {
5825 SVGACOTableDXDepthStencilEntry const *pEntry = &pDXContext->cot.paDepthStencil[i];
5826 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
5827 continue; /* Skip uninitialized entry. */
5828
5829 dxDefineDepthStencilState(pDXContext, i, pEntry);
5830 }
5831 break;
5832 case SVGA_COTABLE_RASTERIZERSTATE:
5833 if (pBackendDXContext->papRasterizerState)
5834 DX_RELEASE_ARRAY(pBackendDXContext->cRasterizerState, pBackendDXContext->papRasterizerState);
5835
5836 rc = dxCOTableRealloc((void **)&pBackendDXContext->papRasterizerState, &pBackendDXContext->cRasterizerState,
5837 sizeof(pBackendDXContext->papRasterizerState[0]), pDXContext->cot.cRasterizerState);
5838 AssertRCBreak(rc);
5839
5840 for (uint32_t i = 0; i < cValidEntries; ++i)
5841 {
5842 SVGACOTableDXRasterizerStateEntry const *pEntry = &pDXContext->cot.paRasterizerState[i];
5843 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
5844 continue; /* Skip uninitialized entry. */
5845
5846 dxDefineRasterizerState(pDXContext, i, pEntry);
5847 }
5848 break;
5849 case SVGA_COTABLE_SAMPLER:
5850 if (pBackendDXContext->papSamplerState)
5851 DX_RELEASE_ARRAY(pBackendDXContext->cSamplerState, pBackendDXContext->papSamplerState);
5852
5853 rc = dxCOTableRealloc((void **)&pBackendDXContext->papSamplerState, &pBackendDXContext->cSamplerState,
5854 sizeof(pBackendDXContext->papSamplerState[0]), pDXContext->cot.cSampler);
5855 AssertRCBreak(rc);
5856
5857 for (uint32_t i = 0; i < cValidEntries; ++i)
5858 {
5859 SVGACOTableDXSamplerEntry const *pEntry = &pDXContext->cot.paSampler[i];
5860 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
5861 continue; /* Skip uninitialized entry. */
5862
5863 dxDefineSamplerState(pDXContext, i, pEntry);
5864 }
5865 break;
5866 case SVGA_COTABLE_STREAMOUTPUT:
5867 //AssertFailed(); /** @todo Implement */
5868 break;
5869 case SVGA_COTABLE_DXQUERY:
5870 if (pBackendDXContext->papQuery)
5871 DX_RELEASE_ARRAY(pBackendDXContext->cQuery, pBackendDXContext->papQuery);
5872
5873 rc = dxCOTableRealloc((void **)&pBackendDXContext->papQuery, &pBackendDXContext->cQuery,
5874 sizeof(pBackendDXContext->papQuery[0]), pDXContext->cot.cQuery);
5875 AssertRCBreak(rc);
5876
5877 for (uint32_t i = 0; i < cValidEntries; ++i)
5878 {
5879 SVGACOTableDXQueryEntry const *pEntry = &pDXContext->cot.paQuery[i];
5880 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
5881 continue; /* Skip uninitialized entry. */
5882
5883 AssertFailed(); /** @todo implement */
5884 }
5885 break;
5886 case SVGA_COTABLE_DXSHADER:
5887 if (pBackendDXContext->paShader)
5888 {
5889 for (uint32_t i = 0; i < pBackendDXContext->cShader; ++i)
5890 D3D_RELEASE(pBackendDXContext->paShader[i].pShader);
5891 }
5892
5893 rc = dxCOTableRealloc((void **)&pBackendDXContext->paShader, &pBackendDXContext->cShader,
5894 sizeof(pBackendDXContext->paShader[0]), pDXContext->cot.cShader);
5895 AssertRCBreak(rc);
5896
5897 for (uint32_t i = 0; i < cValidEntries; ++i)
5898 {
5899 SVGACOTableDXShaderEntry const *pEntry = &pDXContext->cot.paShader[i];
5900 /** @todo The caller must verify the COTable content using same rules as when a new entry is defined. */
5901 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
5902 continue; /* Skip uninitialized entry. */
5903
5904 /** @todo this should be in the commd DX code (the caller). */
5905 PVMSVGA3DSHADER pShader = &pDXContext->paShader[i];
5906 pShader->id = i;
5907 pShader->cid = pDXContext->cid;
5908 pShader->type = pEntry->type;
5909 pShader->cbData = pEntry->sizeInBytes;
5910 pShader->pShaderProgram = NULL;
5911 pShader->u.pvBackendShader = NULL;
5912
5913 dxDefineShader(pDXContext, i, pEntry);
5914 }
5915 break;
5916 case SVGA_COTABLE_UAVIEW:
5917 AssertFailed(); /** @todo Implement */
5918 break;
5919 case SVGA_COTABLE_MAX: break; /* Compiler warning */
5920 }
5921 return rc;
5922}
5923
5924
5925static DECLCALLBACK(int) vmsvga3dBackDXBufferCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5926{
5927 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5928
5929 RT_NOREF(pBackend, pDXContext);
5930 AssertFailed(); /** @todo Implement */
5931 return VERR_NOT_IMPLEMENTED;
5932}
5933
5934
5935static DECLCALLBACK(int) vmsvga3dBackDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5936{
5937 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5938
5939 RT_NOREF(pBackend, pDXContext);
5940 AssertFailed(); /** @todo Implement */
5941 return VERR_NOT_IMPLEMENTED;
5942}
5943
5944
5945static DECLCALLBACK(int) vmsvga3dBackDXMoveQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5946{
5947 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5948
5949 RT_NOREF(pBackend, pDXContext);
5950 AssertFailed(); /** @todo Implement */
5951 return VERR_NOT_IMPLEMENTED;
5952}
5953
5954
5955static DECLCALLBACK(int) vmsvga3dBackDXBindAllQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5956{
5957 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5958
5959 RT_NOREF(pBackend, pDXContext);
5960 AssertFailed(); /** @todo Implement */
5961 return VERR_NOT_IMPLEMENTED;
5962}
5963
5964
5965static DECLCALLBACK(int) vmsvga3dBackDXReadbackAllQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5966{
5967 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5968
5969 RT_NOREF(pBackend, pDXContext);
5970 AssertFailed(); /** @todo Implement */
5971 return VERR_NOT_IMPLEMENTED;
5972}
5973
5974
5975static DECLCALLBACK(int) vmsvga3dBackDXMobFence64(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5976{
5977 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5978
5979 RT_NOREF(pBackend, pDXContext);
5980 AssertFailed(); /** @todo Implement */
5981 return VERR_NOT_IMPLEMENTED;
5982}
5983
5984
5985static DECLCALLBACK(int) vmsvga3dBackDXBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5986{
5987 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5988
5989 RT_NOREF(pBackend, pDXContext);
5990 AssertFailed(); /** @todo Implement */
5991 return VERR_NOT_IMPLEMENTED;
5992}
5993
5994
5995static DECLCALLBACK(int) vmsvga3dBackDXHint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5996{
5997 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5998
5999 RT_NOREF(pBackend, pDXContext);
6000 AssertFailed(); /** @todo Implement */
6001 return VERR_NOT_IMPLEMENTED;
6002}
6003
6004
6005static DECLCALLBACK(int) vmsvga3dBackDXBufferUpdate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6006{
6007 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6008
6009 RT_NOREF(pBackend, pDXContext);
6010 AssertFailed(); /** @todo Implement */
6011 return VERR_NOT_IMPLEMENTED;
6012}
6013
6014
6015static DECLCALLBACK(int) vmsvga3dBackDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6016{
6017 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6018
6019 RT_NOREF(pBackend, pDXContext);
6020 AssertFailed(); /** @todo Implement */
6021 return VERR_NOT_IMPLEMENTED;
6022}
6023
6024
6025static DECLCALLBACK(int) vmsvga3dBackDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6026{
6027 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6028
6029 RT_NOREF(pBackend, pDXContext);
6030 AssertFailed(); /** @todo Implement */
6031 return VERR_NOT_IMPLEMENTED;
6032}
6033
6034
6035static DECLCALLBACK(int) vmsvga3dBackDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6036{
6037 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6038
6039 RT_NOREF(pBackend, pDXContext);
6040 AssertFailed(); /** @todo Implement */
6041 return VERR_NOT_IMPLEMENTED;
6042}
6043
6044
6045static DECLCALLBACK(int) vmsvga3dBackDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6046{
6047 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6048
6049 RT_NOREF(pBackend, pDXContext);
6050 AssertFailed(); /** @todo Implement */
6051 return VERR_NOT_IMPLEMENTED;
6052}
6053
6054
6055static DECLCALLBACK(int) vmsvga3dBackDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6056{
6057 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6058
6059 RT_NOREF(pBackend, pDXContext);
6060 AssertFailed(); /** @todo Implement */
6061 return VERR_NOT_IMPLEMENTED;
6062}
6063
6064
6065static DECLCALLBACK(int) vmsvga3dBackDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6066{
6067 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6068
6069 RT_NOREF(pBackend, pDXContext);
6070 AssertFailed(); /** @todo Implement */
6071 return VERR_NOT_IMPLEMENTED;
6072}
6073
6074
6075static DECLCALLBACK(int) vmsvga3dBackDXCondBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6076{
6077 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6078
6079 RT_NOREF(pBackend, pDXContext);
6080 AssertFailed(); /** @todo Implement */
6081 return VERR_NOT_IMPLEMENTED;
6082}
6083
6084
6085static DECLCALLBACK(int) vmsvga3dBackScreenCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6086{
6087 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6088
6089 RT_NOREF(pBackend, pDXContext);
6090 AssertFailed(); /** @todo Implement */
6091 return VERR_NOT_IMPLEMENTED;
6092}
6093
6094
6095static DECLCALLBACK(int) vmsvga3dBackGrowOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6096{
6097 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6098
6099 RT_NOREF(pBackend, pDXContext);
6100 AssertFailed(); /** @todo Implement */
6101 return VERR_NOT_IMPLEMENTED;
6102}
6103
6104
6105static DECLCALLBACK(int) vmsvga3dBackDXGrowCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6106{
6107 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6108
6109 RT_NOREF(pBackend, pDXContext);
6110 AssertFailed(); /** @todo Implement */
6111 return VERR_NOT_IMPLEMENTED;
6112}
6113
6114
6115static DECLCALLBACK(int) vmsvga3dBackIntraSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6116{
6117 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6118
6119 RT_NOREF(pBackend, pDXContext);
6120 AssertFailed(); /** @todo Implement */
6121 return VERR_NOT_IMPLEMENTED;
6122}
6123
6124
6125static DECLCALLBACK(int) vmsvga3dBackDefineGBSurface_v3(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6126{
6127 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6128
6129 RT_NOREF(pBackend, pDXContext);
6130 AssertFailed(); /** @todo Implement */
6131 return VERR_NOT_IMPLEMENTED;
6132}
6133
6134
6135static DECLCALLBACK(int) vmsvga3dBackDXResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6136{
6137 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6138
6139 RT_NOREF(pBackend, pDXContext);
6140 AssertFailed(); /** @todo Implement */
6141 return VERR_NOT_IMPLEMENTED;
6142}
6143
6144
6145static DECLCALLBACK(int) vmsvga3dBackDXPredResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6146{
6147 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6148
6149 RT_NOREF(pBackend, pDXContext);
6150 AssertFailed(); /** @todo Implement */
6151 return VERR_NOT_IMPLEMENTED;
6152}
6153
6154
6155static DECLCALLBACK(int) vmsvga3dBackDXPredConvertRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6156{
6157 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6158
6159 RT_NOREF(pBackend, pDXContext);
6160 AssertFailed(); /** @todo Implement */
6161 return VERR_NOT_IMPLEMENTED;
6162}
6163
6164
6165static DECLCALLBACK(int) vmsvga3dBackDXPredConvert(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6166{
6167 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6168
6169 RT_NOREF(pBackend, pDXContext);
6170 AssertFailed(); /** @todo Implement */
6171 return VERR_NOT_IMPLEMENTED;
6172}
6173
6174
6175static DECLCALLBACK(int) vmsvga3dBackWholeSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6176{
6177 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6178
6179 RT_NOREF(pBackend, pDXContext);
6180 AssertFailed(); /** @todo Implement */
6181 return VERR_NOT_IMPLEMENTED;
6182}
6183
6184
6185static DECLCALLBACK(int) vmsvga3dBackDXDefineUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6186{
6187 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6188
6189 RT_NOREF(pBackend, pDXContext);
6190 AssertFailed(); /** @todo Implement */
6191 return VERR_NOT_IMPLEMENTED;
6192}
6193
6194
6195static DECLCALLBACK(int) vmsvga3dBackDXDestroyUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6196{
6197 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6198
6199 RT_NOREF(pBackend, pDXContext);
6200 AssertFailed(); /** @todo Implement */
6201 return VERR_NOT_IMPLEMENTED;
6202}
6203
6204
6205static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewUint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6206{
6207 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6208
6209 RT_NOREF(pBackend, pDXContext);
6210 AssertFailed(); /** @todo Implement */
6211 return VERR_NOT_IMPLEMENTED;
6212}
6213
6214
6215static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewFloat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6216{
6217 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6218
6219 RT_NOREF(pBackend, pDXContext);
6220 AssertFailed(); /** @todo Implement */
6221 return VERR_NOT_IMPLEMENTED;
6222}
6223
6224
6225static DECLCALLBACK(int) vmsvga3dBackDXCopyStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6226{
6227 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6228
6229 RT_NOREF(pBackend, pDXContext);
6230 AssertFailed(); /** @todo Implement */
6231 return VERR_NOT_IMPLEMENTED;
6232}
6233
6234
6235static DECLCALLBACK(int) vmsvga3dBackDXSetUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6236{
6237 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6238
6239 RT_NOREF(pBackend, pDXContext);
6240 AssertFailed(); /** @todo Implement */
6241 return VERR_NOT_IMPLEMENTED;
6242}
6243
6244
6245static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6246{
6247 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6248
6249 RT_NOREF(pBackend, pDXContext);
6250 AssertFailed(); /** @todo Implement */
6251 return VERR_NOT_IMPLEMENTED;
6252}
6253
6254
6255static DECLCALLBACK(int) vmsvga3dBackDXDrawInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6256{
6257 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6258
6259 RT_NOREF(pBackend, pDXContext);
6260 AssertFailed(); /** @todo Implement */
6261 return VERR_NOT_IMPLEMENTED;
6262}
6263
6264
6265static DECLCALLBACK(int) vmsvga3dBackDXDispatch(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6266{
6267 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6268
6269 RT_NOREF(pBackend, pDXContext);
6270 AssertFailed(); /** @todo Implement */
6271 return VERR_NOT_IMPLEMENTED;
6272}
6273
6274
6275static DECLCALLBACK(int) vmsvga3dBackDXDispatchIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6276{
6277 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6278
6279 RT_NOREF(pBackend, pDXContext);
6280 AssertFailed(); /** @todo Implement */
6281 return VERR_NOT_IMPLEMENTED;
6282}
6283
6284
6285static DECLCALLBACK(int) vmsvga3dBackWriteZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6286{
6287 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6288
6289 RT_NOREF(pBackend, pDXContext);
6290 AssertFailed(); /** @todo Implement */
6291 return VERR_NOT_IMPLEMENTED;
6292}
6293
6294
6295static DECLCALLBACK(int) vmsvga3dBackHintZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6296{
6297 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6298
6299 RT_NOREF(pBackend, pDXContext);
6300 AssertFailed(); /** @todo Implement */
6301 return VERR_NOT_IMPLEMENTED;
6302}
6303
6304
6305static DECLCALLBACK(int) vmsvga3dBackDXTransferToBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6306{
6307 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6308
6309 RT_NOREF(pBackend, pDXContext);
6310 AssertFailed(); /** @todo Implement */
6311 return VERR_NOT_IMPLEMENTED;
6312}
6313
6314
6315static DECLCALLBACK(int) vmsvga3dBackDXSetStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6316{
6317 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6318
6319 RT_NOREF(pBackend, pDXContext);
6320 AssertFailed(); /** @todo Implement */
6321 return VERR_NOT_IMPLEMENTED;
6322}
6323
6324
6325static DECLCALLBACK(int) vmsvga3dBackLogicOpsBitBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6326{
6327 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6328
6329 RT_NOREF(pBackend, pDXContext);
6330 AssertFailed(); /** @todo Implement */
6331 return VERR_NOT_IMPLEMENTED;
6332}
6333
6334
6335static DECLCALLBACK(int) vmsvga3dBackLogicOpsTransBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6336{
6337 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6338
6339 RT_NOREF(pBackend, pDXContext);
6340 AssertFailed(); /** @todo Implement */
6341 return VERR_NOT_IMPLEMENTED;
6342}
6343
6344
6345static DECLCALLBACK(int) vmsvga3dBackLogicOpsStretchBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6346{
6347 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6348
6349 RT_NOREF(pBackend, pDXContext);
6350 AssertFailed(); /** @todo Implement */
6351 return VERR_NOT_IMPLEMENTED;
6352}
6353
6354
6355static DECLCALLBACK(int) vmsvga3dBackLogicOpsColorFill(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6356{
6357 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6358
6359 RT_NOREF(pBackend, pDXContext);
6360 AssertFailed(); /** @todo Implement */
6361 return VERR_NOT_IMPLEMENTED;
6362}
6363
6364
6365static DECLCALLBACK(int) vmsvga3dBackLogicOpsAlphaBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6366{
6367 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6368
6369 RT_NOREF(pBackend, pDXContext);
6370 AssertFailed(); /** @todo Implement */
6371 return VERR_NOT_IMPLEMENTED;
6372}
6373
6374
6375static DECLCALLBACK(int) vmsvga3dBackLogicOpsClearTypeBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6376{
6377 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6378
6379 RT_NOREF(pBackend, pDXContext);
6380 AssertFailed(); /** @todo Implement */
6381 return VERR_NOT_IMPLEMENTED;
6382}
6383
6384
6385static DECLCALLBACK(int) vmsvga3dBackDefineGBSurface_v4(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6386{
6387 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6388
6389 RT_NOREF(pBackend, pDXContext);
6390 AssertFailed(); /** @todo Implement */
6391 return VERR_NOT_IMPLEMENTED;
6392}
6393
6394
6395static DECLCALLBACK(int) vmsvga3dBackDXSetCSUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6396{
6397 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6398
6399 RT_NOREF(pBackend, pDXContext);
6400 AssertFailed(); /** @todo Implement */
6401 return VERR_NOT_IMPLEMENTED;
6402}
6403
6404
6405static DECLCALLBACK(int) vmsvga3dBackDXSetMinLOD(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6406{
6407 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6408
6409 RT_NOREF(pBackend, pDXContext);
6410 AssertFailed(); /** @todo Implement */
6411 return VERR_NOT_IMPLEMENTED;
6412}
6413
6414
6415static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6416{
6417 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6418
6419 RT_NOREF(pBackend, pDXContext);
6420 AssertFailed(); /** @todo Implement */
6421 return VERR_NOT_IMPLEMENTED;
6422}
6423
6424
6425static DECLCALLBACK(int) vmsvga3dBackDXSetShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6426{
6427 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6428
6429 RT_NOREF(pBackend, pDXContext);
6430 AssertFailed(); /** @todo Implement */
6431 return VERR_NOT_IMPLEMENTED;
6432}
6433
6434
6435static DECLCALLBACK(int) vmsvga3dBackDXBindStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6436{
6437 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6438
6439 RT_NOREF(pBackend, pDXContext);
6440 AssertFailed(); /** @todo Implement */
6441 return VERR_NOT_IMPLEMENTED;
6442}
6443
6444
6445static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6446{
6447 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6448
6449 RT_NOREF(pBackend, pDXContext);
6450 AssertFailed(); /** @todo Implement */
6451 return VERR_NOT_IMPLEMENTED;
6452}
6453
6454
6455static DECLCALLBACK(int) vmsvga3dBackDXBindShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6456{
6457 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6458
6459 RT_NOREF(pBackend, pDXContext);
6460 AssertFailed(); /** @todo Implement */
6461 return VERR_NOT_IMPLEMENTED;
6462}
6463
6464
6465static DECLCALLBACK(int) vmsvga3dBackQueryInterface(PVGASTATECC pThisCC, char const *pszInterfaceName, void *pvInterfaceFuncs, size_t cbInterfaceFuncs)
6466{
6467 RT_NOREF(pThisCC);
6468
6469 int rc = VINF_SUCCESS;
6470 if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_DX) == 0)
6471 {
6472 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSDX))
6473 {
6474 if (pvInterfaceFuncs)
6475 {
6476 VMSVGA3DBACKENDFUNCSDX *p = (VMSVGA3DBACKENDFUNCSDX *)pvInterfaceFuncs;
6477 p->pfnDXDefineContext = vmsvga3dBackDXDefineContext;
6478 p->pfnDXDestroyContext = vmsvga3dBackDXDestroyContext;
6479 p->pfnDXBindContext = vmsvga3dBackDXBindContext;
6480 p->pfnDXReadbackContext = vmsvga3dBackDXReadbackContext;
6481 p->pfnDXInvalidateContext = vmsvga3dBackDXInvalidateContext;
6482 p->pfnDXSetSingleConstantBuffer = vmsvga3dBackDXSetSingleConstantBuffer;
6483 p->pfnDXSetShaderResources = vmsvga3dBackDXSetShaderResources;
6484 p->pfnDXSetShader = vmsvga3dBackDXSetShader;
6485 p->pfnDXSetSamplers = vmsvga3dBackDXSetSamplers;
6486 p->pfnDXDraw = vmsvga3dBackDXDraw;
6487 p->pfnDXDrawIndexed = vmsvga3dBackDXDrawIndexed;
6488 p->pfnDXDrawInstanced = vmsvga3dBackDXDrawInstanced;
6489 p->pfnDXDrawIndexedInstanced = vmsvga3dBackDXDrawIndexedInstanced;
6490 p->pfnDXDrawAuto = vmsvga3dBackDXDrawAuto;
6491 p->pfnDXSetInputLayout = vmsvga3dBackDXSetInputLayout;
6492 p->pfnDXSetVertexBuffers = vmsvga3dBackDXSetVertexBuffers;
6493 p->pfnDXSetIndexBuffer = vmsvga3dBackDXSetIndexBuffer;
6494 p->pfnDXSetTopology = vmsvga3dBackDXSetTopology;
6495 p->pfnDXSetRenderTargets = vmsvga3dBackDXSetRenderTargets;
6496 p->pfnDXSetBlendState = vmsvga3dBackDXSetBlendState;
6497 p->pfnDXSetDepthStencilState = vmsvga3dBackDXSetDepthStencilState;
6498 p->pfnDXSetRasterizerState = vmsvga3dBackDXSetRasterizerState;
6499 p->pfnDXDefineQuery = vmsvga3dBackDXDefineQuery;
6500 p->pfnDXDestroyQuery = vmsvga3dBackDXDestroyQuery;
6501 p->pfnDXBindQuery = vmsvga3dBackDXBindQuery;
6502 p->pfnDXSetQueryOffset = vmsvga3dBackDXSetQueryOffset;
6503 p->pfnDXBeginQuery = vmsvga3dBackDXBeginQuery;
6504 p->pfnDXEndQuery = vmsvga3dBackDXEndQuery;
6505 p->pfnDXReadbackQuery = vmsvga3dBackDXReadbackQuery;
6506 p->pfnDXSetPredication = vmsvga3dBackDXSetPredication;
6507 p->pfnDXSetSOTargets = vmsvga3dBackDXSetSOTargets;
6508 p->pfnDXSetViewports = vmsvga3dBackDXSetViewports;
6509 p->pfnDXSetScissorRects = vmsvga3dBackDXSetScissorRects;
6510 p->pfnDXClearRenderTargetView = vmsvga3dBackDXClearRenderTargetView;
6511 p->pfnDXClearDepthStencilView = vmsvga3dBackDXClearDepthStencilView;
6512 p->pfnDXPredCopyRegion = vmsvga3dBackDXPredCopyRegion;
6513 p->pfnDXPredCopy = vmsvga3dBackDXPredCopy;
6514 p->pfnDXPresentBlt = vmsvga3dBackDXPresentBlt;
6515 p->pfnDXGenMips = vmsvga3dBackDXGenMips;
6516 p->pfnDXDefineShaderResourceView = vmsvga3dBackDXDefineShaderResourceView;
6517 p->pfnDXDestroyShaderResourceView = vmsvga3dBackDXDestroyShaderResourceView;
6518 p->pfnDXDefineRenderTargetView = vmsvga3dBackDXDefineRenderTargetView;
6519 p->pfnDXDestroyRenderTargetView = vmsvga3dBackDXDestroyRenderTargetView;
6520 p->pfnDXDefineDepthStencilView = vmsvga3dBackDXDefineDepthStencilView;
6521 p->pfnDXDestroyDepthStencilView = vmsvga3dBackDXDestroyDepthStencilView;
6522 p->pfnDXDefineElementLayout = vmsvga3dBackDXDefineElementLayout;
6523 p->pfnDXDestroyElementLayout = vmsvga3dBackDXDestroyElementLayout;
6524 p->pfnDXDefineBlendState = vmsvga3dBackDXDefineBlendState;
6525 p->pfnDXDestroyBlendState = vmsvga3dBackDXDestroyBlendState;
6526 p->pfnDXDefineDepthStencilState = vmsvga3dBackDXDefineDepthStencilState;
6527 p->pfnDXDestroyDepthStencilState = vmsvga3dBackDXDestroyDepthStencilState;
6528 p->pfnDXDefineRasterizerState = vmsvga3dBackDXDefineRasterizerState;
6529 p->pfnDXDestroyRasterizerState = vmsvga3dBackDXDestroyRasterizerState;
6530 p->pfnDXDefineSamplerState = vmsvga3dBackDXDefineSamplerState;
6531 p->pfnDXDestroySamplerState = vmsvga3dBackDXDestroySamplerState;
6532 p->pfnDXDefineShader = vmsvga3dBackDXDefineShader;
6533 p->pfnDXDestroyShader = vmsvga3dBackDXDestroyShader;
6534 p->pfnDXBindShader = vmsvga3dBackDXBindShader;
6535 p->pfnDXDefineStreamOutput = vmsvga3dBackDXDefineStreamOutput;
6536 p->pfnDXDestroyStreamOutput = vmsvga3dBackDXDestroyStreamOutput;
6537 p->pfnDXSetStreamOutput = vmsvga3dBackDXSetStreamOutput;
6538 p->pfnDXSetCOTable = vmsvga3dBackDXSetCOTable;
6539 p->pfnDXBufferCopy = vmsvga3dBackDXBufferCopy;
6540 p->pfnDXSurfaceCopyAndReadback = vmsvga3dBackDXSurfaceCopyAndReadback;
6541 p->pfnDXMoveQuery = vmsvga3dBackDXMoveQuery;
6542 p->pfnDXBindAllQuery = vmsvga3dBackDXBindAllQuery;
6543 p->pfnDXReadbackAllQuery = vmsvga3dBackDXReadbackAllQuery;
6544 p->pfnDXMobFence64 = vmsvga3dBackDXMobFence64;
6545 p->pfnDXBindAllShader = vmsvga3dBackDXBindAllShader;
6546 p->pfnDXHint = vmsvga3dBackDXHint;
6547 p->pfnDXBufferUpdate = vmsvga3dBackDXBufferUpdate;
6548 p->pfnDXSetVSConstantBufferOffset = vmsvga3dBackDXSetVSConstantBufferOffset;
6549 p->pfnDXSetPSConstantBufferOffset = vmsvga3dBackDXSetPSConstantBufferOffset;
6550 p->pfnDXSetGSConstantBufferOffset = vmsvga3dBackDXSetGSConstantBufferOffset;
6551 p->pfnDXSetHSConstantBufferOffset = vmsvga3dBackDXSetHSConstantBufferOffset;
6552 p->pfnDXSetDSConstantBufferOffset = vmsvga3dBackDXSetDSConstantBufferOffset;
6553 p->pfnDXSetCSConstantBufferOffset = vmsvga3dBackDXSetCSConstantBufferOffset;
6554 p->pfnDXCondBindAllShader = vmsvga3dBackDXCondBindAllShader;
6555 p->pfnScreenCopy = vmsvga3dBackScreenCopy;
6556 p->pfnGrowOTable = vmsvga3dBackGrowOTable;
6557 p->pfnDXGrowCOTable = vmsvga3dBackDXGrowCOTable;
6558 p->pfnIntraSurfaceCopy = vmsvga3dBackIntraSurfaceCopy;
6559 p->pfnDefineGBSurface_v3 = vmsvga3dBackDefineGBSurface_v3;
6560 p->pfnDXResolveCopy = vmsvga3dBackDXResolveCopy;
6561 p->pfnDXPredResolveCopy = vmsvga3dBackDXPredResolveCopy;
6562 p->pfnDXPredConvertRegion = vmsvga3dBackDXPredConvertRegion;
6563 p->pfnDXPredConvert = vmsvga3dBackDXPredConvert;
6564 p->pfnWholeSurfaceCopy = vmsvga3dBackWholeSurfaceCopy;
6565 p->pfnDXDefineUAView = vmsvga3dBackDXDefineUAView;
6566 p->pfnDXDestroyUAView = vmsvga3dBackDXDestroyUAView;
6567 p->pfnDXClearUAViewUint = vmsvga3dBackDXClearUAViewUint;
6568 p->pfnDXClearUAViewFloat = vmsvga3dBackDXClearUAViewFloat;
6569 p->pfnDXCopyStructureCount = vmsvga3dBackDXCopyStructureCount;
6570 p->pfnDXSetUAViews = vmsvga3dBackDXSetUAViews;
6571 p->pfnDXDrawIndexedInstancedIndirect = vmsvga3dBackDXDrawIndexedInstancedIndirect;
6572 p->pfnDXDrawInstancedIndirect = vmsvga3dBackDXDrawInstancedIndirect;
6573 p->pfnDXDispatch = vmsvga3dBackDXDispatch;
6574 p->pfnDXDispatchIndirect = vmsvga3dBackDXDispatchIndirect;
6575 p->pfnWriteZeroSurface = vmsvga3dBackWriteZeroSurface;
6576 p->pfnHintZeroSurface = vmsvga3dBackHintZeroSurface;
6577 p->pfnDXTransferToBuffer = vmsvga3dBackDXTransferToBuffer;
6578 p->pfnDXSetStructureCount = vmsvga3dBackDXSetStructureCount;
6579 p->pfnLogicOpsBitBlt = vmsvga3dBackLogicOpsBitBlt;
6580 p->pfnLogicOpsTransBlt = vmsvga3dBackLogicOpsTransBlt;
6581 p->pfnLogicOpsStretchBlt = vmsvga3dBackLogicOpsStretchBlt;
6582 p->pfnLogicOpsColorFill = vmsvga3dBackLogicOpsColorFill;
6583 p->pfnLogicOpsAlphaBlend = vmsvga3dBackLogicOpsAlphaBlend;
6584 p->pfnLogicOpsClearTypeBlend = vmsvga3dBackLogicOpsClearTypeBlend;
6585 p->pfnDefineGBSurface_v4 = vmsvga3dBackDefineGBSurface_v4;
6586 p->pfnDXSetCSUAViews = vmsvga3dBackDXSetCSUAViews;
6587 p->pfnDXSetMinLOD = vmsvga3dBackDXSetMinLOD;
6588 p->pfnDXDefineStreamOutputWithMob = vmsvga3dBackDXDefineStreamOutputWithMob;
6589 p->pfnDXSetShaderIface = vmsvga3dBackDXSetShaderIface;
6590 p->pfnDXBindStreamOutput = vmsvga3dBackDXBindStreamOutput;
6591 p->pfnSurfaceStretchBltNonMSToMS = vmsvga3dBackSurfaceStretchBltNonMSToMS;
6592 p->pfnDXBindShaderIface = vmsvga3dBackDXBindShaderIface;
6593 }
6594 }
6595 else
6596 {
6597 AssertFailed();
6598 rc = VERR_INVALID_PARAMETER;
6599 }
6600 }
6601 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_MAP) == 0)
6602 {
6603 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSMAP))
6604 {
6605 if (pvInterfaceFuncs)
6606 {
6607 VMSVGA3DBACKENDFUNCSMAP *p = (VMSVGA3DBACKENDFUNCSMAP *)pvInterfaceFuncs;
6608 p->pfnSurfaceMap = vmsvga3dBackSurfaceMap;
6609 p->pfnSurfaceUnmap = vmsvga3dBackSurfaceUnmap;
6610 }
6611 }
6612 else
6613 {
6614 AssertFailed();
6615 rc = VERR_INVALID_PARAMETER;
6616 }
6617 }
6618 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_GBO) == 0)
6619 {
6620 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSGBO))
6621 {
6622 if (pvInterfaceFuncs)
6623 {
6624 VMSVGA3DBACKENDFUNCSGBO *p = (VMSVGA3DBACKENDFUNCSGBO *)pvInterfaceFuncs;
6625 p->pfnScreenTargetBind = vmsvga3dScreenTargetBind;
6626 p->pfnScreenTargetUpdate = vmsvga3dScreenTargetUpdate;
6627 }
6628 }
6629 else
6630 {
6631 AssertFailed();
6632 rc = VERR_INVALID_PARAMETER;
6633 }
6634 }
6635 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_3D) == 0)
6636 {
6637 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCS3D))
6638 {
6639 if (pvInterfaceFuncs)
6640 {
6641 VMSVGA3DBACKENDFUNCS3D *p = (VMSVGA3DBACKENDFUNCS3D *)pvInterfaceFuncs;
6642 p->pfnInit = vmsvga3dBackInit;
6643 p->pfnPowerOn = vmsvga3dBackPowerOn;
6644 p->pfnTerminate = vmsvga3dBackTerminate;
6645 p->pfnReset = vmsvga3dBackReset;
6646 p->pfnQueryCaps = vmsvga3dBackQueryCaps;
6647 p->pfnChangeMode = vmsvga3dBackChangeMode;
6648 p->pfnCreateTexture = vmsvga3dBackCreateTexture;
6649 p->pfnSurfaceDestroy = vmsvga3dBackSurfaceDestroy;
6650 p->pfnSurfaceCopy = vmsvga3dBackSurfaceCopy;
6651 p->pfnSurfaceDMACopyBox = vmsvga3dBackSurfaceDMACopyBox;
6652 p->pfnSurfaceStretchBlt = vmsvga3dBackSurfaceStretchBlt;
6653 p->pfnUpdateHostScreenViewport = vmsvga3dBackUpdateHostScreenViewport;
6654 p->pfnDefineScreen = vmsvga3dBackDefineScreen;
6655 p->pfnDestroyScreen = vmsvga3dBackDestroyScreen;
6656 p->pfnSurfaceBlitToScreen = vmsvga3dBackSurfaceBlitToScreen;
6657 p->pfnSurfaceUpdateHeapBuffers = vmsvga3dBackSurfaceUpdateHeapBuffers;
6658 }
6659 }
6660 else
6661 {
6662 AssertFailed();
6663 rc = VERR_INVALID_PARAMETER;
6664 }
6665 }
6666 else
6667 rc = VERR_NOT_IMPLEMENTED;
6668 return rc;
6669}
6670
6671
6672extern VMSVGA3DBACKENDDESC const g_BackendDX =
6673{
6674 "DX",
6675 vmsvga3dBackQueryInterface
6676};
注意: 瀏覽 TracBrowser 來幫助您使用儲存庫瀏覽器

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette