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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-win-dx.cpp@ 89123

最後變更 在這個檔案從89123是 89123,由 vboxsync 提交於 4 年 前

Devices/Graphics: Function tables for 3D backends (build fix). bugref:9830
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1/* $Id: DevVGA-SVGA3d-win-dx.cpp 89123 2021-05-17 20:16:19Z vboxsync $ */
2/** @file
3 * DevVMWare - VMWare SVGA device
4 */
5
6/*
7 * Copyright (C) 2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.alldomusa.eu.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <VBox/log.h>
25#include <VBox/vmm/pdmdev.h>
26#include <VBox/vmm/pgm.h>
27
28#include <iprt/assert.h>
29#include <iprt/avl.h>
30#include <iprt/errcore.h>
31#include <iprt/mem.h>
32
33#include <VBoxVideo.h> /* required by DevVGA.h */
34#include <VBoxVideo3D.h>
35
36/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
37#include "DevVGA.h"
38
39#include "DevVGA-SVGA.h"
40#include "DevVGA-SVGA3d.h"
41#include "DevVGA-SVGA3d-internal.h"
42#include "DevVGA-SVGA3d-dx-shader.h"
43
44#include <d3d11.h>
45
46#define DX_RELEASE_ARRAY(a_Count, a_papArray) do { \
47 for (uint32_t i = 0; i < (a_Count); ++i) \
48 D3D_RELEASE((a_papArray)[i]); \
49} while (0)
50
51typedef struct DXDEVICE
52{
53 ID3D11Device *pDevice; /* Device. */
54 ID3D11DeviceContext *pImmediateContext; /* Corresponding context. */
55 IDXGIFactory *pDxgiFactory; /* DXGI Factory. */
56 D3D_FEATURE_LEVEL FeatureLevel;
57} DXDEVICE;
58
59/* What kind of resource has been created for the VMSVGA3D surface. */
60typedef enum VMSVGA3DBACKRESTYPE
61{
62 VMSVGA3D_RESTYPE_NONE = 0,
63 VMSVGA3D_RESTYPE_SCREEN_TARGET = 1,
64 VMSVGA3D_RESTYPE_TEXTURE_1D = 2,
65 VMSVGA3D_RESTYPE_TEXTURE = 3,
66 VMSVGA3D_RESTYPE_CUBE_TEXTURE = 4,
67 VMSVGA3D_RESTYPE_TEXTURE_3D = 5,
68 VMSVGA3D_RESTYPE_BUFFER = 6,
69} VMSVGA3DBACKRESTYPE;
70
71typedef struct VMSVGA3DBACKENDSURFACE
72{
73 VMSVGA3DBACKRESTYPE enmResType;
74 DXGI_FORMAT enmDxgiFormat;
75 /** AVL tree containing DXSHAREDTEXTURE structures. */
76 AVLU32TREE SharedTextureTree;
77 union
78 {
79 struct
80 {
81 ID3D11Resource *pResource;
82 } Resource;
83 struct
84 {
85 ID3D11Texture2D *pTexture; /* The texture for the screen content. */
86 ID3D11Texture2D *pDynamicTexture; /* For screen updates from memory. */ /** @todo One for all screens. */
87 ID3D11Texture2D *pStagingTexture; /* For Reading the screen content. */ /** @todo One for all screens. */
88 /* Screen targets are created as shared surfaces. */
89 HANDLE SharedHandle; /* The shared handle of this structure. */
90 } ScreenTarget;
91 struct
92 {
93 ID3D11Texture2D *pTexture; /* The texture for the screen content. */
94 ID3D11Texture2D *pDynamicTexture; /* For screen updates from memory. */ /** @todo One for every format. */
95 ID3D11Texture2D *pStagingTexture; /* For Reading the screen content. */ /** @todo One for every format. */
96 } Texture;
97 struct
98 {
99 ID3D11Buffer *pBuffer;
100 } Buffer;
101 } u;
102} VMSVGA3DBACKENDSURFACE;
103
104/* "The only resources that can be shared are 2D non-mipmapped textures." */
105typedef struct DXSHAREDTEXTURE
106{
107 AVLU32NODECORE Core; /* Key is context id which opened this texture. */
108 ID3D11Texture2D *pTexture; /* The opened shared texture. */
109 uint32_t sid; /* Surface id. */
110} DXSHAREDTEXTURE;
111
112
113typedef struct VMSVGAHWSCREEN
114{
115 ID3D11Texture2D *pTexture; /* Shared texture for the screen content. Only used as CopyResource target. */
116 IDXGIResource *pDxgiResource; /* Interface of the texture. */
117 IDXGIKeyedMutex *pDXGIKeyedMutex; /* Synchronization interface for the render device. */
118 HANDLE SharedHandle; /* The shared handle of this structure. */
119 uint32_t sidScreenTarget; /* The source surface for this screen. */
120} VMSVGAHWSCREEN;
121
122
123typedef struct DXELEMENTLAYOUT
124{
125 ID3D11InputLayout *pElementLayout;
126 uint32_t cElementDesc;
127 D3D11_INPUT_ELEMENT_DESC aElementDesc[32];
128} DXELEMENTLAYOUT;
129
130typedef struct DXSHADER
131{
132 SVGA3dShaderType enmShaderType;
133 union
134 {
135 ID3D11DeviceChild *pShader; /* All. */
136 ID3D11VertexShader *pVertexShader; /* SVGA3D_SHADERTYPE_VS */
137 ID3D11PixelShader *pPixelShader; /* SVGA3D_SHADERTYPE_PS */
138 ID3D11GeometryShader *pGeometryShader; /* SVGA3D_SHADERTYPE_GS */
139 ID3D11HullShader *pHullShader; /* SVGA3D_SHADERTYPE_HS */
140 ID3D11DomainShader *pDomainShader; /* SVGA3D_SHADERTYPE_DS */
141 ID3D11ComputeShader *pComputeShader; /* SVGA3D_SHADERTYPE_CS */
142 };
143 void *pvDXBC;
144 uint32_t cbDXBC;
145} DXSHADER;
146
147typedef struct VMSVGA3DBACKENDDXCONTEXT
148{
149 DXDEVICE device; /* Device for the this context operation. */
150
151 /* Arrays for Context-Object Tables. Number of entries depends on COTable size. */
152 uint32_t cBlendState; /* Number of entries in the papBlendState array. */
153 uint32_t cDepthStencilState; /* papDepthStencilState */
154 uint32_t cSamplerState; /* papSamplerState */
155 uint32_t cRasterizerState; /* papRasterizerState */
156 uint32_t cElementLayout; /* papElementLayout */
157 uint32_t cRenderTargetView; /* papRenderTargetView */
158 uint32_t cDepthStencilView; /* papDepthStencilView */
159 uint32_t cShaderResourceView; /* papShaderResourceView */
160 uint32_t cQuery; /* papQuery */
161 uint32_t cShader; /* papShader */
162 ID3D11BlendState **papBlendState;
163 ID3D11DepthStencilState **papDepthStencilState;
164 ID3D11SamplerState **papSamplerState;
165 ID3D11RasterizerState **papRasterizerState;
166 DXELEMENTLAYOUT *paElementLayout;
167 ID3D11RenderTargetView **papRenderTargetView;
168 ID3D11DepthStencilView **papDepthStencilView;
169 ID3D11ShaderResourceView **papShaderResourceView;
170 ID3D11Query **papQuery;
171 DXSHADER *paShader;
172} VMSVGA3DBACKENDDXCONTEXT;
173
174typedef HRESULT FN_D3D_DISASSEMBLE(LPCVOID pSrcData, SIZE_T SrcDataSize, UINT Flags, LPCSTR szComments, ID3D10Blob **ppDisassembly);
175typedef FN_D3D_DISASSEMBLE *PFN_D3D_DISASSEMBLE;
176
177typedef struct VMSVGA3DBACKEND
178{
179 RTLDRMOD hD3D11;
180 PFN_D3D11_CREATE_DEVICE pfnD3D11CreateDevice;
181
182 RTLDRMOD hD3DCompiler;
183 PFN_D3D_DISASSEMBLE pfnD3DDisassemble;
184
185 DXDEVICE device; /* Device for the VMSVGA3D context independent operation. */
186} VMSVGA3DBACKEND;
187
188
189static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface);
190
191
192static DXGI_FORMAT vmsvgaDXSurfaceFormat2Dxgi(SVGA3dSurfaceFormat format)
193{
194 /* Ensure that correct headers are used.
195 * SVGA3D_AYUV was equal to 45, then replaced with SVGA3D_FORMAT_DEAD2 = 45, and redefined as SVGA3D_AYUV = 152.
196 */
197 AssertCompile(SVGA3D_AYUV == 152);
198
199#define DXGI_FORMAT_ DXGI_FORMAT_UNKNOWN
200 /** @todo More formats. */
201 switch (format)
202 {
203 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8X8_UNORM;
204 case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
205 case SVGA3D_R5G6B5: return DXGI_FORMAT_B5G6R5_UNORM;
206 case SVGA3D_X1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
207 case SVGA3D_A1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
208 case SVGA3D_A4R4G4B4: break; // 11.1 return DXGI_FORMAT_B4G4R4A4_UNORM;
209 case SVGA3D_Z_D32: break;
210 case SVGA3D_Z_D16: return DXGI_FORMAT_D16_UNORM;
211 case SVGA3D_Z_D24S8: return DXGI_FORMAT_D24_UNORM_S8_UINT;
212 case SVGA3D_Z_D15S1: break;
213 case SVGA3D_LUMINANCE8: return DXGI_FORMAT_;
214 case SVGA3D_LUMINANCE4_ALPHA4: return DXGI_FORMAT_;
215 case SVGA3D_LUMINANCE16: return DXGI_FORMAT_;
216 case SVGA3D_LUMINANCE8_ALPHA8: return DXGI_FORMAT_;
217 case SVGA3D_DXT1: return DXGI_FORMAT_;
218 case SVGA3D_DXT2: return DXGI_FORMAT_;
219 case SVGA3D_DXT3: return DXGI_FORMAT_;
220 case SVGA3D_DXT4: return DXGI_FORMAT_;
221 case SVGA3D_DXT5: return DXGI_FORMAT_;
222 case SVGA3D_BUMPU8V8: return DXGI_FORMAT_;
223 case SVGA3D_BUMPL6V5U5: return DXGI_FORMAT_;
224 case SVGA3D_BUMPX8L8V8U8: return DXGI_FORMAT_;
225 case SVGA3D_FORMAT_DEAD1: break;
226 case SVGA3D_ARGB_S10E5: return DXGI_FORMAT_;
227 case SVGA3D_ARGB_S23E8: return DXGI_FORMAT_;
228 case SVGA3D_A2R10G10B10: return DXGI_FORMAT_;
229 case SVGA3D_V8U8: return DXGI_FORMAT_;
230 case SVGA3D_Q8W8V8U8: return DXGI_FORMAT_;
231 case SVGA3D_CxV8U8: return DXGI_FORMAT_;
232 case SVGA3D_X8L8V8U8: return DXGI_FORMAT_;
233 case SVGA3D_A2W10V10U10: return DXGI_FORMAT_;
234 case SVGA3D_ALPHA8: return DXGI_FORMAT_;
235 case SVGA3D_R_S10E5: return DXGI_FORMAT_;
236 case SVGA3D_R_S23E8: return DXGI_FORMAT_;
237 case SVGA3D_RG_S10E5: return DXGI_FORMAT_;
238 case SVGA3D_RG_S23E8: return DXGI_FORMAT_;
239 case SVGA3D_BUFFER: return DXGI_FORMAT_;
240 case SVGA3D_Z_D24X8: return DXGI_FORMAT_;
241 case SVGA3D_V16U16: return DXGI_FORMAT_;
242 case SVGA3D_G16R16: return DXGI_FORMAT_;
243 case SVGA3D_A16B16G16R16: return DXGI_FORMAT_;
244 case SVGA3D_UYVY: return DXGI_FORMAT_;
245 case SVGA3D_YUY2: return DXGI_FORMAT_;
246 case SVGA3D_NV12: return DXGI_FORMAT_;
247 case SVGA3D_FORMAT_DEAD2: break; /* Old SVGA3D_AYUV */
248 case SVGA3D_R32G32B32A32_TYPELESS: return DXGI_FORMAT_R32G32B32A32_TYPELESS;
249 case SVGA3D_R32G32B32A32_UINT: return DXGI_FORMAT_R32G32B32A32_UINT;
250 case SVGA3D_R32G32B32A32_SINT: return DXGI_FORMAT_R32G32B32A32_SINT;
251 case SVGA3D_R32G32B32_TYPELESS: return DXGI_FORMAT_R32G32B32_TYPELESS;
252 case SVGA3D_R32G32B32_FLOAT: return DXGI_FORMAT_R32G32B32_FLOAT;
253 case SVGA3D_R32G32B32_UINT: return DXGI_FORMAT_R32G32B32_UINT;
254 case SVGA3D_R32G32B32_SINT: return DXGI_FORMAT_R32G32B32_SINT;
255 case SVGA3D_R16G16B16A16_TYPELESS: return DXGI_FORMAT_R16G16B16A16_TYPELESS;
256 case SVGA3D_R16G16B16A16_UINT: return DXGI_FORMAT_R16G16B16A16_UINT;
257 case SVGA3D_R16G16B16A16_SNORM: return DXGI_FORMAT_R16G16B16A16_SNORM;
258 case SVGA3D_R16G16B16A16_SINT: return DXGI_FORMAT_R16G16B16A16_SINT;
259 case SVGA3D_R32G32_TYPELESS: return DXGI_FORMAT_R32G32_TYPELESS;
260 case SVGA3D_R32G32_UINT: return DXGI_FORMAT_R32G32_UINT;
261 case SVGA3D_R32G32_SINT: return DXGI_FORMAT_R32G32_SINT;
262 case SVGA3D_R32G8X24_TYPELESS: return DXGI_FORMAT_R32G8X24_TYPELESS;
263 case SVGA3D_D32_FLOAT_S8X24_UINT: return DXGI_FORMAT_D32_FLOAT_S8X24_UINT;
264 case SVGA3D_R32_FLOAT_X8X24: return DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS;
265 case SVGA3D_X32_G8X24_UINT: return DXGI_FORMAT_X32_TYPELESS_G8X24_UINT;
266 case SVGA3D_R10G10B10A2_TYPELESS: return DXGI_FORMAT_R10G10B10A2_TYPELESS;
267 case SVGA3D_R10G10B10A2_UINT: return DXGI_FORMAT_R10G10B10A2_UINT;
268 case SVGA3D_R11G11B10_FLOAT: return DXGI_FORMAT_R11G11B10_FLOAT;
269 case SVGA3D_R8G8B8A8_TYPELESS: return DXGI_FORMAT_R8G8B8A8_TYPELESS;
270 case SVGA3D_R8G8B8A8_UNORM: return DXGI_FORMAT_R8G8B8A8_UNORM;
271 case SVGA3D_R8G8B8A8_UNORM_SRGB: return DXGI_FORMAT_R8G8B8A8_UNORM_SRGB;
272 case SVGA3D_R8G8B8A8_UINT: return DXGI_FORMAT_R8G8B8A8_UINT;
273 case SVGA3D_R8G8B8A8_SINT: return DXGI_FORMAT_R8G8B8A8_SINT;
274 case SVGA3D_R16G16_TYPELESS: return DXGI_FORMAT_R16G16_TYPELESS;
275 case SVGA3D_R16G16_UINT: return DXGI_FORMAT_R16G16_UINT;
276 case SVGA3D_R16G16_SINT: return DXGI_FORMAT_R16G16_SINT;
277 case SVGA3D_R32_TYPELESS: return DXGI_FORMAT_R32_TYPELESS;
278 case SVGA3D_D32_FLOAT: return DXGI_FORMAT_D32_FLOAT;
279 case SVGA3D_R32_UINT: return DXGI_FORMAT_R32_UINT;
280 case SVGA3D_R32_SINT: return DXGI_FORMAT_R32_SINT;
281 case SVGA3D_R24G8_TYPELESS: return DXGI_FORMAT_R24G8_TYPELESS;
282 case SVGA3D_D24_UNORM_S8_UINT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
283 case SVGA3D_R24_UNORM_X8: return DXGI_FORMAT_R24_UNORM_X8_TYPELESS;
284 case SVGA3D_X24_G8_UINT: return DXGI_FORMAT_X24_TYPELESS_G8_UINT;
285 case SVGA3D_R8G8_TYPELESS: return DXGI_FORMAT_R8G8_TYPELESS;
286 case SVGA3D_R8G8_UNORM: return DXGI_FORMAT_R8G8_UNORM;
287 case SVGA3D_R8G8_UINT: return DXGI_FORMAT_R8G8_UINT;
288 case SVGA3D_R8G8_SINT: return DXGI_FORMAT_R8G8_SINT;
289 case SVGA3D_R16_TYPELESS: return DXGI_FORMAT_R16_TYPELESS;
290 case SVGA3D_R16_UNORM: return DXGI_FORMAT_R16_UNORM;
291 case SVGA3D_R16_UINT: return DXGI_FORMAT_R16_UINT;
292 case SVGA3D_R16_SNORM: return DXGI_FORMAT_R16_SNORM;
293 case SVGA3D_R16_SINT: return DXGI_FORMAT_R16_SINT;
294 case SVGA3D_R8_TYPELESS: return DXGI_FORMAT_R8_TYPELESS;
295 case SVGA3D_R8_UNORM: return DXGI_FORMAT_R8_UNORM;
296 case SVGA3D_R8_UINT: return DXGI_FORMAT_R8_UINT;
297 case SVGA3D_R8_SNORM: return DXGI_FORMAT_R8_SNORM;
298 case SVGA3D_R8_SINT: return DXGI_FORMAT_R8_SINT;
299 case SVGA3D_P8: break;
300 case SVGA3D_R9G9B9E5_SHAREDEXP: return DXGI_FORMAT_R9G9B9E5_SHAREDEXP;
301 case SVGA3D_R8G8_B8G8_UNORM: return DXGI_FORMAT_R8G8_B8G8_UNORM;
302 case SVGA3D_G8R8_G8B8_UNORM: return DXGI_FORMAT_G8R8_G8B8_UNORM;
303 case SVGA3D_BC1_TYPELESS: return DXGI_FORMAT_BC1_TYPELESS;
304 case SVGA3D_BC1_UNORM_SRGB: return DXGI_FORMAT_BC1_UNORM_SRGB;
305 case SVGA3D_BC2_TYPELESS: return DXGI_FORMAT_BC2_TYPELESS;
306 case SVGA3D_BC2_UNORM_SRGB: return DXGI_FORMAT_BC2_UNORM_SRGB;
307 case SVGA3D_BC3_TYPELESS: return DXGI_FORMAT_BC3_TYPELESS;
308 case SVGA3D_BC3_UNORM_SRGB: return DXGI_FORMAT_BC3_UNORM_SRGB;
309 case SVGA3D_BC4_TYPELESS: return DXGI_FORMAT_BC4_TYPELESS;
310 case SVGA3D_ATI1: break;
311 case SVGA3D_BC4_SNORM: return DXGI_FORMAT_BC4_SNORM;
312 case SVGA3D_BC5_TYPELESS: return DXGI_FORMAT_BC5_TYPELESS;
313 case SVGA3D_ATI2: break;
314 case SVGA3D_BC5_SNORM: return DXGI_FORMAT_BC5_SNORM;
315 case SVGA3D_R10G10B10_XR_BIAS_A2_UNORM: return DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM;
316 case SVGA3D_B8G8R8A8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
317 case SVGA3D_B8G8R8A8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
318 case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8X8_TYPELESS;
319 case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8X8_UNORM_SRGB;
320 case SVGA3D_Z_DF16: break;
321 case SVGA3D_Z_DF24: break;
322 case SVGA3D_Z_D24S8_INT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
323 case SVGA3D_YV12: break;
324 case SVGA3D_R32G32B32A32_FLOAT: return DXGI_FORMAT_R32G32B32A32_FLOAT;
325 case SVGA3D_R16G16B16A16_FLOAT: return DXGI_FORMAT_R16G16B16A16_FLOAT;
326 case SVGA3D_R16G16B16A16_UNORM: return DXGI_FORMAT_R16G16B16A16_UNORM;
327 case SVGA3D_R32G32_FLOAT: return DXGI_FORMAT_R32G32_FLOAT;
328 case SVGA3D_R10G10B10A2_UNORM: return DXGI_FORMAT_R10G10B10A2_UNORM;
329 case SVGA3D_R8G8B8A8_SNORM: return DXGI_FORMAT_R8G8B8A8_SNORM;
330 case SVGA3D_R16G16_FLOAT: return DXGI_FORMAT_R16G16_FLOAT;
331 case SVGA3D_R16G16_UNORM: return DXGI_FORMAT_R16G16_UNORM;
332 case SVGA3D_R16G16_SNORM: return DXGI_FORMAT_R16G16_SNORM;
333 case SVGA3D_R32_FLOAT: return DXGI_FORMAT_R32_FLOAT;
334 case SVGA3D_R8G8_SNORM: return DXGI_FORMAT_R8G8_SNORM;
335 case SVGA3D_R16_FLOAT: return DXGI_FORMAT_R16_FLOAT;
336 case SVGA3D_D16_UNORM: return DXGI_FORMAT_D16_UNORM;
337 case SVGA3D_A8_UNORM: return DXGI_FORMAT_A8_UNORM;
338 case SVGA3D_BC1_UNORM: return DXGI_FORMAT_BC1_UNORM;
339 case SVGA3D_BC2_UNORM: return DXGI_FORMAT_BC2_UNORM;
340 case SVGA3D_BC3_UNORM: return DXGI_FORMAT_BC3_UNORM;
341 case SVGA3D_B5G6R5_UNORM: return DXGI_FORMAT_B5G6R5_UNORM;
342 case SVGA3D_B5G5R5A1_UNORM: return DXGI_FORMAT_B5G5R5A1_UNORM;
343 case SVGA3D_B8G8R8A8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
344 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8X8_UNORM;
345 case SVGA3D_BC4_UNORM: return DXGI_FORMAT_BC4_UNORM;
346 case SVGA3D_BC5_UNORM: return DXGI_FORMAT_BC5_UNORM;
347
348 case SVGA3D_B4G4R4A4_UNORM: return DXGI_FORMAT_;
349 case SVGA3D_BC6H_TYPELESS: return DXGI_FORMAT_;
350 case SVGA3D_BC6H_UF16: return DXGI_FORMAT_;
351 case SVGA3D_BC6H_SF16: return DXGI_FORMAT_;
352 case SVGA3D_BC7_TYPELESS: return DXGI_FORMAT_;
353 case SVGA3D_BC7_UNORM: return DXGI_FORMAT_;
354 case SVGA3D_BC7_UNORM_SRGB: return DXGI_FORMAT_;
355 case SVGA3D_AYUV: return DXGI_FORMAT_;
356
357 case SVGA3D_FORMAT_INVALID:
358 case SVGA3D_FORMAT_MAX: break;
359 }
360 // AssertFailed();
361 return DXGI_FORMAT_UNKNOWN;
362#undef DXGI_FORMAT_
363}
364
365
366static SVGA3dSurfaceFormat vmsvgaDXDevCapSurfaceFmt2Format(SVGA3dDevCapIndex enmDevCap)
367{
368 switch (enmDevCap)
369 {
370 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
371 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
372 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
373 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
374 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
375 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
376 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5: return SVGA3D_R5G6B5;
377 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
378 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
379 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8: return SVGA3D_ALPHA8;
380 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
381 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16: return SVGA3D_Z_D16;
382 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8: return SVGA3D_Z_D24S8;
383 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8: return SVGA3D_Z_D24X8;
384 case SVGA3D_DEVCAP_SURFACEFMT_DXT1: return SVGA3D_DXT1;
385 case SVGA3D_DEVCAP_SURFACEFMT_DXT2: return SVGA3D_DXT2;
386 case SVGA3D_DEVCAP_SURFACEFMT_DXT3: return SVGA3D_DXT3;
387 case SVGA3D_DEVCAP_SURFACEFMT_DXT4: return SVGA3D_DXT4;
388 case SVGA3D_DEVCAP_SURFACEFMT_DXT5: return SVGA3D_DXT5;
389 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
390 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
391 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
392 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
393 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8: return SVGA3D_CxV8U8;
394 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5: return SVGA3D_R_S10E5;
395 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8: return SVGA3D_R_S23E8;
396 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5: return SVGA3D_RG_S10E5;
397 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8: return SVGA3D_RG_S23E8;
398 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
399 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
400 case SVGA3D_DEVCAP_SURFACEFMT_V16U16: return SVGA3D_V16U16;
401 case SVGA3D_DEVCAP_SURFACEFMT_G16R16: return SVGA3D_G16R16;
402 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
403 case SVGA3D_DEVCAP_SURFACEFMT_UYVY: return SVGA3D_UYVY;
404 case SVGA3D_DEVCAP_SURFACEFMT_YUY2: return SVGA3D_YUY2;
405 case SVGA3D_DEVCAP_SURFACEFMT_NV12: return SVGA3D_NV12;
406 case SVGA3D_DEVCAP_DEAD10: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_SURFACEFMT_AYUV -> SVGA3D_AYUV */
407 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16: return SVGA3D_Z_DF16;
408 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24: return SVGA3D_Z_DF24;
409 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
410 case SVGA3D_DEVCAP_SURFACEFMT_ATI1: return SVGA3D_ATI1;
411 case SVGA3D_DEVCAP_SURFACEFMT_ATI2: return SVGA3D_ATI2;
412 case SVGA3D_DEVCAP_SURFACEFMT_YV12: return SVGA3D_YV12;
413 default:
414 AssertFailed();
415 break;
416 }
417 return SVGA3D_FORMAT_INVALID;
418}
419
420
421static SVGA3dSurfaceFormat vmsvgaDXDevCapDxfmt2Format(SVGA3dDevCapIndex enmDevCap)
422{
423 switch (enmDevCap)
424 {
425 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
426 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
427 case SVGA3D_DEVCAP_DXFMT_R5G6B5: return SVGA3D_R5G6B5;
428 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
429 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
430 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
431 case SVGA3D_DEVCAP_DXFMT_Z_D32: return SVGA3D_Z_D32;
432 case SVGA3D_DEVCAP_DXFMT_Z_D16: return SVGA3D_Z_D16;
433 case SVGA3D_DEVCAP_DXFMT_Z_D24S8: return SVGA3D_Z_D24S8;
434 case SVGA3D_DEVCAP_DXFMT_Z_D15S1: return SVGA3D_Z_D15S1;
435 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
436 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4: return SVGA3D_LUMINANCE4_ALPHA4;
437 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
438 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
439 case SVGA3D_DEVCAP_DXFMT_DXT1: return SVGA3D_DXT1;
440 case SVGA3D_DEVCAP_DXFMT_DXT2: return SVGA3D_DXT2;
441 case SVGA3D_DEVCAP_DXFMT_DXT3: return SVGA3D_DXT3;
442 case SVGA3D_DEVCAP_DXFMT_DXT4: return SVGA3D_DXT4;
443 case SVGA3D_DEVCAP_DXFMT_DXT5: return SVGA3D_DXT5;
444 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
445 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5: return SVGA3D_BUMPL6V5U5;
446 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
447 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1: return SVGA3D_FORMAT_DEAD1;
448 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
449 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
450 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
451 case SVGA3D_DEVCAP_DXFMT_V8U8: return SVGA3D_V8U8;
452 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
453 case SVGA3D_DEVCAP_DXFMT_CxV8U8: return SVGA3D_CxV8U8;
454 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8: return SVGA3D_X8L8V8U8;
455 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
456 case SVGA3D_DEVCAP_DXFMT_ALPHA8: return SVGA3D_ALPHA8;
457 case SVGA3D_DEVCAP_DXFMT_R_S10E5: return SVGA3D_R_S10E5;
458 case SVGA3D_DEVCAP_DXFMT_R_S23E8: return SVGA3D_R_S23E8;
459 case SVGA3D_DEVCAP_DXFMT_RG_S10E5: return SVGA3D_RG_S10E5;
460 case SVGA3D_DEVCAP_DXFMT_RG_S23E8: return SVGA3D_RG_S23E8;
461 case SVGA3D_DEVCAP_DXFMT_BUFFER: return SVGA3D_BUFFER;
462 case SVGA3D_DEVCAP_DXFMT_Z_D24X8: return SVGA3D_Z_D24X8;
463 case SVGA3D_DEVCAP_DXFMT_V16U16: return SVGA3D_V16U16;
464 case SVGA3D_DEVCAP_DXFMT_G16R16: return SVGA3D_G16R16;
465 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
466 case SVGA3D_DEVCAP_DXFMT_UYVY: return SVGA3D_UYVY;
467 case SVGA3D_DEVCAP_DXFMT_YUY2: return SVGA3D_YUY2;
468 case SVGA3D_DEVCAP_DXFMT_NV12: return SVGA3D_NV12;
469 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_DXFMT_AYUV -> SVGA3D_AYUV */
470 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS: return SVGA3D_R32G32B32A32_TYPELESS;
471 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT: return SVGA3D_R32G32B32A32_UINT;
472 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT: return SVGA3D_R32G32B32A32_SINT;
473 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS: return SVGA3D_R32G32B32_TYPELESS;
474 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT: return SVGA3D_R32G32B32_FLOAT;
475 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT: return SVGA3D_R32G32B32_UINT;
476 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT: return SVGA3D_R32G32B32_SINT;
477 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS: return SVGA3D_R16G16B16A16_TYPELESS;
478 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT: return SVGA3D_R16G16B16A16_UINT;
479 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM: return SVGA3D_R16G16B16A16_SNORM;
480 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT: return SVGA3D_R16G16B16A16_SINT;
481 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS: return SVGA3D_R32G32_TYPELESS;
482 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT: return SVGA3D_R32G32_UINT;
483 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT: return SVGA3D_R32G32_SINT;
484 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS: return SVGA3D_R32G8X24_TYPELESS;
485 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT: return SVGA3D_D32_FLOAT_S8X24_UINT;
486 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24: return SVGA3D_R32_FLOAT_X8X24;
487 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT: return SVGA3D_X32_G8X24_UINT;
488 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS: return SVGA3D_R10G10B10A2_TYPELESS;
489 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT: return SVGA3D_R10G10B10A2_UINT;
490 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT: return SVGA3D_R11G11B10_FLOAT;
491 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS: return SVGA3D_R8G8B8A8_TYPELESS;
492 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM: return SVGA3D_R8G8B8A8_UNORM;
493 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB: return SVGA3D_R8G8B8A8_UNORM_SRGB;
494 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT: return SVGA3D_R8G8B8A8_UINT;
495 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT: return SVGA3D_R8G8B8A8_SINT;
496 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS: return SVGA3D_R16G16_TYPELESS;
497 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT: return SVGA3D_R16G16_UINT;
498 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT: return SVGA3D_R16G16_SINT;
499 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS: return SVGA3D_R32_TYPELESS;
500 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT: return SVGA3D_D32_FLOAT;
501 case SVGA3D_DEVCAP_DXFMT_R32_UINT: return SVGA3D_R32_UINT;
502 case SVGA3D_DEVCAP_DXFMT_R32_SINT: return SVGA3D_R32_SINT;
503 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS: return SVGA3D_R24G8_TYPELESS;
504 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT: return SVGA3D_D24_UNORM_S8_UINT;
505 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8: return SVGA3D_R24_UNORM_X8;
506 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT: return SVGA3D_X24_G8_UINT;
507 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS: return SVGA3D_R8G8_TYPELESS;
508 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM: return SVGA3D_R8G8_UNORM;
509 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT: return SVGA3D_R8G8_UINT;
510 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT: return SVGA3D_R8G8_SINT;
511 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS: return SVGA3D_R16_TYPELESS;
512 case SVGA3D_DEVCAP_DXFMT_R16_UNORM: return SVGA3D_R16_UNORM;
513 case SVGA3D_DEVCAP_DXFMT_R16_UINT: return SVGA3D_R16_UINT;
514 case SVGA3D_DEVCAP_DXFMT_R16_SNORM: return SVGA3D_R16_SNORM;
515 case SVGA3D_DEVCAP_DXFMT_R16_SINT: return SVGA3D_R16_SINT;
516 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS: return SVGA3D_R8_TYPELESS;
517 case SVGA3D_DEVCAP_DXFMT_R8_UNORM: return SVGA3D_R8_UNORM;
518 case SVGA3D_DEVCAP_DXFMT_R8_UINT: return SVGA3D_R8_UINT;
519 case SVGA3D_DEVCAP_DXFMT_R8_SNORM: return SVGA3D_R8_SNORM;
520 case SVGA3D_DEVCAP_DXFMT_R8_SINT: return SVGA3D_R8_SINT;
521 case SVGA3D_DEVCAP_DXFMT_P8: return SVGA3D_P8;
522 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP: return SVGA3D_R9G9B9E5_SHAREDEXP;
523 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM: return SVGA3D_R8G8_B8G8_UNORM;
524 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM: return SVGA3D_G8R8_G8B8_UNORM;
525 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS: return SVGA3D_BC1_TYPELESS;
526 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB: return SVGA3D_BC1_UNORM_SRGB;
527 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS: return SVGA3D_BC2_TYPELESS;
528 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB: return SVGA3D_BC2_UNORM_SRGB;
529 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS: return SVGA3D_BC3_TYPELESS;
530 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB: return SVGA3D_BC3_UNORM_SRGB;
531 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS: return SVGA3D_BC4_TYPELESS;
532 case SVGA3D_DEVCAP_DXFMT_ATI1: return SVGA3D_ATI1;
533 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM: return SVGA3D_BC4_SNORM;
534 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS: return SVGA3D_BC5_TYPELESS;
535 case SVGA3D_DEVCAP_DXFMT_ATI2: return SVGA3D_ATI2;
536 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM: return SVGA3D_BC5_SNORM;
537 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM: return SVGA3D_R10G10B10_XR_BIAS_A2_UNORM;
538 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS: return SVGA3D_B8G8R8A8_TYPELESS;
539 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB: return SVGA3D_B8G8R8A8_UNORM_SRGB;
540 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS: return SVGA3D_B8G8R8X8_TYPELESS;
541 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB: return SVGA3D_B8G8R8X8_UNORM_SRGB;
542 case SVGA3D_DEVCAP_DXFMT_Z_DF16: return SVGA3D_Z_DF16;
543 case SVGA3D_DEVCAP_DXFMT_Z_DF24: return SVGA3D_Z_DF24;
544 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
545 case SVGA3D_DEVCAP_DXFMT_YV12: return SVGA3D_YV12;
546 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT: return SVGA3D_R32G32B32A32_FLOAT;
547 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT: return SVGA3D_R16G16B16A16_FLOAT;
548 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM: return SVGA3D_R16G16B16A16_UNORM;
549 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT: return SVGA3D_R32G32_FLOAT;
550 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM: return SVGA3D_R10G10B10A2_UNORM;
551 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM: return SVGA3D_R8G8B8A8_SNORM;
552 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT: return SVGA3D_R16G16_FLOAT;
553 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM: return SVGA3D_R16G16_UNORM;
554 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM: return SVGA3D_R16G16_SNORM;
555 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT: return SVGA3D_R32_FLOAT;
556 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM: return SVGA3D_R8G8_SNORM;
557 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT: return SVGA3D_R16_FLOAT;
558 case SVGA3D_DEVCAP_DXFMT_D16_UNORM: return SVGA3D_D16_UNORM;
559 case SVGA3D_DEVCAP_DXFMT_A8_UNORM: return SVGA3D_A8_UNORM;
560 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM: return SVGA3D_BC1_UNORM;
561 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM: return SVGA3D_BC2_UNORM;
562 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM: return SVGA3D_BC3_UNORM;
563 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM: return SVGA3D_B5G6R5_UNORM;
564 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM: return SVGA3D_B5G5R5A1_UNORM;
565 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM: return SVGA3D_B8G8R8A8_UNORM;
566 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM: return SVGA3D_B8G8R8X8_UNORM;
567 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM: return SVGA3D_BC4_UNORM;
568 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM: return SVGA3D_BC5_UNORM;
569 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS: return SVGA3D_BC6H_TYPELESS;
570 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16: return SVGA3D_BC6H_UF16;
571 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16: return SVGA3D_BC6H_SF16;
572 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS: return SVGA3D_BC7_TYPELESS;
573 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM: return SVGA3D_BC7_UNORM;
574 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB: return SVGA3D_BC7_UNORM_SRGB;
575 default:
576 AssertFailed();
577 break;
578 }
579 return SVGA3D_FORMAT_INVALID;
580}
581
582
583static int vmsvgaDXCheckFormatSupportPreDX(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
584{
585 int rc = VINF_SUCCESS;
586
587 *pu32DevCap = 0;
588
589 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
590 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
591 {
592 RT_NOREF(pState);
593 /** @todo Implement */
594 }
595 else
596 rc = VERR_NOT_SUPPORTED;
597 return rc;
598}
599
600static int vmsvgaDXCheckFormatSupport(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
601{
602 int rc = VINF_SUCCESS;
603
604 *pu32DevCap = 0;
605
606 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
607 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
608 {
609 ID3D11Device *pDevice = pState->pBackend->device.pDevice;
610 UINT FormatSupport = 0;
611 HRESULT hr = pDevice->CheckFormatSupport(dxgiFormat, &FormatSupport);
612 if (SUCCEEDED(hr))
613 {
614 *pu32DevCap |= SVGA3D_DXFMT_SUPPORTED;
615
616 if (FormatSupport & D3D11_FORMAT_SUPPORT_SHADER_SAMPLE)
617 *pu32DevCap |= SVGA3D_DXFMT_SHADER_SAMPLE;
618
619 if (FormatSupport & D3D11_FORMAT_SUPPORT_RENDER_TARGET)
620 *pu32DevCap |= SVGA3D_DXFMT_COLOR_RENDERTARGET;
621
622 if (FormatSupport & D3D11_FORMAT_SUPPORT_DEPTH_STENCIL)
623 *pu32DevCap |= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
624
625 if (FormatSupport & D3D11_FORMAT_SUPPORT_BLENDABLE)
626 *pu32DevCap |= SVGA3D_DXFMT_BLENDABLE;
627
628 if (FormatSupport & D3D11_FORMAT_SUPPORT_MIP)
629 *pu32DevCap |= SVGA3D_DXFMT_MIPS;
630
631 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURECUBE)
632 *pu32DevCap |= SVGA3D_DXFMT_ARRAY;
633
634 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURE3D)
635 *pu32DevCap |= SVGA3D_DXFMT_VOLUME;
636
637 if (FormatSupport & D3D11_FORMAT_SUPPORT_IA_VERTEX_BUFFER)
638 *pu32DevCap |= SVGA3D_DXFMT_DX_VERTEX_BUFFER;
639
640 UINT NumQualityLevels;
641 hr = pDevice->CheckMultisampleQualityLevels(dxgiFormat, 2, &NumQualityLevels);
642 if (SUCCEEDED(hr) && NumQualityLevels != 0)
643 *pu32DevCap |= SVGA3D_DXFMT_MULTISAMPLE;
644 }
645 else
646 AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
647 }
648 else
649 rc = VERR_NOT_SUPPORTED;
650 return rc;
651}
652
653
654static int dxDeviceCreate(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
655{
656 int rc = VINF_SUCCESS;
657
658 IDXGIAdapter *pAdapter = NULL; /* Default adapter. */
659 static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
660 {
661 /// @todo Requires a Windows 8+ _SDKS: D3D_FEATURE_LEVEL_11_1,
662 D3D_FEATURE_LEVEL_11_0
663 };
664 UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
665#ifdef DEBUG
666 Flags |= D3D11_CREATE_DEVICE_DEBUG;
667#endif
668
669 HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
670 D3D_DRIVER_TYPE_HARDWARE,
671 NULL,
672 Flags,
673 s_aFeatureLevels,
674 RT_ELEMENTS(s_aFeatureLevels),
675 D3D11_SDK_VERSION,
676 &pDevice->pDevice,
677 &pDevice->FeatureLevel,
678 &pDevice->pImmediateContext);
679 if (SUCCEEDED(hr))
680 {
681 LogRel(("VMSVGA: Feature level %#x\n", pDevice->FeatureLevel));
682
683 IDXGIDevice *pDxgiDevice = 0;
684 hr = pDevice->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
685 if (SUCCEEDED(hr))
686 {
687 IDXGIAdapter *pDxgiAdapter = 0;
688 hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
689 if (SUCCEEDED(hr))
690 {
691 hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pDevice->pDxgiFactory);
692 D3D_RELEASE(pDxgiAdapter);
693 }
694
695 D3D_RELEASE(pDxgiDevice);
696 }
697 }
698
699 if (FAILED(hr))
700 rc = VERR_NOT_SUPPORTED;
701
702 return rc;
703}
704
705
706static void dxDeviceDestroy(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
707{
708 RT_NOREF(pBackend);
709 D3D_RELEASE(pDevice->pDevice);
710 D3D_RELEASE(pDevice->pImmediateContext);
711 D3D_RELEASE(pDevice->pDxgiFactory);
712 RT_ZERO(*pDevice);
713}
714
715
716static ID3D11Resource *dxResource(PVMSVGA3DSURFACE pSurface, VMSVGA3DDXCONTEXT *pDXContext)
717{
718 VMSVGA3DBACKENDSURFACE *pBackendSurface = pSurface->pBackendSurface;
719 if (!pBackendSurface)
720 AssertFailedReturn(NULL);
721
722 if (pDXContext->cid == pSurface->idAssociatedContext)
723 return pBackendSurface->u.Resource.pResource;
724
725 /*
726 * Another context is requesting.
727 */
728 /* Expecting this for screen targets only. */
729 Assert(pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET);
730 Assert(pSurface->idAssociatedContext == SVGA_ID_INVALID);
731
732 DXSHAREDTEXTURE *pSharedTexture = (DXSHAREDTEXTURE *)RTAvlU32Get(&pBackendSurface->SharedTextureTree, pDXContext->cid);
733 if (!pSharedTexture)
734 {
735 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
736 AssertReturn(pDevice->pDevice, NULL);
737
738 AssertReturn(pBackendSurface->u.ScreenTarget.SharedHandle, NULL);
739
740 /* This context has not yet opened the texture. */
741 pSharedTexture = (DXSHAREDTEXTURE *)RTMemAllocZ(sizeof(DXSHAREDTEXTURE));
742 AssertReturn(pSharedTexture, NULL);
743
744 pSharedTexture->Core.Key = pDXContext->cid;
745 bool const fSuccess = RTAvlU32Insert(&pBackendSurface->SharedTextureTree, &pSharedTexture->Core);
746 AssertReturn(fSuccess, NULL);
747
748 HRESULT hr = pDevice->pDevice->OpenSharedResource(pBackendSurface->u.ScreenTarget.SharedHandle, __uuidof(ID3D11Texture2D), (void**)&pSharedTexture->pTexture);
749 Assert(SUCCEEDED(hr));
750 if (SUCCEEDED(hr))
751 pSharedTexture->sid = pSurface->id;
752 else
753 {
754 RTAvlU32Remove(&pBackendSurface->SharedTextureTree, pDXContext->cid);
755 RTMemFree(pSharedTexture);
756 return NULL;
757 }
758 }
759
760 return pSharedTexture->pTexture;
761}
762
763
764/** @todo AssertCompile for types like D3D11_COMPARISON_FUNC and SVGA3dComparisonFunc */
765static HRESULT dxBlendStateCreate(DXDEVICE *pDevice, SVGACOTableDXBlendStateEntry const *pEntry, ID3D11BlendState **pp)
766{
767 D3D11_BLEND_DESC BlendDesc;
768 BlendDesc.AlphaToCoverageEnable = RT_BOOL(pEntry->alphaToCoverageEnable);
769 BlendDesc.IndependentBlendEnable = RT_BOOL(pEntry->independentBlendEnable);
770 for (int i = 0; i < SVGA3D_MAX_RENDER_TARGETS; ++i)
771 {
772 BlendDesc.RenderTarget[i].BlendEnable = RT_BOOL(pEntry->perRT[i].blendEnable);
773 BlendDesc.RenderTarget[i].SrcBlend = (D3D11_BLEND)pEntry->perRT[i].srcBlend;
774 BlendDesc.RenderTarget[i].DestBlend = (D3D11_BLEND)pEntry->perRT[i].destBlend;
775 BlendDesc.RenderTarget[i].BlendOp = (D3D11_BLEND_OP)pEntry->perRT[i].blendOp;
776 BlendDesc.RenderTarget[i].SrcBlendAlpha = (D3D11_BLEND)pEntry->perRT[i].srcBlendAlpha;
777 BlendDesc.RenderTarget[i].DestBlendAlpha = (D3D11_BLEND)pEntry->perRT[i].destBlendAlpha;
778 BlendDesc.RenderTarget[i].BlendOpAlpha = (D3D11_BLEND_OP)pEntry->perRT[i].blendOpAlpha;
779 BlendDesc.RenderTarget[i].RenderTargetWriteMask = pEntry->perRT[i].renderTargetWriteMask;
780 /** @todo logicOpEnable and logicOp */
781 }
782
783 HRESULT hr = pDevice->pDevice->CreateBlendState(&BlendDesc, pp);
784 Assert(SUCCEEDED(hr));
785 return hr;
786}
787
788
789static HRESULT dxDepthStencilStateCreate(DXDEVICE *pDevice, SVGACOTableDXDepthStencilEntry const *pEntry, ID3D11DepthStencilState **pp)
790{
791 D3D11_DEPTH_STENCIL_DESC desc;
792 desc.DepthEnable = pEntry->depthEnable;
793 desc.DepthWriteMask = (D3D11_DEPTH_WRITE_MASK)pEntry->depthWriteMask;
794 desc.DepthFunc = (D3D11_COMPARISON_FUNC)pEntry->depthFunc;
795 desc.StencilEnable = pEntry->stencilEnable;
796 desc.StencilReadMask = pEntry->stencilReadMask;
797 desc.StencilWriteMask = pEntry->stencilWriteMask;
798 desc.FrontFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilFailOp;
799 desc.FrontFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilDepthFailOp;
800 desc.FrontFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->frontStencilPassOp;
801 desc.FrontFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->frontStencilFunc;
802 desc.BackFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->backStencilFailOp;
803 desc.BackFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->backStencilDepthFailOp;
804 desc.BackFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->backStencilPassOp;
805 desc.BackFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->backStencilFunc;
806 /** @todo frontEnable, backEnable */
807
808 HRESULT hr = pDevice->pDevice->CreateDepthStencilState(&desc, pp);
809 Assert(SUCCEEDED(hr));
810 return hr;
811}
812
813
814static HRESULT dxSamplerStateCreate(DXDEVICE *pDevice, SVGACOTableDXSamplerEntry const *pEntry, ID3D11SamplerState **pp)
815{
816 D3D11_SAMPLER_DESC desc;
817 desc.Filter = (D3D11_FILTER)pEntry->filter;
818 desc.AddressU = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressU;
819 desc.AddressV = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressV;
820 desc.AddressW = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressW;
821 desc.MipLODBias = pEntry->mipLODBias;
822 desc.MaxAnisotropy = RT_CLAMP(pEntry->maxAnisotropy, 1, 16); /* "Valid values are between 1 and 16" */
823 desc.ComparisonFunc = (D3D11_COMPARISON_FUNC)pEntry->comparisonFunc;
824 desc.BorderColor[0] = pEntry->borderColor.value[0];
825 desc.BorderColor[1] = pEntry->borderColor.value[1];
826 desc.BorderColor[2] = pEntry->borderColor.value[2];
827 desc.BorderColor[3] = pEntry->borderColor.value[3];
828 desc.MinLOD = pEntry->minLOD;
829 desc.MaxLOD = pEntry->maxLOD;
830
831 HRESULT hr = pDevice->pDevice->CreateSamplerState(&desc, pp);
832 Assert(SUCCEEDED(hr));
833 return hr;
834}
835
836
837static HRESULT dxRasterizerStateCreate(DXDEVICE *pDevice, SVGACOTableDXRasterizerStateEntry const *pEntry, ID3D11RasterizerState **pp)
838{
839 D3D11_RASTERIZER_DESC desc;
840 desc.FillMode = (D3D11_FILL_MODE)pEntry->fillMode;
841 desc.CullMode = (D3D11_CULL_MODE)pEntry->cullMode;
842 desc.FrontCounterClockwise = pEntry->frontCounterClockwise;
843 /** @todo provokingVertexLast */
844 desc.DepthBias = pEntry->depthBias;
845 desc.DepthBiasClamp = pEntry->depthBiasClamp;
846 desc.SlopeScaledDepthBias = pEntry->slopeScaledDepthBias;
847 desc.DepthClipEnable = pEntry->depthClipEnable;
848 desc.ScissorEnable = pEntry->scissorEnable;
849 desc.MultisampleEnable = pEntry->multisampleEnable;
850 desc.AntialiasedLineEnable = pEntry->antialiasedLineEnable;
851 /** @todo lineWidth lineStippleEnable lineStippleFactor lineStipplePattern forcedSampleCount */
852
853 HRESULT hr = pDevice->pDevice->CreateRasterizerState(&desc, pp);
854 Assert(SUCCEEDED(hr));
855 return hr;
856}
857
858
859static HRESULT dxRenderTargetViewCreate(PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXRTViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11RenderTargetView **pp)
860{
861 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
862
863 ID3D11Resource *pResource = dxResource(pSurface, pDXContext);
864 //pBackendSurface->u.Texture.pTexture;
865
866 D3D11_RENDER_TARGET_VIEW_DESC desc;
867 RT_ZERO(desc);
868 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
869 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
870 switch (pEntry->resourceDimension)
871 {
872 case SVGA3D_RESOURCE_BUFFER:
873 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
874 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
875 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
876 break;
877 case SVGA3D_RESOURCE_TEXTURE1D:
878 if (pEntry->desc.tex.arraySize <= 1)
879 {
880 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1D;
881 desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
882 }
883 else
884 {
885 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1DARRAY;
886 desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
887 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
888 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
889 }
890 break;
891 case SVGA3D_RESOURCE_TEXTURE2D:
892 if (pEntry->desc.tex.arraySize <= 1)
893 {
894 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2D;
895 desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
896 }
897 else
898 {
899 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
900 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
901 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
902 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
903 }
904 break;
905 case SVGA3D_RESOURCE_TEXTURE3D:
906 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE3D;
907 desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
908 desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
909 desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
910 break;
911 case SVGA3D_RESOURCE_TEXTURECUBE:
912 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
913 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
914 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
915 desc.Texture2DArray.FirstArraySlice = 0;
916 desc.Texture2DArray.ArraySize = 6;
917 break;
918 case SVGA3D_RESOURCE_BUFFEREX:
919 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
920 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
921 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
922 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
923 break;
924 default:
925 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
926 }
927
928 HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pResource, &desc, pp);
929 Assert(SUCCEEDED(hr));
930 return hr;
931}
932
933
934static HRESULT dxShaderResourceViewCreate(PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXSRViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11ShaderResourceView **pp)
935{
936 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
937
938 ID3D11Resource *pResource = dxResource(pSurface, pDXContext);
939// ID3D11Resource *pResource = pBackendSurface->u.Texture.pTexture;
940
941 D3D11_SHADER_RESOURCE_VIEW_DESC desc;
942 RT_ZERO(desc);
943 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
944 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
945
946 switch (pEntry->resourceDimension)
947 {
948 case SVGA3D_RESOURCE_BUFFER:
949 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFER;
950 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
951 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
952 break;
953 case SVGA3D_RESOURCE_TEXTURE1D:
954 if (pEntry->desc.tex.arraySize <= 1)
955 {
956 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1D;
957 desc.Texture1D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
958 desc.Texture1D.MipLevels = pEntry->desc.tex.mipLevels;
959 }
960 else
961 {
962 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1DARRAY;
963 desc.Texture1DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
964 desc.Texture1DArray.MipLevels = pEntry->desc.tex.mipLevels;
965 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
966 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
967 }
968 break;
969 case SVGA3D_RESOURCE_TEXTURE2D:
970 if (pEntry->desc.tex.arraySize <= 1)
971 {
972 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2D;
973 desc.Texture2D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
974 desc.Texture2D.MipLevels = pEntry->desc.tex.mipLevels;
975 }
976 else
977 {
978 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2DARRAY;
979 desc.Texture2DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
980 desc.Texture2DArray.MipLevels = pEntry->desc.tex.mipLevels;
981 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
982 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
983 }
984 break;
985 case SVGA3D_RESOURCE_TEXTURE3D:
986 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE3D;
987 desc.Texture3D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
988 desc.Texture3D.MipLevels = pEntry->desc.tex.mipLevels;
989 break;
990 case SVGA3D_RESOURCE_TEXTURECUBE:
991 AssertFailed(); /** @todo test. */
992 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBE;
993 desc.TextureCube.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
994 desc.TextureCube.MipLevels = pEntry->desc.tex.mipLevels;
995 break;
996 case SVGA3D_RESOURCE_BUFFEREX:
997 AssertFailed(); /** @todo test. */
998 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFEREX;
999 desc.BufferEx.FirstElement = pEntry->desc.bufferex.firstElement;
1000 desc.BufferEx.NumElements = pEntry->desc.bufferex.numElements;
1001 desc.BufferEx.Flags = pEntry->desc.bufferex.flags;
1002 break;
1003 default:
1004 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1005 }
1006
1007 HRESULT hr = pDevice->pDevice->CreateShaderResourceView(pResource, &desc, pp);
1008 Assert(SUCCEEDED(hr));
1009 return hr;
1010}
1011
1012
1013static HRESULT dxDepthStencilViewCreate(DXDEVICE *pDevice, SVGACOTableDXDSViewEntry const *pEntry, VMSVGA3DBACKENDSURFACE *pBackendSurface, ID3D11DepthStencilView **pp)
1014{
1015 ID3D11Resource *pResource = pBackendSurface->u.Texture.pTexture;
1016
1017 D3D11_DEPTH_STENCIL_VIEW_DESC desc;
1018 RT_ZERO(desc);
1019 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1020 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
1021 desc.Flags = pEntry->flags;
1022 switch (pEntry->resourceDimension)
1023 {
1024 case SVGA3D_RESOURCE_TEXTURE1D:
1025 if (pEntry->arraySize <= 1)
1026 {
1027 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1D;
1028 desc.Texture1D.MipSlice = pEntry->mipSlice;
1029 }
1030 else
1031 {
1032 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1DARRAY;
1033 desc.Texture1DArray.MipSlice = pEntry->mipSlice;
1034 desc.Texture1DArray.FirstArraySlice = pEntry->firstArraySlice;
1035 desc.Texture1DArray.ArraySize = pEntry->arraySize;
1036 }
1037 break;
1038 case SVGA3D_RESOURCE_TEXTURE2D:
1039 if (pEntry->arraySize <= 1)
1040 {
1041 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2D;
1042 desc.Texture2D.MipSlice = pEntry->mipSlice;
1043 }
1044 else
1045 {
1046 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2DARRAY;
1047 desc.Texture2DArray.MipSlice = pEntry->mipSlice;
1048 desc.Texture2DArray.FirstArraySlice = pEntry->firstArraySlice;
1049 desc.Texture2DArray.ArraySize = pEntry->arraySize;
1050 }
1051 break;
1052 default:
1053 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1054 }
1055
1056 HRESULT hr = pDevice->pDevice->CreateDepthStencilView(pResource, &desc, pp);
1057 Assert(SUCCEEDED(hr));
1058 return hr;
1059}
1060
1061
1062static HRESULT dxShaderCreate(DXDEVICE *pDevice, PVMSVGA3DSHADER pShader, DXSHADER *pDXShader)
1063{
1064 HRESULT hr = S_OK;
1065
1066 switch (pShader->type)
1067 {
1068 case SVGA3D_SHADERTYPE_VS:
1069 hr = pDevice->pDevice->CreateVertexShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pVertexShader);
1070 Assert(SUCCEEDED(hr));
1071 break;
1072 case SVGA3D_SHADERTYPE_PS:
1073 hr = pDevice->pDevice->CreatePixelShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pPixelShader);
1074 Assert(SUCCEEDED(hr));
1075 break;
1076 case SVGA3D_SHADERTYPE_GS:
1077 case SVGA3D_SHADERTYPE_HS:
1078 case SVGA3D_SHADERTYPE_DS:
1079 case SVGA3D_SHADERTYPE_CS:
1080 default:
1081 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1082 }
1083
1084 return hr;
1085}
1086
1087
1088static void dxShaderSet(DXDEVICE *pDevice, SVGA3dShaderType type, DXSHADER *pDXShader)
1089{
1090 switch (type)
1091 {
1092 case SVGA3D_SHADERTYPE_VS:
1093 pDevice->pImmediateContext->VSSetShader(pDXShader ? pDXShader->pVertexShader : NULL, NULL, 0);
1094 break;
1095 case SVGA3D_SHADERTYPE_PS:
1096 pDevice->pImmediateContext->PSSetShader(pDXShader ? pDXShader->pPixelShader : NULL, NULL, 0);
1097 break;
1098 case SVGA3D_SHADERTYPE_GS:
1099 case SVGA3D_SHADERTYPE_HS:
1100 case SVGA3D_SHADERTYPE_DS:
1101 case SVGA3D_SHADERTYPE_CS:
1102 default:
1103 ASSERT_GUEST_FAILED_RETURN_VOID();
1104 }
1105}
1106
1107
1108static void dxConstantBufferSet(DXDEVICE *pDevice, uint32_t slot, SVGA3dShaderType type, ID3D11Buffer *pConstantBuffer)
1109{
1110 switch (type)
1111 {
1112 case SVGA3D_SHADERTYPE_VS:
1113 pDevice->pImmediateContext->VSSetConstantBuffers(slot, 1, &pConstantBuffer);
1114 break;
1115 case SVGA3D_SHADERTYPE_PS:
1116 pDevice->pImmediateContext->PSSetConstantBuffers(slot, 1, &pConstantBuffer);
1117 break;
1118 case SVGA3D_SHADERTYPE_GS:
1119 case SVGA3D_SHADERTYPE_HS:
1120 case SVGA3D_SHADERTYPE_DS:
1121 case SVGA3D_SHADERTYPE_CS:
1122 default:
1123 ASSERT_GUEST_FAILED_RETURN_VOID();
1124 }
1125}
1126
1127
1128static void dxSamplerSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startSampler, uint32_t cSampler, ID3D11SamplerState * const *papSampler)
1129{
1130 switch (type)
1131 {
1132 case SVGA3D_SHADERTYPE_VS:
1133 pDevice->pImmediateContext->VSSetSamplers(startSampler, cSampler, papSampler);
1134 break;
1135 case SVGA3D_SHADERTYPE_PS:
1136 pDevice->pImmediateContext->PSSetSamplers(startSampler, cSampler, papSampler);
1137 break;
1138 case SVGA3D_SHADERTYPE_GS:
1139 case SVGA3D_SHADERTYPE_HS:
1140 case SVGA3D_SHADERTYPE_DS:
1141 case SVGA3D_SHADERTYPE_CS:
1142 default:
1143 ASSERT_GUEST_FAILED_RETURN_VOID();
1144 }
1145}
1146
1147
1148static void dxShaderResourceViewSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startView, uint32_t cShaderResourceView, ID3D11ShaderResourceView * const *papShaderResourceView)
1149{
1150 switch (type)
1151 {
1152 case SVGA3D_SHADERTYPE_VS:
1153 pDevice->pImmediateContext->VSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
1154 break;
1155 case SVGA3D_SHADERTYPE_PS:
1156 pDevice->pImmediateContext->PSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
1157 break;
1158 case SVGA3D_SHADERTYPE_GS:
1159 case SVGA3D_SHADERTYPE_HS:
1160 case SVGA3D_SHADERTYPE_DS:
1161 case SVGA3D_SHADERTYPE_CS:
1162 default:
1163 ASSERT_GUEST_FAILED_RETURN_VOID();
1164 }
1165}
1166
1167
1168static int vmsvga3dBackSurfaceCreateScreenTarget(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
1169{
1170 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1171 AssertReturn(p3dState, VERR_INVALID_STATE);
1172
1173 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
1174 AssertReturn(pBackend, VERR_INVALID_STATE);
1175
1176 DXDEVICE *pDXDevice = &pBackend->device;
1177 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
1178
1179 /* Surface must have SCREEN_TARGET flag. */
1180 ASSERT_GUEST_RETURN(RT_BOOL(pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET), VERR_INVALID_PARAMETER);
1181
1182 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1183 {
1184 AssertFailed(); /* Should the function not be used like that? */
1185 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
1186 }
1187
1188 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1189 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1190
1191 D3D11_TEXTURE2D_DESC td;
1192 RT_ZERO(td);
1193 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1194 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1195 Assert(pSurface->cLevels == 1);
1196 td.MipLevels = 1;
1197 td.ArraySize = 1;
1198 td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
1199 td.SampleDesc.Count = 1;
1200 td.SampleDesc.Quality = 0;
1201 td.Usage = D3D11_USAGE_DEFAULT;
1202 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1203 td.CPUAccessFlags = 0;
1204 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED;
1205
1206 HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pTexture);
1207 Assert(SUCCEEDED(hr));
1208 if (SUCCEEDED(hr))
1209 {
1210 /* Map-able texture. */
1211 td.Usage = D3D11_USAGE_DYNAMIC;
1212 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1213 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1214 td.MiscFlags = 0;
1215 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pDynamicTexture);
1216 Assert(SUCCEEDED(hr));
1217 }
1218
1219 if (SUCCEEDED(hr))
1220 {
1221 /* Staging texture. */
1222 td.Usage = D3D11_USAGE_STAGING;
1223 td.BindFlags = 0; /* No flags allowed. */
1224 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1225 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pStagingTexture);
1226 Assert(SUCCEEDED(hr));
1227 }
1228
1229 if (SUCCEEDED(hr))
1230 {
1231 /* Get the shared handle. */
1232 IDXGIResource *pDxgiResource = NULL;
1233 hr = pBackendSurface->u.ScreenTarget.pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
1234 Assert(SUCCEEDED(hr));
1235 if (SUCCEEDED(hr))
1236 {
1237 hr = pDxgiResource->GetSharedHandle(&pBackendSurface->u.ScreenTarget.SharedHandle);
1238 Assert(SUCCEEDED(hr));
1239 D3D_RELEASE(pDxgiResource);
1240 }
1241 }
1242
1243 if (SUCCEEDED(hr))
1244 {
1245 /*
1246 * Success.
1247 */
1248 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
1249 pBackendSurface->enmDxgiFormat = td.Format;
1250 pSurface->pBackendSurface = pBackendSurface;
1251 pSurface->idAssociatedContext = SVGA_ID_INVALID;
1252 pSurface->fDirty = true;
1253 return VINF_SUCCESS;
1254 }
1255
1256 /* Failure. */
1257 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pStagingTexture);
1258 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pDynamicTexture);
1259 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pTexture);
1260 RTMemFree(pBackendSurface);
1261 return VERR_NO_MEMORY;
1262}
1263
1264
1265static UINT dxBindFlags(SVGA3dSurfaceAllFlags surfaceFlags)
1266{
1267 /* Catch unimplemented flags. */
1268 Assert(!RT_BOOL(surfaceFlags & (SVGA3D_SURFACE_BIND_LOGICOPS | SVGA3D_SURFACE_BIND_RAW_VIEWS)));
1269
1270 UINT BindFlags = 0;
1271
1272 if (surfaceFlags & SVGA3D_SURFACE_BIND_VERTEX_BUFFER) BindFlags |= D3D11_BIND_VERTEX_BUFFER;
1273 if (surfaceFlags & SVGA3D_SURFACE_BIND_INDEX_BUFFER) BindFlags |= D3D11_BIND_INDEX_BUFFER;
1274 if (surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) BindFlags |= D3D11_BIND_CONSTANT_BUFFER;
1275 if (surfaceFlags & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) BindFlags |= D3D11_BIND_SHADER_RESOURCE;
1276 if (surfaceFlags & SVGA3D_SURFACE_BIND_RENDER_TARGET) BindFlags |= D3D11_BIND_RENDER_TARGET;
1277 if (surfaceFlags & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) BindFlags |= D3D11_BIND_DEPTH_STENCIL;
1278 if (surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) BindFlags |= D3D11_BIND_STREAM_OUTPUT;
1279 if (surfaceFlags & SVGA3D_SURFACE_BIND_UAVIEW) BindFlags |= D3D11_BIND_UNORDERED_ACCESS;
1280
1281 return BindFlags;
1282}
1283
1284
1285static int vmsvga3dBackSurfaceCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1286{
1287 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1288 AssertReturn(p3dState, VERR_INVALID_STATE);
1289
1290 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1291 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1292
1293 if (pSurface->pBackendSurface != NULL)
1294 {
1295 AssertFailed(); /** @todo Should the function not be used like that? */
1296 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
1297 }
1298
1299 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1300 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1301
1302 uint32_t const cWidth = pSurface->paMipmapLevels[0].mipmapSize.width;
1303 uint32_t const cHeight = pSurface->paMipmapLevels[0].mipmapSize.height;
1304 uint32_t const cDepth = pSurface->paMipmapLevels[0].mipmapSize.depth;
1305 uint32_t const numMipLevels = pSurface->cLevels;
1306
1307 DXGI_FORMAT dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
1308 AssertReturn(dxgiFormat != DXGI_FORMAT_UNKNOWN, E_FAIL);
1309
1310 /*
1311 * Create D3D11 texture object.
1312 */
1313 HRESULT hr = S_OK;
1314 if (pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET)
1315 {
1316 /*
1317 * Create the texture in backend device and open for the specified context.
1318 */
1319 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
1320 AssertReturn(pBackend, VERR_INVALID_STATE);
1321
1322 DXDEVICE *pDXDevice = &pBackend->device;
1323 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
1324
1325 D3D11_TEXTURE2D_DESC td;
1326 RT_ZERO(td);
1327 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1328 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1329 Assert(pSurface->cLevels == 1);
1330 td.MipLevels = 1;
1331 td.ArraySize = 1;
1332 td.Format = dxgiFormat;
1333 td.SampleDesc.Count = 1;
1334 td.SampleDesc.Quality = 0;
1335 td.Usage = D3D11_USAGE_DEFAULT;
1336 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1337 td.CPUAccessFlags = 0;
1338 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED;
1339
1340 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pTexture);
1341 Assert(SUCCEEDED(hr));
1342 if (SUCCEEDED(hr))
1343 {
1344 /* Map-able texture. */
1345 td.Usage = D3D11_USAGE_DYNAMIC;
1346 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1347 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1348 td.MiscFlags = 0;
1349 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pDynamicTexture);
1350 Assert(SUCCEEDED(hr));
1351 }
1352
1353 if (SUCCEEDED(hr))
1354 {
1355 /* Staging texture. */
1356 td.Usage = D3D11_USAGE_STAGING;
1357 td.BindFlags = 0; /* No flags allowed. */
1358 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1359 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pStagingTexture);
1360 Assert(SUCCEEDED(hr));
1361 }
1362
1363 if (SUCCEEDED(hr))
1364 {
1365 /* Get the shared handle. */
1366 IDXGIResource *pDxgiResource = NULL;
1367 hr = pBackendSurface->u.ScreenTarget.pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
1368 Assert(SUCCEEDED(hr));
1369 if (SUCCEEDED(hr))
1370 {
1371 hr = pDxgiResource->GetSharedHandle(&pBackendSurface->u.ScreenTarget.SharedHandle);
1372 Assert(SUCCEEDED(hr));
1373 D3D_RELEASE(pDxgiResource);
1374 }
1375 }
1376
1377 if (SUCCEEDED(hr))
1378 {
1379 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
1380 }
1381 }
1382 else if (pSurface->surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
1383 {
1384 Assert(pSurface->cFaces == 6);
1385 Assert(cWidth == cHeight);
1386 Assert(cDepth == 1);
1387
1388 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_CUBE_TEXTURE;
1389 AssertFailed(); /** @todo implement */
1390 hr = E_FAIL;
1391 }
1392 else if (pSurface->surfaceFlags & SVGA3D_SURFACE_1D)
1393 {
1394 AssertFailed(); /** @todo implement */
1395 hr = E_FAIL;
1396 }
1397 else
1398 {
1399 if (cDepth > 1)
1400 {
1401 /*
1402 * Volume texture.
1403 */
1404 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_3D;
1405 AssertFailed(); /** @todo implement */
1406 hr = E_FAIL;
1407 }
1408 else
1409 {
1410 /*
1411 * 2D texture.
1412 */
1413 Assert(pSurface->cFaces == 1);
1414
1415 D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
1416 D3D11_SUBRESOURCE_DATA aInitialData[SVGA3D_MAX_MIP_LEVELS];
1417 if (pSurface->paMipmapLevels[0].pSurfaceData)
1418 {
1419 /** @todo Can happen for a non GBO surface. Test this. */
1420 for (uint32_t i = 0; i < numMipLevels; ++i)
1421 {
1422 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1423 D3D11_SUBRESOURCE_DATA *p = &aInitialData[i];
1424 p->pSysMem = pMipmapLevel->pSurfaceData;
1425 p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
1426 p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
1427 }
1428 paInitialData = &aInitialData[0];
1429 }
1430
1431 D3D11_TEXTURE2D_DESC td;
1432 RT_ZERO(td);
1433 td.Width = cWidth;
1434 td.Height = cHeight;
1435 td.MipLevels = numMipLevels;
1436 td.ArraySize = 1; /** @todo */
1437 td.Format = dxgiFormat;
1438 td.SampleDesc.Count = 1;
1439 td.SampleDesc.Quality = 0;
1440 td.Usage = D3D11_USAGE_DEFAULT;
1441 td.BindFlags = dxBindFlags(pSurface->surfaceFlags);
1442 td.CPUAccessFlags = 0; /** @todo */
1443 td.MiscFlags = 0; /** @todo */
1444 if ( numMipLevels > 1
1445 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
1446 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
1447
1448 hr = pDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.Texture.pTexture);
1449 Assert(SUCCEEDED(hr));
1450 if (SUCCEEDED(hr))
1451 {
1452 /* Map-able texture. */
1453 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
1454 td.Usage = D3D11_USAGE_DYNAMIC;
1455 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1456 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1457 td.MiscFlags = 0;
1458 hr = pDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.Texture.pDynamicTexture);
1459 Assert(SUCCEEDED(hr));
1460 }
1461
1462 if (SUCCEEDED(hr))
1463 {
1464 /* Staging texture. */
1465 td.Usage = D3D11_USAGE_STAGING;
1466 td.BindFlags = 0; /* No flags allowed. */
1467 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1468 td.MiscFlags = 0;
1469 hr = pDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.Texture.pStagingTexture);
1470 Assert(SUCCEEDED(hr));
1471 }
1472
1473 if (SUCCEEDED(hr))
1474 {
1475 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE;
1476 }
1477 }
1478 }
1479
1480 Assert(hr == S_OK);
1481
1482 if (pSurface->autogenFilter != SVGA3D_TEX_FILTER_NONE)
1483 {
1484 }
1485
1486 if (SUCCEEDED(hr))
1487 {
1488 /*
1489 * Success.
1490 */
1491 pBackendSurface->enmDxgiFormat = dxgiFormat;
1492 pSurface->pBackendSurface = pBackendSurface;
1493 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
1494 pSurface->idAssociatedContext = SVGA_ID_INVALID;
1495 else
1496 pSurface->idAssociatedContext = pDXContext->cid;
1497 return VINF_SUCCESS;
1498 }
1499
1500 /* Failure. */
1501 D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture);
1502 D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture);
1503 D3D_RELEASE(pBackendSurface->u.Texture.pTexture);
1504 RTMemFree(pBackendSurface);
1505 return VERR_NO_MEMORY;
1506}
1507
1508
1509static int vmsvga3dBackSurfaceCreateDepthStencilTexture(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1510{
1511 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1512 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1513
1514 if (pSurface->pBackendSurface != NULL)
1515 {
1516 AssertFailed(); /** @todo Should the function not be used like that? */
1517 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
1518 }
1519
1520 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1521 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1522
1523 D3D11_TEXTURE2D_DESC td;
1524 RT_ZERO(td);
1525 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1526 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1527 Assert(pSurface->cLevels == 1);
1528 td.MipLevels = 1;
1529 td.ArraySize = 1;
1530 td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
1531 AssertReturn(td.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
1532 td.SampleDesc.Count = 1;
1533 td.SampleDesc.Quality = 0;
1534 td.Usage = D3D11_USAGE_DEFAULT;
1535 td.BindFlags = D3D11_BIND_DEPTH_STENCIL;
1536 td.CPUAccessFlags = 0;
1537 td.MiscFlags = 0;
1538
1539 HRESULT hr = pDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.Texture.pTexture);
1540 Assert(SUCCEEDED(hr));
1541 if (SUCCEEDED(hr))
1542 {
1543 /*
1544 * Success.
1545 */
1546 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE;
1547 pBackendSurface->enmDxgiFormat = td.Format;
1548 pSurface->pBackendSurface = pBackendSurface;
1549 pSurface->idAssociatedContext = pDXContext->cid;
1550 pSurface->fDirty = true;
1551 return VINF_SUCCESS;
1552 }
1553
1554 /* Failure. */
1555 D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture);
1556 D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture);
1557 D3D_RELEASE(pBackendSurface->u.Texture.pTexture);
1558 RTMemFree(pBackendSurface);
1559 return VERR_NO_MEMORY;
1560}
1561
1562
1563static int vmsvga3dBackSurfaceCreateBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1564{
1565 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1566 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1567
1568 /* Buffers should be created as such. */
1569 AssertReturn(RT_BOOL(pSurface->surfaceFlags & ( SVGA3D_SURFACE_HINT_INDEXBUFFER
1570 | SVGA3D_SURFACE_HINT_VERTEXBUFFER
1571 | SVGA3D_SURFACE_BIND_VERTEX_BUFFER
1572 | SVGA3D_SURFACE_BIND_INDEX_BUFFER
1573 /// @todo only for constant buffers| SVGA3D_SURFACE_BIND_CONSTANT_BUFFER
1574 //| SVGA3D_SURFACE_BIND_STREAM_OUTPUT
1575 )), VERR_INVALID_PARAMETER);
1576
1577 if (pSurface->pBackendSurface != NULL)
1578 {
1579 AssertFailed(); /** @todo Should the function not be used like that? */
1580 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
1581 }
1582
1583 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1584 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1585
1586 D3D11_BUFFER_DESC bd;
1587 RT_ZERO(bd);
1588 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1589 bd.Usage = D3D11_USAGE_DYNAMIC;
1590 bd.BindFlags = D3D11_BIND_VERTEX_BUFFER
1591 | D3D11_BIND_INDEX_BUFFER
1592 //| D3D11_BIND_CONSTANT_BUFFER
1593 //| D3D11_BIND_STREAM_OUTPUT
1594 ;
1595 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1596 bd.MiscFlags = 0;
1597 bd.StructureByteStride = 0;
1598
1599 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.Buffer.pBuffer);
1600 if (SUCCEEDED(hr))
1601 {
1602 /*
1603 * Success.
1604 */
1605 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1606 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1607 pSurface->pBackendSurface = pBackendSurface;
1608 pSurface->idAssociatedContext = pDXContext->cid;
1609 pSurface->fDirty = true;
1610 return VINF_SUCCESS;
1611 }
1612
1613 /* Failure. */
1614 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1615 RTMemFree(pBackendSurface);
1616 return VERR_NO_MEMORY;
1617}
1618
1619
1620static int vmsvga3dBackSurfaceCreateConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1621{
1622 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1623 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1624
1625 /* Buffers should be created as such. */
1626 AssertReturn(RT_BOOL(pSurface->surfaceFlags & ( SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)), VERR_INVALID_PARAMETER);
1627
1628 if (pSurface->pBackendSurface != NULL)
1629 {
1630 AssertFailed(); /** @todo Should the function not be used like that? */
1631 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
1632 }
1633
1634 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1635 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1636
1637 D3D11_BUFFER_DESC bd;
1638 RT_ZERO(bd);
1639 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1640 bd.Usage = D3D11_USAGE_DYNAMIC;
1641 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
1642 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1643 bd.MiscFlags = 0;
1644 bd.StructureByteStride = 0;
1645
1646 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.Buffer.pBuffer);
1647 if (SUCCEEDED(hr))
1648 {
1649 /*
1650 * Success.
1651 */
1652 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1653 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1654 pSurface->pBackendSurface = pBackendSurface;
1655 pSurface->idAssociatedContext = pDXContext->cid;
1656 pSurface->fDirty = true;
1657 return VINF_SUCCESS;
1658 }
1659
1660 /* Failure. */
1661 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1662 RTMemFree(pBackendSurface);
1663 return VERR_NO_MEMORY;
1664}
1665
1666
1667static HRESULT dxCreateConstantBuffer(DXDEVICE *pDevice, VMSVGA3DSURFACE const *pSurface, PVMSVGA3DBACKENDSURFACE pBackendSurface)
1668{
1669 D3D11_SUBRESOURCE_DATA *pInitialData = NULL; /** @todo */
1670 D3D11_BUFFER_DESC bd;
1671 RT_ZERO(bd);
1672 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1673 bd.Usage = D3D11_USAGE_DYNAMIC; /** @todo HINT_STATIC */
1674 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
1675 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1676 bd.MiscFlags = 0;
1677 bd.StructureByteStride = 0;
1678
1679 return pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.Buffer.pBuffer);
1680}
1681
1682
1683static HRESULT dxCreateBuffer(DXDEVICE *pDevice, VMSVGA3DSURFACE const *pSurface, PVMSVGA3DBACKENDSURFACE pBackendSurface)
1684{
1685 D3D11_SUBRESOURCE_DATA *pInitialData = NULL; /** @todo */
1686 D3D11_BUFFER_DESC bd;
1687 RT_ZERO(bd);
1688 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1689 bd.Usage = D3D11_USAGE_DYNAMIC; /** @todo HINT_STATIC */
1690 bd.BindFlags = D3D11_BIND_VERTEX_BUFFER
1691 | D3D11_BIND_INDEX_BUFFER;
1692 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1693 bd.MiscFlags = 0;
1694 bd.StructureByteStride = 0;
1695
1696 return pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.Buffer.pBuffer);
1697}
1698
1699
1700static int vmsvga3dBackSurfaceCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1701{
1702 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1703 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1704
1705 if (pSurface->pBackendSurface != NULL)
1706 {
1707 AssertFailed(); /** @todo Should the function not be used like that? */
1708 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
1709 }
1710
1711 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1712 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1713
1714 HRESULT hr;
1715
1716 /*
1717 * Figure out the type of the surface.
1718 */
1719 if (pSurface->surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)
1720 {
1721 hr = dxCreateConstantBuffer(pDevice, pSurface, pBackendSurface);
1722 if (SUCCEEDED(hr))
1723 {
1724 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1725 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1726 }
1727 else
1728 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1729 }
1730 else if (pSurface->surfaceFlags & ( SVGA3D_SURFACE_BIND_VERTEX_BUFFER
1731 | SVGA3D_SURFACE_BIND_INDEX_BUFFER
1732 | SVGA3D_SURFACE_HINT_VERTEXBUFFER
1733 | SVGA3D_SURFACE_HINT_INDEXBUFFER))
1734 {
1735 hr = dxCreateBuffer(pDevice, pSurface, pBackendSurface);
1736 if (SUCCEEDED(hr))
1737 {
1738 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1739 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1740 }
1741 else
1742 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1743 }
1744 else
1745 {
1746 AssertFailed(); /** @todo implement */
1747 hr = E_FAIL;
1748 }
1749
1750 if (SUCCEEDED(hr))
1751 {
1752 /*
1753 * Success.
1754 */
1755 pSurface->pBackendSurface = pBackendSurface;
1756 pSurface->idAssociatedContext = pDXContext->cid;
1757 return VINF_SUCCESS;
1758 }
1759
1760 /* Failure. */
1761 RTMemFree(pBackendSurface);
1762 return VERR_NO_MEMORY;
1763}
1764
1765
1766static DECLCALLBACK(int) vmsvga3dBackInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
1767{
1768 RT_NOREF(pDevIns, pThis);
1769
1770 PVMSVGA3DSTATE pState = (PVMSVGA3DSTATE)RTMemAllocZ(sizeof(VMSVGA3DSTATE));
1771 AssertReturn(pState, VERR_NO_MEMORY);
1772 pThisCC->svga.p3dState = pState;
1773
1774 PVMSVGA3DBACKEND pBackend = (PVMSVGA3DBACKEND)RTMemAllocZ(sizeof(VMSVGA3DBACKEND));
1775 AssertReturn(pBackend, VERR_NO_MEMORY);
1776 pState->pBackend = pBackend;
1777
1778 int rc = RTLdrLoadSystem("d3d11", /* fNoUnload = */ true, &pBackend->hD3D11);
1779 AssertRC(rc);
1780 if (RT_SUCCESS(rc))
1781 {
1782 rc = RTLdrGetSymbol(pBackend->hD3D11, "D3D11CreateDevice", (void **)&pBackend->pfnD3D11CreateDevice);
1783 AssertRC(rc);
1784 }
1785
1786 rc = RTLdrLoadSystem("D3DCompiler_47", /* fNoUnload = */ true, &pBackend->hD3DCompiler);
1787 AssertRC(rc);
1788 if (RT_SUCCESS(rc))
1789 {
1790 rc = RTLdrGetSymbol(pBackend->hD3DCompiler, "D3DDisassemble", (void **)&pBackend->pfnD3DDisassemble);
1791 AssertRC(rc);
1792 }
1793
1794 return rc;
1795}
1796
1797
1798static DECLCALLBACK(int) vmsvga3dBackPowerOn(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
1799{
1800 RT_NOREF(pDevIns, pThis);
1801
1802 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1803 AssertReturn(pState, VERR_INVALID_STATE);
1804
1805 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1806 AssertReturn(pBackend, VERR_INVALID_STATE);
1807
1808 int rc = dxDeviceCreate(pBackend, &pBackend->device);
1809 return rc;
1810}
1811
1812
1813static DECLCALLBACK(int) vmsvga3dBackTerminate(PVGASTATECC pThisCC)
1814{
1815 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1816 AssertReturn(pState, VERR_INVALID_STATE);
1817
1818 if (pState->pBackend)
1819 {
1820 dxDeviceDestroy(pState->pBackend, &pState->pBackend->device);
1821
1822 RTMemFree(pState->pBackend);
1823 pState->pBackend = NULL;
1824 }
1825
1826 return VINF_SUCCESS;
1827}
1828
1829
1830static DECLCALLBACK(int) vmsvga3dBackReset(PVGASTATECC pThisCC)
1831{
1832 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1833 AssertReturn(pState, VERR_INVALID_STATE);
1834
1835 /** @todo Cleanup all resources and recreate Device, ImmediateContext etc to be at the same state as after poweron. */
1836
1837 return VINF_SUCCESS;
1838}
1839
1840
1841static int vmsvga3dDrvNotifyDefineScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1842{
1843 /** @todo Such structures must be in VBoxVideo3D.h */
1844 typedef struct VBOX3DNOTIFYDEFINESCREEN
1845 {
1846 VBOX3DNOTIFY Core;
1847 uint32_t cWidth;
1848 uint32_t cHeight;
1849 int32_t xRoot;
1850 int32_t yRoot;
1851 uint32_t fPrimary;
1852 uint32_t cDpi;
1853 } VBOX3DNOTIFYDEFINESCREEN;
1854
1855 VBOX3DNOTIFYDEFINESCREEN n;
1856 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_CREATED;
1857 n.Core.iDisplay = pScreen->idScreen;
1858 n.Core.u32Reserved = 0;
1859 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1860 RT_ZERO(n.Core.au8Data);
1861 n.cWidth = pScreen->cWidth;
1862 n.cHeight = pScreen->cHeight;
1863 n.xRoot = pScreen->xOrigin;
1864 n.yRoot = pScreen->yOrigin;
1865 n.fPrimary = RT_BOOL(pScreen->fuScreen & SVGA_SCREEN_IS_PRIMARY);
1866 n.cDpi = pScreen->cDpi;
1867
1868 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
1869}
1870
1871
1872static int vmsvga3dDrvNotifyDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1873{
1874 VBOX3DNOTIFY n;
1875 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_DESTROYED;
1876 n.iDisplay = pScreen->idScreen;
1877 n.u32Reserved = 0;
1878 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1879 RT_ZERO(n.au8Data);
1880
1881 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
1882}
1883
1884
1885static int vmsvga3dDrvNotifyBindSurface(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, HANDLE hSharedSurface)
1886{
1887 VBOX3DNOTIFY n;
1888 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_BIND_SURFACE;
1889 n.iDisplay = pScreen->idScreen;
1890 n.u32Reserved = 0;
1891 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1892 *(uint64_t *)&n.au8Data[0] = (uint64_t)hSharedSurface;
1893
1894 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
1895}
1896
1897
1898static int vmsvga3dDrvNotifyUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
1899 uint32_t x, uint32_t y, uint32_t w, uint32_t h)
1900{
1901 typedef struct VBOX3DNOTIFYUPDATE
1902 {
1903 VBOX3DNOTIFY Core;
1904 uint32_t x;
1905 uint32_t y;
1906 uint32_t w;
1907 uint32_t h;
1908 } VBOX3DNOTIFYUPDATE;
1909
1910 VBOX3DNOTIFYUPDATE n;
1911 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_UPDATE_END;
1912 n.Core.iDisplay = pScreen->idScreen;
1913 n.Core.u32Reserved = 0;
1914 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1915 RT_ZERO(n.Core.au8Data);
1916 n.x = x;
1917 n.y = y;
1918 n.w = w;
1919 n.h = h;
1920
1921 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
1922}
1923
1924static int vmsvga3dHwScreenCreate(PVMSVGA3DSTATE pState, uint32_t cWidth, uint32_t cHeight, VMSVGAHWSCREEN *p)
1925{
1926 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1927
1928 DXDEVICE *pDXDevice = &pBackend->device;
1929 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
1930
1931 D3D11_TEXTURE2D_DESC td;
1932 RT_ZERO(td);
1933 td.Width = cWidth;
1934 td.Height = cHeight;
1935 td.MipLevels = 1;
1936 td.ArraySize = 1;
1937 td.Format = DXGI_FORMAT_B8G8R8A8_UNORM;
1938 td.SampleDesc.Count = 1;
1939 td.SampleDesc.Quality = 0;
1940 td.Usage = D3D11_USAGE_DEFAULT;
1941 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1942 td.CPUAccessFlags = 0;
1943 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED_KEYEDMUTEX;
1944
1945 HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &p->pTexture);
1946 if (SUCCEEDED(hr))
1947 {
1948 /* Get the shared handle. */
1949 hr = p->pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&p->pDxgiResource);
1950 if (SUCCEEDED(hr))
1951 {
1952 hr = p->pDxgiResource->GetSharedHandle(&p->SharedHandle);
1953 if (SUCCEEDED(hr))
1954 hr = p->pTexture->QueryInterface(__uuidof(IDXGIKeyedMutex), (void**)&p->pDXGIKeyedMutex);
1955 }
1956 }
1957
1958 if (SUCCEEDED(hr))
1959 return VINF_SUCCESS;
1960
1961 AssertFailed();
1962 return VERR_NOT_SUPPORTED;
1963}
1964
1965
1966static void vmsvga3dHwScreenDestroy(PVMSVGA3DSTATE pState, VMSVGAHWSCREEN *p)
1967{
1968 RT_NOREF(pState);
1969 D3D_RELEASE(p->pDXGIKeyedMutex);
1970 D3D_RELEASE(p->pDxgiResource);
1971 D3D_RELEASE(p->pTexture);
1972 p->SharedHandle = 0;
1973 p->sidScreenTarget = SVGA_ID_INVALID;
1974}
1975
1976
1977static DECLCALLBACK(int) vmsvga3dBackDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1978{
1979 RT_NOREF(pThis, pThisCC, pScreen);
1980
1981 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: screen %u\n", pScreen->idScreen));
1982
1983 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1984 AssertReturn(pState, VERR_INVALID_STATE);
1985
1986 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1987 AssertReturn(pBackend, VERR_INVALID_STATE);
1988
1989 Assert(pScreen->pHwScreen == NULL);
1990
1991 VMSVGAHWSCREEN *p = (VMSVGAHWSCREEN *)RTMemAllocZ(sizeof(VMSVGAHWSCREEN));
1992 AssertPtrReturn(p, VERR_NO_MEMORY);
1993
1994 p->sidScreenTarget = SVGA_ID_INVALID;
1995
1996 int rc = vmsvga3dDrvNotifyDefineScreen(pThisCC, pScreen);
1997 if (RT_SUCCESS(rc))
1998 {
1999 /* The frontend supports the screen. Create the actual resource. */
2000 rc = vmsvga3dHwScreenCreate(pState, pScreen->cWidth, pScreen->cHeight, p);
2001 if (RT_SUCCESS(rc))
2002 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: created\n"));
2003 }
2004
2005 if (RT_SUCCESS(rc))
2006 {
2007 LogRel(("VMSVGA: Using HW accelerated screen %u\n", pScreen->idScreen));
2008 pScreen->pHwScreen = p;
2009 }
2010 else
2011 {
2012 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: %Rrc\n", rc));
2013 vmsvga3dHwScreenDestroy(pState, p);
2014 RTMemFree(p);
2015 }
2016
2017 return rc;
2018}
2019
2020
2021static DECLCALLBACK(int) vmsvga3dBackDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
2022{
2023 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2024 AssertReturn(pState, VERR_INVALID_STATE);
2025
2026 vmsvga3dDrvNotifyDestroyScreen(pThisCC, pScreen);
2027
2028 if (pScreen->pHwScreen)
2029 {
2030 vmsvga3dHwScreenDestroy(pState, pScreen->pHwScreen);
2031 RTMemFree(pScreen->pHwScreen);
2032 pScreen->pHwScreen = NULL;
2033 }
2034
2035 return VINF_SUCCESS;
2036}
2037
2038
2039static DECLCALLBACK(int) vmsvga3dBackSurfaceBlitToScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
2040 SVGASignedRect destRect, SVGA3dSurfaceImageId srcImage,
2041 SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *paRects)
2042{
2043 RT_NOREF(pThisCC, pScreen, destRect, srcImage, srcRect, cRects, paRects);
2044
2045 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2046 AssertReturn(pState, VERR_INVALID_STATE);
2047
2048 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2049 AssertReturn(pBackend, VERR_INVALID_STATE);
2050
2051 VMSVGAHWSCREEN *p = pScreen->pHwScreen;
2052 AssertReturn(p, VERR_NOT_SUPPORTED);
2053
2054 PVMSVGA3DSURFACE pSurface;
2055 int rc = vmsvga3dSurfaceFromSid(pState, srcImage.sid, &pSurface);
2056 AssertRCReturn(rc, rc);
2057
2058 /** @todo Implement. */
2059 AssertFailed();
2060 return VERR_NOT_IMPLEMENTED;
2061}
2062
2063
2064static DECLCALLBACK(int) dxContextFlushShared(PAVLU32NODECORE pCore, void *pvUser)
2065{
2066 PVMSVGA3DSTATE pState = (PVMSVGA3DSTATE)pvUser;
2067
2068 // Flush pCore->Key context and issue a query.
2069 PVMSVGA3DDXCONTEXT pDXContextDrawing;
2070 int rc = vmsvga3dDXContextFromCid(pState, pCore->Key, &pDXContextDrawing);
2071 AssertRCReturn(rc, rc);
2072
2073 DXDEVICE *pDeviceDrawing = &pDXContextDrawing->pBackendDXContext->device;
2074 pDeviceDrawing->pImmediateContext->Flush();
2075
2076 ID3D11Query *pQuery = 0;
2077 D3D11_QUERY_DESC qd;
2078 RT_ZERO(qd);
2079 qd.Query = D3D11_QUERY_EVENT;
2080 HRESULT hr2 = pDeviceDrawing->pDevice->CreateQuery(&qd, &pQuery);
2081 Assert(hr2 == S_OK); RT_NOREF(hr2);
2082
2083 pDeviceDrawing->pImmediateContext->End(pQuery);
2084
2085 BOOL queryData;
2086 while (pDeviceDrawing->pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
2087 {
2088 RTThreadYield();
2089 }
2090 D3D_RELEASE(pQuery);
2091
2092 return VINF_SUCCESS;
2093}
2094
2095
2096
2097static DECLCALLBACK(int) vmsvga3dSurfaceMap(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dSurfaceImageId const *pImage, SVGA3dBox const *pBox,
2098 VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
2099{
2100 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2101 AssertReturn(pState, VERR_INVALID_STATE);
2102
2103 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2104 AssertReturn(pBackend, VERR_INVALID_STATE);
2105
2106 PVMSVGA3DSURFACE pSurface;
2107 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
2108 AssertRCReturn(rc, rc);
2109
2110 Assert(pImage->face == 0 && pImage->mipmap == 0); /** @todo implement. */
2111
2112 PVMSVGA3DDXCONTEXT pDXContext;
2113
2114 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2115 if (!pBackendSurface)
2116 {
2117 /* This means that the guest uploads new data to the surface.
2118 * So the data should be copied either to a host memory buffer,
2119 * or to the actual surface.
2120 * In the latter case the BackendSurface must be created here.
2121 */
2122 rc = vmsvga3dDXContextFromCid(pState, idDXContext, &pDXContext);
2123 AssertRCReturn(rc, rc);
2124
2125 rc = vmsvga3dBackSurfaceCreate(pThisCC, pDXContext, pSurface);
2126 AssertRCReturn(rc, rc);
2127
2128 pBackendSurface = pSurface->pBackendSurface;
2129 }
2130
2131 /* Figure out whether the surface belongs to a DXContext or to the backend. */
2132 if (pSurface->idAssociatedContext != SVGA_ID_INVALID)
2133 vmsvga3dDXContextFromCid(pState, pSurface->idAssociatedContext, &pDXContext);
2134 else
2135 pDXContext = NULL;
2136
2137 DXDEVICE *pDevice;
2138 if (pDXContext)
2139 pDevice = &pDXContext->pBackendDXContext->device;
2140 else
2141 pDevice = &pBackend->device;
2142 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2143
2144 SVGA3dBox clipBox;
2145 if (pBox)
2146 {
2147 clipBox = *pBox;
2148 vmsvgaR3ClipBox(&pSurface->paMipmapLevels[0].mipmapSize, &clipBox);
2149 ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
2150 }
2151 else
2152 {
2153 clipBox.x = 0;
2154 clipBox.y = 0;
2155 clipBox.z = 0;
2156 clipBox.w = pSurface->paMipmapLevels[0].mipmapSize.width;
2157 clipBox.h = pSurface->paMipmapLevels[0].mipmapSize.height;
2158 clipBox.d = pSurface->paMipmapLevels[0].mipmapSize.depth;
2159 }
2160
2161 /** @todo D3D11_MAP_WRITE does not work with D3D11_USAGE_DYNAMIC resources. Probably VMSVGA3D_SURFACE_MAP_WRITE is not necessary. */
2162 D3D11_MAP d3d11MapType;
2163 switch (enmMapType)
2164 {
2165 case VMSVGA3D_SURFACE_MAP_READ: d3d11MapType = D3D11_MAP_READ; break;
2166 case VMSVGA3D_SURFACE_MAP_WRITE: d3d11MapType = D3D11_MAP_WRITE; break;
2167 case VMSVGA3D_SURFACE_MAP_READ_WRITE: d3d11MapType = D3D11_MAP_READ_WRITE; break;
2168 case VMSVGA3D_SURFACE_MAP_WRITE_DISCARD: d3d11MapType = D3D11_MAP_WRITE_DISCARD; break;
2169 default:
2170 AssertFailed();
2171 return VERR_INVALID_PARAMETER;
2172 }
2173
2174 D3D11_MAPPED_SUBRESOURCE mappedResource;
2175 RT_ZERO(mappedResource);
2176
2177 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
2178 {
2179 ID3D11Texture2D *pMappedTexture;
2180 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2181 {
2182 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
2183
2184 /** @todo Wait for the surface to finish drawing. */
2185 if (pBackendSurface->SharedTextureTree)
2186 {
2187 int rc2 = RTAvlU32DoWithAll(&pBackendSurface->SharedTextureTree, 0, dxContextFlushShared, pState);
2188 AssertRC(rc2);
2189 }
2190
2191 /* Copy the texture content to the staging texture. */
2192 pDevice->pImmediateContext->CopyResource(pBackendSurface->u.ScreenTarget.pStagingTexture, pBackendSurface->u.ScreenTarget.pTexture);
2193 }
2194 else
2195 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2196
2197 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2198 HRESULT hr = pDevice->pImmediateContext->Map(pMappedTexture, Subresource,
2199 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
2200 if (SUCCEEDED(hr))
2201 {
2202 pMap->enmMapType = enmMapType;
2203 pMap->box = clipBox;
2204 pMap->cbPixel = pSurface->cbBlock;
2205 pMap->cbRowPitch = mappedResource.RowPitch;
2206 pMap->cbDepthPitch = mappedResource.DepthPitch;
2207 pMap->pvData = (uint8_t *)mappedResource.pData
2208 + pMap->box.x * pMap->cbPixel
2209 + pMap->box.y * pMap->cbRowPitch
2210 + pMap->box.z * pMap->cbDepthPitch;
2211 }
2212 else
2213 rc = VERR_NOT_SUPPORTED;
2214 }
2215 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
2216 {
2217 ID3D11Texture2D *pMappedTexture;
2218 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2219 {
2220 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
2221
2222 /* Copy the texture content to the staging texture. */
2223 pDevice->pImmediateContext->CopyResource(pBackendSurface->u.ScreenTarget.pStagingTexture, pBackendSurface->u.ScreenTarget.pTexture);
2224 }
2225 else
2226 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2227
2228 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2229 HRESULT hr = pDevice->pImmediateContext->Map(pMappedTexture, Subresource,
2230 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
2231 if (SUCCEEDED(hr))
2232 {
2233 pMap->enmMapType = enmMapType;
2234 pMap->box = clipBox;
2235 pMap->cbPixel = pSurface->cbBlock;
2236 pMap->cbRowPitch = mappedResource.RowPitch;
2237 pMap->cbDepthPitch = mappedResource.DepthPitch;
2238 pMap->pvData = (uint8_t *)mappedResource.pData
2239 + pMap->box.x * pMap->cbPixel
2240 + pMap->box.y * pMap->cbRowPitch
2241 + pMap->box.z * pMap->cbDepthPitch;
2242 }
2243 else
2244 rc = VERR_NOT_SUPPORTED;
2245 }
2246 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
2247 {
2248 UINT const Subresource = 0; /* Buffers have only one subresource. */
2249 HRESULT hr = pDevice->pImmediateContext->Map(pSurface->pBackendSurface->u.Buffer.pBuffer, Subresource,
2250 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
2251 if (SUCCEEDED(hr))
2252 {
2253 pMap->enmMapType = enmMapType;
2254 pMap->box = clipBox;
2255 pMap->cbPixel = pSurface->cbBlock;
2256 pMap->cbRowPitch = mappedResource.RowPitch;
2257 pMap->cbDepthPitch = mappedResource.DepthPitch;
2258 pMap->pvData = (uint8_t *)mappedResource.pData
2259 + pMap->box.x * pMap->cbPixel
2260 + pMap->box.y * pMap->cbRowPitch
2261 + pMap->box.z * pMap->cbDepthPitch;
2262 }
2263 else
2264 rc = VERR_NOT_SUPPORTED;
2265 }
2266 else
2267 {
2268 // UINT D3D11CalcSubresource(UINT MipSlice, UINT ArraySlice, UINT MipLevels);
2269 /** @todo Implement. */
2270 AssertFailed();
2271 rc = VERR_NOT_IMPLEMENTED;
2272 }
2273
2274 return rc;
2275}
2276
2277
2278static DECLCALLBACK(int) vmsvga3dSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, VMSVGA3D_MAPPED_SURFACE *pMap, bool fWritten)
2279{
2280 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2281 AssertReturn(pState, VERR_INVALID_STATE);
2282
2283 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2284 AssertReturn(pBackend, VERR_INVALID_STATE);
2285
2286 PVMSVGA3DSURFACE pSurface;
2287 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
2288 AssertRCReturn(rc, rc);
2289
2290 /* The called should not use the function for system memory surfaces. */
2291 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2292 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
2293
2294 PVMSVGA3DDXCONTEXT pDXContext;
2295 /* Figure out whether the surface belongs to a DXContext or to the backend. */
2296 if (pSurface->idAssociatedContext != SVGA_ID_INVALID)
2297 vmsvga3dDXContextFromCid(pState, pSurface->idAssociatedContext, &pDXContext);
2298 else
2299 pDXContext = NULL;
2300
2301 DXDEVICE *pDevice;
2302 if (pDXContext)
2303 pDevice = &pDXContext->pBackendDXContext->device;
2304 else
2305 pDevice = &pBackend->device;
2306 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2307
2308 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
2309 {
2310 ID3D11Texture2D *pMappedTexture;
2311 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2312 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
2313 else
2314 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2315
2316 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2317 pDevice->pImmediateContext->Unmap(pMappedTexture, Subresource);
2318
2319 if ( fWritten
2320 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
2321 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
2322 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
2323 {
2324 ID3D11Resource *pDstResource = pBackendSurface->u.ScreenTarget.pTexture;
2325 UINT DstSubresource = Subresource;
2326 UINT DstX = pMap->box.x;
2327 UINT DstY = pMap->box.y;
2328 UINT DstZ = pMap->box.z;
2329 ID3D11Resource *pSrcResource = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2330 UINT SrcSubresource = Subresource;
2331 D3D11_BOX SrcBox;
2332 SrcBox.left = pMap->box.x;
2333 SrcBox.top = pMap->box.y;
2334 SrcBox.front = pMap->box.z;
2335 SrcBox.right = pMap->box.x + pMap->box.w;
2336 SrcBox.bottom = pMap->box.y + pMap->box.h;
2337 SrcBox.back = pMap->box.z + pMap->box.d;
2338 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
2339 pSrcResource, SrcSubresource, &SrcBox);
2340 }
2341 }
2342 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
2343 {
2344 ID3D11Texture2D *pMappedTexture;
2345 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2346 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
2347 else
2348 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2349
2350 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2351 pDevice->pImmediateContext->Unmap(pMappedTexture, Subresource);
2352
2353 if ( fWritten
2354 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
2355 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
2356 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
2357 {
2358 ID3D11Resource *pDstResource = pBackendSurface->u.ScreenTarget.pTexture;
2359 UINT DstSubresource = Subresource;
2360 UINT DstX = pMap->box.x;
2361 UINT DstY = pMap->box.y;
2362 UINT DstZ = pMap->box.z;
2363 ID3D11Resource *pSrcResource = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2364 UINT SrcSubresource = Subresource;
2365 D3D11_BOX SrcBox;
2366 SrcBox.left = pMap->box.x;
2367 SrcBox.top = pMap->box.y;
2368 SrcBox.front = pMap->box.z;
2369 SrcBox.right = pMap->box.x + pMap->box.w;
2370 SrcBox.bottom = pMap->box.y + pMap->box.h;
2371 SrcBox.back = pMap->box.z + pMap->box.d;
2372 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
2373 pSrcResource, SrcSubresource, &SrcBox);
2374 }
2375 }
2376 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
2377 {
2378 UINT const Subresource = 0; /* Buffers have only one subresource. */
2379 pDevice->pImmediateContext->Unmap(pBackendSurface->u.Buffer.pBuffer, Subresource);
2380 }
2381 else
2382 {
2383 AssertFailed();
2384 rc = VERR_NOT_IMPLEMENTED;
2385 }
2386
2387 return rc;
2388}
2389
2390
2391static DECLCALLBACK(int) vmsvga3dScreenTargetBind(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, uint32_t sid)
2392{
2393 int rc = VINF_SUCCESS;
2394
2395 PVMSVGA3DSURFACE pSurface;
2396 if (sid != SVGA_ID_INVALID)
2397 {
2398 /* Create the surface if does not yet exist. */
2399 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2400 AssertReturn(pState, VERR_INVALID_STATE);
2401
2402 rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
2403 AssertRCReturn(rc, rc);
2404
2405 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
2406 {
2407 /* Create the actual texture. */
2408 rc = vmsvga3dBackSurfaceCreateScreenTarget(pThisCC, pSurface);
2409 AssertRCReturn(rc, rc);
2410 }
2411 }
2412 else
2413 pSurface = NULL;
2414
2415 /* Notify the HW accelerated screen if it is used. */
2416 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
2417 if (!pHwScreen)
2418 return VINF_SUCCESS;
2419
2420 /* Same surface -> do nothing. */
2421 if (pHwScreen->sidScreenTarget == sid)
2422 return VINF_SUCCESS;
2423
2424 if (sid != SVGA_ID_INVALID)
2425 {
2426 AssertReturn( pSurface->pBackendSurface
2427 && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
2428
2429 HANDLE const hSharedSurface = pHwScreen->SharedHandle;
2430 rc = vmsvga3dDrvNotifyBindSurface(pThisCC, pScreen, hSharedSurface);
2431 }
2432
2433 if (RT_SUCCESS(rc))
2434 {
2435 pHwScreen->sidScreenTarget = sid;
2436 }
2437
2438 return rc;
2439}
2440
2441
2442static DECLCALLBACK(int) vmsvga3dScreenTargetUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, SVGA3dRect const *pRect)
2443{
2444 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
2445 AssertReturn(pHwScreen, VERR_NOT_SUPPORTED);
2446
2447 if (pHwScreen->sidScreenTarget == SVGA_ID_INVALID)
2448 return VINF_SUCCESS; /* No surface bound. */
2449
2450 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2451 AssertReturn(pState, VERR_INVALID_STATE);
2452
2453 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2454 AssertReturn(pBackend, VERR_INVALID_STATE);
2455
2456 PVMSVGA3DSURFACE pSurface;
2457 int rc = vmsvga3dSurfaceFromSid(pState, pHwScreen->sidScreenTarget, &pSurface);
2458 AssertRCReturn(rc, rc);
2459
2460 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2461 AssertReturn(pBackendSurface && pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
2462
2463 SVGA3dRect boundRect;
2464 boundRect.x = 0;
2465 boundRect.y = 0;
2466 boundRect.w = pSurface->paMipmapLevels[0].mipmapSize.width;
2467 boundRect.h = pSurface->paMipmapLevels[0].mipmapSize.height;
2468 SVGA3dRect clipRect = *pRect;
2469 vmsvgaR3Clip3dRect(&boundRect, &clipRect);
2470 ASSERT_GUEST_RETURN(clipRect.w && clipRect.h, VERR_INVALID_PARAMETER);
2471
2472 /* Copy the screen texture to the shared surface. */
2473 DWORD result = pHwScreen->pDXGIKeyedMutex->AcquireSync(0, 10000);
2474 if (result == WAIT_OBJECT_0)
2475 {
2476 ID3D11Query *pQuery = 0;
2477 D3D11_QUERY_DESC qd;
2478 RT_ZERO(qd);
2479 qd.Query = D3D11_QUERY_EVENT;
2480 HRESULT hr2 = pBackend->device.pDevice->CreateQuery(&qd, &pQuery);
2481 Assert(hr2 == S_OK); RT_NOREF(hr2);
2482
2483 pBackend->device.pImmediateContext->CopyResource(pHwScreen->pTexture, pBackendSurface->u.ScreenTarget.pTexture);
2484
2485 pBackend->device.pImmediateContext->Flush();
2486
2487 pBackend->device.pImmediateContext->End(pQuery);
2488
2489 BOOL queryData;
2490 while (pBackend->device.pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
2491 {
2492 RTThreadYield();
2493 }
2494 D3D_RELEASE(pQuery);
2495
2496 result = pHwScreen->pDXGIKeyedMutex->ReleaseSync(1);
2497 }
2498 else
2499 AssertFailed();
2500
2501 rc = vmsvga3dDrvNotifyUpdate(pThisCC, pScreen, pRect->x, pRect->y, pRect->w, pRect->h);
2502 return rc;
2503}
2504
2505
2506/*
2507 *
2508 * 3D interface.
2509 *
2510 */
2511
2512static DECLCALLBACK(int) vmsvga3dBackQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
2513{
2514 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2515 AssertReturn(pState, VERR_INVALID_STATE);
2516
2517 int rc = VINF_SUCCESS;
2518
2519 *pu32Val = 0;
2520
2521 if (idx3dCaps > SVGA3D_DEVCAP_MAX)
2522 {
2523 LogRelMax(16, ("VMSVGA: unsupported SVGA3D_DEVCAP %d\n", idx3dCaps));
2524 return VERR_NOT_SUPPORTED;
2525 }
2526
2527 D3D_FEATURE_LEVEL const FeatureLevel = pState->pBackend->device.FeatureLevel;
2528
2529 /* Most values are taken from:
2530 * https://docs.microsoft.com/en-us/windows/win32/direct3d11/overviews-direct3d-11-devices-downlevel-intro
2531 *
2532 * Shader values are from
2533 * https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-models
2534 */
2535
2536 switch (idx3dCaps)
2537 {
2538 case SVGA3D_DEVCAP_3D:
2539 *pu32Val = 1;
2540 break;
2541
2542 case SVGA3D_DEVCAP_MAX_LIGHTS:
2543 *pu32Val = SVGA3D_NUM_LIGHTS; /* VGPU9. Not applicable to DX11. */
2544 break;
2545
2546 case SVGA3D_DEVCAP_MAX_TEXTURES:
2547 *pu32Val = SVGA3D_NUM_TEXTURE_UNITS; /* VGPU9. Not applicable to DX11. */
2548 break;
2549
2550 case SVGA3D_DEVCAP_MAX_CLIP_PLANES:
2551 *pu32Val = SVGA3D_NUM_CLIPPLANES;
2552 break;
2553
2554 case SVGA3D_DEVCAP_VERTEX_SHADER_VERSION:
2555 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2556 *pu32Val = SVGA3DVSVERSION_40;
2557 else
2558 *pu32Val = SVGA3DVSVERSION_30;
2559 break;
2560
2561 case SVGA3D_DEVCAP_VERTEX_SHADER:
2562 *pu32Val = 1;
2563 break;
2564
2565 case SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION:
2566 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2567 *pu32Val = SVGA3DPSVERSION_40;
2568 else
2569 *pu32Val = SVGA3DPSVERSION_30;
2570 break;
2571
2572 case SVGA3D_DEVCAP_FRAGMENT_SHADER:
2573 *pu32Val = 1;
2574 break;
2575
2576 case SVGA3D_DEVCAP_MAX_RENDER_TARGETS:
2577 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2578 *pu32Val = 8;
2579 else
2580 *pu32Val = 4;
2581 break;
2582
2583 case SVGA3D_DEVCAP_S23E8_TEXTURES:
2584 case SVGA3D_DEVCAP_S10E5_TEXTURES:
2585 /* Must be obsolete by now; surface format caps specify the same thing. */
2586 break;
2587
2588 case SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND:
2589 /* Obsolete */
2590 break;
2591
2592 /*
2593 * 2. The BUFFER_FORMAT capabilities are deprecated, and they always
2594 * return TRUE. Even on physical hardware that does not support
2595 * these formats natively, the SVGA3D device will provide an emulation
2596 * which should be invisible to the guest OS.
2597 */
2598 case SVGA3D_DEVCAP_D16_BUFFER_FORMAT:
2599 case SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT:
2600 case SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT:
2601 *pu32Val = 1;
2602 break;
2603
2604 case SVGA3D_DEVCAP_QUERY_TYPES:
2605 /* Obsolete */
2606 break;
2607
2608 case SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING:
2609 /* Obsolete */
2610 break;
2611
2612 case SVGA3D_DEVCAP_MAX_POINT_SIZE:
2613 AssertCompile(sizeof(uint32_t) == sizeof(float));
2614 *(float *)pu32Val = 256.0f; /* VGPU9. Not applicable to DX11. */
2615 break;
2616
2617 case SVGA3D_DEVCAP_MAX_SHADER_TEXTURES:
2618 /* Obsolete */
2619 break;
2620
2621 case SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH:
2622 case SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT:
2623 if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
2624 *pu32Val = 16384;
2625 else if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2626 *pu32Val = 8192;
2627 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
2628 *pu32Val = 4096;
2629 else
2630 *pu32Val = 2048;
2631 break;
2632
2633 case SVGA3D_DEVCAP_MAX_VOLUME_EXTENT:
2634 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2635 *pu32Val = 2048;
2636 else
2637 *pu32Val = 256;
2638 break;
2639
2640 case SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT:
2641 if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
2642 *pu32Val = 16384;
2643 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
2644 *pu32Val = 8192;
2645 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2646 *pu32Val = 2048;
2647 else
2648 *pu32Val = 128;
2649 break;
2650
2651 case SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO:
2652 /* Obsolete */
2653 break;
2654
2655 case SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY:
2656 if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2657 *pu32Val = D3D11_REQ_MAXANISOTROPY;
2658 else
2659 *pu32Val = 2; // D3D_FL9_1_DEFAULT_MAX_ANISOTROPY;
2660 break;
2661
2662 case SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT:
2663 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2664 *pu32Val = UINT32_MAX;
2665 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2666 *pu32Val = 1048575; // D3D_FL9_2_IA_PRIMITIVE_MAX_COUNT;
2667 else
2668 *pu32Val = 65535; // D3D_FL9_1_IA_PRIMITIVE_MAX_COUNT;
2669 break;
2670
2671 case SVGA3D_DEVCAP_MAX_VERTEX_INDEX:
2672 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2673 *pu32Val = UINT32_MAX;
2674 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2675 *pu32Val = 1048575;
2676 else
2677 *pu32Val = 65534;
2678 break;
2679
2680 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS:
2681 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2682 *pu32Val = UINT32_MAX;
2683 else
2684 *pu32Val = 512;
2685 break;
2686
2687 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS:
2688 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2689 *pu32Val = UINT32_MAX;
2690 else
2691 *pu32Val = 512;
2692 break;
2693
2694 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS:
2695 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2696 *pu32Val = 4096;
2697 else
2698 *pu32Val = 32;
2699 break;
2700
2701 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS:
2702 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2703 *pu32Val = 4096;
2704 else
2705 *pu32Val = 32;
2706 break;
2707
2708 case SVGA3D_DEVCAP_TEXTURE_OPS:
2709 /* Obsolete */
2710 break;
2711
2712 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8:
2713 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8:
2714 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10:
2715 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5:
2716 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5:
2717 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4:
2718 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5:
2719 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16:
2720 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8:
2721 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8:
2722 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8:
2723 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16:
2724 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8:
2725 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8:
2726 case SVGA3D_DEVCAP_SURFACEFMT_DXT1:
2727 case SVGA3D_DEVCAP_SURFACEFMT_DXT2:
2728 case SVGA3D_DEVCAP_SURFACEFMT_DXT3:
2729 case SVGA3D_DEVCAP_SURFACEFMT_DXT4:
2730 case SVGA3D_DEVCAP_SURFACEFMT_DXT5:
2731 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8:
2732 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10:
2733 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8:
2734 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8:
2735 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8:
2736 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5:
2737 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8:
2738 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5:
2739 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8:
2740 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5:
2741 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8:
2742 case SVGA3D_DEVCAP_SURFACEFMT_V16U16:
2743 case SVGA3D_DEVCAP_SURFACEFMT_G16R16:
2744 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16:
2745 case SVGA3D_DEVCAP_SURFACEFMT_UYVY:
2746 case SVGA3D_DEVCAP_SURFACEFMT_YUY2:
2747 case SVGA3D_DEVCAP_SURFACEFMT_NV12:
2748 case SVGA3D_DEVCAP_DEAD10: /* SVGA3D_DEVCAP_SURFACEFMT_AYUV */
2749 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16:
2750 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24:
2751 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT:
2752 case SVGA3D_DEVCAP_SURFACEFMT_ATI1:
2753 case SVGA3D_DEVCAP_SURFACEFMT_ATI2:
2754 case SVGA3D_DEVCAP_SURFACEFMT_YV12:
2755 {
2756 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapSurfaceFmt2Format(idx3dCaps);
2757 rc = vmsvgaDXCheckFormatSupportPreDX(pState, enmFormat, pu32Val);
2758 break;
2759 }
2760
2761 case SVGA3D_DEVCAP_MISSING62:
2762 /* Unused */
2763 break;
2764
2765 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES:
2766 /* Obsolete */
2767 break;
2768
2769 case SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS:
2770 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2771 *pu32Val = 8;
2772 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
2773 *pu32Val = 4; // D3D_FL9_3_SIMULTANEOUS_RENDER_TARGET_COUNT
2774 else
2775 *pu32Val = 1; // D3D_FL9_1_SIMULTANEOUS_RENDER_TARGET_COUNT
2776 break;
2777
2778 case SVGA3D_DEVCAP_DEAD4: /* SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES */
2779 case SVGA3D_DEVCAP_DEAD5: /* SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES */
2780 *pu32Val = (1 << (2-1)) | (1 << (4-1)) | (1 << (8-1)); /* 2x, 4x, 8x */
2781 break;
2782
2783 case SVGA3D_DEVCAP_DEAD7: /* SVGA3D_DEVCAP_ALPHATOCOVERAGE */
2784 /* Obsolete */
2785 break;
2786
2787 case SVGA3D_DEVCAP_DEAD6: /* SVGA3D_DEVCAP_SUPERSAMPLE */
2788 /* Obsolete */
2789 break;
2790
2791 case SVGA3D_DEVCAP_AUTOGENMIPMAPS:
2792 *pu32Val = 1;
2793 break;
2794
2795 case SVGA3D_DEVCAP_MAX_CONTEXT_IDS:
2796 *pu32Val = SVGA3D_MAX_CONTEXT_IDS;
2797 break;
2798
2799 case SVGA3D_DEVCAP_MAX_SURFACE_IDS:
2800 *pu32Val = SVGA3D_MAX_SURFACE_IDS;
2801 break;
2802
2803 case SVGA3D_DEVCAP_DEAD1:
2804 /* Obsolete */
2805 break;
2806
2807 case SVGA3D_DEVCAP_DEAD8: /* SVGA3D_DEVCAP_VIDEO_DECODE */
2808 /* Obsolete */
2809 break;
2810
2811 case SVGA3D_DEVCAP_DEAD9: /* SVGA3D_DEVCAP_VIDEO_PROCESS */
2812 /* Obsolete */
2813 break;
2814
2815 case SVGA3D_DEVCAP_LINE_AA:
2816 *pu32Val = 1;
2817 break;
2818
2819 case SVGA3D_DEVCAP_LINE_STIPPLE:
2820 *pu32Val = 0; /* DX11 does not seem to support this directly. */
2821 break;
2822
2823 case SVGA3D_DEVCAP_MAX_LINE_WIDTH:
2824 AssertCompile(sizeof(uint32_t) == sizeof(float));
2825 *(float *)pu32Val = 1.0f;
2826 break;
2827
2828 case SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH:
2829 AssertCompile(sizeof(uint32_t) == sizeof(float));
2830 *(float *)pu32Val = 1.0f;
2831 break;
2832
2833 case SVGA3D_DEVCAP_DEAD3: /* Old SVGA3D_DEVCAP_LOGICOPS */
2834 /* Deprecated. */
2835 AssertCompile(SVGA3D_DEVCAP_DEAD3 == 92); /* Newer SVGA headers redefine this. */
2836 break;
2837
2838 case SVGA3D_DEVCAP_TS_COLOR_KEY:
2839 *pu32Val = 0; /* DX11 does not seem to support this directly. */
2840 break;
2841
2842 case SVGA3D_DEVCAP_DEAD2:
2843 break;
2844
2845 case SVGA3D_DEVCAP_DXCONTEXT:
2846 *pu32Val = 1;
2847 break;
2848
2849 case SVGA3D_DEVCAP_DEAD11: /* SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE */
2850 *pu32Val = D3D11_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION;
2851 break;
2852
2853 case SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS:
2854 *pu32Val = D3D11_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT;
2855 break;
2856
2857 case SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS:
2858 *pu32Val = D3D11_COMMONSHADER_CONSTANT_BUFFER_HW_SLOT_COUNT;
2859 break;
2860
2861 case SVGA3D_DEVCAP_DX_PROVOKING_VERTEX:
2862 *pu32Val = 0; /* boolean */
2863 break;
2864
2865 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8:
2866 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8:
2867 case SVGA3D_DEVCAP_DXFMT_R5G6B5:
2868 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5:
2869 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5:
2870 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4:
2871 case SVGA3D_DEVCAP_DXFMT_Z_D32:
2872 case SVGA3D_DEVCAP_DXFMT_Z_D16:
2873 case SVGA3D_DEVCAP_DXFMT_Z_D24S8:
2874 case SVGA3D_DEVCAP_DXFMT_Z_D15S1:
2875 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8:
2876 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4:
2877 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16:
2878 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8:
2879 case SVGA3D_DEVCAP_DXFMT_DXT1:
2880 case SVGA3D_DEVCAP_DXFMT_DXT2:
2881 case SVGA3D_DEVCAP_DXFMT_DXT3:
2882 case SVGA3D_DEVCAP_DXFMT_DXT4:
2883 case SVGA3D_DEVCAP_DXFMT_DXT5:
2884 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8:
2885 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5:
2886 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8:
2887 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1:
2888 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5:
2889 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8:
2890 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10:
2891 case SVGA3D_DEVCAP_DXFMT_V8U8:
2892 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8:
2893 case SVGA3D_DEVCAP_DXFMT_CxV8U8:
2894 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8:
2895 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10:
2896 case SVGA3D_DEVCAP_DXFMT_ALPHA8:
2897 case SVGA3D_DEVCAP_DXFMT_R_S10E5:
2898 case SVGA3D_DEVCAP_DXFMT_R_S23E8:
2899 case SVGA3D_DEVCAP_DXFMT_RG_S10E5:
2900 case SVGA3D_DEVCAP_DXFMT_RG_S23E8:
2901 case SVGA3D_DEVCAP_DXFMT_BUFFER:
2902 case SVGA3D_DEVCAP_DXFMT_Z_D24X8:
2903 case SVGA3D_DEVCAP_DXFMT_V16U16:
2904 case SVGA3D_DEVCAP_DXFMT_G16R16:
2905 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16:
2906 case SVGA3D_DEVCAP_DXFMT_UYVY:
2907 case SVGA3D_DEVCAP_DXFMT_YUY2:
2908 case SVGA3D_DEVCAP_DXFMT_NV12:
2909 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: /* SVGA3D_DEVCAP_DXFMT_AYUV */
2910 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS:
2911 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT:
2912 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT:
2913 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS:
2914 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT:
2915 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT:
2916 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT:
2917 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS:
2918 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT:
2919 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM:
2920 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT:
2921 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS:
2922 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT:
2923 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT:
2924 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS:
2925 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT:
2926 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24:
2927 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT:
2928 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS:
2929 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT:
2930 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT:
2931 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS:
2932 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM:
2933 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB:
2934 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT:
2935 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT:
2936 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS:
2937 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT:
2938 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT:
2939 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS:
2940 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT:
2941 case SVGA3D_DEVCAP_DXFMT_R32_UINT:
2942 case SVGA3D_DEVCAP_DXFMT_R32_SINT:
2943 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS:
2944 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT:
2945 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8:
2946 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT:
2947 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS:
2948 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM:
2949 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT:
2950 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT:
2951 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS:
2952 case SVGA3D_DEVCAP_DXFMT_R16_UNORM:
2953 case SVGA3D_DEVCAP_DXFMT_R16_UINT:
2954 case SVGA3D_DEVCAP_DXFMT_R16_SNORM:
2955 case SVGA3D_DEVCAP_DXFMT_R16_SINT:
2956 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS:
2957 case SVGA3D_DEVCAP_DXFMT_R8_UNORM:
2958 case SVGA3D_DEVCAP_DXFMT_R8_UINT:
2959 case SVGA3D_DEVCAP_DXFMT_R8_SNORM:
2960 case SVGA3D_DEVCAP_DXFMT_R8_SINT:
2961 case SVGA3D_DEVCAP_DXFMT_P8:
2962 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP:
2963 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM:
2964 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM:
2965 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS:
2966 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB:
2967 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS:
2968 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB:
2969 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS:
2970 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB:
2971 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS:
2972 case SVGA3D_DEVCAP_DXFMT_ATI1:
2973 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM:
2974 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS:
2975 case SVGA3D_DEVCAP_DXFMT_ATI2:
2976 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM:
2977 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM:
2978 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS:
2979 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB:
2980 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS:
2981 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB:
2982 case SVGA3D_DEVCAP_DXFMT_Z_DF16:
2983 case SVGA3D_DEVCAP_DXFMT_Z_DF24:
2984 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT:
2985 case SVGA3D_DEVCAP_DXFMT_YV12:
2986 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT:
2987 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT:
2988 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM:
2989 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT:
2990 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM:
2991 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM:
2992 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT:
2993 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM:
2994 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM:
2995 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT:
2996 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM:
2997 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT:
2998 case SVGA3D_DEVCAP_DXFMT_D16_UNORM:
2999 case SVGA3D_DEVCAP_DXFMT_A8_UNORM:
3000 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM:
3001 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM:
3002 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM:
3003 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM:
3004 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM:
3005 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM:
3006 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM:
3007 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM:
3008 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM:
3009 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS:
3010 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16:
3011 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16:
3012 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS:
3013 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM:
3014 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB:
3015 {
3016 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapDxfmt2Format(idx3dCaps);
3017 rc = vmsvgaDXCheckFormatSupport(pState, enmFormat, pu32Val);
3018 break;
3019 }
3020
3021 case SVGA3D_DEVCAP_SM41:
3022 *pu32Val = 0; /* boolean */
3023 break;
3024
3025 case SVGA3D_DEVCAP_MULTISAMPLE_2X:
3026 *pu32Val = 0; /* boolean */
3027 break;
3028
3029 case SVGA3D_DEVCAP_MULTISAMPLE_4X:
3030 *pu32Val = 0; /* boolean */
3031 break;
3032
3033 case SVGA3D_DEVCAP_MS_FULL_QUALITY:
3034 *pu32Val = 0; /* boolean */
3035 break;
3036
3037 case SVGA3D_DEVCAP_LOGICOPS:
3038 AssertCompile(SVGA3D_DEVCAP_LOGICOPS == 248);
3039 *pu32Val = 0; /* boolean */
3040 break;
3041
3042 case SVGA3D_DEVCAP_LOGIC_BLENDOPS:
3043 *pu32Val = 0; /* boolean */
3044 break;
3045
3046 case SVGA3D_DEVCAP_RESERVED_1:
3047 break;
3048
3049 case SVGA3D_DEVCAP_RESERVED_2:
3050 break;
3051
3052 case SVGA3D_DEVCAP_SM5:
3053 *pu32Val = 0; /* boolean */
3054 break;
3055
3056 case SVGA3D_DEVCAP_MULTISAMPLE_8X:
3057 *pu32Val = 0; /* boolean */
3058 break;
3059
3060 case SVGA3D_DEVCAP_MAX:
3061 case SVGA3D_DEVCAP_INVALID:
3062 rc = VERR_NOT_SUPPORTED;
3063 break;
3064 }
3065
3066 return rc;
3067}
3068
3069
3070static DECLCALLBACK(int) vmsvga3dBackChangeMode(PVGASTATECC pThisCC)
3071{
3072 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3073 AssertReturn(pState, VERR_INVALID_STATE);
3074
3075 return VINF_SUCCESS;
3076}
3077
3078
3079static DECLCALLBACK(int) vmsvga3dBackSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src,
3080 uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
3081{
3082 RT_NOREF(dest, src, cCopyBoxes, pBox);
3083
3084 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3085 AssertReturn(pState, VERR_INVALID_STATE);
3086
3087 AssertFailed();
3088 return VERR_NOT_IMPLEMENTED;
3089}
3090
3091
3092static DECLCALLBACK(void) vmsvga3dBackUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
3093{
3094 RT_NOREF(pThisCC, idScreen, pOldViewport);
3095 /** @todo Scroll the screen content without requiring the guest to redraw. */
3096}
3097
3098/**
3099 * Create a new 3d context
3100 *
3101 * @returns VBox status code.
3102 * @param pThisCC The VGA/VMSVGA state for ring-3.
3103 * @param cid Context id
3104 */
3105static DECLCALLBACK(int) vmsvga3dBackContextDefine(PVGASTATECC pThisCC, uint32_t cid)
3106{
3107 RT_NOREF(cid);
3108
3109 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3110 AssertReturn(pState, VERR_INVALID_STATE);
3111
3112 AssertFailed();
3113 return VERR_NOT_IMPLEMENTED;
3114}
3115
3116
3117/**
3118 * Destroy an existing 3d context
3119 *
3120 * @returns VBox status code.
3121 * @param pThisCC The VGA/VMSVGA state for ring-3.
3122 * @param cid Context id
3123 */
3124static DECLCALLBACK(int) vmsvga3dBackContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
3125{
3126 RT_NOREF(cid);
3127
3128 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3129 AssertReturn(pState, VERR_INVALID_STATE);
3130
3131 AssertFailed();
3132 return VINF_SUCCESS;
3133}
3134
3135
3136static DECLCALLBACK(int) vmsvga3dBackSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
3137{
3138 RT_NOREF(cid, type, matrix);
3139
3140 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3141 AssertReturn(pState, VERR_INVALID_STATE);
3142
3143 AssertFailed();
3144 return VINF_SUCCESS;
3145}
3146
3147
3148static DECLCALLBACK(int) vmsvga3dBackSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
3149{
3150 RT_NOREF(cid, zRange);
3151
3152 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3153 AssertReturn(pState, VERR_INVALID_STATE);
3154
3155 AssertFailed();
3156 return VINF_SUCCESS;
3157}
3158
3159
3160static DECLCALLBACK(int) vmsvga3dBackSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
3161{
3162 RT_NOREF(cid, cRenderStates, pRenderState);
3163
3164 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3165 AssertReturn(pState, VERR_INVALID_STATE);
3166
3167 AssertFailed();
3168 return VINF_SUCCESS;
3169}
3170
3171
3172static DECLCALLBACK(int) vmsvga3dBackSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
3173{
3174 RT_NOREF(cid, type, target);
3175
3176 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3177 AssertReturn(pState, VERR_INVALID_STATE);
3178
3179 AssertFailed();
3180 return VINF_SUCCESS;
3181}
3182
3183
3184static DECLCALLBACK(int) vmsvga3dBackSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
3185{
3186 RT_NOREF(cid, cTextureStates, pTextureState);
3187
3188 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3189 AssertReturn(pState, VERR_INVALID_STATE);
3190
3191 AssertFailed();
3192 return VINF_SUCCESS;
3193}
3194
3195
3196static DECLCALLBACK(int) vmsvga3dBackSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
3197{
3198 RT_NOREF(cid, face, pMaterial);
3199
3200 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3201 AssertReturn(pState, VERR_INVALID_STATE);
3202
3203 AssertFailed();
3204 return VINF_SUCCESS;
3205}
3206
3207
3208static DECLCALLBACK(int) vmsvga3dBackSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
3209{
3210 RT_NOREF(cid, index, pData);
3211
3212 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3213 AssertReturn(pState, VERR_INVALID_STATE);
3214
3215 AssertFailed();
3216 return VINF_SUCCESS;
3217}
3218
3219
3220static DECLCALLBACK(int) vmsvga3dBackSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
3221{
3222 RT_NOREF(cid, index, enabled);
3223
3224 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3225 AssertReturn(pState, VERR_INVALID_STATE);
3226
3227 AssertFailed();
3228 return VINF_SUCCESS;
3229}
3230
3231
3232static DECLCALLBACK(int) vmsvga3dBackSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
3233{
3234 RT_NOREF(cid, pRect);
3235
3236 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3237 AssertReturn(pState, VERR_INVALID_STATE);
3238
3239 AssertFailed();
3240 return VINF_SUCCESS;
3241}
3242
3243
3244static DECLCALLBACK(int) vmsvga3dBackSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
3245{
3246 RT_NOREF(cid, index, plane);
3247
3248 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3249 AssertReturn(pState, VERR_INVALID_STATE);
3250
3251 AssertFailed();
3252 return VINF_SUCCESS;
3253}
3254
3255
3256static DECLCALLBACK(int) vmsvga3dBackCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth,
3257 uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
3258{
3259 /* From SVGA3D_BeginClear comments:
3260 *
3261 * Clear is not affected by clipping, depth test, or other
3262 * render state which affects the fragment pipeline.
3263 *
3264 * Therefore this code must ignore the current scissor rect.
3265 */
3266
3267 RT_NOREF(cid, clearFlag, color, depth, stencil, cRects, pRect);
3268
3269 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3270 AssertReturn(pState, VERR_INVALID_STATE);
3271
3272 AssertFailed();
3273 return VINF_SUCCESS;
3274}
3275
3276
3277static DECLCALLBACK(int) vmsvga3dBackDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl,
3278 uint32_t numRanges, SVGA3dPrimitiveRange *pRange,
3279 uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
3280{
3281 RT_NOREF(cid, numVertexDecls, pVertexDecl, numRanges, pRange, cVertexDivisor, pVertexDivisor);
3282
3283 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3284 AssertReturn(pState, VERR_INVALID_STATE);
3285
3286 AssertFailed();
3287 return VINF_SUCCESS;
3288}
3289
3290
3291static DECLCALLBACK(int) vmsvga3dBackSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
3292{
3293 RT_NOREF(cid, pRect);
3294
3295 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3296 AssertReturn(pState, VERR_INVALID_STATE);
3297
3298 AssertFailed();
3299 return VINF_SUCCESS;
3300}
3301
3302
3303static DECLCALLBACK(int) vmsvga3dBackGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
3304{
3305 RT_NOREF(sid, filter);
3306
3307 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3308 AssertReturn(pState, VERR_INVALID_STATE);
3309
3310 AssertFailed();
3311 return VINF_SUCCESS;
3312}
3313
3314
3315static DECLCALLBACK(int) vmsvga3dBackShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type,
3316 uint32_t cbData, uint32_t *pShaderData)
3317{
3318 RT_NOREF(cid, shid, type, cbData, pShaderData);
3319
3320 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3321 AssertReturn(pState, VERR_INVALID_STATE);
3322
3323 AssertFailed();
3324 return VINF_SUCCESS;
3325}
3326
3327
3328static DECLCALLBACK(int) vmsvga3dBackShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
3329{
3330 RT_NOREF(cid, shid, type);
3331
3332 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3333 AssertReturn(pState, VERR_INVALID_STATE);
3334
3335 AssertFailed();
3336 return VINF_SUCCESS;
3337}
3338
3339
3340static DECLCALLBACK(int) vmsvga3dBackShaderSet(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
3341{
3342 RT_NOREF(pContext, cid, type, shid);
3343
3344 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3345 AssertReturn(pState, VERR_INVALID_STATE);
3346
3347 AssertFailed();
3348 return VINF_SUCCESS;
3349}
3350
3351
3352static DECLCALLBACK(int) vmsvga3dBackShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type,
3353 SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
3354{
3355 RT_NOREF(cid, reg, type, ctype, cRegisters, pValues);
3356
3357 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3358 AssertReturn(pState, VERR_INVALID_STATE);
3359
3360 AssertFailed();
3361 return VINF_SUCCESS;
3362}
3363
3364
3365/**
3366 * Destroy backend specific surface bits (part of SVGA_3D_CMD_SURFACE_DESTROY).
3367 *
3368 * @param pThisCC The device context.
3369 * @param pSurface The surface being destroyed.
3370 */
3371static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
3372{
3373 RT_NOREF(pThisCC);
3374
3375 /* The caller should not use the function for system memory surfaces. */
3376 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3377 if (!pBackendSurface)
3378 return;
3379 pSurface->pBackendSurface = NULL;
3380
3381 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3382 {
3383 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pStagingTexture);
3384 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pDynamicTexture);
3385 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pTexture);
3386 }
3387 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
3388 {
3389 D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture);
3390 D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture);
3391 D3D_RELEASE(pBackendSurface->u.Texture.pTexture);
3392 }
3393 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3394 {
3395 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
3396 }
3397 else
3398 {
3399 AssertFailed();
3400 }
3401
3402 RTMemFree(pBackendSurface);
3403}
3404
3405
3406/**
3407 * Backend worker for implementing SVGA_3D_CMD_SURFACE_STRETCHBLT.
3408 *
3409 * @returns VBox status code.
3410 * @param pThis The VGA device instance.
3411 * @param pState The VMSVGA3d state.
3412 * @param pDstSurface The destination host surface.
3413 * @param uDstFace The destination face (valid).
3414 * @param uDstMipmap The destination mipmap level (valid).
3415 * @param pDstBox The destination box.
3416 * @param pSrcSurface The source host surface.
3417 * @param uSrcFace The destination face (valid).
3418 * @param uSrcMipmap The source mimap level (valid).
3419 * @param pSrcBox The source box.
3420 * @param enmMode The strecht blt mode .
3421 * @param pContext The VMSVGA3d context (already current for OGL).
3422 */
3423static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBlt(PVGASTATE pThis, PVMSVGA3DSTATE pState,
3424 PVMSVGA3DSURFACE pDstSurface, uint32_t uDstFace, uint32_t uDstMipmap, SVGA3dBox const *pDstBox,
3425 PVMSVGA3DSURFACE pSrcSurface, uint32_t uSrcFace, uint32_t uSrcMipmap, SVGA3dBox const *pSrcBox,
3426 SVGA3dStretchBltMode enmMode, PVMSVGA3DCONTEXT pContext)
3427{
3428 RT_NOREF(pThis, pState, pDstSurface, uDstFace, uDstMipmap, pDstBox,
3429 pSrcSurface, uSrcFace, uSrcMipmap, pSrcBox, enmMode, pContext);
3430
3431 AssertFailed();
3432 return VINF_SUCCESS;
3433}
3434
3435
3436/**
3437 * Backend worker for implementing SVGA_3D_CMD_SURFACE_DMA that copies one box.
3438 *
3439 * @returns Failure status code or @a rc.
3440 * @param pThis The shared VGA/VMSVGA instance data.
3441 * @param pThisCC The VGA/VMSVGA state for ring-3.
3442 * @param pState The VMSVGA3d state.
3443 * @param pSurface The host surface.
3444 * @param pMipLevel Mipmap level. The caller knows it already.
3445 * @param uHostFace The host face (valid).
3446 * @param uHostMipmap The host mipmap level (valid).
3447 * @param GuestPtr The guest pointer.
3448 * @param cbGuestPitch The guest pitch.
3449 * @param transfer The transfer direction.
3450 * @param pBox The box to copy (clipped, valid, except for guest's srcx, srcy, srcz).
3451 * @param pContext The context (for OpenGL).
3452 * @param rc The current rc for all boxes.
3453 * @param iBox The current box number (for Direct 3D).
3454 */
3455static DECLCALLBACK(int) vmsvga3dBackSurfaceDMACopyBox(PVGASTATE pThis, PVGASTATECC pThisCC, PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface,
3456 PVMSVGA3DMIPMAPLEVEL pMipLevel, uint32_t uHostFace, uint32_t uHostMipmap,
3457 SVGAGuestPtr GuestPtr, uint32_t cbGuestPitch, SVGA3dTransferType transfer,
3458 SVGA3dCopyBox const *pBox, PVMSVGA3DCONTEXT pContext, int rc, int iBox)
3459{
3460 RT_NOREF(pState, pMipLevel, pContext, iBox);
3461
3462 /* The called should not use the function for system memory surfaces. */
3463 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3464 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
3465
3466 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3467 {
3468 /** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
3469 AssertReturn(uHostFace == 0 && uHostMipmap == 0, VERR_INVALID_PARAMETER);
3470 AssertReturn(transfer == SVGA3D_WRITE_HOST_VRAM, VERR_NOT_IMPLEMENTED); /** @todo Implement */
3471
3472 uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
3473 uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
3474 Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
3475 Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
3476 uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3477 uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3478 AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
3479
3480 /* vmsvgaR3GmrTransfer verifies uGuestOffset.
3481 * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
3482 * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
3483 */
3484 uint64_t const uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
3485 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
3486
3487 SVGA3dSurfaceImageId image;
3488 image.sid = pSurface->id;
3489 image.face = uHostFace;
3490 image.mipmap = uHostMipmap;
3491
3492 SVGA3dBox box;
3493 box.x = pBox->x;
3494 box.y = pBox->y;
3495 box.z = 0;
3496 box.w = pBox->w;
3497 box.h = pBox->h;
3498 box.d = 1;
3499
3500 VMSVGA3D_MAPPED_SURFACE map;
3501 rc = vmsvga3dSurfaceMap(pThisCC, pSurface->idAssociatedContext, &image, &box, VMSVGA3D_SURFACE_MAP_WRITE_DISCARD, &map);
3502 if (RT_SUCCESS(rc))
3503 {
3504 /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
3505 * and offset of the first scanline.
3506 */
3507 uint32_t const cbLockedBuf = map.cbRowPitch * cBlocksY;
3508 uint8_t *pu8LockedBuf = (uint8_t *)map.pvData;
3509 uint32_t const offLockedBuf = 0;
3510
3511 rc = vmsvgaR3GmrTransfer(pThis,
3512 pThisCC,
3513 transfer,
3514 pu8LockedBuf,
3515 cbLockedBuf,
3516 offLockedBuf,
3517 map.cbRowPitch,
3518 GuestPtr,
3519 (uint32_t)uGuestOffset,
3520 cbGuestPitch,
3521 cBlocksX * pSurface->cbBlock,
3522 cBlocksY);
3523 AssertRC(rc);
3524
3525 // Log4(("first line:\n%.*Rhxd\n", cBlocksX * pSurface->cbBlock, LockedRect.pBits));
3526
3527 //vmsvga3dMapWriteBmpFile(&map, "Dynamic");
3528
3529 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ true);
3530 }
3531#if 0
3532//ASMBreakpoint();
3533 rc = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
3534 if (RT_SUCCESS(rc))
3535 {
3536 vmsvga3dMapWriteBmpFile(&map, "Staging");
3537
3538 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
3539 }
3540#endif
3541 }
3542 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
3543 {
3544 /** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
3545 AssertReturn(uHostFace == 0 && uHostMipmap == 0, VERR_INVALID_PARAMETER);
3546
3547 uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
3548 uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
3549 Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
3550 Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
3551 uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3552 uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3553 AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
3554
3555 /* vmsvgaR3GmrTransfer verifies uGuestOffset.
3556 * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
3557 * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
3558 */
3559 uint64_t const uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
3560 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
3561
3562 SVGA3dSurfaceImageId image;
3563 image.sid = pSurface->id;
3564 image.face = uHostFace;
3565 image.mipmap = uHostMipmap;
3566
3567 SVGA3dBox box;
3568 box.x = pBox->x;
3569 box.y = pBox->y;
3570 box.z = 0;
3571 box.w = pBox->w;
3572 box.h = pBox->h;
3573 box.d = 1;
3574
3575 VMSVGA3D_SURFACE_MAP const enmMap = transfer == SVGA3D_WRITE_HOST_VRAM
3576 ? VMSVGA3D_SURFACE_MAP_WRITE_DISCARD
3577 : VMSVGA3D_SURFACE_MAP_READ;
3578
3579 VMSVGA3D_MAPPED_SURFACE map;
3580 rc = vmsvga3dSurfaceMap(pThisCC, pSurface->idAssociatedContext, &image, &box, enmMap, &map);
3581 if (RT_SUCCESS(rc))
3582 {
3583 /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
3584 * and offset of the first scanline.
3585 */
3586 uint32_t const cbLockedBuf = map.cbRowPitch * cBlocksY;
3587 uint8_t *pu8LockedBuf = (uint8_t *)map.pvData;
3588 uint32_t const offLockedBuf = 0;
3589
3590 rc = vmsvgaR3GmrTransfer(pThis,
3591 pThisCC,
3592 transfer,
3593 pu8LockedBuf,
3594 cbLockedBuf,
3595 offLockedBuf,
3596 map.cbRowPitch,
3597 GuestPtr,
3598 (uint32_t)uGuestOffset,
3599 cbGuestPitch,
3600 cBlocksX * pSurface->cbBlock,
3601 cBlocksY);
3602 AssertRC(rc);
3603
3604 bool const fWritten = (transfer == SVGA3D_WRITE_HOST_VRAM);
3605 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, fWritten);
3606 }
3607 }
3608 else
3609 {
3610 AssertMsgFailed(("Unsupported surface type %d\n", pBackendSurface->enmResType));
3611 rc = VERR_NOT_IMPLEMENTED;
3612 }
3613
3614 return rc;
3615}
3616
3617
3618/**
3619 * Create D3D/OpenGL texture object for the specified surface.
3620 *
3621 * Surfaces are created when needed.
3622 *
3623 * @param pThisCC The device context.
3624 * @param pContext The context.
3625 * @param idAssociatedContext Probably the same as pContext->id.
3626 * @param pSurface The surface to create the texture for.
3627 */
3628static DECLCALLBACK(int) vmsvga3dBackCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t idAssociatedContext,
3629 PVMSVGA3DSURFACE pSurface)
3630
3631{
3632 RT_NOREF(pThisCC, pContext, idAssociatedContext, pSurface);
3633
3634 AssertFailed();
3635 return VINF_SUCCESS;
3636}
3637
3638
3639static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryCreate(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
3640{
3641 RT_NOREF(pThisCC, pContext);
3642 AssertFailed();
3643 return VINF_SUCCESS;
3644}
3645
3646
3647static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryBegin(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
3648{
3649 RT_NOREF(pThisCC, pContext);
3650 AssertFailed();
3651 return VINF_SUCCESS;
3652}
3653
3654
3655static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryEnd(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
3656{
3657 RT_NOREF(pThisCC, pContext);
3658 AssertFailed();
3659 return VINF_SUCCESS;
3660}
3661
3662
3663static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryGetData(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t *pu32Pixels)
3664{
3665 RT_NOREF(pThisCC, pContext);
3666 *pu32Pixels = 0;
3667 AssertFailed();
3668 return VINF_SUCCESS;
3669}
3670
3671
3672static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryDelete(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
3673{
3674 RT_NOREF(pThisCC, pContext);
3675 AssertFailed();
3676 return VINF_SUCCESS;
3677}
3678
3679
3680/*
3681 * DX callbacks.
3682 */
3683
3684static DECLCALLBACK(int) vmsvga3dBackDXDefineContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3685{
3686 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3687
3688 /* Allocate a backend specific context structure. */
3689 PVMSVGA3DBACKENDDXCONTEXT pBackendDXContext = (PVMSVGA3DBACKENDDXCONTEXT)RTMemAllocZ(sizeof(VMSVGA3DBACKENDDXCONTEXT));
3690 AssertPtrReturn(pBackendDXContext, VERR_NO_MEMORY);
3691 pDXContext->pBackendDXContext = pBackendDXContext;
3692
3693 int rc = dxDeviceCreate(pBackend, &pBackendDXContext->device);
3694 return rc;
3695}
3696
3697
3698static DECLCALLBACK(int) vmsvga3dBackDXDestroyContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3699{
3700 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3701
3702 if (pDXContext->pBackendDXContext)
3703 {
3704 dxDeviceDestroy(pBackend, &pDXContext->pBackendDXContext->device);
3705
3706 RTMemFree(pDXContext->pBackendDXContext);
3707 pDXContext->pBackendDXContext = NULL;
3708 }
3709 return VINF_SUCCESS;
3710}
3711
3712
3713static DECLCALLBACK(int) vmsvga3dBackDXBindContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3714{
3715 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3716 RT_NOREF(pBackend, pDXContext);
3717 return VINF_SUCCESS;
3718}
3719
3720
3721static DECLCALLBACK(int) vmsvga3dBackDXReadbackContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3722{
3723 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3724
3725 RT_NOREF(pBackend, pDXContext);
3726 AssertFailed(); /** @todo Implement */
3727 return VERR_NOT_IMPLEMENTED;
3728}
3729
3730
3731static DECLCALLBACK(int) vmsvga3dBackDXInvalidateContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3732{
3733 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3734
3735 RT_NOREF(pBackend, pDXContext);
3736 AssertFailed(); /** @todo Implement */
3737 return VERR_NOT_IMPLEMENTED;
3738}
3739
3740
3741static DECLCALLBACK(int) vmsvga3dBackDXSetSingleConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t slot, SVGA3dShaderType type, SVGA3dSurfaceId sid, uint32_t offsetInBytes, uint32_t sizeInBytes)
3742{
3743 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3744 RT_NOREF(pBackend);
3745
3746 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3747 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3748
3749 if (sid == SVGA_ID_INVALID)
3750 {
3751 dxConstantBufferSet(pDevice, slot, type, NULL);
3752 return VINF_SUCCESS;
3753 }
3754
3755 PVMSVGA3DSURFACE pSurface;
3756 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
3757 AssertRCReturn(rc, rc);
3758
3759 uint32_t const cbSurface = pSurface->paMipmapLevels[0].cbSurface;
3760 ASSERT_GUEST_RETURN( offsetInBytes < cbSurface
3761 && sizeInBytes <= cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
3762
3763 if (pSurface->pBackendSurface == NULL)
3764 {
3765 /* Create the resource. */
3766 rc = vmsvga3dBackSurfaceCreateConstantBuffer(pThisCC, pDXContext, pSurface);
3767 AssertRCReturn(rc, rc);
3768 }
3769
3770 if (pSurface->fDirty)
3771 {
3772 /* Get mobid for the surface and read from the MOB. */
3773 SVGA3dSurfaceImageId imageId;
3774 imageId.sid = sid;
3775 imageId.face = 0;
3776 imageId.mipmap = 0;
3777
3778 SVGA3dPoint ptSrc;
3779 ptSrc.x = offsetInBytes / pSurface->cbBlock;
3780 ptSrc.y = 0;
3781 ptSrc.z = 0;
3782
3783 SVGA3dBox boxDst;
3784 boxDst.x = 0;
3785 boxDst.y = 0;
3786 boxDst.z = 0;
3787 boxDst.w = sizeInBytes / pSurface->cbBlock;
3788 boxDst.h = 1;
3789 boxDst.d = 1;
3790
3791 rc = vmsvgaR3UpdateGBSurfaceEx(pThisCC, pDXContext->cid, &imageId, &boxDst, &ptSrc);
3792 AssertRCReturn(rc, rc);
3793 }
3794
3795 dxConstantBufferSet(pDevice, slot, type, pSurface->pBackendSurface->u.Buffer.pBuffer);
3796 return VINF_SUCCESS;
3797}
3798
3799
3800static DECLCALLBACK(int) vmsvga3dBackDXSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startView, SVGA3dShaderType type, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
3801{
3802 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3803 RT_NOREF(pBackend);
3804
3805 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3806 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3807
3808 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
3809 ID3D11ShaderResourceView *papShaderResourceView[SVGA3D_DX_MAX_SRVIEWS];
3810 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
3811 {
3812 SVGA3dShaderResourceViewId shaderResourceViewId = paShaderResourceViewId[i];
3813 if (shaderResourceViewId != SVGA3D_INVALID_ID)
3814 {
3815 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->pBackendDXContext->cShaderResourceView, VERR_INVALID_PARAMETER);
3816 papShaderResourceView[i] = pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId];
3817 }
3818 else
3819 papShaderResourceView[i] = NULL;
3820
3821 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[startView + i] = shaderResourceViewId;
3822 }
3823
3824 dxShaderResourceViewSet(pDevice, type, startView, cShaderResourceViewId, papShaderResourceView);
3825 return VINF_SUCCESS;
3826}
3827
3828
3829static DECLCALLBACK(int) vmsvga3dBackDXSetShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type, PVMSVGA3DSHADER pShader)
3830{
3831 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3832 RT_NOREF(pBackend);
3833
3834 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3835 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3836
3837 DXSHADER *pDXShader;
3838 if (pShader)
3839 {
3840 pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
3841 uint32_t const idxShaderState = pDXShader->enmShaderType - SVGA3D_SHADERTYPE_MIN;
3842 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId = pShader->id;
3843 }
3844 else
3845 pDXShader = NULL;
3846
3847 dxShaderSet(pDevice, type, pDXShader);
3848 return VINF_SUCCESS;
3849}
3850
3851
3852static DECLCALLBACK(int) vmsvga3dBackDXSetSamplers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startSampler, SVGA3dShaderType type, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
3853{
3854 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3855 RT_NOREF(pBackend);
3856
3857 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3858 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3859
3860 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
3861 ID3D11SamplerState *papSamplerState[SVGA3D_DX_MAX_SAMPLERS];
3862 for (uint32_t i = 0; i < cSamplerId; ++i)
3863 {
3864 SVGA3dSamplerId samplerId = paSamplerId[i];
3865 if (samplerId != SVGA3D_INVALID_ID)
3866 {
3867 ASSERT_GUEST_RETURN(samplerId < pDXContext->pBackendDXContext->cSamplerState, VERR_INVALID_PARAMETER);
3868 papSamplerState[i] = pDXContext->pBackendDXContext->papSamplerState[samplerId];
3869 }
3870 else
3871 papSamplerState[i] = NULL;
3872
3873 pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[startSampler + i] = samplerId;
3874 }
3875
3876 dxSamplerSet(pDevice, type, startSampler, cSamplerId, papSamplerState);
3877 return VINF_SUCCESS;
3878}
3879
3880
3881static DECLCALLBACK(int) vmsvga3dBackDXDraw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
3882{
3883 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3884 RT_NOREF(pBackend);
3885
3886 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3887 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3888
3889 if (pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN)
3890 pDevice->pImmediateContext->Draw(vertexCount, startVertexLocation);
3891 else
3892 {
3893 /*
3894 * Emulate SVGA3D_PRIMITIVE_TRIANGLEFAN using an indexed draw of a triangle list.
3895 */
3896
3897 /* Make sure that 16 bit indices are enough. 20000 ~= 65536 / 3 */
3898 AssertReturn(vertexCount <= 20000, VERR_NOT_SUPPORTED);
3899
3900 /* Generate indices. */
3901 UINT const IndexCount = 3 * (vertexCount - 2); /* 3_per_triangle * num_triangles */
3902 UINT const cbAlloc = IndexCount * sizeof(USHORT);
3903 USHORT *paIndices = (USHORT *)RTMemAlloc(cbAlloc);
3904 AssertReturn(paIndices, VERR_NO_MEMORY);
3905 USHORT iVertex = 1;
3906 for (UINT i = 0; i < IndexCount; i+= 3)
3907 {
3908 paIndices[i] = 0;
3909 paIndices[i + 1] = iVertex;
3910 ++iVertex;
3911 paIndices[i + 2] = iVertex;
3912 }
3913
3914 D3D11_SUBRESOURCE_DATA InitData;
3915 InitData.pSysMem = paIndices;
3916 InitData.SysMemPitch = cbAlloc;
3917 InitData.SysMemSlicePitch = cbAlloc;
3918
3919 D3D11_BUFFER_DESC bd;
3920 RT_ZERO(bd);
3921 bd.ByteWidth = cbAlloc;
3922 bd.Usage = D3D11_USAGE_IMMUTABLE;
3923 bd.BindFlags = D3D11_BIND_INDEX_BUFFER;
3924 //bd.CPUAccessFlags = 0;
3925 //bd.MiscFlags = 0;
3926 //bd.StructureByteStride = 0;
3927
3928 ID3D11Buffer *pIndexBuffer = 0;
3929 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, &InitData, &pIndexBuffer);
3930 Assert(SUCCEEDED(hr));RT_NOREF(hr);
3931
3932 /* Save the current index buffer. */
3933 ID3D11Buffer *pSavedIndexBuffer = 0;
3934 DXGI_FORMAT SavedFormat = DXGI_FORMAT_UNKNOWN;
3935 UINT SavedOffset = 0;
3936 pDevice->pImmediateContext->IAGetIndexBuffer(&pSavedIndexBuffer, &SavedFormat, &SavedOffset);
3937
3938 /* Set up the device state. */
3939 pDevice->pImmediateContext->IASetIndexBuffer(pIndexBuffer, DXGI_FORMAT_R16_UINT, 0);
3940 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
3941
3942 UINT const StartIndexLocation = 0;
3943 INT const BaseVertexLocation = startVertexLocation;
3944 pDevice->pImmediateContext->DrawIndexed(IndexCount, StartIndexLocation, BaseVertexLocation);
3945
3946 /* Restore the device state. */
3947 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
3948 pDevice->pImmediateContext->IASetIndexBuffer(pSavedIndexBuffer, SavedFormat, SavedOffset);
3949 D3D_RELEASE(pSavedIndexBuffer);
3950
3951 /* Cleanup. */
3952 D3D_RELEASE(pIndexBuffer);
3953 RTMemFree(paIndices);
3954 }
3955
3956 return VINF_SUCCESS;
3957}
3958
3959
3960static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
3961{
3962 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3963 RT_NOREF(pBackend);
3964
3965 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3966 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3967
3968 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
3969
3970 pDevice->pImmediateContext->DrawIndexed(indexCount, startIndexLocation, baseVertexLocation);
3971 return VINF_SUCCESS;
3972}
3973
3974
3975static DECLCALLBACK(int) vmsvga3dBackDXDrawInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3976{
3977 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
3978 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3979
3980 RT_NOREF(pBackend, pDXContext);
3981 AssertFailed(); /** @todo Implement */
3982 return VERR_NOT_IMPLEMENTED;
3983}
3984
3985
3986static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3987{
3988 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
3989 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3990
3991 RT_NOREF(pBackend, pDXContext);
3992 AssertFailed(); /** @todo Implement */
3993 return VERR_NOT_IMPLEMENTED;
3994}
3995
3996
3997static DECLCALLBACK(int) vmsvga3dBackDXDrawAuto(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3998{
3999 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
4000 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4001
4002 RT_NOREF(pBackend, pDXContext);
4003 AssertFailed(); /** @todo Implement */
4004 return VERR_NOT_IMPLEMENTED;
4005}
4006
4007
4008static DECLCALLBACK(int) vmsvga3dBackDXSetInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
4009{
4010 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4011 RT_NOREF(pBackend);
4012
4013 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4014 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4015
4016 pDXContext->svgaDXContext.inputAssembly.layoutId = elementLayoutId;
4017
4018 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
4019 if (!pDXElementLayout->pElementLayout)
4020 {
4021 uint32_t const idxShaderState = SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN;
4022 uint32_t const shid = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
4023 AssertReturnStmt(shid < pDXContext->pBackendDXContext->cShader,
4024 LogRelMax(16, ("VMSVGA: DX shader is not set in DXSetInputLayout: shid = 0x%x\n", shid)),
4025 VERR_INVALID_STATE);
4026 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shid];
4027 AssertReturnStmt(pDXShader->pvDXBC,
4028 LogRelMax(16, ("VMSVGA: DX shader bytecode is not available in DXSetInputLayout: shid = %u\n", shid)),
4029 VERR_INVALID_STATE);
4030 HRESULT hr = pDevice->pDevice->CreateInputLayout(pDXElementLayout->aElementDesc,
4031 pDXElementLayout->cElementDesc,
4032 pDXShader->pvDXBC,
4033 pDXShader->cbDXBC,
4034 &pDXElementLayout->pElementLayout);
4035 AssertReturn(SUCCEEDED(hr), VERR_NO_MEMORY);
4036 }
4037
4038 pDevice->pImmediateContext->IASetInputLayout(pDXElementLayout->pElementLayout);
4039 return VINF_SUCCESS;
4040}
4041
4042
4043static DECLCALLBACK(int) vmsvga3dBackDXSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
4044{
4045 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4046 RT_NOREF(pBackend);
4047
4048 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4049 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4050
4051 /* For each paVertexBuffer[i]:
4052 * If the vertex buffer object does not exist then create it.
4053 * If the surface has been updated by the guest then update the buffer object.
4054 * Use IASetVertexBuffers to set the buffers.
4055 */
4056
4057 ID3D11Buffer *paResources[SVGA3D_DX_MAX_VERTEXBUFFERS];
4058 UINT paStride[SVGA3D_DX_MAX_VERTEXBUFFERS];
4059 UINT paOffset[SVGA3D_DX_MAX_VERTEXBUFFERS];
4060
4061 for (uint32_t i = 0; i < cVertexBuffer; ++i)
4062 {
4063 uint32_t const idxVertexBuffer = startBuffer + i;
4064
4065 /* Get corresponding resource. Create the buffer if does not yet exist. */
4066 if (paVertexBuffer[i].sid != SVGA_ID_INVALID)
4067 {
4068 PVMSVGA3DSURFACE pSurface;
4069 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paVertexBuffer[i].sid, &pSurface);
4070 AssertRCReturn(rc, rc);
4071
4072 if (pSurface->pBackendSurface == NULL)
4073 {
4074 /* Create the resource. */
4075 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC, pDXContext, pSurface);
4076 AssertRCReturn(rc, rc);
4077 }
4078
4079 if (pSurface->fDirty)
4080 {
4081 /* Get mobid for the surface and read from the MOB. */
4082 SVGA3dSurfaceImageId imageId;
4083 imageId.sid = paVertexBuffer[i].sid;
4084 imageId.face = 0;
4085 imageId.mipmap = 0;
4086
4087 SVGA3dBox box;
4088 box.x = 0;
4089 box.y = 0;
4090 box.z = 0;
4091 box.w = pSurface->paMipmapLevels[0].mipmapSize.width;
4092 box.h = 1;
4093 box.d = 1;
4094
4095 rc = vmsvgaR3UpdateGBSurface(pThisCC, pDXContext->cid, &imageId, &box);
4096 AssertRCReturn(rc, rc);
4097 }
4098
4099 paResources[idxVertexBuffer] = pSurface->pBackendSurface->u.Buffer.pBuffer;
4100 paStride[idxVertexBuffer] = paVertexBuffer[i].stride;
4101 paOffset[idxVertexBuffer] = paVertexBuffer[i].offset;
4102 }
4103 else
4104 {
4105 paResources[idxVertexBuffer] = NULL;
4106 paStride[idxVertexBuffer] = 0;
4107 paOffset[idxVertexBuffer] = 0;
4108 }
4109
4110 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].bufferId = paVertexBuffer[i].sid;
4111 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].stride = paVertexBuffer[i].stride;
4112 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].offset = paVertexBuffer[i].offset;
4113 }
4114
4115 pDevice->pImmediateContext->IASetVertexBuffers(startBuffer, cVertexBuffer, paResources, paStride, paOffset);
4116
4117 return VINF_SUCCESS;
4118}
4119
4120
4121static DECLCALLBACK(int) vmsvga3dBackDXSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId sid, SVGA3dSurfaceFormat format, uint32_t offset)
4122{
4123 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4124 RT_NOREF(pBackend);
4125
4126 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4127 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4128
4129 /* Get corresponding resource. Create the buffer if does not yet exist. */
4130 ID3D11Buffer *pResource;
4131 DXGI_FORMAT enmDxgiFormat;
4132
4133 if (sid != SVGA_ID_INVALID)
4134 {
4135 PVMSVGA3DSURFACE pSurface;
4136 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
4137 AssertRCReturn(rc, rc);
4138
4139 if (pSurface->pBackendSurface == NULL)
4140 {
4141 /* Create the resource. */
4142 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC, pDXContext, pSurface);
4143 AssertRCReturn(rc, rc);
4144 }
4145
4146 if (pSurface->fDirty)
4147 {
4148 /* Get mobid for the surface and read from the MOB. */
4149 SVGA3dSurfaceImageId imageId;
4150 imageId.sid = sid;
4151 imageId.face = 0;
4152 imageId.mipmap = 0;
4153
4154 SVGA3dBox box;
4155 box.x = 0;
4156 box.y = 0;
4157 box.z = 0;
4158 box.w = pSurface->paMipmapLevels[0].mipmapSize.width;
4159 box.h = 1;
4160 box.d = 1;
4161
4162 rc = vmsvgaR3UpdateGBSurface(pThisCC, pDXContext->cid, &imageId, &box);
4163 AssertRCReturn(rc, rc);
4164 }
4165
4166 pResource = pSurface->pBackendSurface->u.Buffer.pBuffer;
4167 enmDxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(format);
4168 AssertReturn(enmDxgiFormat == DXGI_FORMAT_R16_UINT || enmDxgiFormat == DXGI_FORMAT_R32_UINT, VERR_INVALID_PARAMETER);
4169 }
4170 else
4171 {
4172 pResource = NULL;
4173 enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
4174 }
4175
4176 pDevice->pImmediateContext->IASetIndexBuffer(pResource, enmDxgiFormat, offset);
4177 return VINF_SUCCESS;
4178}
4179
4180static D3D11_PRIMITIVE_TOPOLOGY dxTopology(SVGA3dPrimitiveType primitiveType)
4181{
4182 static D3D11_PRIMITIVE_TOPOLOGY const aD3D11PrimitiveTopology[SVGA3D_PRIMITIVE_MAX] =
4183 {
4184 D3D11_PRIMITIVE_TOPOLOGY_UNDEFINED,
4185 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST,
4186 D3D11_PRIMITIVE_TOPOLOGY_POINTLIST,
4187 D3D11_PRIMITIVE_TOPOLOGY_LINELIST,
4188 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP,
4189 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP,
4190 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP, /* SVGA3D_PRIMITIVE_TRIANGLEFAN: No FAN in D3D11. */
4191 D3D11_PRIMITIVE_TOPOLOGY_LINELIST_ADJ,
4192 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP_ADJ,
4193 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST_ADJ,
4194 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP_ADJ,
4195 D3D11_PRIMITIVE_TOPOLOGY_1_CONTROL_POINT_PATCHLIST,
4196 D3D11_PRIMITIVE_TOPOLOGY_2_CONTROL_POINT_PATCHLIST,
4197 D3D11_PRIMITIVE_TOPOLOGY_3_CONTROL_POINT_PATCHLIST,
4198 D3D11_PRIMITIVE_TOPOLOGY_4_CONTROL_POINT_PATCHLIST,
4199 D3D11_PRIMITIVE_TOPOLOGY_5_CONTROL_POINT_PATCHLIST,
4200 D3D11_PRIMITIVE_TOPOLOGY_6_CONTROL_POINT_PATCHLIST,
4201 D3D11_PRIMITIVE_TOPOLOGY_7_CONTROL_POINT_PATCHLIST,
4202 D3D11_PRIMITIVE_TOPOLOGY_8_CONTROL_POINT_PATCHLIST,
4203 D3D11_PRIMITIVE_TOPOLOGY_9_CONTROL_POINT_PATCHLIST,
4204 D3D11_PRIMITIVE_TOPOLOGY_10_CONTROL_POINT_PATCHLIST,
4205 D3D11_PRIMITIVE_TOPOLOGY_11_CONTROL_POINT_PATCHLIST,
4206 D3D11_PRIMITIVE_TOPOLOGY_12_CONTROL_POINT_PATCHLIST,
4207 D3D11_PRIMITIVE_TOPOLOGY_13_CONTROL_POINT_PATCHLIST,
4208 D3D11_PRIMITIVE_TOPOLOGY_14_CONTROL_POINT_PATCHLIST,
4209 D3D11_PRIMITIVE_TOPOLOGY_15_CONTROL_POINT_PATCHLIST,
4210 D3D11_PRIMITIVE_TOPOLOGY_16_CONTROL_POINT_PATCHLIST,
4211 D3D11_PRIMITIVE_TOPOLOGY_17_CONTROL_POINT_PATCHLIST,
4212 D3D11_PRIMITIVE_TOPOLOGY_18_CONTROL_POINT_PATCHLIST,
4213 D3D11_PRIMITIVE_TOPOLOGY_19_CONTROL_POINT_PATCHLIST,
4214 D3D11_PRIMITIVE_TOPOLOGY_20_CONTROL_POINT_PATCHLIST,
4215 D3D11_PRIMITIVE_TOPOLOGY_21_CONTROL_POINT_PATCHLIST,
4216 D3D11_PRIMITIVE_TOPOLOGY_22_CONTROL_POINT_PATCHLIST,
4217 D3D11_PRIMITIVE_TOPOLOGY_23_CONTROL_POINT_PATCHLIST,
4218 D3D11_PRIMITIVE_TOPOLOGY_24_CONTROL_POINT_PATCHLIST,
4219 D3D11_PRIMITIVE_TOPOLOGY_25_CONTROL_POINT_PATCHLIST,
4220 D3D11_PRIMITIVE_TOPOLOGY_26_CONTROL_POINT_PATCHLIST,
4221 D3D11_PRIMITIVE_TOPOLOGY_27_CONTROL_POINT_PATCHLIST,
4222 D3D11_PRIMITIVE_TOPOLOGY_28_CONTROL_POINT_PATCHLIST,
4223 D3D11_PRIMITIVE_TOPOLOGY_29_CONTROL_POINT_PATCHLIST,
4224 D3D11_PRIMITIVE_TOPOLOGY_30_CONTROL_POINT_PATCHLIST,
4225 D3D11_PRIMITIVE_TOPOLOGY_31_CONTROL_POINT_PATCHLIST,
4226 D3D11_PRIMITIVE_TOPOLOGY_32_CONTROL_POINT_PATCHLIST,
4227 };
4228 return aD3D11PrimitiveTopology[primitiveType];
4229}
4230
4231static DECLCALLBACK(int) vmsvga3dBackDXSetTopology(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dPrimitiveType topology)
4232{
4233 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4234 RT_NOREF(pBackend);
4235
4236 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4237 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4238
4239 D3D11_PRIMITIVE_TOPOLOGY const enmTopology = dxTopology(topology);
4240 pDevice->pImmediateContext->IASetPrimitiveTopology(enmTopology);
4241 return VINF_SUCCESS;
4242}
4243
4244
4245static DECLCALLBACK(int) vmsvga3dBackDXSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
4246{
4247 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4248 RT_NOREF(pBackend);
4249
4250 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4251 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4252
4253 ID3D11RenderTargetView *papRenderTargetViews[SVGA3D_MAX_RENDER_TARGETS];
4254 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
4255 {
4256 SVGA3dRenderTargetViewId const renderTargetViewId = paRenderTargetViewId[i];
4257 if (renderTargetViewId != SVGA3D_INVALID_ID)
4258 {
4259 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->pBackendDXContext->cRenderTargetView, VERR_INVALID_PARAMETER);
4260 papRenderTargetViews[i] = pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId];
4261 }
4262 else
4263 papRenderTargetViews[i] = NULL;
4264 }
4265
4266 ID3D11DepthStencilView *pDepthStencilView;
4267 if (depthStencilViewId != SVGA_ID_INVALID)
4268 pDepthStencilView = pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId];
4269 else
4270 pDepthStencilView = NULL;
4271
4272 pDevice->pImmediateContext->OMSetRenderTargets(cRenderTargetViewId, papRenderTargetViews, pDepthStencilView);
4273 return VINF_SUCCESS;
4274}
4275
4276
4277static DECLCALLBACK(int) vmsvga3dBackDXSetBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId, float const blendFactor[4], uint32_t sampleMask)
4278{
4279 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4280 RT_NOREF(pBackend);
4281
4282 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4283 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4284
4285 ID3D11BlendState *pBlendState = pDXContext->pBackendDXContext->papBlendState[blendId];
4286 pDevice->pImmediateContext->OMSetBlendState(pBlendState, blendFactor, sampleMask);
4287
4288 pDXContext->svgaDXContext.renderState.blendStateId = blendId;
4289 memcpy(pDXContext->svgaDXContext.renderState.blendFactor, blendFactor, sizeof(blendFactor));
4290 pDXContext->svgaDXContext.renderState.sampleMask = sampleMask;
4291
4292 return VINF_SUCCESS;
4293}
4294
4295
4296static DECLCALLBACK(int) vmsvga3dBackDXSetDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, uint32_t stencilRef)
4297{
4298 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4299 RT_NOREF(pBackend);
4300
4301 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4302 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4303
4304 ID3D11DepthStencilState *pDepthStencilState = pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId];
4305 pDevice->pImmediateContext->OMSetDepthStencilState(pDepthStencilState, stencilRef);
4306
4307 pDXContext->svgaDXContext.renderState.depthStencilStateId = depthStencilId;
4308 pDXContext->svgaDXContext.renderState.stencilRef = stencilRef;
4309
4310 return VINF_SUCCESS;
4311}
4312
4313
4314static DECLCALLBACK(int) vmsvga3dBackDXSetRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
4315{
4316 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4317 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4318 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4319
4320 RT_NOREF(pBackend);
4321
4322 pDevice->pImmediateContext->RSSetState(pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
4323 return VINF_SUCCESS;
4324}
4325
4326
4327static DECLCALLBACK(int) vmsvga3dBackDXDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4328{
4329 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4330
4331 RT_NOREF(pBackend, pDXContext);
4332 AssertFailed(); /** @todo Implement */
4333 return VERR_NOT_IMPLEMENTED;
4334}
4335
4336
4337static DECLCALLBACK(int) vmsvga3dBackDXDestroyQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4338{
4339 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4340
4341 RT_NOREF(pBackend, pDXContext);
4342 AssertFailed(); /** @todo Implement */
4343 return VERR_NOT_IMPLEMENTED;
4344}
4345
4346
4347static DECLCALLBACK(int) vmsvga3dBackDXBindQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4348{
4349 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4350
4351 RT_NOREF(pBackend, pDXContext);
4352 AssertFailed(); /** @todo Implement */
4353 return VERR_NOT_IMPLEMENTED;
4354}
4355
4356
4357static DECLCALLBACK(int) vmsvga3dBackDXSetQueryOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4358{
4359 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4360
4361 RT_NOREF(pBackend, pDXContext);
4362 AssertFailed(); /** @todo Implement */
4363 return VERR_NOT_IMPLEMENTED;
4364}
4365
4366
4367static DECLCALLBACK(int) vmsvga3dBackDXBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4368{
4369 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4370
4371 RT_NOREF(pBackend, pDXContext);
4372 AssertFailed(); /** @todo Implement */
4373 return VERR_NOT_IMPLEMENTED;
4374}
4375
4376
4377static DECLCALLBACK(int) vmsvga3dBackDXEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4378{
4379 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4380
4381 RT_NOREF(pBackend, pDXContext);
4382 AssertFailed(); /** @todo Implement */
4383 return VERR_NOT_IMPLEMENTED;
4384}
4385
4386
4387static DECLCALLBACK(int) vmsvga3dBackDXReadbackQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4388{
4389 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4390
4391 RT_NOREF(pBackend, pDXContext);
4392 AssertFailed(); /** @todo Implement */
4393 return VERR_NOT_IMPLEMENTED;
4394}
4395
4396
4397static DECLCALLBACK(int) vmsvga3dBackDXSetPredication(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4398{
4399 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4400
4401 RT_NOREF(pBackend, pDXContext);
4402 AssertFailed(); /** @todo Implement */
4403 return VERR_NOT_IMPLEMENTED;
4404}
4405
4406
4407static DECLCALLBACK(int) vmsvga3dBackDXSetSOTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4408{
4409 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4410
4411 RT_NOREF(pBackend, pDXContext);
4412 AssertFailed(); /** @todo Implement */
4413 return VERR_NOT_IMPLEMENTED;
4414}
4415
4416
4417static DECLCALLBACK(int) vmsvga3dBackDXSetViewports(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
4418{
4419 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4420 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4421 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4422
4423 RT_NOREF(pBackend);
4424
4425 /* D3D11_VIEWPORT is identical to SVGA3dViewport. */
4426 D3D11_VIEWPORT *pViewports = (D3D11_VIEWPORT *)paViewport;
4427
4428 pDevice->pImmediateContext->RSSetViewports(cViewport, pViewports);
4429 return VINF_SUCCESS;
4430}
4431
4432
4433static DECLCALLBACK(int) vmsvga3dBackDXSetScissorRects(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cRect, SVGASignedRect const *paRect)
4434{
4435 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4436 RT_NOREF(pBackend);
4437
4438 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4439 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4440
4441 /* D3D11_RECT is identical to SVGASignedRect. */
4442 D3D11_RECT *pRects = (D3D11_RECT *)paRect;
4443
4444 pDevice->pImmediateContext->RSSetScissorRects(cRect, pRects);
4445 return VINF_SUCCESS;
4446}
4447
4448
4449static DECLCALLBACK(int) vmsvga3dBackDXClearRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGA3dRGBAFloat const *pRGBA)
4450{
4451 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4452 RT_NOREF(pBackend);
4453
4454 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4455 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4456
4457 ID3D11RenderTargetView *pRenderTargetView = pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId];
4458 AssertReturn(pRenderTargetView, VERR_INVALID_STATE);
4459 pDevice->pImmediateContext->ClearRenderTargetView(pRenderTargetView, pRGBA->value);
4460 return VINF_SUCCESS;
4461}
4462
4463
4464static DECLCALLBACK(int) vmsvga3dBackDXClearDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t flags, SVGA3dDepthStencilViewId depthStencilViewId, float depth, uint8_t stencil)
4465{
4466 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4467 RT_NOREF(pBackend);
4468
4469 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4470 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4471
4472 ID3D11DepthStencilView *pDepthStencilView = pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId];
4473 AssertReturn(pDepthStencilView, VERR_INVALID_STATE);
4474 pDevice->pImmediateContext->ClearDepthStencilView(pDepthStencilView, flags, depth, stencil);
4475 return VINF_SUCCESS;
4476}
4477
4478
4479static DECLCALLBACK(int) vmsvga3dBackDXPredCopyRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dCopyBox const *pBox)
4480{
4481 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4482 RT_NOREF(pBackend);
4483
4484 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4485 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4486
4487 PVMSVGA3DSURFACE pSrcSurface;
4488 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
4489 AssertRCReturn(rc, rc);
4490
4491 PVMSVGA3DSURFACE pDstSurface;
4492 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
4493 AssertRCReturn(rc, rc);
4494
4495 if (pSrcSurface->pBackendSurface == NULL)
4496 {
4497 /* Create the resource. */
4498 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSrcSurface);
4499 AssertRCReturn(rc, rc);
4500 }
4501
4502 if (pDstSurface->pBackendSurface == NULL)
4503 {
4504 /* Create the resource. */
4505 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pDstSurface);
4506 AssertRCReturn(rc, rc);
4507 }
4508
4509 LogFunc(("cid %d: src cid %d%s -> dst cid %d%s\n",
4510 pDXContext->cid, pSrcSurface->idAssociatedContext,
4511 (pSrcSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "",
4512 pDstSurface->idAssociatedContext,
4513 (pDstSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : ""));
4514
4515 UINT DstSubresource = dstSubResource;
4516 UINT DstX = pBox->x;
4517 UINT DstY = pBox->y;
4518 UINT DstZ = pBox->z;
4519
4520 UINT SrcSubresource = srcSubResource;
4521 D3D11_BOX SrcBox;
4522 SrcBox.left = pBox->x;
4523 SrcBox.top = pBox->y;
4524 SrcBox.front = pBox->z;
4525 SrcBox.right = pBox->x + pBox->w;
4526 SrcBox.bottom = pBox->y + pBox->h;
4527 SrcBox.back = pBox->z + pBox->d;
4528
4529 ID3D11Resource *pDstResource;
4530 ID3D11Resource *pSrcResource;
4531
4532 if (pDstSurface->idAssociatedContext == pSrcSurface->idAssociatedContext)
4533 {
4534 /* Use the context which created the surfaces. */
4535 if (pSrcSurface->idAssociatedContext != SVGA_ID_INVALID)
4536 {
4537 /* One of DXContexts has created the resources. */
4538 if (pDXContext->cid != pSrcSurface->idAssociatedContext)
4539 {
4540 /** @todo test */
4541 /* Get the context which has created the surfaces. */
4542 rc = vmsvga3dDXContextFromCid(pThisCC->svga.p3dState, pSrcSurface->idAssociatedContext, &pDXContext);
4543 AssertRCReturn(rc, rc);
4544
4545 pDevice = &pDXContext->pBackendDXContext->device;
4546 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4547 }
4548
4549 pDstResource = dxResource(pDstSurface, pDXContext);
4550 pSrcResource = dxResource(pSrcSurface, pDXContext);
4551 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4552 pSrcResource, SrcSubresource, &SrcBox);
4553 }
4554 else
4555 {
4556 /* Backend context has created the resources. */
4557 pDstResource = pDstSurface->pBackendSurface->u.Resource.pResource;
4558 pSrcResource = pSrcSurface->pBackendSurface->u.Resource.pResource;
4559 pBackend->device.pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4560 pSrcResource, SrcSubresource, &SrcBox);
4561 }
4562 }
4563 else
4564 {
4565 /* Different contexts. */
4566
4567 /* One of the surfaces must be shared. */
4568 AssertReturn( pSrcSurface->idAssociatedContext == SVGA_ID_INVALID
4569 || pDstSurface->idAssociatedContext == SVGA_ID_INVALID, VERR_NOT_SUPPORTED);
4570
4571 /* Use a context which created the not shared resource to do the copy. */
4572 if (pSrcSurface->idAssociatedContext == SVGA_ID_INVALID)
4573 {
4574 if (pDXContext->cid != pDstSurface->idAssociatedContext)
4575 {
4576 /* Get the context which has created the destination resource. */
4577 rc = vmsvga3dDXContextFromCid(pThisCC->svga.p3dState, pDstSurface->idAssociatedContext, &pDXContext);
4578 AssertRCReturn(rc, rc);
4579
4580 pDevice = &pDXContext->pBackendDXContext->device;
4581 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4582 }
4583
4584 pDstResource = dxResource(pDstSurface, pDXContext);
4585 pSrcResource = dxResource(pSrcSurface, pDXContext);
4586 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4587 pSrcResource, SrcSubresource, &SrcBox);
4588 }
4589 else if (pDstSurface->idAssociatedContext == SVGA_ID_INVALID)
4590 {
4591 if (pDXContext->cid != pSrcSurface->idAssociatedContext)
4592 {
4593 /* Get the context which has created the source surface. */
4594 rc = vmsvga3dDXContextFromCid(pThisCC->svga.p3dState, pSrcSurface->idAssociatedContext, &pDXContext);
4595 AssertRCReturn(rc, rc);
4596
4597 pDevice = &pDXContext->pBackendDXContext->device;
4598 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4599 }
4600
4601 pDstResource = dxResource(pDstSurface, pDXContext);
4602 pSrcResource = dxResource(pSrcSurface, pDXContext);
4603 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4604 pSrcResource, SrcSubresource, &SrcBox);
4605 }
4606 else
4607 {
4608 AssertFailedReturn(VERR_NOT_SUPPORTED);
4609 }
4610 }
4611 return VINF_SUCCESS;
4612}
4613
4614
4615static DECLCALLBACK(int) vmsvga3dBackDXPredCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4616{
4617 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4618
4619 RT_NOREF(pBackend, pDXContext);
4620 AssertFailed(); /** @todo Implement */
4621 return VERR_NOT_IMPLEMENTED;
4622}
4623
4624
4625static DECLCALLBACK(int) vmsvga3dBackDXPresentBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4626{
4627 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4628
4629 RT_NOREF(pBackend, pDXContext);
4630 AssertFailed(); /** @todo Implement */
4631 return VERR_NOT_IMPLEMENTED;
4632}
4633
4634
4635static DECLCALLBACK(int) vmsvga3dBackDXGenMips(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
4636{
4637 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4638 RT_NOREF(pBackend);
4639
4640 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4641 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4642
4643 ID3D11ShaderResourceView *pShaderResourceView = pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId];
4644 AssertReturn(pShaderResourceView, VERR_INVALID_STATE);
4645 pDevice->pImmediateContext->GenerateMips(pShaderResourceView);
4646 return VINF_SUCCESS;
4647}
4648
4649
4650static DECLCALLBACK(int) vmsvga3dBackDXUpdateSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4651{
4652 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4653
4654 RT_NOREF(pBackend, pDXContext);
4655 AssertFailed(); /** @todo Implement */
4656 return VERR_NOT_IMPLEMENTED;
4657}
4658
4659
4660static DECLCALLBACK(int) vmsvga3dBackDXReadbackSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4661{
4662 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4663
4664 RT_NOREF(pBackend, pDXContext);
4665 AssertFailed(); /** @todo Implement */
4666 return VERR_NOT_IMPLEMENTED;
4667}
4668
4669
4670static DECLCALLBACK(int) vmsvga3dBackDXInvalidateSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4671{
4672 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4673
4674 RT_NOREF(pBackend, pDXContext);
4675 AssertFailed(); /** @todo Implement */
4676 return VERR_NOT_IMPLEMENTED;
4677}
4678
4679
4680static DECLCALLBACK(int) vmsvga3dBackDXDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
4681{
4682 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4683 RT_NOREF(pBackend);
4684
4685 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4686 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4687
4688 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
4689 PVMSVGA3DSURFACE pSurface;
4690 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
4691 AssertRCReturn(rc, rc);
4692
4693 if (pSurface->pBackendSurface == NULL)
4694 {
4695 /* Create the actual texture. */
4696 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
4697 AssertRCReturn(rc, rc);
4698 }
4699
4700 HRESULT hr = dxShaderResourceViewCreate(pDXContext, pEntry, pSurface, &pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId]);
4701 if (SUCCEEDED(hr))
4702 return VINF_SUCCESS;
4703 return VERR_INVALID_STATE;
4704}
4705
4706
4707static DECLCALLBACK(int) vmsvga3dBackDXDestroyShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
4708{
4709 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4710 RT_NOREF(pBackend);
4711
4712 D3D_RELEASE(pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId]);
4713 return VINF_SUCCESS;
4714}
4715
4716
4717static DECLCALLBACK(int) vmsvga3dBackDXDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
4718{
4719 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4720 RT_NOREF(pBackend);
4721
4722 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4723 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4724
4725 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
4726 PVMSVGA3DSURFACE pSurface;
4727 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
4728 AssertRCReturn(rc, rc);
4729
4730 if (pSurface->pBackendSurface == NULL)
4731 {
4732 /* Create the actual texture. */
4733 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
4734 AssertRCReturn(rc, rc);
4735 }
4736
4737 HRESULT hr = dxRenderTargetViewCreate(pDXContext, pEntry, pSurface, &pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId]);
4738 if (SUCCEEDED(hr))
4739 return VINF_SUCCESS;
4740 return VERR_INVALID_STATE;
4741}
4742
4743
4744static DECLCALLBACK(int) vmsvga3dBackDXDestroyRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId)
4745{
4746 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4747 RT_NOREF(pBackend);
4748
4749 D3D_RELEASE(pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId]);
4750 return VINF_SUCCESS;
4751}
4752
4753
4754static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
4755{
4756 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4757 RT_NOREF(pBackend);
4758
4759 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4760 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4761
4762 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
4763 PVMSVGA3DSURFACE pSurface;
4764 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
4765 AssertRCReturn(rc, rc);
4766
4767 if (pSurface->pBackendSurface == NULL)
4768 {
4769 /* Create the actual texture. */
4770 rc = vmsvga3dBackSurfaceCreateDepthStencilTexture(pThisCC, pDXContext, pSurface);
4771 AssertRCReturn(rc, rc);
4772 }
4773
4774 HRESULT hr = dxDepthStencilViewCreate(pDevice, pEntry, pSurface->pBackendSurface, &pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId]);
4775 if (SUCCEEDED(hr))
4776 return VINF_SUCCESS;
4777 return VERR_INVALID_STATE;
4778}
4779
4780
4781static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId)
4782{
4783 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4784 RT_NOREF(pBackend);
4785
4786 D3D_RELEASE(pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId]);
4787 return VINF_SUCCESS;
4788}
4789
4790
4791static DECLCALLBACK(int) vmsvga3dBackDXDefineElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
4792{
4793 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4794 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4795 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4796
4797 RT_NOREF(pBackend, elementLayoutId, pEntry);
4798
4799 /* Not much can be done here because ID3D11Device::CreateInputLayout requires
4800 * a pShaderBytecodeWithInputSignature which is not known at this moment.
4801 * InputLayout object will be created in SVGA_3D_CMD_DX_SET_INPUT_LAYOUT.
4802 */
4803
4804 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[pEntry->elid];
4805 D3D_RELEASE(pDXElementLayout->pElementLayout);
4806
4807 /* Semantic name is not interpreted by D3D, therefore arbitrary names can be used
4808 * if they are consistent between the element layout and shader input signature.
4809 * "In general, data passed between pipeline stages is completely generic and is not uniquely
4810 * interpreted by the system; arbitrary semantics are allowed ..."
4811 *
4812 * However D3D runtime insists that "SemanticName string ("POSITIO1") cannot end with a number."
4813 *
4814 * System-Value semantics ("SV_*") between shaders require proper names of course.
4815 * But they are irrelevant for input attributes.
4816 */
4817 pDXElementLayout->cElementDesc = pEntry->numDescs;
4818 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
4819 {
4820 D3D11_INPUT_ELEMENT_DESC *pDst = &pDXElementLayout->aElementDesc[i];
4821 SVGA3dInputElementDesc const *pSrc = &pEntry->descs[i];
4822 pDst->SemanticName = "ATTRIB";
4823 pDst->SemanticIndex = i; /// @todo 'pSrc->inputRegister' is unused, maybe it should somehow.
4824 pDst->Format = vmsvgaDXSurfaceFormat2Dxgi(pSrc->format);
4825 AssertReturn(pDst->Format != DXGI_FORMAT_UNKNOWN, VERR_NOT_IMPLEMENTED);
4826 pDst->InputSlot = pSrc->inputSlot;
4827 pDst->AlignedByteOffset = pSrc->alignedByteOffset;
4828 pDst->InputSlotClass = (D3D11_INPUT_CLASSIFICATION)pSrc->inputSlotClass;
4829 pDst->InstanceDataStepRate = pSrc->instanceDataStepRate;
4830 }
4831
4832 return VINF_SUCCESS;
4833}
4834
4835
4836static DECLCALLBACK(int) vmsvga3dBackDXDestroyElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4837{
4838 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4839
4840 RT_NOREF(pBackend, pDXContext);
4841 AssertFailed(); /** @todo Implement */
4842 return VERR_NOT_IMPLEMENTED;
4843}
4844
4845
4846static DECLCALLBACK(int) vmsvga3dBackDXDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
4847 SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
4848{
4849 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4850 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4851 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4852
4853 RT_NOREF(pBackend);
4854
4855 HRESULT hr = dxBlendStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papBlendState[blendId]);
4856 if (SUCCEEDED(hr))
4857 return VINF_SUCCESS;
4858 return VERR_INVALID_STATE;
4859}
4860
4861
4862static DECLCALLBACK(int) vmsvga3dBackDXDestroyBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4863{
4864 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4865
4866 RT_NOREF(pBackend, pDXContext);
4867 AssertFailed(); /** @todo Implement */
4868 return VERR_NOT_IMPLEMENTED;
4869}
4870
4871
4872static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry *pEntry)
4873{
4874 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4875 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4876 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4877
4878 RT_NOREF(pBackend);
4879
4880 HRESULT hr = dxDepthStencilStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
4881 if (SUCCEEDED(hr))
4882 return VINF_SUCCESS;
4883 return VERR_INVALID_STATE;
4884}
4885
4886
4887static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4888{
4889 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4890
4891 RT_NOREF(pBackend, pDXContext);
4892 AssertFailed(); /** @todo Implement */
4893 return VERR_NOT_IMPLEMENTED;
4894}
4895
4896
4897static DECLCALLBACK(int) vmsvga3dBackDXDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
4898{
4899 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4900 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4901 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4902
4903 RT_NOREF(pBackend);
4904
4905 HRESULT hr = dxRasterizerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
4906 if (SUCCEEDED(hr))
4907 return VINF_SUCCESS;
4908 return VERR_INVALID_STATE;
4909}
4910
4911
4912static DECLCALLBACK(int) vmsvga3dBackDXDestroyRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4913{
4914 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4915
4916 RT_NOREF(pBackend, pDXContext);
4917 AssertFailed(); /** @todo Implement */
4918 return VERR_NOT_IMPLEMENTED;
4919}
4920
4921
4922static DECLCALLBACK(int) vmsvga3dBackDXDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
4923{
4924 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4925 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4926 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4927
4928 RT_NOREF(pBackend);
4929
4930 HRESULT hr = dxSamplerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papSamplerState[samplerId]);
4931 if (SUCCEEDED(hr))
4932 return VINF_SUCCESS;
4933 return VERR_INVALID_STATE;
4934}
4935
4936
4937static DECLCALLBACK(int) vmsvga3dBackDXDestroySamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4938{
4939 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4940
4941 RT_NOREF(pBackend, pDXContext);
4942 AssertFailed(); /** @todo Implement */
4943 return VERR_NOT_IMPLEMENTED;
4944}
4945
4946
4947static DECLCALLBACK(int) vmsvga3dBackDXDefineShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader)
4948{
4949 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4950
4951 RT_NOREF(pBackend);
4952
4953 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
4954 D3D_RELEASE(pDXShader->pShader);
4955 pDXShader->enmShaderType = pShader->type;
4956 pShader->u.pvBackendShader = pDXShader;
4957 return VINF_SUCCESS;
4958}
4959
4960
4961static DECLCALLBACK(int) vmsvga3dBackDXDestroyShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4962{
4963 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4964
4965 RT_NOREF(pBackend, pDXContext);
4966 AssertFailed(); /** @todo Implement */
4967 return VERR_NOT_IMPLEMENTED;
4968}
4969
4970
4971static DECLCALLBACK(int) vmsvga3dBackDXBindShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader, void const *pvShaderBytecode)
4972{
4973 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4974 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4975 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4976
4977 RT_NOREF(pBackend);
4978
4979 int rc = VINF_SUCCESS;
4980
4981 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
4982 if (pDXShader->pvDXBC)
4983 {
4984 RTMemFree(pDXShader->pvDXBC);
4985 pDXShader->pvDXBC = NULL;
4986 pDXShader->cbDXBC = 0;
4987 }
4988
4989 if (pvShaderBytecode)
4990 {
4991#ifdef LOG_ENABLED
4992 Log(("Shader: cid=%u shid=%u type=%d:\n", pDXContext->cid, pShader->id, pDXShader->enmShaderType));
4993 uint8_t *pu8 = (uint8_t *)pvShaderBytecode;
4994 for (uint32_t i = 0; i < pShader->cbData; ++i)
4995 {
4996 if ((i % 16) == 0)
4997 {
4998 if (i > 0)
4999 Log((",\n"));
5000
5001 Log((" %#04x", pu8[i]));
5002 }
5003 else
5004 {
5005 Log((", %#04x", pu8[i]));
5006 }
5007 }
5008 Log(("\n"));
5009#endif
5010
5011 rc = DXShaderCreateDXBC(&pShader->shaderInfo, pvShaderBytecode, pShader->cbData, &pDXShader->pvDXBC, &pDXShader->cbDXBC);
5012 if (RT_SUCCESS(rc))
5013 {
5014#ifdef LOG_ENABLED
5015 if (pBackend->pfnD3DDisassemble && LogIs6Enabled())
5016 {
5017 ID3D10Blob *pBlob = 0;
5018 HRESULT hr2 = pBackend->pfnD3DDisassemble(pDXShader->pvDXBC, pDXShader->cbDXBC, 0, NULL, &pBlob);
5019 if (SUCCEEDED(hr2) && pBlob && pBlob->GetBufferSize())
5020 {
5021 Log6(("Shader: cid=%u shid=%u type=%d:\n%s\n",
5022 pDXContext->cid, pShader->id, pDXShader->enmShaderType, pBlob->GetBufferPointer()));
5023 }
5024 else
5025 AssertFailed();
5026 D3D_RELEASE(pBlob);
5027 }
5028#endif
5029
5030 HRESULT hr = dxShaderCreate(pDevice, pShader, pDXShader);
5031 if (FAILED(hr))
5032 rc = VERR_INVALID_STATE;
5033 }
5034 else
5035 rc = VERR_NO_MEMORY;
5036 }
5037
5038 return rc;
5039}
5040
5041
5042static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5043{
5044 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5045
5046 RT_NOREF(pBackend, pDXContext);
5047 AssertFailed(); /** @todo Implement */
5048 return VERR_NOT_IMPLEMENTED;
5049}
5050
5051
5052static DECLCALLBACK(int) vmsvga3dBackDXDestroyStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5053{
5054 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5055
5056 RT_NOREF(pBackend, pDXContext);
5057 AssertFailed(); /** @todo Implement */
5058 return VERR_NOT_IMPLEMENTED;
5059}
5060
5061
5062static DECLCALLBACK(int) vmsvga3dBackDXSetStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5063{
5064 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5065
5066 RT_NOREF(pBackend, pDXContext);
5067 AssertFailed(); /** @todo Implement */
5068 return VERR_NOT_IMPLEMENTED;
5069}
5070
5071
5072static int dxCOTableRealloc(void **ppvCOTable, uint32_t *pcCOTable, uint32_t cbEntry, uint32_t cEntries, uint32_t cValidEntries)
5073{
5074 if (*pcCOTable != cEntries)
5075 {
5076 /* Grow/shrink the array. */
5077 if (cEntries)
5078 {
5079 void *pvNew = RTMemRealloc(*ppvCOTable, cEntries * cbEntry);
5080 AssertReturn(pvNew, VERR_NO_MEMORY);
5081 memset((uint8_t *)pvNew + cValidEntries * cbEntry, 0, (cEntries - cValidEntries) * cbEntry);
5082 *ppvCOTable = pvNew;
5083 }
5084 else
5085 {
5086 RTMemFree(*ppvCOTable);
5087 *ppvCOTable = NULL;
5088 }
5089
5090 *pcCOTable = cEntries;
5091 }
5092
5093 return VINF_SUCCESS;
5094}
5095
5096static DECLCALLBACK(int) vmsvga3dBackDXSetCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableType type, uint32_t cEntries, uint32_t cValidEntries)
5097{
5098 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5099 RT_NOREF(pBackend);
5100
5101 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
5102
5103 int rc = VINF_SUCCESS;
5104
5105 /* Allocate paBlendState for example. */
5106 /* Keep first cValidEntries. */
5107 switch (type)
5108 {
5109 case SVGA_COTABLE_RTVIEW:
5110 if (pBackendDXContext->papRenderTargetView)
5111 {
5112 /* Clear obsolete entries. */
5113 DX_RELEASE_ARRAY(pBackendDXContext->cRenderTargetView - cValidEntries, &pBackendDXContext->papRenderTargetView[cValidEntries]);
5114 }
5115
5116 rc = dxCOTableRealloc((void **)&pBackendDXContext->papRenderTargetView, &pBackendDXContext->cRenderTargetView,
5117 sizeof(pBackendDXContext->papRenderTargetView[0]), cEntries, cValidEntries);
5118 break;
5119 case SVGA_COTABLE_DSVIEW:
5120 if (pBackendDXContext->papDepthStencilView)
5121 {
5122 /* Clear obsolete entries. */
5123 DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilView - cValidEntries, &pBackendDXContext->papDepthStencilView[cValidEntries]);
5124 }
5125
5126 rc = dxCOTableRealloc((void **)&pBackendDXContext->papDepthStencilView, &pBackendDXContext->cDepthStencilView,
5127 sizeof(pBackendDXContext->papDepthStencilView[0]), cEntries, cValidEntries);
5128 break;
5129 case SVGA_COTABLE_SRVIEW:
5130 if (pBackendDXContext->papShaderResourceView)
5131 {
5132 /* Clear obsolete entries. */
5133 DX_RELEASE_ARRAY(pBackendDXContext->cShaderResourceView - cValidEntries, &pBackendDXContext->papShaderResourceView[cValidEntries]);
5134 }
5135
5136 rc = dxCOTableRealloc((void **)&pBackendDXContext->papShaderResourceView, &pBackendDXContext->cShaderResourceView,
5137 sizeof(pBackendDXContext->papShaderResourceView[0]), cEntries, cValidEntries);
5138 break;
5139 case SVGA_COTABLE_ELEMENTLAYOUT:
5140 if (pBackendDXContext->paElementLayout)
5141 {
5142 /* Clear obsolete entries. */
5143 for (uint32_t i = cValidEntries; i < pBackendDXContext->cElementLayout; ++i)
5144 D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
5145 }
5146
5147 rc = dxCOTableRealloc((void **)&pBackendDXContext->paElementLayout, &pBackendDXContext->cElementLayout,
5148 sizeof(pBackendDXContext->paElementLayout[0]), cEntries, cValidEntries);
5149 break;
5150 case SVGA_COTABLE_BLENDSTATE:
5151 if (pBackendDXContext->papBlendState)
5152 {
5153 /* Clear obsolete entries. */
5154 DX_RELEASE_ARRAY(pBackendDXContext->cBlendState - cValidEntries, &pBackendDXContext->papBlendState[cValidEntries]);
5155 }
5156
5157 rc = dxCOTableRealloc((void **)&pBackendDXContext->papBlendState, &pBackendDXContext->cBlendState,
5158 sizeof(pBackendDXContext->papBlendState[0]), cEntries, cValidEntries);
5159 break;
5160 case SVGA_COTABLE_DEPTHSTENCIL:
5161 if (pBackendDXContext->papDepthStencilState)
5162 {
5163 /* Clear obsolete entries. */
5164 DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilState - cValidEntries, &pBackendDXContext->papDepthStencilState[cValidEntries]);
5165 }
5166
5167 rc = dxCOTableRealloc((void **)&pBackendDXContext->papDepthStencilState, &pBackendDXContext->cDepthStencilState,
5168 sizeof(pBackendDXContext->papDepthStencilState[0]), cEntries, cValidEntries);
5169 break;
5170 case SVGA_COTABLE_RASTERIZERSTATE:
5171 if (pBackendDXContext->papRasterizerState)
5172 {
5173 /* Clear obsolete entries. */
5174 DX_RELEASE_ARRAY(pBackendDXContext->cRasterizerState - cValidEntries, &pBackendDXContext->papRasterizerState[cValidEntries]);
5175 }
5176
5177 rc = dxCOTableRealloc((void **)&pBackendDXContext->papRasterizerState, &pBackendDXContext->cRasterizerState,
5178 sizeof(pBackendDXContext->papRasterizerState[0]), cEntries, cValidEntries);
5179 break;
5180 case SVGA_COTABLE_SAMPLER:
5181 if (pBackendDXContext->papSamplerState)
5182 {
5183 /* Clear obsolete entries. */
5184 DX_RELEASE_ARRAY(pBackendDXContext->cSamplerState - cValidEntries, &pBackendDXContext->papSamplerState[cValidEntries]);
5185 }
5186
5187 rc = dxCOTableRealloc((void **)&pBackendDXContext->papSamplerState, &pBackendDXContext->cSamplerState,
5188 sizeof(pBackendDXContext->papSamplerState[0]), cEntries, cValidEntries);
5189 break;
5190 case SVGA_COTABLE_STREAMOUTPUT:
5191 //AssertFailed(); /** @todo Implement */
5192 break;
5193 case SVGA_COTABLE_DXQUERY:
5194 if (pBackendDXContext->papQuery)
5195 {
5196 /* Clear obsolete entries. */
5197 DX_RELEASE_ARRAY(pBackendDXContext->cQuery - cValidEntries, &pBackendDXContext->papQuery[cValidEntries]);
5198 }
5199
5200 rc = dxCOTableRealloc((void **)&pBackendDXContext->papQuery, &pBackendDXContext->cQuery,
5201 sizeof(pBackendDXContext->papQuery[0]), cEntries, cValidEntries);
5202 break;
5203 case SVGA_COTABLE_DXSHADER:
5204 if (pBackendDXContext->paShader)
5205 {
5206 /* Clear obsolete entries. */
5207 for (uint32_t i = cValidEntries; i < pBackendDXContext->cShader; ++i)
5208 D3D_RELEASE(pBackendDXContext->paShader[i].pShader);
5209 }
5210
5211 rc = dxCOTableRealloc((void **)&pBackendDXContext->paShader, &pBackendDXContext->cShader,
5212 sizeof(pBackendDXContext->paShader[0]), cEntries, cValidEntries);
5213 break;
5214 case SVGA_COTABLE_UAVIEW:
5215 AssertFailed(); /** @todo Implement */
5216 break;
5217 case SVGA_COTABLE_MAX: break; /* Compiler warning */
5218 }
5219 return rc;
5220}
5221
5222
5223static DECLCALLBACK(int) vmsvga3dBackDXBufferCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5224{
5225 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5226
5227 RT_NOREF(pBackend, pDXContext);
5228 AssertFailed(); /** @todo Implement */
5229 return VERR_NOT_IMPLEMENTED;
5230}
5231
5232
5233static DECLCALLBACK(int) vmsvga3dBackDXTransferFromBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5234{
5235 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5236
5237 RT_NOREF(pBackend, pDXContext);
5238 AssertFailed(); /** @todo Implement */
5239 return VERR_NOT_IMPLEMENTED;
5240}
5241
5242
5243static DECLCALLBACK(int) vmsvga3dBackDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5244{
5245 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5246
5247 RT_NOREF(pBackend, pDXContext);
5248 AssertFailed(); /** @todo Implement */
5249 return VERR_NOT_IMPLEMENTED;
5250}
5251
5252
5253static DECLCALLBACK(int) vmsvga3dBackDXMoveQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5254{
5255 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5256
5257 RT_NOREF(pBackend, pDXContext);
5258 AssertFailed(); /** @todo Implement */
5259 return VERR_NOT_IMPLEMENTED;
5260}
5261
5262
5263static DECLCALLBACK(int) vmsvga3dBackDXBindAllQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5264{
5265 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5266
5267 RT_NOREF(pBackend, pDXContext);
5268 AssertFailed(); /** @todo Implement */
5269 return VERR_NOT_IMPLEMENTED;
5270}
5271
5272
5273static DECLCALLBACK(int) vmsvga3dBackDXReadbackAllQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5274{
5275 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5276
5277 RT_NOREF(pBackend, pDXContext);
5278 AssertFailed(); /** @todo Implement */
5279 return VERR_NOT_IMPLEMENTED;
5280}
5281
5282
5283static DECLCALLBACK(int) vmsvga3dBackDXPredTransferFromBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5284{
5285 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5286
5287 RT_NOREF(pBackend, pDXContext);
5288 AssertFailed(); /** @todo Implement */
5289 return VERR_NOT_IMPLEMENTED;
5290}
5291
5292
5293static DECLCALLBACK(int) vmsvga3dBackDXMobFence64(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5294{
5295 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5296
5297 RT_NOREF(pBackend, pDXContext);
5298 AssertFailed(); /** @todo Implement */
5299 return VERR_NOT_IMPLEMENTED;
5300}
5301
5302
5303static DECLCALLBACK(int) vmsvga3dBackDXBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5304{
5305 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5306
5307 RT_NOREF(pBackend, pDXContext);
5308 AssertFailed(); /** @todo Implement */
5309 return VERR_NOT_IMPLEMENTED;
5310}
5311
5312
5313static DECLCALLBACK(int) vmsvga3dBackDXHint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5314{
5315 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5316
5317 RT_NOREF(pBackend, pDXContext);
5318 AssertFailed(); /** @todo Implement */
5319 return VERR_NOT_IMPLEMENTED;
5320}
5321
5322
5323static DECLCALLBACK(int) vmsvga3dBackDXBufferUpdate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5324{
5325 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5326
5327 RT_NOREF(pBackend, pDXContext);
5328 AssertFailed(); /** @todo Implement */
5329 return VERR_NOT_IMPLEMENTED;
5330}
5331
5332
5333static DECLCALLBACK(int) vmsvga3dBackDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5334{
5335 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5336
5337 RT_NOREF(pBackend, pDXContext);
5338 AssertFailed(); /** @todo Implement */
5339 return VERR_NOT_IMPLEMENTED;
5340}
5341
5342
5343static DECLCALLBACK(int) vmsvga3dBackDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5344{
5345 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5346
5347 RT_NOREF(pBackend, pDXContext);
5348 AssertFailed(); /** @todo Implement */
5349 return VERR_NOT_IMPLEMENTED;
5350}
5351
5352
5353static DECLCALLBACK(int) vmsvga3dBackDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5354{
5355 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5356
5357 RT_NOREF(pBackend, pDXContext);
5358 AssertFailed(); /** @todo Implement */
5359 return VERR_NOT_IMPLEMENTED;
5360}
5361
5362
5363static DECLCALLBACK(int) vmsvga3dBackDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5364{
5365 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5366
5367 RT_NOREF(pBackend, pDXContext);
5368 AssertFailed(); /** @todo Implement */
5369 return VERR_NOT_IMPLEMENTED;
5370}
5371
5372
5373static DECLCALLBACK(int) vmsvga3dBackDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5374{
5375 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5376
5377 RT_NOREF(pBackend, pDXContext);
5378 AssertFailed(); /** @todo Implement */
5379 return VERR_NOT_IMPLEMENTED;
5380}
5381
5382
5383static DECLCALLBACK(int) vmsvga3dBackDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5384{
5385 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5386
5387 RT_NOREF(pBackend, pDXContext);
5388 AssertFailed(); /** @todo Implement */
5389 return VERR_NOT_IMPLEMENTED;
5390}
5391
5392
5393static DECLCALLBACK(int) vmsvga3dBackDXCondBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5394{
5395 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5396
5397 RT_NOREF(pBackend, pDXContext);
5398 AssertFailed(); /** @todo Implement */
5399 return VERR_NOT_IMPLEMENTED;
5400}
5401
5402
5403static DECLCALLBACK(int) vmsvga3dBackScreenCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5404{
5405 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5406
5407 RT_NOREF(pBackend, pDXContext);
5408 AssertFailed(); /** @todo Implement */
5409 return VERR_NOT_IMPLEMENTED;
5410}
5411
5412
5413static DECLCALLBACK(int) vmsvga3dBackGrowOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5414{
5415 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5416
5417 RT_NOREF(pBackend, pDXContext);
5418 AssertFailed(); /** @todo Implement */
5419 return VERR_NOT_IMPLEMENTED;
5420}
5421
5422
5423static DECLCALLBACK(int) vmsvga3dBackDXGrowCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5424{
5425 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5426
5427 RT_NOREF(pBackend, pDXContext);
5428 AssertFailed(); /** @todo Implement */
5429 return VERR_NOT_IMPLEMENTED;
5430}
5431
5432
5433static DECLCALLBACK(int) vmsvga3dBackIntraSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5434{
5435 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5436
5437 RT_NOREF(pBackend, pDXContext);
5438 AssertFailed(); /** @todo Implement */
5439 return VERR_NOT_IMPLEMENTED;
5440}
5441
5442
5443static DECLCALLBACK(int) vmsvga3dBackDefineGBSurface_v3(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5444{
5445 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5446
5447 RT_NOREF(pBackend, pDXContext);
5448 AssertFailed(); /** @todo Implement */
5449 return VERR_NOT_IMPLEMENTED;
5450}
5451
5452
5453static DECLCALLBACK(int) vmsvga3dBackDXResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5454{
5455 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5456
5457 RT_NOREF(pBackend, pDXContext);
5458 AssertFailed(); /** @todo Implement */
5459 return VERR_NOT_IMPLEMENTED;
5460}
5461
5462
5463static DECLCALLBACK(int) vmsvga3dBackDXPredResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5464{
5465 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5466
5467 RT_NOREF(pBackend, pDXContext);
5468 AssertFailed(); /** @todo Implement */
5469 return VERR_NOT_IMPLEMENTED;
5470}
5471
5472
5473static DECLCALLBACK(int) vmsvga3dBackDXPredConvertRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5474{
5475 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5476
5477 RT_NOREF(pBackend, pDXContext);
5478 AssertFailed(); /** @todo Implement */
5479 return VERR_NOT_IMPLEMENTED;
5480}
5481
5482
5483static DECLCALLBACK(int) vmsvga3dBackDXPredConvert(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5484{
5485 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5486
5487 RT_NOREF(pBackend, pDXContext);
5488 AssertFailed(); /** @todo Implement */
5489 return VERR_NOT_IMPLEMENTED;
5490}
5491
5492
5493static DECLCALLBACK(int) vmsvga3dBackWholeSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5494{
5495 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5496
5497 RT_NOREF(pBackend, pDXContext);
5498 AssertFailed(); /** @todo Implement */
5499 return VERR_NOT_IMPLEMENTED;
5500}
5501
5502
5503static DECLCALLBACK(int) vmsvga3dBackDXDefineUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5504{
5505 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5506
5507 RT_NOREF(pBackend, pDXContext);
5508 AssertFailed(); /** @todo Implement */
5509 return VERR_NOT_IMPLEMENTED;
5510}
5511
5512
5513static DECLCALLBACK(int) vmsvga3dBackDXDestroyUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5514{
5515 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5516
5517 RT_NOREF(pBackend, pDXContext);
5518 AssertFailed(); /** @todo Implement */
5519 return VERR_NOT_IMPLEMENTED;
5520}
5521
5522
5523static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewUint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5524{
5525 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5526
5527 RT_NOREF(pBackend, pDXContext);
5528 AssertFailed(); /** @todo Implement */
5529 return VERR_NOT_IMPLEMENTED;
5530}
5531
5532
5533static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewFloat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5534{
5535 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5536
5537 RT_NOREF(pBackend, pDXContext);
5538 AssertFailed(); /** @todo Implement */
5539 return VERR_NOT_IMPLEMENTED;
5540}
5541
5542
5543static DECLCALLBACK(int) vmsvga3dBackDXCopyStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5544{
5545 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5546
5547 RT_NOREF(pBackend, pDXContext);
5548 AssertFailed(); /** @todo Implement */
5549 return VERR_NOT_IMPLEMENTED;
5550}
5551
5552
5553static DECLCALLBACK(int) vmsvga3dBackDXSetUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5554{
5555 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5556
5557 RT_NOREF(pBackend, pDXContext);
5558 AssertFailed(); /** @todo Implement */
5559 return VERR_NOT_IMPLEMENTED;
5560}
5561
5562
5563static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5564{
5565 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5566
5567 RT_NOREF(pBackend, pDXContext);
5568 AssertFailed(); /** @todo Implement */
5569 return VERR_NOT_IMPLEMENTED;
5570}
5571
5572
5573static DECLCALLBACK(int) vmsvga3dBackDXDrawInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5574{
5575 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5576
5577 RT_NOREF(pBackend, pDXContext);
5578 AssertFailed(); /** @todo Implement */
5579 return VERR_NOT_IMPLEMENTED;
5580}
5581
5582
5583static DECLCALLBACK(int) vmsvga3dBackDXDispatch(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5584{
5585 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5586
5587 RT_NOREF(pBackend, pDXContext);
5588 AssertFailed(); /** @todo Implement */
5589 return VERR_NOT_IMPLEMENTED;
5590}
5591
5592
5593static DECLCALLBACK(int) vmsvga3dBackDXDispatchIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5594{
5595 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5596
5597 RT_NOREF(pBackend, pDXContext);
5598 AssertFailed(); /** @todo Implement */
5599 return VERR_NOT_IMPLEMENTED;
5600}
5601
5602
5603static DECLCALLBACK(int) vmsvga3dBackWriteZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5604{
5605 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5606
5607 RT_NOREF(pBackend, pDXContext);
5608 AssertFailed(); /** @todo Implement */
5609 return VERR_NOT_IMPLEMENTED;
5610}
5611
5612
5613static DECLCALLBACK(int) vmsvga3dBackHintZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5614{
5615 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5616
5617 RT_NOREF(pBackend, pDXContext);
5618 AssertFailed(); /** @todo Implement */
5619 return VERR_NOT_IMPLEMENTED;
5620}
5621
5622
5623static DECLCALLBACK(int) vmsvga3dBackDXTransferToBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5624{
5625 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5626
5627 RT_NOREF(pBackend, pDXContext);
5628 AssertFailed(); /** @todo Implement */
5629 return VERR_NOT_IMPLEMENTED;
5630}
5631
5632
5633static DECLCALLBACK(int) vmsvga3dBackDXSetStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5634{
5635 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5636
5637 RT_NOREF(pBackend, pDXContext);
5638 AssertFailed(); /** @todo Implement */
5639 return VERR_NOT_IMPLEMENTED;
5640}
5641
5642
5643static DECLCALLBACK(int) vmsvga3dBackLogicOpsBitBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5644{
5645 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5646
5647 RT_NOREF(pBackend, pDXContext);
5648 AssertFailed(); /** @todo Implement */
5649 return VERR_NOT_IMPLEMENTED;
5650}
5651
5652
5653static DECLCALLBACK(int) vmsvga3dBackLogicOpsTransBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5654{
5655 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5656
5657 RT_NOREF(pBackend, pDXContext);
5658 AssertFailed(); /** @todo Implement */
5659 return VERR_NOT_IMPLEMENTED;
5660}
5661
5662
5663static DECLCALLBACK(int) vmsvga3dBackLogicOpsStretchBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5664{
5665 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5666
5667 RT_NOREF(pBackend, pDXContext);
5668 AssertFailed(); /** @todo Implement */
5669 return VERR_NOT_IMPLEMENTED;
5670}
5671
5672
5673static DECLCALLBACK(int) vmsvga3dBackLogicOpsColorFill(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5674{
5675 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5676
5677 RT_NOREF(pBackend, pDXContext);
5678 AssertFailed(); /** @todo Implement */
5679 return VERR_NOT_IMPLEMENTED;
5680}
5681
5682
5683static DECLCALLBACK(int) vmsvga3dBackLogicOpsAlphaBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5684{
5685 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5686
5687 RT_NOREF(pBackend, pDXContext);
5688 AssertFailed(); /** @todo Implement */
5689 return VERR_NOT_IMPLEMENTED;
5690}
5691
5692
5693static DECLCALLBACK(int) vmsvga3dBackLogicOpsClearTypeBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5694{
5695 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5696
5697 RT_NOREF(pBackend, pDXContext);
5698 AssertFailed(); /** @todo Implement */
5699 return VERR_NOT_IMPLEMENTED;
5700}
5701
5702
5703static DECLCALLBACK(int) vmsvga3dBackDefineGBSurface_v4(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5704{
5705 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5706
5707 RT_NOREF(pBackend, pDXContext);
5708 AssertFailed(); /** @todo Implement */
5709 return VERR_NOT_IMPLEMENTED;
5710}
5711
5712
5713static DECLCALLBACK(int) vmsvga3dBackDXSetCSUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5714{
5715 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5716
5717 RT_NOREF(pBackend, pDXContext);
5718 AssertFailed(); /** @todo Implement */
5719 return VERR_NOT_IMPLEMENTED;
5720}
5721
5722
5723static DECLCALLBACK(int) vmsvga3dBackDXSetMinLOD(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5724{
5725 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5726
5727 RT_NOREF(pBackend, pDXContext);
5728 AssertFailed(); /** @todo Implement */
5729 return VERR_NOT_IMPLEMENTED;
5730}
5731
5732
5733static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5734{
5735 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5736
5737 RT_NOREF(pBackend, pDXContext);
5738 AssertFailed(); /** @todo Implement */
5739 return VERR_NOT_IMPLEMENTED;
5740}
5741
5742
5743static DECLCALLBACK(int) vmsvga3dBackDXSetShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5744{
5745 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5746
5747 RT_NOREF(pBackend, pDXContext);
5748 AssertFailed(); /** @todo Implement */
5749 return VERR_NOT_IMPLEMENTED;
5750}
5751
5752
5753static DECLCALLBACK(int) vmsvga3dBackDXBindStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5754{
5755 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5756
5757 RT_NOREF(pBackend, pDXContext);
5758 AssertFailed(); /** @todo Implement */
5759 return VERR_NOT_IMPLEMENTED;
5760}
5761
5762
5763static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5764{
5765 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5766
5767 RT_NOREF(pBackend, pDXContext);
5768 AssertFailed(); /** @todo Implement */
5769 return VERR_NOT_IMPLEMENTED;
5770}
5771
5772
5773static DECLCALLBACK(int) vmsvga3dBackDXBindShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5774{
5775 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5776
5777 RT_NOREF(pBackend, pDXContext);
5778 AssertFailed(); /** @todo Implement */
5779 return VERR_NOT_IMPLEMENTED;
5780}
5781
5782
5783int vmsvga3dQueryInterface(PVGASTATECC pThisCC, char const *pszInterfaceName, void *pvInterfaceFuncs, size_t cbInterfaceFuncs)
5784{
5785 RT_NOREF(pThisCC);
5786
5787 int rc = VINF_SUCCESS;
5788 if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_DX) == 0)
5789 {
5790 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSDX))
5791 {
5792 if (pvInterfaceFuncs)
5793 {
5794 VMSVGA3DBACKENDFUNCSDX *p = (VMSVGA3DBACKENDFUNCSDX *)pvInterfaceFuncs;
5795 p->pfnDXDefineContext = vmsvga3dBackDXDefineContext;
5796 p->pfnDXDestroyContext = vmsvga3dBackDXDestroyContext;
5797 p->pfnDXBindContext = vmsvga3dBackDXBindContext;
5798 p->pfnDXReadbackContext = vmsvga3dBackDXReadbackContext;
5799 p->pfnDXInvalidateContext = vmsvga3dBackDXInvalidateContext;
5800 p->pfnDXSetSingleConstantBuffer = vmsvga3dBackDXSetSingleConstantBuffer;
5801 p->pfnDXSetShaderResources = vmsvga3dBackDXSetShaderResources;
5802 p->pfnDXSetShader = vmsvga3dBackDXSetShader;
5803 p->pfnDXSetSamplers = vmsvga3dBackDXSetSamplers;
5804 p->pfnDXDraw = vmsvga3dBackDXDraw;
5805 p->pfnDXDrawIndexed = vmsvga3dBackDXDrawIndexed;
5806 p->pfnDXDrawInstanced = vmsvga3dBackDXDrawInstanced;
5807 p->pfnDXDrawIndexedInstanced = vmsvga3dBackDXDrawIndexedInstanced;
5808 p->pfnDXDrawAuto = vmsvga3dBackDXDrawAuto;
5809 p->pfnDXSetInputLayout = vmsvga3dBackDXSetInputLayout;
5810 p->pfnDXSetVertexBuffers = vmsvga3dBackDXSetVertexBuffers;
5811 p->pfnDXSetIndexBuffer = vmsvga3dBackDXSetIndexBuffer;
5812 p->pfnDXSetTopology = vmsvga3dBackDXSetTopology;
5813 p->pfnDXSetRenderTargets = vmsvga3dBackDXSetRenderTargets;
5814 p->pfnDXSetBlendState = vmsvga3dBackDXSetBlendState;
5815 p->pfnDXSetDepthStencilState = vmsvga3dBackDXSetDepthStencilState;
5816 p->pfnDXSetRasterizerState = vmsvga3dBackDXSetRasterizerState;
5817 p->pfnDXDefineQuery = vmsvga3dBackDXDefineQuery;
5818 p->pfnDXDestroyQuery = vmsvga3dBackDXDestroyQuery;
5819 p->pfnDXBindQuery = vmsvga3dBackDXBindQuery;
5820 p->pfnDXSetQueryOffset = vmsvga3dBackDXSetQueryOffset;
5821 p->pfnDXBeginQuery = vmsvga3dBackDXBeginQuery;
5822 p->pfnDXEndQuery = vmsvga3dBackDXEndQuery;
5823 p->pfnDXReadbackQuery = vmsvga3dBackDXReadbackQuery;
5824 p->pfnDXSetPredication = vmsvga3dBackDXSetPredication;
5825 p->pfnDXSetSOTargets = vmsvga3dBackDXSetSOTargets;
5826 p->pfnDXSetViewports = vmsvga3dBackDXSetViewports;
5827 p->pfnDXSetScissorRects = vmsvga3dBackDXSetScissorRects;
5828 p->pfnDXClearRenderTargetView = vmsvga3dBackDXClearRenderTargetView;
5829 p->pfnDXClearDepthStencilView = vmsvga3dBackDXClearDepthStencilView;
5830 p->pfnDXPredCopyRegion = vmsvga3dBackDXPredCopyRegion;
5831 p->pfnDXPredCopy = vmsvga3dBackDXPredCopy;
5832 p->pfnDXPresentBlt = vmsvga3dBackDXPresentBlt;
5833 p->pfnDXGenMips = vmsvga3dBackDXGenMips;
5834 p->pfnDXUpdateSubResource = vmsvga3dBackDXUpdateSubResource;
5835 p->pfnDXReadbackSubResource = vmsvga3dBackDXReadbackSubResource;
5836 p->pfnDXInvalidateSubResource = vmsvga3dBackDXInvalidateSubResource;
5837 p->pfnDXDefineShaderResourceView = vmsvga3dBackDXDefineShaderResourceView;
5838 p->pfnDXDestroyShaderResourceView = vmsvga3dBackDXDestroyShaderResourceView;
5839 p->pfnDXDefineRenderTargetView = vmsvga3dBackDXDefineRenderTargetView;
5840 p->pfnDXDestroyRenderTargetView = vmsvga3dBackDXDestroyRenderTargetView;
5841 p->pfnDXDefineDepthStencilView = vmsvga3dBackDXDefineDepthStencilView;
5842 p->pfnDXDestroyDepthStencilView = vmsvga3dBackDXDestroyDepthStencilView;
5843 p->pfnDXDefineElementLayout = vmsvga3dBackDXDefineElementLayout;
5844 p->pfnDXDestroyElementLayout = vmsvga3dBackDXDestroyElementLayout;
5845 p->pfnDXDefineBlendState = vmsvga3dBackDXDefineBlendState;
5846 p->pfnDXDestroyBlendState = vmsvga3dBackDXDestroyBlendState;
5847 p->pfnDXDefineDepthStencilState = vmsvga3dBackDXDefineDepthStencilState;
5848 p->pfnDXDestroyDepthStencilState = vmsvga3dBackDXDestroyDepthStencilState;
5849 p->pfnDXDefineRasterizerState = vmsvga3dBackDXDefineRasterizerState;
5850 p->pfnDXDestroyRasterizerState = vmsvga3dBackDXDestroyRasterizerState;
5851 p->pfnDXDefineSamplerState = vmsvga3dBackDXDefineSamplerState;
5852 p->pfnDXDestroySamplerState = vmsvga3dBackDXDestroySamplerState;
5853 p->pfnDXDefineShader = vmsvga3dBackDXDefineShader;
5854 p->pfnDXDestroyShader = vmsvga3dBackDXDestroyShader;
5855 p->pfnDXBindShader = vmsvga3dBackDXBindShader;
5856 p->pfnDXDefineStreamOutput = vmsvga3dBackDXDefineStreamOutput;
5857 p->pfnDXDestroyStreamOutput = vmsvga3dBackDXDestroyStreamOutput;
5858 p->pfnDXSetStreamOutput = vmsvga3dBackDXSetStreamOutput;
5859 p->pfnDXSetCOTable = vmsvga3dBackDXSetCOTable;
5860 p->pfnDXBufferCopy = vmsvga3dBackDXBufferCopy;
5861 p->pfnDXTransferFromBuffer = vmsvga3dBackDXTransferFromBuffer;
5862 p->pfnDXSurfaceCopyAndReadback = vmsvga3dBackDXSurfaceCopyAndReadback;
5863 p->pfnDXMoveQuery = vmsvga3dBackDXMoveQuery;
5864 p->pfnDXBindAllQuery = vmsvga3dBackDXBindAllQuery;
5865 p->pfnDXReadbackAllQuery = vmsvga3dBackDXReadbackAllQuery;
5866 p->pfnDXPredTransferFromBuffer = vmsvga3dBackDXPredTransferFromBuffer;
5867 p->pfnDXMobFence64 = vmsvga3dBackDXMobFence64;
5868 p->pfnDXBindAllShader = vmsvga3dBackDXBindAllShader;
5869 p->pfnDXHint = vmsvga3dBackDXHint;
5870 p->pfnDXBufferUpdate = vmsvga3dBackDXBufferUpdate;
5871 p->pfnDXSetVSConstantBufferOffset = vmsvga3dBackDXSetVSConstantBufferOffset;
5872 p->pfnDXSetPSConstantBufferOffset = vmsvga3dBackDXSetPSConstantBufferOffset;
5873 p->pfnDXSetGSConstantBufferOffset = vmsvga3dBackDXSetGSConstantBufferOffset;
5874 p->pfnDXSetHSConstantBufferOffset = vmsvga3dBackDXSetHSConstantBufferOffset;
5875 p->pfnDXSetDSConstantBufferOffset = vmsvga3dBackDXSetDSConstantBufferOffset;
5876 p->pfnDXSetCSConstantBufferOffset = vmsvga3dBackDXSetCSConstantBufferOffset;
5877 p->pfnDXCondBindAllShader = vmsvga3dBackDXCondBindAllShader;
5878 p->pfnScreenCopy = vmsvga3dBackScreenCopy;
5879 p->pfnGrowOTable = vmsvga3dBackGrowOTable;
5880 p->pfnDXGrowCOTable = vmsvga3dBackDXGrowCOTable;
5881 p->pfnIntraSurfaceCopy = vmsvga3dBackIntraSurfaceCopy;
5882 p->pfnDefineGBSurface_v3 = vmsvga3dBackDefineGBSurface_v3;
5883 p->pfnDXResolveCopy = vmsvga3dBackDXResolveCopy;
5884 p->pfnDXPredResolveCopy = vmsvga3dBackDXPredResolveCopy;
5885 p->pfnDXPredConvertRegion = vmsvga3dBackDXPredConvertRegion;
5886 p->pfnDXPredConvert = vmsvga3dBackDXPredConvert;
5887 p->pfnWholeSurfaceCopy = vmsvga3dBackWholeSurfaceCopy;
5888 p->pfnDXDefineUAView = vmsvga3dBackDXDefineUAView;
5889 p->pfnDXDestroyUAView = vmsvga3dBackDXDestroyUAView;
5890 p->pfnDXClearUAViewUint = vmsvga3dBackDXClearUAViewUint;
5891 p->pfnDXClearUAViewFloat = vmsvga3dBackDXClearUAViewFloat;
5892 p->pfnDXCopyStructureCount = vmsvga3dBackDXCopyStructureCount;
5893 p->pfnDXSetUAViews = vmsvga3dBackDXSetUAViews;
5894 p->pfnDXDrawIndexedInstancedIndirect = vmsvga3dBackDXDrawIndexedInstancedIndirect;
5895 p->pfnDXDrawInstancedIndirect = vmsvga3dBackDXDrawInstancedIndirect;
5896 p->pfnDXDispatch = vmsvga3dBackDXDispatch;
5897 p->pfnDXDispatchIndirect = vmsvga3dBackDXDispatchIndirect;
5898 p->pfnWriteZeroSurface = vmsvga3dBackWriteZeroSurface;
5899 p->pfnHintZeroSurface = vmsvga3dBackHintZeroSurface;
5900 p->pfnDXTransferToBuffer = vmsvga3dBackDXTransferToBuffer;
5901 p->pfnDXSetStructureCount = vmsvga3dBackDXSetStructureCount;
5902 p->pfnLogicOpsBitBlt = vmsvga3dBackLogicOpsBitBlt;
5903 p->pfnLogicOpsTransBlt = vmsvga3dBackLogicOpsTransBlt;
5904 p->pfnLogicOpsStretchBlt = vmsvga3dBackLogicOpsStretchBlt;
5905 p->pfnLogicOpsColorFill = vmsvga3dBackLogicOpsColorFill;
5906 p->pfnLogicOpsAlphaBlend = vmsvga3dBackLogicOpsAlphaBlend;
5907 p->pfnLogicOpsClearTypeBlend = vmsvga3dBackLogicOpsClearTypeBlend;
5908 p->pfnDefineGBSurface_v4 = vmsvga3dBackDefineGBSurface_v4;
5909 p->pfnDXSetCSUAViews = vmsvga3dBackDXSetCSUAViews;
5910 p->pfnDXSetMinLOD = vmsvga3dBackDXSetMinLOD;
5911 p->pfnDXDefineStreamOutputWithMob = vmsvga3dBackDXDefineStreamOutputWithMob;
5912 p->pfnDXSetShaderIface = vmsvga3dBackDXSetShaderIface;
5913 p->pfnDXBindStreamOutput = vmsvga3dBackDXBindStreamOutput;
5914 p->pfnSurfaceStretchBltNonMSToMS = vmsvga3dBackSurfaceStretchBltNonMSToMS;
5915 p->pfnDXBindShaderIface = vmsvga3dBackDXBindShaderIface;
5916 }
5917 }
5918 else
5919 {
5920 AssertFailed();
5921 rc = VERR_INVALID_PARAMETER;
5922 }
5923 }
5924 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_MAP) == 0)
5925 {
5926 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSMAP))
5927 {
5928 if (pvInterfaceFuncs)
5929 {
5930 VMSVGA3DBACKENDFUNCSMAP *p = (VMSVGA3DBACKENDFUNCSMAP *)pvInterfaceFuncs;
5931 p->pfnSurfaceMap = vmsvga3dSurfaceMap;
5932 p->pfnSurfaceUnmap = vmsvga3dSurfaceUnmap;
5933 }
5934 }
5935 else
5936 {
5937 AssertFailed();
5938 rc = VERR_INVALID_PARAMETER;
5939 }
5940 }
5941 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_GBO) == 0)
5942 {
5943 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSGBO))
5944 {
5945 if (pvInterfaceFuncs)
5946 {
5947 VMSVGA3DBACKENDFUNCSGBO *p = (VMSVGA3DBACKENDFUNCSGBO *)pvInterfaceFuncs;
5948 p->pfnScreenTargetBind = vmsvga3dScreenTargetBind;
5949 p->pfnScreenTargetUpdate = vmsvga3dScreenTargetUpdate;
5950 }
5951 }
5952 else
5953 {
5954 AssertFailed();
5955 rc = VERR_INVALID_PARAMETER;
5956 }
5957 }
5958 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_3D) == 0)
5959 {
5960 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCS3D))
5961 {
5962 if (pvInterfaceFuncs)
5963 {
5964 VMSVGA3DBACKENDFUNCS3D *p = (VMSVGA3DBACKENDFUNCS3D *)pvInterfaceFuncs;
5965 p->pfnInit = vmsvga3dBackInit;
5966 p->pfnPowerOn = vmsvga3dBackPowerOn;
5967 p->pfnTerminate = vmsvga3dBackTerminate;
5968 p->pfnReset = vmsvga3dBackReset;
5969 p->pfnQueryCaps = vmsvga3dBackQueryCaps;
5970 p->pfnChangeMode = vmsvga3dBackChangeMode;
5971 p->pfnCreateTexture = vmsvga3dBackCreateTexture;
5972 p->pfnSurfaceDestroy = vmsvga3dBackSurfaceDestroy;
5973 p->pfnSurfaceCopy = vmsvga3dBackSurfaceCopy;
5974 p->pfnSurfaceDMACopyBox = vmsvga3dBackSurfaceDMACopyBox;
5975 p->pfnSurfaceStretchBlt = vmsvga3dBackSurfaceStretchBlt;
5976 p->pfnUpdateHostScreenViewport = vmsvga3dBackUpdateHostScreenViewport;
5977 p->pfnDefineScreen = vmsvga3dBackDefineScreen;
5978 p->pfnDestroyScreen = vmsvga3dBackDestroyScreen;
5979 p->pfnSurfaceBlitToScreen = vmsvga3dBackSurfaceBlitToScreen;
5980 }
5981 }
5982 else
5983 {
5984 AssertFailed();
5985 rc = VERR_INVALID_PARAMETER;
5986 }
5987 }
5988 else
5989 rc = VERR_NOT_IMPLEMENTED;
5990 return rc;
5991}
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