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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-win-dx.cpp@ 88838

最後變更 在這個檔案從88838是 88831,由 vboxsync 提交於 4 年 前

Devices/Graphics: resource creation; logging; emulate TRIANGLEFAN topology. bugref:9830
  • 屬性 svn:eol-style 設為 native
  • 屬性 svn:keywords 設為 Author Date Id Revision
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1/* $Id: DevVGA-SVGA3d-win-dx.cpp 88831 2021-05-03 12:37:23Z vboxsync $ */
2/** @file
3 * DevVMWare - VMWare SVGA device
4 */
5
6/*
7 * Copyright (C) 2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.alldomusa.eu.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <VBox/log.h>
25#include <VBox/vmm/pdmdev.h>
26#include <VBox/vmm/pgm.h>
27
28#include <iprt/assert.h>
29#include <iprt/errcore.h>
30#include <iprt/mem.h>
31
32#include <VBoxVideo.h> /* required by DevVGA.h */
33#include <VBoxVideo3D.h>
34
35/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
36#include "DevVGA.h"
37
38#include "DevVGA-SVGA.h"
39#include "DevVGA-SVGA3d.h"
40#include "DevVGA-SVGA3d-internal.h"
41#include "DevVGA-SVGA3d-dx-shader.h"
42
43#include <d3d11.h>
44
45#define DX_RELEASE_ARRAY(a_Count, a_papArray) do { \
46 for (uint32_t i = 0; i < (a_Count); ++i) \
47 D3D_RELEASE((a_papArray)[i]); \
48} while (0)
49
50typedef struct DXDEVICE
51{
52 ID3D11Device *pDevice; /* Device. */
53 ID3D11DeviceContext *pImmediateContext; /* Corresponding context. */
54 IDXGIFactory *pDxgiFactory; /* DXGI Factory. */
55 D3D_FEATURE_LEVEL FeatureLevel;
56} DXDEVICE;
57
58/* What kind of resource has been created for the VMSVGA3D surface. */
59typedef enum VMSVGA3DBACKRESTYPE
60{
61 VMSVGA3D_RESTYPE_NONE = 0,
62 VMSVGA3D_RESTYPE_SCREEN_TARGET = 1,
63 VMSVGA3D_RESTYPE_SURFACE = 2,
64 VMSVGA3D_RESTYPE_TEXTURE = 3,
65 VMSVGA3D_RESTYPE_CUBE_TEXTURE = 4,
66 VMSVGA3D_RESTYPE_VOLUME_TEXTURE = 5,
67 VMSVGA3D_RESTYPE_BUFFER = 6,
68} VMSVGA3DBACKRESTYPE;
69
70typedef struct VMSVGA3DBACKENDSURFACE
71{
72 VMSVGA3DBACKRESTYPE enmResType;
73 DXGI_FORMAT enmDxgiFormat;
74 union
75 {
76 struct
77 {
78 ID3D11Texture2D *pTexture; /* The texture for the screen content. */
79 ID3D11Texture2D *pDynamicTexture; /* For screen updates from memory. */ /** @todo One for all screens. */
80 ID3D11Texture2D *pStagingTexture; /* For Reading the screen content. */ /** @todo One for all screens. */
81 } ScreenTarget;
82 struct
83 {
84 ID3D11Texture2D *pTexture; /* The texture for the screen content. */
85 ID3D11Texture2D *pDynamicTexture; /* For screen updates from memory. */ /** @todo One for all screens. */
86 ID3D11Texture2D *pStagingTexture; /* For Reading the screen content. */ /** @todo One for all screens. */
87 } Texture;
88 struct
89 {
90 ID3D11Buffer *pBuffer;
91 } Buffer;
92 } u;
93} VMSVGA3DBACKENDSURFACE;
94
95typedef struct VMSVGAHWSCREEN
96{
97 ID3D11Texture2D *pTexture; /* Shared texture for the screen content. Only used as CopyResource target. */
98 IDXGIResource *pDxgiResource; /* Interface of the texture. */
99 IDXGIKeyedMutex *pDXGIKeyedMutex; /* Synchronization interface for the render device. */
100 HANDLE SharedHandle; /* The shared handle of this structure. */
101 uint32_t sidScreenTarget; /* The source surface for this screen. */
102} VMSVGAHWSCREEN;
103
104
105typedef struct DXELEMENTLAYOUT
106{
107 ID3D11InputLayout *pElementLayout;
108 uint32_t cElementDesc;
109 D3D11_INPUT_ELEMENT_DESC aElementDesc[32];
110} DXELEMENTLAYOUT;
111
112typedef struct DXSHADER
113{
114 SVGA3dShaderType enmShaderType;
115 union
116 {
117 ID3D11DeviceChild *pShader; /* All. */
118 ID3D11VertexShader *pVertexShader; /* SVGA3D_SHADERTYPE_VS */
119 ID3D11PixelShader *pPixelShader; /* SVGA3D_SHADERTYPE_PS */
120 ID3D11GeometryShader *pGeometryShader; /* SVGA3D_SHADERTYPE_GS */
121 ID3D11HullShader *pHullShader; /* SVGA3D_SHADERTYPE_HS */
122 ID3D11DomainShader *pDomainShader; /* SVGA3D_SHADERTYPE_DS */
123 ID3D11ComputeShader *pComputeShader; /* SVGA3D_SHADERTYPE_CS */
124 };
125 void *pvDXBC;
126 uint32_t cbDXBC;
127} DXSHADER;
128
129typedef struct VMSVGA3DBACKENDDXCONTEXT
130{
131 DXDEVICE device; /* Device for the this context operation. */
132
133 /* Arrays for Context-Object Tables. Number of entries depends on COTable size. */
134 uint32_t cBlendState; /* Number of entries in the papBlendState array. */
135 uint32_t cDepthStencilState; /* papDepthStencilState */
136 uint32_t cSamplerState; /* papSamplerState */
137 uint32_t cRasterizerState; /* papRasterizerState */
138 uint32_t cElementLayout; /* papElementLayout */
139 uint32_t cRenderTargetView; /* papRenderTargetView */
140 uint32_t cDepthStencilView; /* papDepthStencilView */
141 uint32_t cShaderResourceView; /* papShaderResourceView */
142 uint32_t cQuery; /* papQuery */
143 uint32_t cShader; /* papShader */
144 ID3D11BlendState **papBlendState;
145 ID3D11DepthStencilState **papDepthStencilState;
146 ID3D11SamplerState **papSamplerState;
147 ID3D11RasterizerState **papRasterizerState;
148 DXELEMENTLAYOUT *paElementLayout;
149 ID3D11RenderTargetView **papRenderTargetView;
150 ID3D11DepthStencilView **papDepthStencilView;
151 ID3D11ShaderResourceView **papShaderResourceView;
152 ID3D11Query **papQuery;
153 DXSHADER *paShader;
154} VMSVGA3DBACKENDDXCONTEXT;
155
156typedef HRESULT FN_D3D_DISASSEMBLE(LPCVOID pSrcData, SIZE_T SrcDataSize, UINT Flags, LPCSTR szComments, ID3D10Blob **ppDisassembly);
157typedef FN_D3D_DISASSEMBLE *PFN_D3D_DISASSEMBLE;
158
159typedef struct VMSVGA3DBACKEND
160{
161 RTLDRMOD hD3D11;
162 PFN_D3D11_CREATE_DEVICE pfnD3D11CreateDevice;
163
164 RTLDRMOD hD3DCompiler;
165 PFN_D3D_DISASSEMBLE pfnD3DDisassemble;
166
167 ID3D11Device *pDevice; /* Device for the VMSVGA3D context independent operation. */
168 ID3D11DeviceContext *pImmediateContext; /* Corresponding context. */
169 IDXGIFactory *pDxgiFactory; /* DXGI Factory. */
170 D3D_FEATURE_LEVEL FeatureLevel;
171} VMSVGA3DBACKEND;
172
173
174static DXGI_FORMAT vmsvgaDXScreenTargetFormat2Dxgi(SVGA3dSurfaceFormat format)
175{
176 switch (format)
177 {
178 /** @todo More formats. */
179 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
180 case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
181 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
182 default:
183 AssertFailed();
184 break;
185 }
186 return DXGI_FORMAT_UNKNOWN;
187}
188
189
190static DXGI_FORMAT vmsvgaDXSurfaceFormat2Dxgi(SVGA3dSurfaceFormat format)
191{
192 /* Ensure that correct headers are used.
193 * SVGA3D_AYUV was equal to 45, then replaced with SVGA3D_FORMAT_DEAD2 = 45, and redefined as SVGA3D_AYUV = 152.
194 */
195 AssertCompile(SVGA3D_AYUV == 152);
196
197#define DXGI_FORMAT_ DXGI_FORMAT_UNKNOWN
198 /** @todo More formats. */
199 switch (format)
200 {
201 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8X8_UNORM;
202 case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
203 case SVGA3D_R5G6B5: return DXGI_FORMAT_B5G6R5_UNORM;
204 case SVGA3D_X1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
205 case SVGA3D_A1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
206 case SVGA3D_A4R4G4B4: break; // 11.1 return DXGI_FORMAT_B4G4R4A4_UNORM;
207 case SVGA3D_Z_D32: break;
208 case SVGA3D_Z_D16: return DXGI_FORMAT_D16_UNORM;
209 case SVGA3D_Z_D24S8: return DXGI_FORMAT_D24_UNORM_S8_UINT;
210 case SVGA3D_Z_D15S1: break;
211 case SVGA3D_LUMINANCE8: return DXGI_FORMAT_;
212 case SVGA3D_LUMINANCE4_ALPHA4: return DXGI_FORMAT_;
213 case SVGA3D_LUMINANCE16: return DXGI_FORMAT_;
214 case SVGA3D_LUMINANCE8_ALPHA8: return DXGI_FORMAT_;
215 case SVGA3D_DXT1: return DXGI_FORMAT_;
216 case SVGA3D_DXT2: return DXGI_FORMAT_;
217 case SVGA3D_DXT3: return DXGI_FORMAT_;
218 case SVGA3D_DXT4: return DXGI_FORMAT_;
219 case SVGA3D_DXT5: return DXGI_FORMAT_;
220 case SVGA3D_BUMPU8V8: return DXGI_FORMAT_;
221 case SVGA3D_BUMPL6V5U5: return DXGI_FORMAT_;
222 case SVGA3D_BUMPX8L8V8U8: return DXGI_FORMAT_;
223 case SVGA3D_FORMAT_DEAD1: break;
224 case SVGA3D_ARGB_S10E5: return DXGI_FORMAT_;
225 case SVGA3D_ARGB_S23E8: return DXGI_FORMAT_;
226 case SVGA3D_A2R10G10B10: return DXGI_FORMAT_;
227 case SVGA3D_V8U8: return DXGI_FORMAT_;
228 case SVGA3D_Q8W8V8U8: return DXGI_FORMAT_;
229 case SVGA3D_CxV8U8: return DXGI_FORMAT_;
230 case SVGA3D_X8L8V8U8: return DXGI_FORMAT_;
231 case SVGA3D_A2W10V10U10: return DXGI_FORMAT_;
232 case SVGA3D_ALPHA8: return DXGI_FORMAT_;
233 case SVGA3D_R_S10E5: return DXGI_FORMAT_;
234 case SVGA3D_R_S23E8: return DXGI_FORMAT_;
235 case SVGA3D_RG_S10E5: return DXGI_FORMAT_;
236 case SVGA3D_RG_S23E8: return DXGI_FORMAT_;
237 case SVGA3D_BUFFER: return DXGI_FORMAT_;
238 case SVGA3D_Z_D24X8: return DXGI_FORMAT_;
239 case SVGA3D_V16U16: return DXGI_FORMAT_;
240 case SVGA3D_G16R16: return DXGI_FORMAT_;
241 case SVGA3D_A16B16G16R16: return DXGI_FORMAT_;
242 case SVGA3D_UYVY: return DXGI_FORMAT_;
243 case SVGA3D_YUY2: return DXGI_FORMAT_;
244 case SVGA3D_NV12: return DXGI_FORMAT_;
245 case SVGA3D_FORMAT_DEAD2: break; /* Old SVGA3D_AYUV */
246 case SVGA3D_R32G32B32A32_TYPELESS: return DXGI_FORMAT_R32G32B32A32_TYPELESS;
247 case SVGA3D_R32G32B32A32_UINT: return DXGI_FORMAT_R32G32B32A32_UINT;
248 case SVGA3D_R32G32B32A32_SINT: return DXGI_FORMAT_R32G32B32A32_SINT;
249 case SVGA3D_R32G32B32_TYPELESS: return DXGI_FORMAT_R32G32B32_TYPELESS;
250 case SVGA3D_R32G32B32_FLOAT: return DXGI_FORMAT_R32G32B32_FLOAT;
251 case SVGA3D_R32G32B32_UINT: return DXGI_FORMAT_R32G32B32_UINT;
252 case SVGA3D_R32G32B32_SINT: return DXGI_FORMAT_R32G32B32_SINT;
253 case SVGA3D_R16G16B16A16_TYPELESS: return DXGI_FORMAT_R16G16B16A16_TYPELESS;
254 case SVGA3D_R16G16B16A16_UINT: return DXGI_FORMAT_R16G16B16A16_UINT;
255 case SVGA3D_R16G16B16A16_SNORM: return DXGI_FORMAT_R16G16B16A16_SNORM;
256 case SVGA3D_R16G16B16A16_SINT: return DXGI_FORMAT_R16G16B16A16_SINT;
257 case SVGA3D_R32G32_TYPELESS: return DXGI_FORMAT_R32G32_TYPELESS;
258 case SVGA3D_R32G32_UINT: return DXGI_FORMAT_R32G32_UINT;
259 case SVGA3D_R32G32_SINT: return DXGI_FORMAT_R32G32_SINT;
260 case SVGA3D_R32G8X24_TYPELESS: return DXGI_FORMAT_R32G8X24_TYPELESS;
261 case SVGA3D_D32_FLOAT_S8X24_UINT: return DXGI_FORMAT_D32_FLOAT_S8X24_UINT;
262 case SVGA3D_R32_FLOAT_X8X24: return DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS;
263 case SVGA3D_X32_G8X24_UINT: return DXGI_FORMAT_X32_TYPELESS_G8X24_UINT;
264 case SVGA3D_R10G10B10A2_TYPELESS: return DXGI_FORMAT_R10G10B10A2_TYPELESS;
265 case SVGA3D_R10G10B10A2_UINT: return DXGI_FORMAT_R10G10B10A2_UINT;
266 case SVGA3D_R11G11B10_FLOAT: return DXGI_FORMAT_R11G11B10_FLOAT;
267 case SVGA3D_R8G8B8A8_TYPELESS: return DXGI_FORMAT_R8G8B8A8_TYPELESS;
268 case SVGA3D_R8G8B8A8_UNORM: return DXGI_FORMAT_R8G8B8A8_UNORM;
269 case SVGA3D_R8G8B8A8_UNORM_SRGB: return DXGI_FORMAT_R8G8B8A8_UNORM_SRGB;
270 case SVGA3D_R8G8B8A8_UINT: return DXGI_FORMAT_R8G8B8A8_UINT;
271 case SVGA3D_R8G8B8A8_SINT: return DXGI_FORMAT_R8G8B8A8_SINT;
272 case SVGA3D_R16G16_TYPELESS: return DXGI_FORMAT_R16G16_TYPELESS;
273 case SVGA3D_R16G16_UINT: return DXGI_FORMAT_R16G16_UINT;
274 case SVGA3D_R16G16_SINT: return DXGI_FORMAT_R16G16_SINT;
275 case SVGA3D_R32_TYPELESS: return DXGI_FORMAT_R32_TYPELESS;
276 case SVGA3D_D32_FLOAT: return DXGI_FORMAT_D32_FLOAT;
277 case SVGA3D_R32_UINT: return DXGI_FORMAT_R32_UINT;
278 case SVGA3D_R32_SINT: return DXGI_FORMAT_R32_SINT;
279 case SVGA3D_R24G8_TYPELESS: return DXGI_FORMAT_R24G8_TYPELESS;
280 case SVGA3D_D24_UNORM_S8_UINT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
281 case SVGA3D_R24_UNORM_X8: return DXGI_FORMAT_R24_UNORM_X8_TYPELESS;
282 case SVGA3D_X24_G8_UINT: return DXGI_FORMAT_X24_TYPELESS_G8_UINT;
283 case SVGA3D_R8G8_TYPELESS: return DXGI_FORMAT_R8G8_TYPELESS;
284 case SVGA3D_R8G8_UNORM: return DXGI_FORMAT_R8G8_UNORM;
285 case SVGA3D_R8G8_UINT: return DXGI_FORMAT_R8G8_UINT;
286 case SVGA3D_R8G8_SINT: return DXGI_FORMAT_R8G8_SINT;
287 case SVGA3D_R16_TYPELESS: return DXGI_FORMAT_R16_TYPELESS;
288 case SVGA3D_R16_UNORM: return DXGI_FORMAT_R16_UNORM;
289 case SVGA3D_R16_UINT: return DXGI_FORMAT_R16_UINT;
290 case SVGA3D_R16_SNORM: return DXGI_FORMAT_R16_SNORM;
291 case SVGA3D_R16_SINT: return DXGI_FORMAT_R16_SINT;
292 case SVGA3D_R8_TYPELESS: return DXGI_FORMAT_R8_TYPELESS;
293 case SVGA3D_R8_UNORM: return DXGI_FORMAT_R8_UNORM;
294 case SVGA3D_R8_UINT: return DXGI_FORMAT_R8_UINT;
295 case SVGA3D_R8_SNORM: return DXGI_FORMAT_R8_SNORM;
296 case SVGA3D_R8_SINT: return DXGI_FORMAT_R8_SINT;
297 case SVGA3D_P8: break;
298 case SVGA3D_R9G9B9E5_SHAREDEXP: return DXGI_FORMAT_R9G9B9E5_SHAREDEXP;
299 case SVGA3D_R8G8_B8G8_UNORM: return DXGI_FORMAT_R8G8_B8G8_UNORM;
300 case SVGA3D_G8R8_G8B8_UNORM: return DXGI_FORMAT_G8R8_G8B8_UNORM;
301 case SVGA3D_BC1_TYPELESS: return DXGI_FORMAT_BC1_TYPELESS;
302 case SVGA3D_BC1_UNORM_SRGB: return DXGI_FORMAT_BC1_UNORM_SRGB;
303 case SVGA3D_BC2_TYPELESS: return DXGI_FORMAT_BC2_TYPELESS;
304 case SVGA3D_BC2_UNORM_SRGB: return DXGI_FORMAT_BC2_UNORM_SRGB;
305 case SVGA3D_BC3_TYPELESS: return DXGI_FORMAT_BC3_TYPELESS;
306 case SVGA3D_BC3_UNORM_SRGB: return DXGI_FORMAT_BC3_UNORM_SRGB;
307 case SVGA3D_BC4_TYPELESS: return DXGI_FORMAT_BC4_TYPELESS;
308 case SVGA3D_ATI1: break;
309 case SVGA3D_BC4_SNORM: return DXGI_FORMAT_BC4_SNORM;
310 case SVGA3D_BC5_TYPELESS: return DXGI_FORMAT_BC5_TYPELESS;
311 case SVGA3D_ATI2: break;
312 case SVGA3D_BC5_SNORM: return DXGI_FORMAT_BC5_SNORM;
313 case SVGA3D_R10G10B10_XR_BIAS_A2_UNORM: return DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM;
314 case SVGA3D_B8G8R8A8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
315 case SVGA3D_B8G8R8A8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
316 case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8X8_TYPELESS;
317 case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8X8_UNORM_SRGB;
318 case SVGA3D_Z_DF16: break;
319 case SVGA3D_Z_DF24: break;
320 case SVGA3D_Z_D24S8_INT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
321 case SVGA3D_YV12: break;
322 case SVGA3D_R32G32B32A32_FLOAT: return DXGI_FORMAT_R32G32B32A32_FLOAT;
323 case SVGA3D_R16G16B16A16_FLOAT: return DXGI_FORMAT_R16G16B16A16_FLOAT;
324 case SVGA3D_R16G16B16A16_UNORM: return DXGI_FORMAT_R16G16B16A16_UNORM;
325 case SVGA3D_R32G32_FLOAT: return DXGI_FORMAT_R32G32_FLOAT;
326 case SVGA3D_R10G10B10A2_UNORM: return DXGI_FORMAT_R10G10B10A2_UNORM;
327 case SVGA3D_R8G8B8A8_SNORM: return DXGI_FORMAT_R8G8B8A8_SNORM;
328 case SVGA3D_R16G16_FLOAT: return DXGI_FORMAT_R16G16_FLOAT;
329 case SVGA3D_R16G16_UNORM: return DXGI_FORMAT_R16G16_UNORM;
330 case SVGA3D_R16G16_SNORM: return DXGI_FORMAT_R16G16_SNORM;
331 case SVGA3D_R32_FLOAT: return DXGI_FORMAT_R32_FLOAT;
332 case SVGA3D_R8G8_SNORM: return DXGI_FORMAT_R8G8_SNORM;
333 case SVGA3D_R16_FLOAT: return DXGI_FORMAT_R16_FLOAT;
334 case SVGA3D_D16_UNORM: return DXGI_FORMAT_D16_UNORM;
335 case SVGA3D_A8_UNORM: return DXGI_FORMAT_A8_UNORM;
336 case SVGA3D_BC1_UNORM: return DXGI_FORMAT_BC1_UNORM;
337 case SVGA3D_BC2_UNORM: return DXGI_FORMAT_BC2_UNORM;
338 case SVGA3D_BC3_UNORM: return DXGI_FORMAT_BC3_UNORM;
339 case SVGA3D_B5G6R5_UNORM: return DXGI_FORMAT_B5G6R5_UNORM;
340 case SVGA3D_B5G5R5A1_UNORM: return DXGI_FORMAT_B5G5R5A1_UNORM;
341 case SVGA3D_B8G8R8A8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
342 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8X8_UNORM;
343 case SVGA3D_BC4_UNORM: return DXGI_FORMAT_BC4_UNORM;
344 case SVGA3D_BC5_UNORM: return DXGI_FORMAT_BC5_UNORM;
345
346 case SVGA3D_B4G4R4A4_UNORM: return DXGI_FORMAT_;
347 case SVGA3D_BC6H_TYPELESS: return DXGI_FORMAT_;
348 case SVGA3D_BC6H_UF16: return DXGI_FORMAT_;
349 case SVGA3D_BC6H_SF16: return DXGI_FORMAT_;
350 case SVGA3D_BC7_TYPELESS: return DXGI_FORMAT_;
351 case SVGA3D_BC7_UNORM: return DXGI_FORMAT_;
352 case SVGA3D_BC7_UNORM_SRGB: return DXGI_FORMAT_;
353 case SVGA3D_AYUV: return DXGI_FORMAT_;
354
355 case SVGA3D_FORMAT_INVALID:
356 case SVGA3D_FORMAT_MAX: break;
357 }
358 // AssertFailed();
359 return DXGI_FORMAT_UNKNOWN;
360#undef DXGI_FORMAT_
361}
362
363
364static SVGA3dSurfaceFormat vmsvgaDXDevCapSurfaceFmt2Format(SVGA3dDevCapIndex enmDevCap)
365{
366 switch (enmDevCap)
367 {
368 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
369 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
370 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
371 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
372 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
373 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
374 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5: return SVGA3D_R5G6B5;
375 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
376 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
377 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8: return SVGA3D_ALPHA8;
378 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
379 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16: return SVGA3D_Z_D16;
380 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8: return SVGA3D_Z_D24S8;
381 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8: return SVGA3D_Z_D24X8;
382 case SVGA3D_DEVCAP_SURFACEFMT_DXT1: return SVGA3D_DXT1;
383 case SVGA3D_DEVCAP_SURFACEFMT_DXT2: return SVGA3D_DXT2;
384 case SVGA3D_DEVCAP_SURFACEFMT_DXT3: return SVGA3D_DXT3;
385 case SVGA3D_DEVCAP_SURFACEFMT_DXT4: return SVGA3D_DXT4;
386 case SVGA3D_DEVCAP_SURFACEFMT_DXT5: return SVGA3D_DXT5;
387 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
388 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
389 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
390 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
391 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8: return SVGA3D_CxV8U8;
392 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5: return SVGA3D_R_S10E5;
393 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8: return SVGA3D_R_S23E8;
394 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5: return SVGA3D_RG_S10E5;
395 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8: return SVGA3D_RG_S23E8;
396 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
397 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
398 case SVGA3D_DEVCAP_SURFACEFMT_V16U16: return SVGA3D_V16U16;
399 case SVGA3D_DEVCAP_SURFACEFMT_G16R16: return SVGA3D_G16R16;
400 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
401 case SVGA3D_DEVCAP_SURFACEFMT_UYVY: return SVGA3D_UYVY;
402 case SVGA3D_DEVCAP_SURFACEFMT_YUY2: return SVGA3D_YUY2;
403 case SVGA3D_DEVCAP_SURFACEFMT_NV12: return SVGA3D_NV12;
404 case SVGA3D_DEVCAP_DEAD10: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_SURFACEFMT_AYUV -> SVGA3D_AYUV */
405 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16: return SVGA3D_Z_DF16;
406 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24: return SVGA3D_Z_DF24;
407 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
408 case SVGA3D_DEVCAP_SURFACEFMT_ATI1: return SVGA3D_ATI1;
409 case SVGA3D_DEVCAP_SURFACEFMT_ATI2: return SVGA3D_ATI2;
410 case SVGA3D_DEVCAP_SURFACEFMT_YV12: return SVGA3D_YV12;
411 default:
412 AssertFailed();
413 break;
414 }
415 return SVGA3D_FORMAT_INVALID;
416}
417
418
419static SVGA3dSurfaceFormat vmsvgaDXDevCapDxfmt2Format(SVGA3dDevCapIndex enmDevCap)
420{
421 switch (enmDevCap)
422 {
423 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
424 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
425 case SVGA3D_DEVCAP_DXFMT_R5G6B5: return SVGA3D_R5G6B5;
426 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
427 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
428 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
429 case SVGA3D_DEVCAP_DXFMT_Z_D32: return SVGA3D_Z_D32;
430 case SVGA3D_DEVCAP_DXFMT_Z_D16: return SVGA3D_Z_D16;
431 case SVGA3D_DEVCAP_DXFMT_Z_D24S8: return SVGA3D_Z_D24S8;
432 case SVGA3D_DEVCAP_DXFMT_Z_D15S1: return SVGA3D_Z_D15S1;
433 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
434 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4: return SVGA3D_LUMINANCE4_ALPHA4;
435 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
436 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
437 case SVGA3D_DEVCAP_DXFMT_DXT1: return SVGA3D_DXT1;
438 case SVGA3D_DEVCAP_DXFMT_DXT2: return SVGA3D_DXT2;
439 case SVGA3D_DEVCAP_DXFMT_DXT3: return SVGA3D_DXT3;
440 case SVGA3D_DEVCAP_DXFMT_DXT4: return SVGA3D_DXT4;
441 case SVGA3D_DEVCAP_DXFMT_DXT5: return SVGA3D_DXT5;
442 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
443 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5: return SVGA3D_BUMPL6V5U5;
444 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
445 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1: return SVGA3D_FORMAT_DEAD1;
446 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
447 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
448 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
449 case SVGA3D_DEVCAP_DXFMT_V8U8: return SVGA3D_V8U8;
450 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
451 case SVGA3D_DEVCAP_DXFMT_CxV8U8: return SVGA3D_CxV8U8;
452 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8: return SVGA3D_X8L8V8U8;
453 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
454 case SVGA3D_DEVCAP_DXFMT_ALPHA8: return SVGA3D_ALPHA8;
455 case SVGA3D_DEVCAP_DXFMT_R_S10E5: return SVGA3D_R_S10E5;
456 case SVGA3D_DEVCAP_DXFMT_R_S23E8: return SVGA3D_R_S23E8;
457 case SVGA3D_DEVCAP_DXFMT_RG_S10E5: return SVGA3D_RG_S10E5;
458 case SVGA3D_DEVCAP_DXFMT_RG_S23E8: return SVGA3D_RG_S23E8;
459 case SVGA3D_DEVCAP_DXFMT_BUFFER: return SVGA3D_BUFFER;
460 case SVGA3D_DEVCAP_DXFMT_Z_D24X8: return SVGA3D_Z_D24X8;
461 case SVGA3D_DEVCAP_DXFMT_V16U16: return SVGA3D_V16U16;
462 case SVGA3D_DEVCAP_DXFMT_G16R16: return SVGA3D_G16R16;
463 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
464 case SVGA3D_DEVCAP_DXFMT_UYVY: return SVGA3D_UYVY;
465 case SVGA3D_DEVCAP_DXFMT_YUY2: return SVGA3D_YUY2;
466 case SVGA3D_DEVCAP_DXFMT_NV12: return SVGA3D_NV12;
467 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_DXFMT_AYUV -> SVGA3D_AYUV */
468 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS: return SVGA3D_R32G32B32A32_TYPELESS;
469 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT: return SVGA3D_R32G32B32A32_UINT;
470 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT: return SVGA3D_R32G32B32A32_SINT;
471 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS: return SVGA3D_R32G32B32_TYPELESS;
472 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT: return SVGA3D_R32G32B32_FLOAT;
473 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT: return SVGA3D_R32G32B32_UINT;
474 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT: return SVGA3D_R32G32B32_SINT;
475 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS: return SVGA3D_R16G16B16A16_TYPELESS;
476 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT: return SVGA3D_R16G16B16A16_UINT;
477 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM: return SVGA3D_R16G16B16A16_SNORM;
478 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT: return SVGA3D_R16G16B16A16_SINT;
479 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS: return SVGA3D_R32G32_TYPELESS;
480 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT: return SVGA3D_R32G32_UINT;
481 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT: return SVGA3D_R32G32_SINT;
482 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS: return SVGA3D_R32G8X24_TYPELESS;
483 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT: return SVGA3D_D32_FLOAT_S8X24_UINT;
484 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24: return SVGA3D_R32_FLOAT_X8X24;
485 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT: return SVGA3D_X32_G8X24_UINT;
486 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS: return SVGA3D_R10G10B10A2_TYPELESS;
487 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT: return SVGA3D_R10G10B10A2_UINT;
488 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT: return SVGA3D_R11G11B10_FLOAT;
489 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS: return SVGA3D_R8G8B8A8_TYPELESS;
490 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM: return SVGA3D_R8G8B8A8_UNORM;
491 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB: return SVGA3D_R8G8B8A8_UNORM_SRGB;
492 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT: return SVGA3D_R8G8B8A8_UINT;
493 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT: return SVGA3D_R8G8B8A8_SINT;
494 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS: return SVGA3D_R16G16_TYPELESS;
495 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT: return SVGA3D_R16G16_UINT;
496 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT: return SVGA3D_R16G16_SINT;
497 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS: return SVGA3D_R32_TYPELESS;
498 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT: return SVGA3D_D32_FLOAT;
499 case SVGA3D_DEVCAP_DXFMT_R32_UINT: return SVGA3D_R32_UINT;
500 case SVGA3D_DEVCAP_DXFMT_R32_SINT: return SVGA3D_R32_SINT;
501 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS: return SVGA3D_R24G8_TYPELESS;
502 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT: return SVGA3D_D24_UNORM_S8_UINT;
503 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8: return SVGA3D_R24_UNORM_X8;
504 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT: return SVGA3D_X24_G8_UINT;
505 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS: return SVGA3D_R8G8_TYPELESS;
506 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM: return SVGA3D_R8G8_UNORM;
507 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT: return SVGA3D_R8G8_UINT;
508 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT: return SVGA3D_R8G8_SINT;
509 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS: return SVGA3D_R16_TYPELESS;
510 case SVGA3D_DEVCAP_DXFMT_R16_UNORM: return SVGA3D_R16_UNORM;
511 case SVGA3D_DEVCAP_DXFMT_R16_UINT: return SVGA3D_R16_UINT;
512 case SVGA3D_DEVCAP_DXFMT_R16_SNORM: return SVGA3D_R16_SNORM;
513 case SVGA3D_DEVCAP_DXFMT_R16_SINT: return SVGA3D_R16_SINT;
514 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS: return SVGA3D_R8_TYPELESS;
515 case SVGA3D_DEVCAP_DXFMT_R8_UNORM: return SVGA3D_R8_UNORM;
516 case SVGA3D_DEVCAP_DXFMT_R8_UINT: return SVGA3D_R8_UINT;
517 case SVGA3D_DEVCAP_DXFMT_R8_SNORM: return SVGA3D_R8_SNORM;
518 case SVGA3D_DEVCAP_DXFMT_R8_SINT: return SVGA3D_R8_SINT;
519 case SVGA3D_DEVCAP_DXFMT_P8: return SVGA3D_P8;
520 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP: return SVGA3D_R9G9B9E5_SHAREDEXP;
521 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM: return SVGA3D_R8G8_B8G8_UNORM;
522 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM: return SVGA3D_G8R8_G8B8_UNORM;
523 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS: return SVGA3D_BC1_TYPELESS;
524 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB: return SVGA3D_BC1_UNORM_SRGB;
525 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS: return SVGA3D_BC2_TYPELESS;
526 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB: return SVGA3D_BC2_UNORM_SRGB;
527 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS: return SVGA3D_BC3_TYPELESS;
528 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB: return SVGA3D_BC3_UNORM_SRGB;
529 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS: return SVGA3D_BC4_TYPELESS;
530 case SVGA3D_DEVCAP_DXFMT_ATI1: return SVGA3D_ATI1;
531 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM: return SVGA3D_BC4_SNORM;
532 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS: return SVGA3D_BC5_TYPELESS;
533 case SVGA3D_DEVCAP_DXFMT_ATI2: return SVGA3D_ATI2;
534 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM: return SVGA3D_BC5_SNORM;
535 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM: return SVGA3D_R10G10B10_XR_BIAS_A2_UNORM;
536 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS: return SVGA3D_B8G8R8A8_TYPELESS;
537 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB: return SVGA3D_B8G8R8A8_UNORM_SRGB;
538 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS: return SVGA3D_B8G8R8X8_TYPELESS;
539 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB: return SVGA3D_B8G8R8X8_UNORM_SRGB;
540 case SVGA3D_DEVCAP_DXFMT_Z_DF16: return SVGA3D_Z_DF16;
541 case SVGA3D_DEVCAP_DXFMT_Z_DF24: return SVGA3D_Z_DF24;
542 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
543 case SVGA3D_DEVCAP_DXFMT_YV12: return SVGA3D_YV12;
544 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT: return SVGA3D_R32G32B32A32_FLOAT;
545 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT: return SVGA3D_R16G16B16A16_FLOAT;
546 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM: return SVGA3D_R16G16B16A16_UNORM;
547 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT: return SVGA3D_R32G32_FLOAT;
548 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM: return SVGA3D_R10G10B10A2_UNORM;
549 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM: return SVGA3D_R8G8B8A8_SNORM;
550 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT: return SVGA3D_R16G16_FLOAT;
551 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM: return SVGA3D_R16G16_UNORM;
552 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM: return SVGA3D_R16G16_SNORM;
553 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT: return SVGA3D_R32_FLOAT;
554 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM: return SVGA3D_R8G8_SNORM;
555 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT: return SVGA3D_R16_FLOAT;
556 case SVGA3D_DEVCAP_DXFMT_D16_UNORM: return SVGA3D_D16_UNORM;
557 case SVGA3D_DEVCAP_DXFMT_A8_UNORM: return SVGA3D_A8_UNORM;
558 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM: return SVGA3D_BC1_UNORM;
559 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM: return SVGA3D_BC2_UNORM;
560 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM: return SVGA3D_BC3_UNORM;
561 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM: return SVGA3D_B5G6R5_UNORM;
562 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM: return SVGA3D_B5G5R5A1_UNORM;
563 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM: return SVGA3D_B8G8R8A8_UNORM;
564 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM: return SVGA3D_B8G8R8X8_UNORM;
565 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM: return SVGA3D_BC4_UNORM;
566 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM: return SVGA3D_BC5_UNORM;
567 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS: return SVGA3D_BC6H_TYPELESS;
568 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16: return SVGA3D_BC6H_UF16;
569 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16: return SVGA3D_BC6H_SF16;
570 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS: return SVGA3D_BC7_TYPELESS;
571 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM: return SVGA3D_BC7_UNORM;
572 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB: return SVGA3D_BC7_UNORM_SRGB;
573 default:
574 AssertFailed();
575 break;
576 }
577 return SVGA3D_FORMAT_INVALID;
578}
579
580
581static int vmsvgaDXCheckFormatSupportPreDX(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
582{
583 int rc = VINF_SUCCESS;
584
585 *pu32DevCap = 0;
586
587 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
588 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
589 {
590 RT_NOREF(pState);
591 /** @todo Implement */
592 }
593 else
594 rc = VERR_NOT_SUPPORTED;
595 return rc;
596}
597
598static int vmsvgaDXCheckFormatSupport(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
599{
600 int rc = VINF_SUCCESS;
601
602 *pu32DevCap = 0;
603
604 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
605 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
606 {
607 ID3D11Device *pDevice = pState->pBackend->pDevice;
608 UINT FormatSupport = 0;
609 HRESULT hr = pDevice->CheckFormatSupport(dxgiFormat, &FormatSupport);
610 if (SUCCEEDED(hr))
611 {
612 *pu32DevCap |= SVGA3D_DXFMT_SUPPORTED;
613
614 if (FormatSupport & D3D11_FORMAT_SUPPORT_SHADER_SAMPLE)
615 *pu32DevCap |= SVGA3D_DXFMT_SHADER_SAMPLE;
616
617 if (FormatSupport & D3D11_FORMAT_SUPPORT_RENDER_TARGET)
618 *pu32DevCap |= SVGA3D_DXFMT_COLOR_RENDERTARGET;
619
620 if (FormatSupport & D3D11_FORMAT_SUPPORT_DEPTH_STENCIL)
621 *pu32DevCap |= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
622
623 if (FormatSupport & D3D11_FORMAT_SUPPORT_BLENDABLE)
624 *pu32DevCap |= SVGA3D_DXFMT_BLENDABLE;
625
626 if (FormatSupport & D3D11_FORMAT_SUPPORT_MIP)
627 *pu32DevCap |= SVGA3D_DXFMT_MIPS;
628
629 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURECUBE)
630 *pu32DevCap |= SVGA3D_DXFMT_ARRAY;
631
632 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURE3D)
633 *pu32DevCap |= SVGA3D_DXFMT_VOLUME;
634
635 if (FormatSupport & D3D11_FORMAT_SUPPORT_IA_VERTEX_BUFFER)
636 *pu32DevCap |= SVGA3D_DXFMT_DX_VERTEX_BUFFER;
637
638 UINT NumQualityLevels;
639 hr = pDevice->CheckMultisampleQualityLevels(dxgiFormat, 2, &NumQualityLevels);
640 if (SUCCEEDED(hr) && NumQualityLevels != 0)
641 *pu32DevCap |= SVGA3D_DXFMT_MULTISAMPLE;
642 }
643 else
644 AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
645 }
646 else
647 rc = VERR_NOT_SUPPORTED;
648 return rc;
649}
650
651
652static int dxDeviceCreate(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
653{
654 int rc = VINF_SUCCESS;
655
656 IDXGIAdapter *pAdapter = NULL; /* Default adapter. */
657 static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
658 {
659 /// @todo Requires a Windows 8+ _SDKS: D3D_FEATURE_LEVEL_11_1,
660 D3D_FEATURE_LEVEL_11_0
661 };
662 UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
663#ifdef DEBUG
664 Flags |= D3D11_CREATE_DEVICE_DEBUG;
665#endif
666
667 HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
668 D3D_DRIVER_TYPE_HARDWARE,
669 NULL,
670 Flags,
671 s_aFeatureLevels,
672 RT_ELEMENTS(s_aFeatureLevels),
673 D3D11_SDK_VERSION,
674 &pDevice->pDevice,
675 &pDevice->FeatureLevel,
676 &pDevice->pImmediateContext);
677 if (SUCCEEDED(hr))
678 {
679 LogRel(("VMSVGA: Feature level %#x\n", pDevice->FeatureLevel));
680
681 IDXGIDevice *pDxgiDevice = 0;
682 hr = pBackend->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
683 if (SUCCEEDED(hr))
684 {
685 IDXGIAdapter *pDxgiAdapter = 0;
686 hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
687 if (SUCCEEDED(hr))
688 {
689 hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pDevice->pDxgiFactory);
690 D3D_RELEASE(pDxgiAdapter);
691 }
692
693 D3D_RELEASE(pDxgiDevice);
694 }
695 }
696
697 if (FAILED(hr))
698 rc = VERR_NOT_SUPPORTED;
699
700 return rc;
701}
702
703
704static void dxDeviceDestroy(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
705{
706 RT_NOREF(pBackend);
707 D3D_RELEASE(pDevice->pDevice);
708 D3D_RELEASE(pDevice->pImmediateContext);
709 D3D_RELEASE(pDevice->pDxgiFactory);
710 RT_ZERO(*pDevice);
711}
712
713
714/** @todo AssertCompile for types like D3D11_COMPARISON_FUNC and SVGA3dComparisonFunc */
715static HRESULT dxBlendStateCreate(DXDEVICE *pDevice, SVGACOTableDXBlendStateEntry const *pEntry, ID3D11BlendState **pp)
716{
717 D3D11_BLEND_DESC BlendDesc;
718 BlendDesc.AlphaToCoverageEnable = RT_BOOL(pEntry->alphaToCoverageEnable);
719 BlendDesc.IndependentBlendEnable = RT_BOOL(pEntry->independentBlendEnable);
720 for (int i = 0; i < SVGA3D_MAX_RENDER_TARGETS; ++i)
721 {
722 BlendDesc.RenderTarget[i].BlendEnable = RT_BOOL(pEntry->perRT[i].blendEnable);
723 BlendDesc.RenderTarget[i].SrcBlend = (D3D11_BLEND)pEntry->perRT[i].srcBlend;
724 BlendDesc.RenderTarget[i].DestBlend = (D3D11_BLEND)pEntry->perRT[i].destBlend;
725 BlendDesc.RenderTarget[i].BlendOp = (D3D11_BLEND_OP)pEntry->perRT[i].blendOp;
726 BlendDesc.RenderTarget[i].SrcBlendAlpha = (D3D11_BLEND)pEntry->perRT[i].srcBlendAlpha;
727 BlendDesc.RenderTarget[i].DestBlendAlpha = (D3D11_BLEND)pEntry->perRT[i].destBlendAlpha;
728 BlendDesc.RenderTarget[i].BlendOpAlpha = (D3D11_BLEND_OP)pEntry->perRT[i].blendOpAlpha;
729 BlendDesc.RenderTarget[i].RenderTargetWriteMask = pEntry->perRT[i].renderTargetWriteMask;
730 /** @todo logicOpEnable and logicOp */
731 }
732
733 HRESULT hr = pDevice->pDevice->CreateBlendState(&BlendDesc, pp);
734 Assert(SUCCEEDED(hr));
735 return hr;
736}
737
738
739static HRESULT dxDepthStencilStateCreate(DXDEVICE *pDevice, SVGACOTableDXDepthStencilEntry const *pEntry, ID3D11DepthStencilState **pp)
740{
741 D3D11_DEPTH_STENCIL_DESC desc;
742 desc.DepthEnable = pEntry->depthEnable;
743 desc.DepthWriteMask = (D3D11_DEPTH_WRITE_MASK)pEntry->depthWriteMask;
744 desc.DepthFunc = (D3D11_COMPARISON_FUNC)pEntry->depthFunc;
745 desc.StencilEnable = pEntry->stencilEnable;
746 desc.StencilReadMask = pEntry->stencilReadMask;
747 desc.StencilWriteMask = pEntry->stencilWriteMask;
748 desc.FrontFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilFailOp;
749 desc.FrontFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilDepthFailOp;
750 desc.FrontFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->frontStencilPassOp;
751 desc.FrontFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->frontStencilFunc;
752 desc.BackFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->backStencilFailOp;
753 desc.BackFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->backStencilDepthFailOp;
754 desc.BackFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->backStencilPassOp;
755 desc.BackFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->backStencilFunc;
756 /** @todo frontEnable, backEnable */
757
758 HRESULT hr = pDevice->pDevice->CreateDepthStencilState(&desc, pp);
759 Assert(SUCCEEDED(hr));
760 return hr;
761}
762
763
764static HRESULT dxSamplerStateCreate(DXDEVICE *pDevice, SVGACOTableDXSamplerEntry const *pEntry, ID3D11SamplerState **pp)
765{
766 D3D11_SAMPLER_DESC desc;
767 desc.Filter = (D3D11_FILTER)pEntry->filter;
768 desc.AddressU = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressU;
769 desc.AddressV = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressV;
770 desc.AddressW = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressW;
771 desc.MipLODBias = pEntry->mipLODBias;
772 desc.MaxAnisotropy = RT_CLAMP(pEntry->maxAnisotropy, 1, 16); /* "Valid values are between 1 and 16" */
773 desc.ComparisonFunc = (D3D11_COMPARISON_FUNC)pEntry->comparisonFunc;
774 desc.BorderColor[0] = pEntry->borderColor.value[0];
775 desc.BorderColor[1] = pEntry->borderColor.value[1];
776 desc.BorderColor[2] = pEntry->borderColor.value[2];
777 desc.BorderColor[3] = pEntry->borderColor.value[3];
778 desc.MinLOD = pEntry->minLOD;
779 desc.MaxLOD = pEntry->maxLOD;
780
781 HRESULT hr = pDevice->pDevice->CreateSamplerState(&desc, pp);
782 Assert(SUCCEEDED(hr));
783 return hr;
784}
785
786
787static HRESULT dxRasterizerStateCreate(DXDEVICE *pDevice, SVGACOTableDXRasterizerStateEntry const *pEntry, ID3D11RasterizerState **pp)
788{
789 D3D11_RASTERIZER_DESC desc;
790 desc.FillMode = (D3D11_FILL_MODE)pEntry->fillMode;
791 desc.CullMode = (D3D11_CULL_MODE)pEntry->cullMode;
792 desc.FrontCounterClockwise = pEntry->frontCounterClockwise;
793 /** provokingVertexLast */
794 desc.DepthBias = pEntry->depthBias;
795 desc.DepthBiasClamp = pEntry->depthBiasClamp;
796 desc.SlopeScaledDepthBias = pEntry->slopeScaledDepthBias;
797 desc.DepthClipEnable = pEntry->depthClipEnable;
798 desc.ScissorEnable = pEntry->scissorEnable;
799 desc.MultisampleEnable = pEntry->multisampleEnable;
800 desc.AntialiasedLineEnable = pEntry->antialiasedLineEnable;
801 /** @todo lineWidth lineStippleEnable lineStippleFactor lineStipplePattern forcedSampleCount */
802
803 HRESULT hr = pDevice->pDevice->CreateRasterizerState(&desc, pp);
804 Assert(SUCCEEDED(hr));
805 return hr;
806}
807
808
809static HRESULT dxRenderTargetViewCreate(DXDEVICE *pDevice, SVGACOTableDXRTViewEntry const *pEntry, VMSVGA3DBACKENDSURFACE *pBackendSurface, ID3D11RenderTargetView **pp)
810{
811 ID3D11Resource *pResource = pBackendSurface->u.Texture.pTexture;
812
813 D3D11_RENDER_TARGET_VIEW_DESC desc;
814 RT_ZERO(desc);
815 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
816 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
817 switch (pEntry->resourceDimension)
818 {
819 case SVGA3D_RESOURCE_BUFFER:
820 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
821 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
822 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
823 break;
824 case SVGA3D_RESOURCE_TEXTURE1D:
825 if (pEntry->desc.tex.arraySize <= 1)
826 {
827 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1D;
828 desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
829 }
830 else
831 {
832 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1DARRAY;
833 desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
834 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
835 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
836 }
837 break;
838 case SVGA3D_RESOURCE_TEXTURE2D:
839 if (pEntry->desc.tex.arraySize <= 1)
840 {
841 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2D;
842 desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
843 }
844 else
845 {
846 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
847 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
848 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
849 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
850 }
851 break;
852 case SVGA3D_RESOURCE_TEXTURE3D:
853 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE3D;
854 desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
855 desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
856 desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
857 break;
858 case SVGA3D_RESOURCE_TEXTURECUBE:
859 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
860 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
861 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
862 desc.Texture2DArray.FirstArraySlice = 0;
863 desc.Texture2DArray.ArraySize = 6;
864 break;
865 case SVGA3D_RESOURCE_BUFFEREX:
866 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
867 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
868 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
869 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
870 break;
871 default:
872 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
873 }
874
875 HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pResource, &desc, pp);
876 Assert(SUCCEEDED(hr));
877 return hr;
878}
879
880
881static HRESULT dxShaderResourceViewCreate(DXDEVICE *pDevice, SVGACOTableDXSRViewEntry const *pEntry, VMSVGA3DBACKENDSURFACE *pBackendSurface, ID3D11ShaderResourceView **pp)
882{
883 ID3D11Resource *pResource = pBackendSurface->u.Texture.pTexture;
884
885 D3D11_SHADER_RESOURCE_VIEW_DESC desc;
886 RT_ZERO(desc);
887 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
888 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
889
890 switch (pEntry->resourceDimension)
891 {
892 case SVGA3D_RESOURCE_BUFFER:
893 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFER;
894 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
895 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
896 break;
897 case SVGA3D_RESOURCE_TEXTURE1D:
898 if (pEntry->desc.tex.arraySize <= 1)
899 {
900 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1D;
901 desc.Texture1D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
902 desc.Texture1D.MipLevels = pEntry->desc.tex.mipLevels;
903 }
904 else
905 {
906 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1DARRAY;
907 desc.Texture1DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
908 desc.Texture1DArray.MipLevels = pEntry->desc.tex.mipLevels;
909 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
910 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
911 }
912 break;
913 case SVGA3D_RESOURCE_TEXTURE2D:
914 if (pEntry->desc.tex.arraySize <= 1)
915 {
916 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2D;
917 desc.Texture2D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
918 desc.Texture2D.MipLevels = pEntry->desc.tex.mipLevels;
919 }
920 else
921 {
922 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2DARRAY;
923 desc.Texture2DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
924 desc.Texture2DArray.MipLevels = pEntry->desc.tex.mipLevels;
925 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
926 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
927 }
928 break;
929 case SVGA3D_RESOURCE_TEXTURE3D:
930 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE3D;
931 desc.Texture3D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
932 desc.Texture3D.MipLevels = pEntry->desc.tex.mipLevels;
933 break;
934 case SVGA3D_RESOURCE_TEXTURECUBE:
935 AssertFailed(); /** @todo test. */
936 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBE;
937 desc.TextureCube.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
938 desc.TextureCube.MipLevels = pEntry->desc.tex.mipLevels;
939 break;
940 case SVGA3D_RESOURCE_BUFFEREX:
941 AssertFailed(); /** @todo test. */
942 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFEREX;
943 desc.BufferEx.FirstElement = pEntry->desc.bufferex.firstElement;
944 desc.BufferEx.NumElements = pEntry->desc.bufferex.numElements;
945 desc.BufferEx.Flags = pEntry->desc.bufferex.flags;
946 break;
947 default:
948 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
949 }
950
951 HRESULT hr = pDevice->pDevice->CreateShaderResourceView(pResource, &desc, pp);
952 Assert(SUCCEEDED(hr));
953 return hr;
954}
955
956
957static HRESULT dxDepthStencilViewCreate(DXDEVICE *pDevice, SVGACOTableDXDSViewEntry const *pEntry, VMSVGA3DBACKENDSURFACE *pBackendSurface, ID3D11DepthStencilView **pp)
958{
959 ID3D11Resource *pResource = pBackendSurface->u.Texture.pTexture;
960
961 D3D11_DEPTH_STENCIL_VIEW_DESC desc;
962 RT_ZERO(desc);
963 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
964 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
965 desc.Flags = pEntry->flags;
966 switch (pEntry->resourceDimension)
967 {
968 case SVGA3D_RESOURCE_TEXTURE1D:
969 if (pEntry->arraySize <= 1)
970 {
971 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1D;
972 desc.Texture1D.MipSlice = pEntry->mipSlice;
973 }
974 else
975 {
976 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1DARRAY;
977 desc.Texture1DArray.MipSlice = pEntry->mipSlice;
978 desc.Texture1DArray.FirstArraySlice = pEntry->firstArraySlice;
979 desc.Texture1DArray.ArraySize = pEntry->arraySize;
980 }
981 break;
982 case SVGA3D_RESOURCE_TEXTURE2D:
983 if (pEntry->arraySize <= 1)
984 {
985 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2D;
986 desc.Texture2D.MipSlice = pEntry->mipSlice;
987 }
988 else
989 {
990 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2DARRAY;
991 desc.Texture2DArray.MipSlice = pEntry->mipSlice;
992 desc.Texture2DArray.FirstArraySlice = pEntry->firstArraySlice;
993 desc.Texture2DArray.ArraySize = pEntry->arraySize;
994 }
995 break;
996 default:
997 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
998 }
999
1000 HRESULT hr = pDevice->pDevice->CreateDepthStencilView(pResource, &desc, pp);
1001 Assert(SUCCEEDED(hr));
1002 return hr;
1003}
1004
1005
1006static HRESULT dxShaderCreate(DXDEVICE *pDevice, PVMSVGA3DSHADER pShader, DXSHADER *pDXShader)
1007{
1008 HRESULT hr = S_OK;
1009
1010 switch (pShader->type)
1011 {
1012 case SVGA3D_SHADERTYPE_VS:
1013 hr = pDevice->pDevice->CreateVertexShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pVertexShader);
1014 Assert(SUCCEEDED(hr));
1015 break;
1016 case SVGA3D_SHADERTYPE_PS:
1017 hr = pDevice->pDevice->CreatePixelShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pPixelShader);
1018 Assert(SUCCEEDED(hr));
1019 break;
1020 case SVGA3D_SHADERTYPE_GS:
1021 case SVGA3D_SHADERTYPE_HS:
1022 case SVGA3D_SHADERTYPE_DS:
1023 case SVGA3D_SHADERTYPE_CS:
1024 default:
1025 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1026 }
1027
1028 return hr;
1029}
1030
1031
1032static void dxShaderSet(DXDEVICE *pDevice, PVMSVGA3DSHADER pShader, DXSHADER *pDXShader)
1033{
1034 switch (pShader->type)
1035 {
1036 case SVGA3D_SHADERTYPE_VS:
1037 pDevice->pImmediateContext->VSSetShader(pDXShader->pVertexShader, NULL, 0);
1038 break;
1039 case SVGA3D_SHADERTYPE_PS:
1040 pDevice->pImmediateContext->PSSetShader(pDXShader->pPixelShader, NULL, 0);
1041 break;
1042 case SVGA3D_SHADERTYPE_GS:
1043 case SVGA3D_SHADERTYPE_HS:
1044 case SVGA3D_SHADERTYPE_DS:
1045 case SVGA3D_SHADERTYPE_CS:
1046 default:
1047 ASSERT_GUEST_FAILED_RETURN_VOID();
1048 }
1049}
1050
1051
1052static void dxConstantBufferSet(DXDEVICE *pDevice, uint32_t slot, SVGA3dShaderType type, ID3D11Buffer *pConstantBuffer)
1053{
1054 switch (type)
1055 {
1056 case SVGA3D_SHADERTYPE_VS:
1057 pDevice->pImmediateContext->VSSetConstantBuffers(slot, 1, &pConstantBuffer);
1058 break;
1059 case SVGA3D_SHADERTYPE_PS:
1060 pDevice->pImmediateContext->PSSetConstantBuffers(slot, 1, &pConstantBuffer);
1061 break;
1062 case SVGA3D_SHADERTYPE_GS:
1063 case SVGA3D_SHADERTYPE_HS:
1064 case SVGA3D_SHADERTYPE_DS:
1065 case SVGA3D_SHADERTYPE_CS:
1066 default:
1067 ASSERT_GUEST_FAILED_RETURN_VOID();
1068 }
1069}
1070
1071
1072static void dxSamplerSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startSampler, uint32_t cSampler, ID3D11SamplerState * const *papSampler)
1073{
1074 switch (type)
1075 {
1076 case SVGA3D_SHADERTYPE_VS:
1077 pDevice->pImmediateContext->VSSetSamplers(startSampler, cSampler, papSampler);
1078 break;
1079 case SVGA3D_SHADERTYPE_PS:
1080 pDevice->pImmediateContext->PSSetSamplers(startSampler, cSampler, papSampler);
1081 break;
1082 case SVGA3D_SHADERTYPE_GS:
1083 case SVGA3D_SHADERTYPE_HS:
1084 case SVGA3D_SHADERTYPE_DS:
1085 case SVGA3D_SHADERTYPE_CS:
1086 default:
1087 ASSERT_GUEST_FAILED_RETURN_VOID();
1088 }
1089}
1090
1091
1092static void dxShaderResourceViewSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startView, uint32_t cShaderResourceView, ID3D11ShaderResourceView * const *papShaderResourceView)
1093{
1094 switch (type)
1095 {
1096 case SVGA3D_SHADERTYPE_VS:
1097 pDevice->pImmediateContext->VSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
1098 break;
1099 case SVGA3D_SHADERTYPE_PS:
1100 pDevice->pImmediateContext->PSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
1101 break;
1102 case SVGA3D_SHADERTYPE_GS:
1103 case SVGA3D_SHADERTYPE_HS:
1104 case SVGA3D_SHADERTYPE_DS:
1105 case SVGA3D_SHADERTYPE_CS:
1106 default:
1107 ASSERT_GUEST_FAILED_RETURN_VOID();
1108 }
1109}
1110
1111
1112
1113static int vmsvga3dBackSurfaceCreateScreenTarget(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface)
1114{
1115 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1116 AssertReturn(pBackend, VERR_INVALID_STATE);
1117 AssertReturn(pBackend->pDevice, VERR_INVALID_STATE);
1118
1119 /* Surface must have SCREEN_TARGET flag. */
1120 ASSERT_GUEST_RETURN(RT_BOOL(pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET), VERR_INVALID_PARAMETER);
1121
1122 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1123 {
1124 AssertFailed(); /* Should the function not be used like that? */
1125 vmsvga3dBackSurfaceDestroy(pState, pSurface);
1126 }
1127
1128 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1129 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1130
1131 D3D11_TEXTURE2D_DESC td;
1132 RT_ZERO(td);
1133 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1134 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1135 Assert(pSurface->cLevels == 1);
1136 td.MipLevels = 1;
1137 td.ArraySize = 1;
1138 td.Format = vmsvgaDXScreenTargetFormat2Dxgi(pSurface->format); // DXGI_FORMAT_B8G8R8A8_UNORM;
1139 td.SampleDesc.Count = 1;
1140 td.SampleDesc.Quality = 0;
1141 td.Usage = D3D11_USAGE_DEFAULT;
1142 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1143 td.CPUAccessFlags = 0;
1144 td.MiscFlags = 0;
1145
1146 HRESULT hr = pBackend->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pTexture);
1147 Assert(SUCCEEDED(hr));
1148 if (SUCCEEDED(hr))
1149 {
1150 /* Map-able texture. */
1151 td.Usage = D3D11_USAGE_DYNAMIC;
1152 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1153 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1154 td.MiscFlags = 0;
1155 hr = pBackend->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pDynamicTexture);
1156 Assert(SUCCEEDED(hr));
1157 }
1158
1159 if (SUCCEEDED(hr))
1160 {
1161 /* Staging texture. */
1162 td.Usage = D3D11_USAGE_STAGING;
1163 td.BindFlags = 0; /* No flags allowed. */
1164 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1165 td.MiscFlags = 0;
1166 hr = pBackend->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pStagingTexture);
1167 Assert(SUCCEEDED(hr));
1168 }
1169
1170 if (SUCCEEDED(hr))
1171 {
1172 /*
1173 * Success.
1174 */
1175 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
1176 pBackendSurface->enmDxgiFormat = td.Format;
1177 pSurface->pBackendSurface = pBackendSurface;
1178 pSurface->idAssociatedContext = SVGA_ID_INVALID;
1179 pSurface->fDirty = true;
1180 return VINF_SUCCESS;
1181 }
1182
1183 /* Failure. */
1184 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pStagingTexture);
1185 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pDynamicTexture);
1186 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pTexture);
1187 RTMemFree(pBackendSurface);
1188 return VERR_NO_MEMORY;
1189}
1190
1191
1192static int vmsvga3dBackSurfaceCreateRenderTarget(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1193{
1194 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1195 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1196
1197 if (pSurface->pBackendSurface != NULL)
1198 {
1199 AssertFailed(); /** @todo Should the function not be used like that? */
1200 vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1201 }
1202
1203 /** @todo Various texture types. */
1204
1205 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1206 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1207
1208 D3D11_TEXTURE2D_DESC td;
1209 RT_ZERO(td);
1210 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1211 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1212 Assert(pSurface->cLevels == 1);
1213 td.MipLevels = 1;
1214 td.ArraySize = 1;
1215 td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format); // DXGI_FORMAT_B8G8R8A8_UNORM;
1216 AssertReturn(td.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
1217 td.SampleDesc.Count = 1;
1218 td.SampleDesc.Quality = 0;
1219 td.Usage = D3D11_USAGE_DEFAULT;
1220 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1221 td.CPUAccessFlags = 0;
1222 td.MiscFlags = 0;
1223
1224 HRESULT hr = pDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.Texture.pTexture);
1225 Assert(SUCCEEDED(hr));
1226 if (SUCCEEDED(hr))
1227 {
1228 /* Map-able texture. */
1229 td.Usage = D3D11_USAGE_DYNAMIC;
1230 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1231 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1232 td.MiscFlags = 0;
1233 hr = pDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.Texture.pDynamicTexture);
1234 Assert(SUCCEEDED(hr));
1235 }
1236
1237 if (SUCCEEDED(hr))
1238 {
1239 /* Staging texture. */
1240 td.Usage = D3D11_USAGE_STAGING;
1241 td.BindFlags = 0; /* No flags allowed. */
1242 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1243 td.MiscFlags = 0;
1244 hr = pDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.Texture.pStagingTexture);
1245 Assert(SUCCEEDED(hr));
1246 }
1247
1248 if (SUCCEEDED(hr))
1249 {
1250 /*
1251 * Success.
1252 */
1253 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE;
1254 pBackendSurface->enmDxgiFormat = td.Format;
1255 pSurface->pBackendSurface = pBackendSurface;
1256 pSurface->idAssociatedContext = pDXContext->cid;
1257 pSurface->fDirty = true;
1258 return VINF_SUCCESS;
1259 }
1260
1261 /* Failure. */
1262 D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture);
1263 D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture);
1264 D3D_RELEASE(pBackendSurface->u.Texture.pTexture);
1265 RTMemFree(pBackendSurface);
1266 return VERR_NO_MEMORY;
1267}
1268
1269
1270static UINT dxBindFlags(SVGA3dSurfaceAllFlags surfaceFlags)
1271{
1272 /* Catch unimplemented flags. */
1273 Assert(!RT_BOOL(surfaceFlags & (SVGA3D_SURFACE_BIND_LOGICOPS | SVGA3D_SURFACE_BIND_RAW_VIEWS)));
1274
1275 UINT BindFlags = 0;
1276
1277 if (surfaceFlags & SVGA3D_SURFACE_BIND_VERTEX_BUFFER) BindFlags |= D3D11_BIND_VERTEX_BUFFER;
1278 if (surfaceFlags & SVGA3D_SURFACE_BIND_INDEX_BUFFER) BindFlags |= D3D11_BIND_INDEX_BUFFER;
1279 if (surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) BindFlags |= D3D11_BIND_CONSTANT_BUFFER;
1280 if (surfaceFlags & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) BindFlags |= D3D11_BIND_SHADER_RESOURCE;
1281 if (surfaceFlags & SVGA3D_SURFACE_BIND_RENDER_TARGET) BindFlags |= D3D11_BIND_RENDER_TARGET;
1282 if (surfaceFlags & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) BindFlags |= D3D11_BIND_DEPTH_STENCIL;
1283 if (surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) BindFlags |= D3D11_BIND_STREAM_OUTPUT;
1284 if (surfaceFlags & SVGA3D_SURFACE_BIND_UAVIEW) BindFlags |= D3D11_BIND_UNORDERED_ACCESS;
1285
1286 return BindFlags;
1287}
1288
1289
1290static int vmsvga3dBackSurfaceCreateTexture(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1291{
1292 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1293 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1294
1295 if (pSurface->pBackendSurface != NULL)
1296 {
1297 AssertFailed(); /** @todo Should the function not be used like that? */
1298 vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1299 }
1300
1301 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1302 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1303
1304 uint32_t const cWidth = pSurface->paMipmapLevels[0].mipmapSize.width;
1305 uint32_t const cHeight = pSurface->paMipmapLevels[0].mipmapSize.height;
1306 uint32_t const cDepth = pSurface->paMipmapLevels[0].mipmapSize.depth;
1307 uint32_t const numMipLevels = pSurface->cLevels;
1308
1309 DXGI_FORMAT dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
1310 AssertReturn(dxgiFormat != DXGI_FORMAT_UNKNOWN, E_FAIL);
1311
1312 /*
1313 * Create D3D11 texture object.
1314 */
1315 HRESULT hr = S_OK;
1316 if (pSurface->surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
1317 {
1318 Assert(pSurface->cFaces == 6);
1319 Assert(cWidth == cHeight);
1320 Assert(cDepth == 1);
1321
1322 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_CUBE_TEXTURE;
1323 AssertFailed(); /** @todo implement */
1324 hr = E_FAIL;
1325 }
1326 else if (pSurface->surfaceFlags & SVGA3D_SURFACE_1D)
1327 {
1328 AssertFailed(); /** @todo implement */
1329 hr = E_FAIL;
1330 }
1331 else
1332 {
1333 if (cDepth > 1)
1334 {
1335 /*
1336 * Volume texture.
1337 */
1338 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_VOLUME_TEXTURE;
1339 AssertFailed(); /** @todo implement */
1340 hr = E_FAIL;
1341 }
1342 else
1343 {
1344 /*
1345 * 2D texture.
1346 */
1347 Assert(pSurface->cFaces == 1);
1348
1349 D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
1350 D3D11_SUBRESOURCE_DATA aInitialData[SVGA3D_MAX_MIP_LEVELS];
1351 if (pSurface->paMipmapLevels[0].pSurfaceData)
1352 {
1353 /** @todo Can happen for a non GBO surface. Test this. */
1354 for (uint32_t i = 0; i < numMipLevels; ++i)
1355 {
1356 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1357 D3D11_SUBRESOURCE_DATA *p = &aInitialData[i];
1358 p->pSysMem = pMipmapLevel->pSurfaceData;
1359 p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
1360 p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
1361 }
1362 paInitialData = &aInitialData[0];
1363 }
1364
1365 D3D11_TEXTURE2D_DESC td;
1366 RT_ZERO(td);
1367 td.Width = cWidth;
1368 td.Height = cHeight;
1369 td.MipLevels = numMipLevels;
1370 td.ArraySize = 1; /** @todo */
1371 td.Format = dxgiFormat;
1372 td.SampleDesc.Count = 1;
1373 td.SampleDesc.Quality = 0;
1374 td.Usage = D3D11_USAGE_DEFAULT;
1375 td.BindFlags = dxBindFlags(pSurface->surfaceFlags);
1376 td.CPUAccessFlags = 0; /** @todo */
1377 td.MiscFlags = 0; /** @todo */
1378 if ( numMipLevels > 1
1379 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
1380 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
1381
1382 hr = pDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.Texture.pTexture);
1383 Assert(SUCCEEDED(hr));
1384 if (SUCCEEDED(hr))
1385 {
1386 /* Map-able texture. */
1387 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
1388 td.Usage = D3D11_USAGE_DYNAMIC;
1389 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1390 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1391 td.MiscFlags = 0;
1392 hr = pDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.Texture.pDynamicTexture);
1393 Assert(SUCCEEDED(hr));
1394 }
1395
1396 if (SUCCEEDED(hr))
1397 {
1398 /* Staging texture. */
1399 td.MipLevels = 1;
1400 td.Usage = D3D11_USAGE_STAGING;
1401 td.BindFlags = 0; /* No flags allowed. */
1402 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1403 td.MiscFlags = 0;
1404 hr = pDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.Texture.pStagingTexture);
1405 Assert(SUCCEEDED(hr));
1406 }
1407
1408 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE;
1409 }
1410 }
1411
1412 Assert(hr == S_OK);
1413
1414 if (pSurface->autogenFilter != SVGA3D_TEX_FILTER_NONE)
1415 {
1416 }
1417
1418 if (SUCCEEDED(hr))
1419 {
1420 /*
1421 * Success.
1422 */
1423 pBackendSurface->enmDxgiFormat = dxgiFormat;
1424 pSurface->pBackendSurface = pBackendSurface;
1425 pSurface->idAssociatedContext = pDXContext->cid;
1426 return VINF_SUCCESS;
1427 }
1428
1429 /* Failure. */
1430 D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture);
1431 D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture);
1432 D3D_RELEASE(pBackendSurface->u.Texture.pTexture);
1433 RTMemFree(pBackendSurface);
1434 return VERR_NO_MEMORY;
1435}
1436
1437
1438static int vmsvga3dBackSurfaceCreateDepthStencilTexture(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1439{
1440 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1441 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1442
1443 if (pSurface->pBackendSurface != NULL)
1444 {
1445 AssertFailed(); /** @todo Should the function not be used like that? */
1446 vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1447 }
1448
1449 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1450 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1451
1452 D3D11_TEXTURE2D_DESC td;
1453 RT_ZERO(td);
1454 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1455 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1456 Assert(pSurface->cLevels == 1);
1457 td.MipLevels = 1;
1458 td.ArraySize = 1;
1459 td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
1460 AssertReturn(td.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
1461 td.SampleDesc.Count = 1;
1462 td.SampleDesc.Quality = 0;
1463 td.Usage = D3D11_USAGE_DEFAULT;
1464 td.BindFlags = D3D11_BIND_DEPTH_STENCIL;
1465 td.CPUAccessFlags = 0;
1466 td.MiscFlags = 0;
1467
1468 HRESULT hr = pDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.Texture.pTexture);
1469 Assert(SUCCEEDED(hr));
1470 if (SUCCEEDED(hr))
1471 {
1472 /*
1473 * Success.
1474 */
1475 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE;
1476 pBackendSurface->enmDxgiFormat = td.Format;
1477 pSurface->pBackendSurface = pBackendSurface;
1478 pSurface->idAssociatedContext = pDXContext->cid;
1479 pSurface->fDirty = true;
1480 return VINF_SUCCESS;
1481 }
1482
1483 /* Failure. */
1484 D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture);
1485 D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture);
1486 D3D_RELEASE(pBackendSurface->u.Texture.pTexture);
1487 RTMemFree(pBackendSurface);
1488 return VERR_NO_MEMORY;
1489}
1490
1491
1492static int vmsvga3dBackSurfaceCreateBuffer(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1493{
1494 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1495 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1496
1497 /* Buffers should be created as such. */
1498 AssertReturn(RT_BOOL(pSurface->surfaceFlags & ( SVGA3D_SURFACE_HINT_INDEXBUFFER
1499 | SVGA3D_SURFACE_HINT_VERTEXBUFFER
1500 | SVGA3D_SURFACE_BIND_VERTEX_BUFFER
1501 | SVGA3D_SURFACE_BIND_INDEX_BUFFER
1502 /// @todo only for constant buffers| SVGA3D_SURFACE_BIND_CONSTANT_BUFFER
1503 //| SVGA3D_SURFACE_BIND_STREAM_OUTPUT
1504 )), VERR_INVALID_PARAMETER);
1505
1506 if (pSurface->pBackendSurface != NULL)
1507 {
1508 AssertFailed(); /** @todo Should the function not be used like that? */
1509 vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1510 }
1511
1512 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1513 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1514
1515 D3D11_BUFFER_DESC bd;
1516 RT_ZERO(bd);
1517 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1518 bd.Usage = D3D11_USAGE_DYNAMIC;
1519 bd.BindFlags = D3D11_BIND_VERTEX_BUFFER
1520 | D3D11_BIND_INDEX_BUFFER
1521 //| D3D11_BIND_CONSTANT_BUFFER
1522 //| D3D11_BIND_STREAM_OUTPUT
1523 ;
1524 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1525 bd.MiscFlags = 0;
1526 bd.StructureByteStride = 0;
1527
1528 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.Buffer.pBuffer);
1529 if (SUCCEEDED(hr))
1530 {
1531 /*
1532 * Success.
1533 */
1534 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1535 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1536 pSurface->pBackendSurface = pBackendSurface;
1537 pSurface->idAssociatedContext = pDXContext->cid;
1538 pSurface->fDirty = true;
1539 return VINF_SUCCESS;
1540 }
1541
1542 /* Failure. */
1543 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1544 RTMemFree(pBackendSurface);
1545 return VERR_NO_MEMORY;
1546}
1547
1548
1549static int vmsvga3dBackSurfaceCreateConstantBuffer(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1550{
1551 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1552 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1553
1554 /* Buffers should be created as such. */
1555 AssertReturn(RT_BOOL(pSurface->surfaceFlags & ( SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)), VERR_INVALID_PARAMETER);
1556
1557 if (pSurface->pBackendSurface != NULL)
1558 {
1559 AssertFailed(); /** @todo Should the function not be used like that? */
1560 vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1561 }
1562
1563 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1564 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1565
1566 D3D11_BUFFER_DESC bd;
1567 RT_ZERO(bd);
1568 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1569 bd.Usage = D3D11_USAGE_DYNAMIC;
1570 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
1571 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1572 bd.MiscFlags = 0;
1573 bd.StructureByteStride = 0;
1574
1575 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.Buffer.pBuffer);
1576 if (SUCCEEDED(hr))
1577 {
1578 /*
1579 * Success.
1580 */
1581 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1582 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1583 pSurface->pBackendSurface = pBackendSurface;
1584 pSurface->idAssociatedContext = pDXContext->cid;
1585 pSurface->fDirty = true;
1586 return VINF_SUCCESS;
1587 }
1588
1589 /* Failure. */
1590 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1591 RTMemFree(pBackendSurface);
1592 return VERR_NO_MEMORY;
1593}
1594
1595
1596static HRESULT dxCreateConstantBuffer(DXDEVICE *pDevice, VMSVGA3DSURFACE const *pSurface, PVMSVGA3DBACKENDSURFACE pBackendSurface)
1597{
1598 D3D11_SUBRESOURCE_DATA *pInitialData = NULL; /** @todo */
1599 D3D11_BUFFER_DESC bd;
1600 RT_ZERO(bd);
1601 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1602 bd.Usage = D3D11_USAGE_DYNAMIC; /** @todo HINT_STATIC */
1603 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
1604 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1605 bd.MiscFlags = 0;
1606 bd.StructureByteStride = 0;
1607
1608 return pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.Buffer.pBuffer);
1609}
1610
1611
1612static HRESULT dxCreateBuffer(DXDEVICE *pDevice, VMSVGA3DSURFACE const *pSurface, PVMSVGA3DBACKENDSURFACE pBackendSurface)
1613{
1614 D3D11_SUBRESOURCE_DATA *pInitialData = NULL; /** @todo */
1615 D3D11_BUFFER_DESC bd;
1616 RT_ZERO(bd);
1617 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1618 bd.Usage = D3D11_USAGE_DYNAMIC; /** @todo HINT_STATIC */
1619 bd.BindFlags = D3D11_BIND_VERTEX_BUFFER
1620 | D3D11_BIND_INDEX_BUFFER;
1621 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1622 bd.MiscFlags = 0;
1623 bd.StructureByteStride = 0;
1624
1625 return pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.Buffer.pBuffer);
1626}
1627
1628
1629static int vmsvga3dBackSurfaceCreate(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1630{
1631 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1632 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1633
1634 if (pSurface->pBackendSurface != NULL)
1635 {
1636 AssertFailed(); /** @todo Should the function not be used like that? */
1637 vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1638 }
1639
1640 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1641 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1642
1643 HRESULT hr;
1644
1645 /*
1646 * Figure out the type of the surface.
1647 */
1648 if (pSurface->surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)
1649 {
1650 hr = dxCreateConstantBuffer(pDevice, pSurface, pBackendSurface);
1651 if (SUCCEEDED(hr))
1652 {
1653 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1654 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1655 }
1656 else
1657 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1658 }
1659 else if (pSurface->surfaceFlags & ( SVGA3D_SURFACE_BIND_VERTEX_BUFFER
1660 | SVGA3D_SURFACE_BIND_INDEX_BUFFER
1661 | SVGA3D_SURFACE_HINT_VERTEXBUFFER
1662 | SVGA3D_SURFACE_HINT_INDEXBUFFER))
1663 {
1664 hr = dxCreateBuffer(pDevice, pSurface, pBackendSurface);
1665 if (SUCCEEDED(hr))
1666 {
1667 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1668 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1669 }
1670 else
1671 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1672 }
1673 else
1674 {
1675 AssertFailed(); /** @todo implement */
1676 hr = E_FAIL;
1677 }
1678
1679 if (SUCCEEDED(hr))
1680 {
1681 /*
1682 * Success.
1683 */
1684 pSurface->pBackendSurface = pBackendSurface;
1685 pSurface->idAssociatedContext = pDXContext->cid;
1686 return VINF_SUCCESS;
1687 }
1688
1689 /* Failure. */
1690 RTMemFree(pBackendSurface);
1691 return VERR_NO_MEMORY;
1692}
1693
1694
1695int vmsvga3dInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
1696{
1697 RT_NOREF(pDevIns, pThis);
1698
1699 PVMSVGA3DSTATE pState = (PVMSVGA3DSTATE)RTMemAllocZ(sizeof(VMSVGA3DSTATE));
1700 AssertReturn(pState, VERR_NO_MEMORY);
1701 pThisCC->svga.p3dState = pState;
1702
1703 PVMSVGA3DBACKEND pBackend = (PVMSVGA3DBACKEND)RTMemAllocZ(sizeof(VMSVGA3DBACKEND));
1704 AssertReturn(pBackend, VERR_NO_MEMORY);
1705 pState->pBackend = pBackend;
1706
1707 int rc = RTLdrLoadSystem("d3d11", /* fNoUnload = */ true, &pBackend->hD3D11);
1708 AssertRC(rc);
1709 if (RT_SUCCESS(rc))
1710 {
1711 rc = RTLdrGetSymbol(pBackend->hD3D11, "D3D11CreateDevice", (void **)&pBackend->pfnD3D11CreateDevice);
1712 AssertRC(rc);
1713 }
1714
1715 rc = RTLdrLoadSystem("D3DCompiler_47", /* fNoUnload = */ true, &pBackend->hD3DCompiler);
1716 AssertRC(rc);
1717 if (RT_SUCCESS(rc))
1718 {
1719 rc = RTLdrGetSymbol(pBackend->hD3DCompiler, "D3DDisassemble", (void **)&pBackend->pfnD3DDisassemble);
1720 AssertRC(rc);
1721 }
1722
1723 return rc;
1724}
1725
1726
1727int vmsvga3dPowerOn(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
1728{
1729 RT_NOREF(pDevIns, pThis);
1730
1731 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1732 AssertReturn(pState, VERR_INVALID_STATE);
1733
1734 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1735 AssertReturn(pBackend, VERR_INVALID_STATE);
1736
1737 int rc = VINF_SUCCESS;
1738
1739 IDXGIAdapter *pAdapter = NULL; /* Default adapter. */
1740 static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
1741 {
1742 /// @todo Requires a Windows 8+ _SDKS: D3D_FEATURE_LEVEL_11_1,
1743 D3D_FEATURE_LEVEL_11_0
1744 };
1745 UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
1746#ifdef DEBUG
1747 Flags |= D3D11_CREATE_DEVICE_DEBUG;
1748#endif
1749
1750 HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
1751 D3D_DRIVER_TYPE_HARDWARE,
1752 NULL,
1753 Flags,
1754 s_aFeatureLevels,
1755 RT_ELEMENTS(s_aFeatureLevels),
1756 D3D11_SDK_VERSION,
1757 &pBackend->pDevice,
1758 &pBackend->FeatureLevel,
1759 &pBackend->pImmediateContext);
1760 if (SUCCEEDED(hr))
1761 {
1762 LogRel(("VMSVGA: Feature level %#x\n", pBackend->FeatureLevel));
1763
1764 IDXGIDevice *pDxgiDevice = 0;
1765 hr = pBackend->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
1766 if (SUCCEEDED(hr))
1767 {
1768 IDXGIAdapter *pDxgiAdapter = 0;
1769 hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
1770 if (SUCCEEDED(hr))
1771 {
1772 hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pBackend->pDxgiFactory);
1773 D3D_RELEASE(pDxgiAdapter);
1774 }
1775
1776 D3D_RELEASE(pDxgiDevice);
1777 }
1778 }
1779
1780 if (FAILED(hr))
1781 rc = VERR_NOT_SUPPORTED;
1782
1783 return rc;
1784}
1785
1786
1787int vmsvga3dTerminate(PVGASTATECC pThisCC)
1788{
1789 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1790 AssertReturn(pState, VERR_INVALID_STATE);
1791
1792 if (pState->pBackend)
1793 {
1794 D3D_RELEASE(pState->pBackend->pDevice);
1795 D3D_RELEASE(pState->pBackend->pImmediateContext);
1796 D3D_RELEASE(pState->pBackend->pDxgiFactory);
1797
1798 RTMemFree(pState->pBackend);
1799 pState->pBackend = NULL;
1800 }
1801
1802 return VINF_SUCCESS;
1803}
1804
1805
1806int vmsvga3dReset(PVGASTATECC pThisCC)
1807{
1808 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1809 AssertReturn(pState, VERR_INVALID_STATE);
1810
1811 /** @todo Cleanup all resources and recreate Device, ImmediateContext etc to be at the same state as after poweron. */
1812
1813 return VINF_SUCCESS;
1814}
1815
1816
1817static int vmsvga3dDrvNotifyDefineScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1818{
1819 /** @todo Such structures must be in VBoxVideo3D.h */
1820 typedef struct VBOX3DNOTIFYDEFINESCREEN
1821 {
1822 VBOX3DNOTIFY Core;
1823 uint32_t cWidth;
1824 uint32_t cHeight;
1825 int32_t xRoot;
1826 int32_t yRoot;
1827 uint32_t fPrimary;
1828 uint32_t cDpi;
1829 } VBOX3DNOTIFYDEFINESCREEN;
1830
1831 VBOX3DNOTIFYDEFINESCREEN n;
1832 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_CREATED;
1833 n.Core.iDisplay = pScreen->idScreen;
1834 n.Core.u32Reserved = 0;
1835 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1836 RT_ZERO(n.Core.au8Data);
1837 n.cWidth = pScreen->cWidth;
1838 n.cHeight = pScreen->cHeight;
1839 n.xRoot = pScreen->xOrigin;
1840 n.yRoot = pScreen->yOrigin;
1841 n.fPrimary = RT_BOOL(pScreen->fuScreen & SVGA_SCREEN_IS_PRIMARY);
1842 n.cDpi = pScreen->cDpi;
1843
1844 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
1845}
1846
1847
1848static int vmsvga3dDrvNotifyDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1849{
1850 VBOX3DNOTIFY n;
1851 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_DESTROYED;
1852 n.iDisplay = pScreen->idScreen;
1853 n.u32Reserved = 0;
1854 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1855 RT_ZERO(n.au8Data);
1856
1857 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
1858}
1859
1860
1861static int vmsvga3dDrvNotifyBindSurface(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, HANDLE hSharedSurface)
1862{
1863 VBOX3DNOTIFY n;
1864 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_BIND_SURFACE;
1865 n.iDisplay = pScreen->idScreen;
1866 n.u32Reserved = 0;
1867 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1868 *(uint64_t *)&n.au8Data[0] = (uint64_t)hSharedSurface;
1869
1870 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
1871}
1872
1873
1874static int vmsvga3dDrvNotifyUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
1875 uint32_t x, uint32_t y, uint32_t w, uint32_t h)
1876{
1877 typedef struct VBOX3DNOTIFYUPDATE
1878 {
1879 VBOX3DNOTIFY Core;
1880 uint32_t x;
1881 uint32_t y;
1882 uint32_t w;
1883 uint32_t h;
1884 } VBOX3DNOTIFYUPDATE;
1885
1886 VBOX3DNOTIFYUPDATE n;
1887 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_UPDATE_END;
1888 n.Core.iDisplay = pScreen->idScreen;
1889 n.Core.u32Reserved = 0;
1890 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1891 RT_ZERO(n.Core.au8Data);
1892 n.x = x;
1893 n.y = y;
1894 n.w = w;
1895 n.h = h;
1896
1897 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
1898}
1899
1900static int vmsvga3dHwScreenCreate(PVMSVGA3DSTATE pState, uint32_t cWidth, uint32_t cHeight, VMSVGAHWSCREEN *p)
1901{
1902 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1903
1904 D3D11_TEXTURE2D_DESC td;
1905 RT_ZERO(td);
1906 td.Width = cWidth;
1907 td.Height = cHeight;
1908 td.MipLevels = 1;
1909 td.ArraySize = 1;
1910 td.Format = DXGI_FORMAT_B8G8R8A8_UNORM;
1911 td.SampleDesc.Count = 1;
1912 td.SampleDesc.Quality = 0;
1913 td.Usage = D3D11_USAGE_DEFAULT;
1914 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1915 td.CPUAccessFlags = 0;
1916 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED_KEYEDMUTEX;
1917
1918 HRESULT hr = pBackend->pDevice->CreateTexture2D(&td, 0, &p->pTexture);
1919 if (SUCCEEDED(hr))
1920 {
1921 /* Get the shared handle. */
1922 hr = p->pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&p->pDxgiResource);
1923 if (SUCCEEDED(hr))
1924 {
1925 hr = p->pDxgiResource->GetSharedHandle(&p->SharedHandle);
1926 if (SUCCEEDED(hr))
1927 hr = p->pTexture->QueryInterface(__uuidof(IDXGIKeyedMutex), (void**)&p->pDXGIKeyedMutex);
1928 }
1929 }
1930
1931 if (SUCCEEDED(hr))
1932 return VINF_SUCCESS;
1933
1934 AssertFailed();
1935 return VERR_NOT_SUPPORTED;
1936}
1937
1938
1939static void vmsvga3dHwScreenDestroy(PVMSVGA3DSTATE pState, VMSVGAHWSCREEN *p)
1940{
1941 RT_NOREF(pState);
1942 D3D_RELEASE(p->pDXGIKeyedMutex);
1943 D3D_RELEASE(p->pDxgiResource);
1944 D3D_RELEASE(p->pTexture);
1945 p->SharedHandle = 0;
1946 p->sidScreenTarget = SVGA_ID_INVALID;
1947}
1948
1949
1950int vmsvga3dBackDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1951{
1952 RT_NOREF(pThis, pThisCC, pScreen);
1953
1954 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: screen %u\n", pScreen->idScreen));
1955
1956 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1957 AssertReturn(pState, VERR_INVALID_STATE);
1958
1959 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1960 AssertReturn(pBackend, VERR_INVALID_STATE);
1961
1962 Assert(pScreen->pHwScreen == NULL);
1963
1964 VMSVGAHWSCREEN *p = (VMSVGAHWSCREEN *)RTMemAllocZ(sizeof(VMSVGAHWSCREEN));
1965 AssertPtrReturn(p, VERR_NO_MEMORY);
1966
1967 p->sidScreenTarget = SVGA_ID_INVALID;
1968
1969 int rc = vmsvga3dDrvNotifyDefineScreen(pThisCC, pScreen);
1970 if (RT_SUCCESS(rc))
1971 {
1972 /* The frontend supports the screen. Create the actual resource. */
1973 rc = vmsvga3dHwScreenCreate(pState, pScreen->cWidth, pScreen->cHeight, p);
1974 if (RT_SUCCESS(rc))
1975 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: created\n"));
1976 }
1977
1978 if (RT_SUCCESS(rc))
1979 {
1980 LogRel(("VMSVGA: Using HW accelerated screen %u\n", pScreen->idScreen));
1981 pScreen->pHwScreen = p;
1982 }
1983 else
1984 {
1985 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: %Rrc\n", rc));
1986 vmsvga3dHwScreenDestroy(pState, p);
1987 RTMemFree(p);
1988 }
1989
1990 return rc;
1991}
1992
1993
1994int vmsvga3dBackDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1995{
1996 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1997 AssertReturn(pState, VERR_INVALID_STATE);
1998
1999 vmsvga3dDrvNotifyDestroyScreen(pThisCC, pScreen);
2000
2001 if (pScreen->pHwScreen)
2002 {
2003 vmsvga3dHwScreenDestroy(pState, pScreen->pHwScreen);
2004 RTMemFree(pScreen->pHwScreen);
2005 pScreen->pHwScreen = NULL;
2006 }
2007
2008 return VINF_SUCCESS;
2009}
2010
2011
2012int vmsvga3dBackSurfaceBlitToScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
2013 SVGASignedRect destRect, SVGA3dSurfaceImageId srcImage,
2014 SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *paRects)
2015{
2016 RT_NOREF(pThisCC, pScreen, destRect, srcImage, srcRect, cRects, paRects);
2017
2018 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2019 AssertReturn(pState, VERR_INVALID_STATE);
2020
2021 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2022 AssertReturn(pBackend, VERR_INVALID_STATE);
2023
2024 VMSVGAHWSCREEN *p = pScreen->pHwScreen;
2025 AssertReturn(p, VERR_NOT_SUPPORTED);
2026
2027 PVMSVGA3DSURFACE pSurface;
2028 int rc = vmsvga3dSurfaceFromSid(pState, srcImage.sid, &pSurface);
2029 AssertRCReturn(rc, rc);
2030
2031 /** @todo Implement. */
2032 AssertFailed();
2033 return VERR_NOT_IMPLEMENTED;
2034}
2035
2036
2037static DECLCALLBACK(int) vmsvga3dSurfaceMap(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dSurfaceImageId const *pImage, SVGA3dBox const *pBox,
2038 VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
2039{
2040 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2041 AssertReturn(pState, VERR_INVALID_STATE);
2042
2043 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2044 AssertReturn(pBackend, VERR_INVALID_STATE);
2045 AssertReturn(pBackend->pImmediateContext, VERR_INVALID_STATE);
2046
2047 PVMSVGA3DSURFACE pSurface;
2048 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
2049 AssertRCReturn(rc, rc);
2050
2051 PVMSVGA3DDXCONTEXT pDXContext;
2052 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2053 if (!pBackendSurface)
2054 {
2055 /* This means that the guest uploads new data to the surface.
2056 * So the data should be copied either to a host memory buffer,
2057 * or to the actual surface.
2058 * In the latter case the BackendSurface must be created here.
2059 */
2060 rc = vmsvga3dDXContextFromCid(pState, idDXContext, &pDXContext);
2061 AssertRCReturn(rc, rc);
2062
2063 rc = vmsvga3dBackSurfaceCreate(pState, pDXContext, pSurface);
2064 AssertRCReturn(rc, rc);
2065
2066 pBackendSurface = pSurface->pBackendSurface;
2067 }
2068 else
2069 vmsvga3dDXContextFromCid(pState, pSurface->idAssociatedContext, &pDXContext);
2070
2071 Assert(pImage->face == 0 && pImage->mipmap == 0); /** @todo implement. */
2072
2073 DXDEVICE *pDevice = NULL;
2074 if (pDXContext)
2075 {
2076 pDevice = &pDXContext->pBackendDXContext->device;
2077 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2078 }
2079
2080 SVGA3dBox clipBox;
2081 if (pBox)
2082 {
2083 clipBox = *pBox;
2084 vmsvgaR3ClipBox(&pSurface->paMipmapLevels[0].mipmapSize, &clipBox);
2085 ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
2086 }
2087 else
2088 {
2089 clipBox.x = 0;
2090 clipBox.y = 0;
2091 clipBox.z = 0;
2092 clipBox.w = pSurface->paMipmapLevels[0].mipmapSize.width;
2093 clipBox.h = pSurface->paMipmapLevels[0].mipmapSize.height;
2094 clipBox.d = pSurface->paMipmapLevels[0].mipmapSize.depth;
2095 }
2096
2097 /** @todo D3D11_MAP_WRITE does not work with D3D11_USAGE_DYNAMIC resources. Probably VMSVGA3D_SURFACE_MAP_WRITE is not necessary. */
2098 D3D11_MAP d3d11MapType;
2099 switch (enmMapType)
2100 {
2101 case VMSVGA3D_SURFACE_MAP_READ: d3d11MapType = D3D11_MAP_READ; break;
2102 case VMSVGA3D_SURFACE_MAP_WRITE: d3d11MapType = D3D11_MAP_WRITE; break;
2103 case VMSVGA3D_SURFACE_MAP_READ_WRITE: d3d11MapType = D3D11_MAP_READ_WRITE; break;
2104 case VMSVGA3D_SURFACE_MAP_WRITE_DISCARD: d3d11MapType = D3D11_MAP_WRITE_DISCARD; break;
2105 default:
2106 AssertFailed();
2107 return VERR_INVALID_PARAMETER;
2108 }
2109
2110 D3D11_MAPPED_SUBRESOURCE mappedResource;
2111 RT_ZERO(mappedResource);
2112
2113 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
2114 {
2115 ID3D11Texture2D *pMappedTexture;
2116 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2117 {
2118 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
2119
2120 /* Copy the texture content to the staging texture. */
2121 pBackend->pImmediateContext->CopyResource(pBackendSurface->u.ScreenTarget.pStagingTexture, pBackendSurface->u.ScreenTarget.pTexture);
2122 }
2123 else
2124 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2125
2126 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2127 HRESULT hr = pBackend->pImmediateContext->Map(pMappedTexture, Subresource,
2128 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
2129 if (SUCCEEDED(hr))
2130 {
2131 pMap->enmMapType = enmMapType;
2132 pMap->box = clipBox;
2133 pMap->cbPixel = pSurface->cbBlock;
2134 pMap->cbRowPitch = mappedResource.RowPitch;
2135 pMap->cbDepthPitch = mappedResource.DepthPitch;
2136 pMap->pvData = (uint8_t *)mappedResource.pData
2137 + pMap->box.x * pMap->cbPixel
2138 + pMap->box.y * pMap->cbRowPitch
2139 + pMap->box.z * pMap->cbDepthPitch;
2140 }
2141 else
2142 rc = VERR_NOT_SUPPORTED;
2143 }
2144 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
2145 {
2146 AssertReturn(pDevice && pDevice->pDevice, VERR_INTERNAL_ERROR);
2147
2148 ID3D11Texture2D *pMappedTexture;
2149 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2150 {
2151 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
2152
2153 /* Copy the texture content to the staging texture. */
2154 pDevice->pImmediateContext->CopyResource(pBackendSurface->u.ScreenTarget.pStagingTexture, pBackendSurface->u.ScreenTarget.pTexture);
2155 }
2156 else
2157 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2158
2159 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2160 HRESULT hr = pDevice->pImmediateContext->Map(pMappedTexture, Subresource,
2161 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
2162 if (SUCCEEDED(hr))
2163 {
2164 pMap->enmMapType = enmMapType;
2165 pMap->box = clipBox;
2166 pMap->cbPixel = pSurface->cbBlock;
2167 pMap->cbRowPitch = mappedResource.RowPitch;
2168 pMap->cbDepthPitch = mappedResource.DepthPitch;
2169 pMap->pvData = (uint8_t *)mappedResource.pData
2170 + pMap->box.x * pMap->cbPixel
2171 + pMap->box.y * pMap->cbRowPitch
2172 + pMap->box.z * pMap->cbDepthPitch;
2173 }
2174 else
2175 rc = VERR_NOT_SUPPORTED;
2176 }
2177 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
2178 {
2179 UINT const Subresource = 0; /* Buffers have only one subresource. */
2180 HRESULT hr = pDevice->pImmediateContext->Map(pSurface->pBackendSurface->u.Buffer.pBuffer, Subresource,
2181 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
2182 if (SUCCEEDED(hr))
2183 {
2184 pMap->enmMapType = enmMapType;
2185 pMap->box = clipBox;
2186 pMap->cbPixel = pSurface->cbBlock;
2187 pMap->cbRowPitch = mappedResource.RowPitch;
2188 pMap->cbDepthPitch = mappedResource.DepthPitch;
2189 pMap->pvData = (uint8_t *)mappedResource.pData
2190 + pMap->box.x * pMap->cbPixel
2191 + pMap->box.y * pMap->cbRowPitch
2192 + pMap->box.z * pMap->cbDepthPitch;
2193 }
2194 else
2195 rc = VERR_NOT_SUPPORTED;
2196 }
2197 else
2198 {
2199 // UINT D3D11CalcSubresource(UINT MipSlice, UINT ArraySlice, UINT MipLevels);
2200 /** @todo Implement. */
2201 AssertFailed();
2202 rc = VERR_NOT_IMPLEMENTED;
2203 }
2204
2205 return rc;
2206}
2207
2208
2209static DECLCALLBACK(int) vmsvga3dSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, VMSVGA3D_MAPPED_SURFACE *pMap, bool fWritten)
2210{
2211 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2212 AssertReturn(pState, VERR_INVALID_STATE);
2213
2214 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2215 AssertReturn(pBackend, VERR_INVALID_STATE);
2216 AssertReturn(pBackend->pImmediateContext, VERR_INVALID_STATE);
2217
2218 PVMSVGA3DSURFACE pSurface;
2219 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
2220 AssertRCReturn(rc, rc);
2221
2222 /* The called should not use the function for system memory surfaces. */
2223 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2224 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
2225
2226 PVMSVGA3DDXCONTEXT pDXContext;
2227 vmsvga3dDXContextFromCid(pState, pSurface->idAssociatedContext, &pDXContext);
2228
2229 DXDEVICE *pDevice = NULL;
2230 if (pDXContext)
2231 {
2232 pDevice = &pDXContext->pBackendDXContext->device;
2233 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2234 }
2235
2236 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
2237 {
2238 ID3D11Texture2D *pMappedTexture;
2239 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2240 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
2241 else
2242 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2243
2244 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2245 pBackend->pImmediateContext->Unmap(pMappedTexture, Subresource);
2246
2247 if ( fWritten
2248 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
2249 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
2250 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
2251 {
2252 ID3D11Resource *pDstResource = pBackendSurface->u.ScreenTarget.pTexture;
2253 UINT DstSubresource = Subresource;
2254 UINT DstX = pMap->box.x;
2255 UINT DstY = pMap->box.y;
2256 UINT DstZ = pMap->box.z;
2257 ID3D11Resource *pSrcResource = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2258 UINT SrcSubresource = Subresource;
2259 D3D11_BOX SrcBox;
2260 SrcBox.left = pMap->box.x;
2261 SrcBox.top = pMap->box.y;
2262 SrcBox.front = pMap->box.z;
2263 SrcBox.right = pMap->box.x + pMap->box.w;
2264 SrcBox.bottom = pMap->box.y + pMap->box.h;
2265 SrcBox.back = pMap->box.z + pMap->box.d;
2266 pBackend->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
2267 pSrcResource, SrcSubresource, &SrcBox);
2268 }
2269 }
2270 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
2271 {
2272 AssertReturn(pDevice && pDevice->pDevice, VERR_INTERNAL_ERROR);
2273
2274 ID3D11Texture2D *pMappedTexture;
2275 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2276 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
2277 else
2278 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2279
2280 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2281 pDevice->pImmediateContext->Unmap(pMappedTexture, Subresource);
2282
2283 if ( fWritten
2284 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
2285 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
2286 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
2287 {
2288 ID3D11Resource *pDstResource = pBackendSurface->u.ScreenTarget.pTexture;
2289 UINT DstSubresource = Subresource;
2290 UINT DstX = pMap->box.x;
2291 UINT DstY = pMap->box.y;
2292 UINT DstZ = pMap->box.z;
2293 ID3D11Resource *pSrcResource = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2294 UINT SrcSubresource = Subresource;
2295 D3D11_BOX SrcBox;
2296 SrcBox.left = pMap->box.x;
2297 SrcBox.top = pMap->box.y;
2298 SrcBox.front = pMap->box.z;
2299 SrcBox.right = pMap->box.x + pMap->box.w;
2300 SrcBox.bottom = pMap->box.y + pMap->box.h;
2301 SrcBox.back = pMap->box.z + pMap->box.d;
2302 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
2303 pSrcResource, SrcSubresource, &SrcBox);
2304 }
2305 }
2306 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
2307 {
2308 UINT const Subresource = 0; /* Buffers have only one subresource. */
2309 pDevice->pImmediateContext->Unmap(pBackendSurface->u.Buffer.pBuffer, Subresource);
2310 }
2311 else
2312 {
2313 AssertFailed();
2314 rc = VERR_NOT_IMPLEMENTED;
2315 }
2316
2317 return rc;
2318}
2319
2320
2321static DECLCALLBACK(int) vmsvga3dScreenTargetBind(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, uint32_t sid)
2322{
2323 int rc = VINF_SUCCESS;
2324
2325 PVMSVGA3DSURFACE pSurface;
2326 if (sid != SVGA_ID_INVALID)
2327 {
2328 /* Create the surface if does not yet exist. */
2329 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2330 AssertReturn(pState, VERR_INVALID_STATE);
2331
2332 rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
2333 AssertRCReturn(rc, rc);
2334
2335 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
2336 {
2337 /* Create the actual texture. */
2338 rc = vmsvga3dBackSurfaceCreateScreenTarget(pState, pSurface);
2339 AssertRCReturn(rc, rc);
2340 }
2341 }
2342 else
2343 pSurface = NULL;
2344
2345 /* Notify the HW accelerated screen if it is used. */
2346 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
2347 if (!pHwScreen)
2348 return VINF_SUCCESS;
2349
2350 /* Same surface -> do nothing. */
2351 if (pHwScreen->sidScreenTarget == sid)
2352 return VINF_SUCCESS;
2353
2354 if (sid != SVGA_ID_INVALID)
2355 {
2356 AssertReturn( pSurface->pBackendSurface
2357 && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
2358
2359 HANDLE const hSharedSurface = pHwScreen->SharedHandle;
2360 rc = vmsvga3dDrvNotifyBindSurface(pThisCC, pScreen, hSharedSurface);
2361 }
2362
2363 if (RT_SUCCESS(rc))
2364 {
2365 pHwScreen->sidScreenTarget = sid;
2366 }
2367
2368 return rc;
2369}
2370
2371
2372static DECLCALLBACK(int) vmsvga3dScreenTargetUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, SVGA3dRect const *pRect)
2373{
2374 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
2375 AssertReturn(pHwScreen, VERR_NOT_SUPPORTED);
2376
2377 if (pHwScreen->sidScreenTarget == SVGA_ID_INVALID)
2378 return VINF_SUCCESS; /* No surface bound. */
2379
2380 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2381 AssertReturn(pState, VERR_INVALID_STATE);
2382
2383 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2384 AssertReturn(pBackend, VERR_INVALID_STATE);
2385
2386 PVMSVGA3DSURFACE pSurface;
2387 int rc = vmsvga3dSurfaceFromSid(pState, pHwScreen->sidScreenTarget, &pSurface);
2388 AssertRCReturn(rc, rc);
2389
2390 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2391 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
2392
2393 SVGA3dRect boundRect;
2394 boundRect.x = 0;
2395 boundRect.y = 0;
2396 boundRect.w = pSurface->paMipmapLevels[0].mipmapSize.width;
2397 boundRect.h = pSurface->paMipmapLevels[0].mipmapSize.height;
2398 SVGA3dRect clipRect = *pRect;
2399 vmsvgaR3Clip3dRect(&boundRect, &clipRect);
2400 ASSERT_GUEST_RETURN(clipRect.w && clipRect.h, VERR_INVALID_PARAMETER);
2401
2402 /* Copy the screen texture to the shared surface. */
2403 DWORD result = pHwScreen->pDXGIKeyedMutex->AcquireSync(0, 10000);
2404 if (result == WAIT_OBJECT_0)
2405 {
2406 ID3D11Query *pQuery = 0;
2407 D3D11_QUERY_DESC qd;
2408 RT_ZERO(qd);
2409 qd.Query = D3D11_QUERY_EVENT;
2410 HRESULT hr2 = pBackend->pDevice->CreateQuery(&qd, &pQuery);
2411 Assert(hr2 == S_OK); RT_NOREF(hr2);
2412
2413 pBackend->pImmediateContext->CopyResource(pHwScreen->pTexture, pBackendSurface->u.ScreenTarget.pTexture);
2414
2415 pBackend->pImmediateContext->Flush();
2416
2417 pBackend->pImmediateContext->End(pQuery);
2418
2419 BOOL queryData;
2420 while (pBackend->pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
2421 {
2422 RTThreadYield();
2423 }
2424 D3D_RELEASE(pQuery);
2425
2426 result = pHwScreen->pDXGIKeyedMutex->ReleaseSync(1);
2427 }
2428 else
2429 AssertFailed();
2430
2431 rc = vmsvga3dDrvNotifyUpdate(pThisCC, pScreen, pRect->x, pRect->y, pRect->w, pRect->h);
2432 return rc;
2433}
2434
2435
2436void vmsvga3dUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
2437{
2438 RT_NOREF(pThisCC, idScreen, pOldViewport);
2439 /** @todo Scroll the screen content without requiring the guest to redraw. */
2440}
2441
2442
2443int vmsvga3dQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
2444{
2445 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2446 AssertReturn(pState, VERR_INVALID_STATE);
2447
2448 int rc = VINF_SUCCESS;
2449
2450 *pu32Val = 0;
2451
2452 if (idx3dCaps > SVGA3D_DEVCAP_MAX)
2453 {
2454 LogRelMax(16, ("VMSVGA: unsupported SVGA3D_DEVCAP %d\n", idx3dCaps));
2455 return VERR_NOT_SUPPORTED;
2456 }
2457
2458 /* Most values are taken from:
2459 * https://docs.microsoft.com/en-us/windows/win32/direct3d11/overviews-direct3d-11-devices-downlevel-intro
2460 *
2461 * Shader values are from
2462 * https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-models
2463 */
2464
2465 switch (idx3dCaps)
2466 {
2467 case SVGA3D_DEVCAP_3D:
2468 *pu32Val = 1;
2469 break;
2470
2471 case SVGA3D_DEVCAP_MAX_LIGHTS:
2472 *pu32Val = SVGA3D_NUM_LIGHTS; /* VGPU9. Not applicable to DX11. */
2473 break;
2474
2475 case SVGA3D_DEVCAP_MAX_TEXTURES:
2476 *pu32Val = SVGA3D_NUM_TEXTURE_UNITS; /* VGPU9. Not applicable to DX11. */
2477 break;
2478
2479 case SVGA3D_DEVCAP_MAX_CLIP_PLANES:
2480 *pu32Val = SVGA3D_NUM_CLIPPLANES;
2481 break;
2482
2483 case SVGA3D_DEVCAP_VERTEX_SHADER_VERSION:
2484 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2485 *pu32Val = SVGA3DVSVERSION_40;
2486 else
2487 *pu32Val = SVGA3DVSVERSION_30;
2488 break;
2489
2490 case SVGA3D_DEVCAP_VERTEX_SHADER:
2491 *pu32Val = 1;
2492 break;
2493
2494 case SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION:
2495 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2496 *pu32Val = SVGA3DPSVERSION_40;
2497 else
2498 *pu32Val = SVGA3DPSVERSION_30;
2499 break;
2500
2501 case SVGA3D_DEVCAP_FRAGMENT_SHADER:
2502 *pu32Val = 1;
2503 break;
2504
2505 case SVGA3D_DEVCAP_MAX_RENDER_TARGETS:
2506 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2507 *pu32Val = 8;
2508 else
2509 *pu32Val = 4;
2510 break;
2511
2512 case SVGA3D_DEVCAP_S23E8_TEXTURES:
2513 case SVGA3D_DEVCAP_S10E5_TEXTURES:
2514 /* Must be obsolete by now; surface format caps specify the same thing. */
2515 break;
2516
2517 case SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND:
2518 /* Obsolete */
2519 break;
2520
2521 /*
2522 * 2. The BUFFER_FORMAT capabilities are deprecated, and they always
2523 * return TRUE. Even on physical hardware that does not support
2524 * these formats natively, the SVGA3D device will provide an emulation
2525 * which should be invisible to the guest OS.
2526 */
2527 case SVGA3D_DEVCAP_D16_BUFFER_FORMAT:
2528 case SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT:
2529 case SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT:
2530 *pu32Val = 1;
2531 break;
2532
2533 case SVGA3D_DEVCAP_QUERY_TYPES:
2534 /* Obsolete */
2535 break;
2536
2537 case SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING:
2538 /* Obsolete */
2539 break;
2540
2541 case SVGA3D_DEVCAP_MAX_POINT_SIZE:
2542 AssertCompile(sizeof(uint32_t) == sizeof(float));
2543 *(float *)pu32Val = 256.0f; /* VGPU9. Not applicable to DX11. */
2544 break;
2545
2546 case SVGA3D_DEVCAP_MAX_SHADER_TEXTURES:
2547 /* Obsolete */
2548 break;
2549
2550 case SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH:
2551 case SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT:
2552 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
2553 *pu32Val = 16384;
2554 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2555 *pu32Val = 8192;
2556 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
2557 *pu32Val = 4096;
2558 else
2559 *pu32Val = 2048;
2560 break;
2561
2562 case SVGA3D_DEVCAP_MAX_VOLUME_EXTENT:
2563 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2564 *pu32Val = 2048;
2565 else
2566 *pu32Val = 256;
2567 break;
2568
2569 case SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT:
2570 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
2571 *pu32Val = 16384;
2572 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
2573 *pu32Val = 8192;
2574 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2575 *pu32Val = 2048;
2576 else
2577 *pu32Val = 128;
2578 break;
2579
2580 case SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO:
2581 /* Obsolete */
2582 break;
2583
2584 case SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY:
2585 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2586 *pu32Val = D3D11_REQ_MAXANISOTROPY;
2587 else
2588 *pu32Val = 2; // D3D_FL9_1_DEFAULT_MAX_ANISOTROPY;
2589 break;
2590
2591 case SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT:
2592 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2593 *pu32Val = UINT32_MAX;
2594 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2595 *pu32Val = 1048575; // D3D_FL9_2_IA_PRIMITIVE_MAX_COUNT;
2596 else
2597 *pu32Val = 65535; // D3D_FL9_1_IA_PRIMITIVE_MAX_COUNT;
2598 break;
2599
2600 case SVGA3D_DEVCAP_MAX_VERTEX_INDEX:
2601 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2602 *pu32Val = UINT32_MAX;
2603 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2604 *pu32Val = 1048575;
2605 else
2606 *pu32Val = 65534;
2607 break;
2608
2609 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS:
2610 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2611 *pu32Val = UINT32_MAX;
2612 else
2613 *pu32Val = 512;
2614 break;
2615
2616 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS:
2617 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2618 *pu32Val = UINT32_MAX;
2619 else
2620 *pu32Val = 512;
2621 break;
2622
2623 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS:
2624 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2625 *pu32Val = 4096;
2626 else
2627 *pu32Val = 32;
2628 break;
2629
2630 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS:
2631 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2632 *pu32Val = 4096;
2633 else
2634 *pu32Val = 32;
2635 break;
2636
2637 case SVGA3D_DEVCAP_TEXTURE_OPS:
2638 /* Obsolete */
2639 break;
2640
2641 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8:
2642 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8:
2643 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10:
2644 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5:
2645 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5:
2646 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4:
2647 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5:
2648 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16:
2649 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8:
2650 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8:
2651 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8:
2652 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16:
2653 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8:
2654 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8:
2655 case SVGA3D_DEVCAP_SURFACEFMT_DXT1:
2656 case SVGA3D_DEVCAP_SURFACEFMT_DXT2:
2657 case SVGA3D_DEVCAP_SURFACEFMT_DXT3:
2658 case SVGA3D_DEVCAP_SURFACEFMT_DXT4:
2659 case SVGA3D_DEVCAP_SURFACEFMT_DXT5:
2660 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8:
2661 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10:
2662 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8:
2663 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8:
2664 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8:
2665 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5:
2666 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8:
2667 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5:
2668 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8:
2669 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5:
2670 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8:
2671 case SVGA3D_DEVCAP_SURFACEFMT_V16U16:
2672 case SVGA3D_DEVCAP_SURFACEFMT_G16R16:
2673 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16:
2674 case SVGA3D_DEVCAP_SURFACEFMT_UYVY:
2675 case SVGA3D_DEVCAP_SURFACEFMT_YUY2:
2676 case SVGA3D_DEVCAP_SURFACEFMT_NV12:
2677 case SVGA3D_DEVCAP_DEAD10: /* SVGA3D_DEVCAP_SURFACEFMT_AYUV */
2678 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16:
2679 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24:
2680 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT:
2681 case SVGA3D_DEVCAP_SURFACEFMT_ATI1:
2682 case SVGA3D_DEVCAP_SURFACEFMT_ATI2:
2683 case SVGA3D_DEVCAP_SURFACEFMT_YV12:
2684 {
2685 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapSurfaceFmt2Format(idx3dCaps);
2686 rc = vmsvgaDXCheckFormatSupportPreDX(pState, enmFormat, pu32Val);
2687 break;
2688 }
2689
2690 case SVGA3D_DEVCAP_MISSING62:
2691 /* Unused */
2692 break;
2693
2694 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES:
2695 /* Obsolete */
2696 break;
2697
2698 case SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS:
2699 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2700 *pu32Val = 8;
2701 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
2702 *pu32Val = 4; // D3D_FL9_3_SIMULTANEOUS_RENDER_TARGET_COUNT
2703 else
2704 *pu32Val = 1; // D3D_FL9_1_SIMULTANEOUS_RENDER_TARGET_COUNT
2705 break;
2706
2707 case SVGA3D_DEVCAP_DEAD4: /* SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES */
2708 case SVGA3D_DEVCAP_DEAD5: /* SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES */
2709 *pu32Val = (1 << (2-1)) | (1 << (4-1)) | (1 << (8-1)); /* 2x, 4x, 8x */
2710 break;
2711
2712 case SVGA3D_DEVCAP_DEAD7: /* SVGA3D_DEVCAP_ALPHATOCOVERAGE */
2713 /* Obsolete */
2714 break;
2715
2716 case SVGA3D_DEVCAP_DEAD6: /* SVGA3D_DEVCAP_SUPERSAMPLE */
2717 /* Obsolete */
2718 break;
2719
2720 case SVGA3D_DEVCAP_AUTOGENMIPMAPS:
2721 *pu32Val = 1;
2722 break;
2723
2724 case SVGA3D_DEVCAP_MAX_CONTEXT_IDS:
2725 *pu32Val = SVGA3D_MAX_CONTEXT_IDS;
2726 break;
2727
2728 case SVGA3D_DEVCAP_MAX_SURFACE_IDS:
2729 *pu32Val = SVGA3D_MAX_SURFACE_IDS;
2730 break;
2731
2732 case SVGA3D_DEVCAP_DEAD1:
2733 /* Obsolete */
2734 break;
2735
2736 case SVGA3D_DEVCAP_DEAD8: /* SVGA3D_DEVCAP_VIDEO_DECODE */
2737 /* Obsolete */
2738 break;
2739
2740 case SVGA3D_DEVCAP_DEAD9: /* SVGA3D_DEVCAP_VIDEO_PROCESS */
2741 /* Obsolete */
2742 break;
2743
2744 case SVGA3D_DEVCAP_LINE_AA:
2745 *pu32Val = 1;
2746 break;
2747
2748 case SVGA3D_DEVCAP_LINE_STIPPLE:
2749 *pu32Val = 0; /* DX11 does not seem to support this directly. */
2750 break;
2751
2752 case SVGA3D_DEVCAP_MAX_LINE_WIDTH:
2753 AssertCompile(sizeof(uint32_t) == sizeof(float));
2754 *(float *)pu32Val = 1.0f;
2755 break;
2756
2757 case SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH:
2758 AssertCompile(sizeof(uint32_t) == sizeof(float));
2759 *(float *)pu32Val = 1.0f;
2760 break;
2761
2762 case SVGA3D_DEVCAP_DEAD3: /* Old SVGA3D_DEVCAP_LOGICOPS */
2763 /* Deprecated. */
2764 AssertCompile(SVGA3D_DEVCAP_DEAD3 == 92); /* Newer SVGA headers redefine this. */
2765 break;
2766
2767 case SVGA3D_DEVCAP_TS_COLOR_KEY:
2768 *pu32Val = 0; /* DX11 does not seem to support this directly. */
2769 break;
2770
2771 case SVGA3D_DEVCAP_DEAD2:
2772 break;
2773
2774 case SVGA3D_DEVCAP_DXCONTEXT:
2775 *pu32Val = 1;
2776 break;
2777
2778 case SVGA3D_DEVCAP_DEAD11: /* SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE */
2779 *pu32Val = D3D11_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION;
2780 break;
2781
2782 case SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS:
2783 *pu32Val = D3D11_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT;
2784 break;
2785
2786 case SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS:
2787 *pu32Val = D3D11_COMMONSHADER_CONSTANT_BUFFER_HW_SLOT_COUNT;
2788 break;
2789
2790 case SVGA3D_DEVCAP_DX_PROVOKING_VERTEX:
2791 *pu32Val = 0; /* boolean */
2792 break;
2793
2794 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8:
2795 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8:
2796 case SVGA3D_DEVCAP_DXFMT_R5G6B5:
2797 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5:
2798 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5:
2799 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4:
2800 case SVGA3D_DEVCAP_DXFMT_Z_D32:
2801 case SVGA3D_DEVCAP_DXFMT_Z_D16:
2802 case SVGA3D_DEVCAP_DXFMT_Z_D24S8:
2803 case SVGA3D_DEVCAP_DXFMT_Z_D15S1:
2804 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8:
2805 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4:
2806 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16:
2807 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8:
2808 case SVGA3D_DEVCAP_DXFMT_DXT1:
2809 case SVGA3D_DEVCAP_DXFMT_DXT2:
2810 case SVGA3D_DEVCAP_DXFMT_DXT3:
2811 case SVGA3D_DEVCAP_DXFMT_DXT4:
2812 case SVGA3D_DEVCAP_DXFMT_DXT5:
2813 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8:
2814 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5:
2815 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8:
2816 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1:
2817 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5:
2818 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8:
2819 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10:
2820 case SVGA3D_DEVCAP_DXFMT_V8U8:
2821 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8:
2822 case SVGA3D_DEVCAP_DXFMT_CxV8U8:
2823 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8:
2824 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10:
2825 case SVGA3D_DEVCAP_DXFMT_ALPHA8:
2826 case SVGA3D_DEVCAP_DXFMT_R_S10E5:
2827 case SVGA3D_DEVCAP_DXFMT_R_S23E8:
2828 case SVGA3D_DEVCAP_DXFMT_RG_S10E5:
2829 case SVGA3D_DEVCAP_DXFMT_RG_S23E8:
2830 case SVGA3D_DEVCAP_DXFMT_BUFFER:
2831 case SVGA3D_DEVCAP_DXFMT_Z_D24X8:
2832 case SVGA3D_DEVCAP_DXFMT_V16U16:
2833 case SVGA3D_DEVCAP_DXFMT_G16R16:
2834 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16:
2835 case SVGA3D_DEVCAP_DXFMT_UYVY:
2836 case SVGA3D_DEVCAP_DXFMT_YUY2:
2837 case SVGA3D_DEVCAP_DXFMT_NV12:
2838 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: /* SVGA3D_DEVCAP_DXFMT_AYUV */
2839 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS:
2840 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT:
2841 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT:
2842 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS:
2843 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT:
2844 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT:
2845 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT:
2846 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS:
2847 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT:
2848 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM:
2849 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT:
2850 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS:
2851 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT:
2852 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT:
2853 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS:
2854 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT:
2855 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24:
2856 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT:
2857 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS:
2858 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT:
2859 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT:
2860 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS:
2861 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM:
2862 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB:
2863 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT:
2864 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT:
2865 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS:
2866 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT:
2867 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT:
2868 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS:
2869 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT:
2870 case SVGA3D_DEVCAP_DXFMT_R32_UINT:
2871 case SVGA3D_DEVCAP_DXFMT_R32_SINT:
2872 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS:
2873 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT:
2874 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8:
2875 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT:
2876 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS:
2877 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM:
2878 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT:
2879 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT:
2880 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS:
2881 case SVGA3D_DEVCAP_DXFMT_R16_UNORM:
2882 case SVGA3D_DEVCAP_DXFMT_R16_UINT:
2883 case SVGA3D_DEVCAP_DXFMT_R16_SNORM:
2884 case SVGA3D_DEVCAP_DXFMT_R16_SINT:
2885 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS:
2886 case SVGA3D_DEVCAP_DXFMT_R8_UNORM:
2887 case SVGA3D_DEVCAP_DXFMT_R8_UINT:
2888 case SVGA3D_DEVCAP_DXFMT_R8_SNORM:
2889 case SVGA3D_DEVCAP_DXFMT_R8_SINT:
2890 case SVGA3D_DEVCAP_DXFMT_P8:
2891 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP:
2892 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM:
2893 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM:
2894 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS:
2895 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB:
2896 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS:
2897 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB:
2898 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS:
2899 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB:
2900 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS:
2901 case SVGA3D_DEVCAP_DXFMT_ATI1:
2902 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM:
2903 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS:
2904 case SVGA3D_DEVCAP_DXFMT_ATI2:
2905 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM:
2906 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM:
2907 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS:
2908 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB:
2909 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS:
2910 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB:
2911 case SVGA3D_DEVCAP_DXFMT_Z_DF16:
2912 case SVGA3D_DEVCAP_DXFMT_Z_DF24:
2913 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT:
2914 case SVGA3D_DEVCAP_DXFMT_YV12:
2915 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT:
2916 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT:
2917 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM:
2918 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT:
2919 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM:
2920 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM:
2921 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT:
2922 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM:
2923 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM:
2924 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT:
2925 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM:
2926 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT:
2927 case SVGA3D_DEVCAP_DXFMT_D16_UNORM:
2928 case SVGA3D_DEVCAP_DXFMT_A8_UNORM:
2929 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM:
2930 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM:
2931 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM:
2932 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM:
2933 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM:
2934 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM:
2935 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM:
2936 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM:
2937 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM:
2938 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS:
2939 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16:
2940 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16:
2941 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS:
2942 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM:
2943 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB:
2944 {
2945 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapDxfmt2Format(idx3dCaps);
2946 rc = vmsvgaDXCheckFormatSupport(pState, enmFormat, pu32Val);
2947 break;
2948 }
2949
2950 case SVGA3D_DEVCAP_SM41:
2951 *pu32Val = 0; /* boolean */
2952 break;
2953
2954 case SVGA3D_DEVCAP_MULTISAMPLE_2X:
2955 *pu32Val = 0; /* boolean */
2956 break;
2957
2958 case SVGA3D_DEVCAP_MULTISAMPLE_4X:
2959 *pu32Val = 0; /* boolean */
2960 break;
2961
2962 case SVGA3D_DEVCAP_MS_FULL_QUALITY:
2963 *pu32Val = 0; /* boolean */
2964 break;
2965
2966 case SVGA3D_DEVCAP_LOGICOPS:
2967 AssertCompile(SVGA3D_DEVCAP_LOGICOPS == 248);
2968 *pu32Val = 0; /* boolean */
2969 break;
2970
2971 case SVGA3D_DEVCAP_LOGIC_BLENDOPS:
2972 *pu32Val = 0; /* boolean */
2973 break;
2974
2975 case SVGA3D_DEVCAP_RESERVED_1:
2976 break;
2977
2978 case SVGA3D_DEVCAP_RESERVED_2:
2979 break;
2980
2981 case SVGA3D_DEVCAP_SM5:
2982 *pu32Val = 0; /* boolean */
2983 break;
2984
2985 case SVGA3D_DEVCAP_MULTISAMPLE_8X:
2986 *pu32Val = 0; /* boolean */
2987 break;
2988
2989 case SVGA3D_DEVCAP_MAX:
2990 case SVGA3D_DEVCAP_INVALID:
2991 rc = VERR_NOT_SUPPORTED;
2992 break;
2993 }
2994
2995 return rc;
2996}
2997
2998
2999/* Handle resize */
3000int vmsvga3dChangeMode(PVGASTATECC pThisCC)
3001{
3002 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3003 AssertReturn(pState, VERR_INVALID_STATE);
3004
3005 return VINF_SUCCESS;
3006}
3007
3008
3009int vmsvga3dSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src,
3010 uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
3011{
3012 RT_NOREF(dest, src, cCopyBoxes, pBox);
3013
3014 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3015 AssertReturn(pState, VERR_INVALID_STATE);
3016
3017 AssertFailed();
3018 return VERR_NOT_IMPLEMENTED;
3019}
3020
3021
3022/**
3023 * Create a new 3d context
3024 *
3025 * @returns VBox status code.
3026 * @param pThisCC The VGA/VMSVGA state for ring-3.
3027 * @param cid Context id
3028 */
3029int vmsvga3dContextDefine(PVGASTATECC pThisCC, uint32_t cid)
3030{
3031 RT_NOREF(cid);
3032
3033 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3034 AssertReturn(pState, VERR_INVALID_STATE);
3035
3036 AssertFailed();
3037 return VERR_NOT_IMPLEMENTED;
3038}
3039
3040
3041/**
3042 * Destroy an existing 3d context
3043 *
3044 * @returns VBox status code.
3045 * @param pThisCC The VGA/VMSVGA state for ring-3.
3046 * @param cid Context id
3047 */
3048int vmsvga3dContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
3049{
3050 RT_NOREF(cid);
3051
3052 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3053 AssertReturn(pState, VERR_INVALID_STATE);
3054
3055 AssertFailed();
3056 return VINF_SUCCESS;
3057}
3058
3059
3060int vmsvga3dSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
3061{
3062 RT_NOREF(cid, type, matrix);
3063
3064 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3065 AssertReturn(pState, VERR_INVALID_STATE);
3066
3067 AssertFailed();
3068 return VINF_SUCCESS;
3069}
3070
3071
3072int vmsvga3dSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
3073{
3074 RT_NOREF(cid, zRange);
3075
3076 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3077 AssertReturn(pState, VERR_INVALID_STATE);
3078
3079 AssertFailed();
3080 return VINF_SUCCESS;
3081}
3082
3083
3084int vmsvga3dSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
3085{
3086 RT_NOREF(cid, cRenderStates, pRenderState);
3087
3088 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3089 AssertReturn(pState, VERR_INVALID_STATE);
3090
3091 AssertFailed();
3092 return VINF_SUCCESS;
3093}
3094
3095
3096int vmsvga3dSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
3097{
3098 RT_NOREF(cid, type, target);
3099
3100 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3101 AssertReturn(pState, VERR_INVALID_STATE);
3102
3103 AssertFailed();
3104 return VINF_SUCCESS;
3105}
3106
3107
3108int vmsvga3dSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
3109{
3110 RT_NOREF(cid, cTextureStates, pTextureState);
3111
3112 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3113 AssertReturn(pState, VERR_INVALID_STATE);
3114
3115 AssertFailed();
3116 return VINF_SUCCESS;
3117}
3118
3119
3120int vmsvga3dSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
3121{
3122 RT_NOREF(cid, face, pMaterial);
3123
3124 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3125 AssertReturn(pState, VERR_INVALID_STATE);
3126
3127 AssertFailed();
3128 return VINF_SUCCESS;
3129}
3130
3131
3132int vmsvga3dSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
3133{
3134 RT_NOREF(cid, index, pData);
3135
3136 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3137 AssertReturn(pState, VERR_INVALID_STATE);
3138
3139 AssertFailed();
3140 return VINF_SUCCESS;
3141}
3142
3143
3144int vmsvga3dSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
3145{
3146 RT_NOREF(cid, index, enabled);
3147
3148 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3149 AssertReturn(pState, VERR_INVALID_STATE);
3150
3151 AssertFailed();
3152 return VINF_SUCCESS;
3153}
3154
3155
3156int vmsvga3dSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
3157{
3158 RT_NOREF(cid, pRect);
3159
3160 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3161 AssertReturn(pState, VERR_INVALID_STATE);
3162
3163 AssertFailed();
3164 return VINF_SUCCESS;
3165}
3166
3167
3168int vmsvga3dSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
3169{
3170 RT_NOREF(cid, index, plane);
3171
3172 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3173 AssertReturn(pState, VERR_INVALID_STATE);
3174
3175 AssertFailed();
3176 return VINF_SUCCESS;
3177}
3178
3179
3180int vmsvga3dCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth,
3181 uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
3182{
3183 /* From SVGA3D_BeginClear comments:
3184 *
3185 * Clear is not affected by clipping, depth test, or other
3186 * render state which affects the fragment pipeline.
3187 *
3188 * Therefore this code must ignore the current scissor rect.
3189 */
3190
3191 RT_NOREF(cid, clearFlag, color, depth, stencil, cRects, pRect);
3192
3193 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3194 AssertReturn(pState, VERR_INVALID_STATE);
3195
3196 AssertFailed();
3197 return VINF_SUCCESS;
3198}
3199
3200
3201int vmsvga3dDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl,
3202 uint32_t numRanges, SVGA3dPrimitiveRange *pRange,
3203 uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
3204{
3205 RT_NOREF(cid, numVertexDecls, pVertexDecl, numRanges, pRange, cVertexDivisor, pVertexDivisor);
3206
3207 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3208 AssertReturn(pState, VERR_INVALID_STATE);
3209
3210 AssertFailed();
3211 return VINF_SUCCESS;
3212}
3213
3214
3215int vmsvga3dSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
3216{
3217 RT_NOREF(cid, pRect);
3218
3219 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3220 AssertReturn(pState, VERR_INVALID_STATE);
3221
3222 AssertFailed();
3223 return VINF_SUCCESS;
3224}
3225
3226
3227int vmsvga3dGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
3228{
3229 RT_NOREF(sid, filter);
3230
3231 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3232 AssertReturn(pState, VERR_INVALID_STATE);
3233
3234 AssertFailed();
3235 return VINF_SUCCESS;
3236}
3237
3238
3239int vmsvga3dShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type,
3240 uint32_t cbData, uint32_t *pShaderData)
3241{
3242 RT_NOREF(cid, shid, type, cbData, pShaderData);
3243
3244 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3245 AssertReturn(pState, VERR_INVALID_STATE);
3246
3247 AssertFailed();
3248 return VINF_SUCCESS;
3249}
3250
3251
3252int vmsvga3dShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
3253{
3254 RT_NOREF(cid, shid, type);
3255
3256 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3257 AssertReturn(pState, VERR_INVALID_STATE);
3258
3259 AssertFailed();
3260 return VINF_SUCCESS;
3261}
3262
3263
3264int vmsvga3dShaderSet(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
3265{
3266 RT_NOREF(pContext, cid, type, shid);
3267
3268 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3269 AssertReturn(pState, VERR_INVALID_STATE);
3270
3271 AssertFailed();
3272 return VINF_SUCCESS;
3273}
3274
3275
3276int vmsvga3dShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type,
3277 SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
3278{
3279 RT_NOREF(cid, reg, type, ctype, cRegisters, pValues);
3280
3281 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3282 AssertReturn(pState, VERR_INVALID_STATE);
3283
3284 AssertFailed();
3285 return VINF_SUCCESS;
3286}
3287
3288
3289/**
3290 * Destroy backend specific surface bits (part of SVGA_3D_CMD_SURFACE_DESTROY).
3291 *
3292 * @param pState The VMSVGA3d state.
3293 * @param pSurface The surface being destroyed.
3294 */
3295void vmsvga3dBackSurfaceDestroy(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface)
3296{
3297 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3298 AssertReturnVoid(pBackend);
3299 AssertReturnVoid(pBackend->pImmediateContext);
3300
3301 /* The caller should not use the function for system memory surfaces. */
3302 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3303 if (!pBackendSurface)
3304 return;
3305 pSurface->pBackendSurface = NULL;
3306
3307 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3308 {
3309 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pStagingTexture);
3310 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pDynamicTexture);
3311 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pTexture);
3312 }
3313 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
3314 {
3315 D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture);
3316 D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture);
3317 D3D_RELEASE(pBackendSurface->u.Texture.pTexture);
3318 }
3319 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3320 {
3321 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
3322 }
3323 else
3324 {
3325 AssertFailed();
3326 }
3327
3328 RTMemFree(pBackendSurface);
3329}
3330
3331
3332/**
3333 * Backend worker for implementing SVGA_3D_CMD_SURFACE_STRETCHBLT.
3334 *
3335 * @returns VBox status code.
3336 * @param pThis The VGA device instance.
3337 * @param pState The VMSVGA3d state.
3338 * @param pDstSurface The destination host surface.
3339 * @param uDstFace The destination face (valid).
3340 * @param uDstMipmap The destination mipmap level (valid).
3341 * @param pDstBox The destination box.
3342 * @param pSrcSurface The source host surface.
3343 * @param uSrcFace The destination face (valid).
3344 * @param uSrcMipmap The source mimap level (valid).
3345 * @param pSrcBox The source box.
3346 * @param enmMode The strecht blt mode .
3347 * @param pContext The VMSVGA3d context (already current for OGL).
3348 */
3349int vmsvga3dBackSurfaceStretchBlt(PVGASTATE pThis, PVMSVGA3DSTATE pState,
3350 PVMSVGA3DSURFACE pDstSurface, uint32_t uDstFace, uint32_t uDstMipmap, SVGA3dBox const *pDstBox,
3351 PVMSVGA3DSURFACE pSrcSurface, uint32_t uSrcFace, uint32_t uSrcMipmap, SVGA3dBox const *pSrcBox,
3352 SVGA3dStretchBltMode enmMode, PVMSVGA3DCONTEXT pContext)
3353{
3354 RT_NOREF(pThis, pState, pDstSurface, uDstFace, uDstMipmap, pDstBox,
3355 pSrcSurface, uSrcFace, uSrcMipmap, pSrcBox, enmMode, pContext);
3356
3357 AssertFailed();
3358 return VINF_SUCCESS;
3359}
3360
3361
3362/**
3363 * Backend worker for implementing SVGA_3D_CMD_SURFACE_DMA that copies one box.
3364 *
3365 * @returns Failure status code or @a rc.
3366 * @param pThis The shared VGA/VMSVGA instance data.
3367 * @param pThisCC The VGA/VMSVGA state for ring-3.
3368 * @param pState The VMSVGA3d state.
3369 * @param pSurface The host surface.
3370 * @param pMipLevel Mipmap level. The caller knows it already.
3371 * @param uHostFace The host face (valid).
3372 * @param uHostMipmap The host mipmap level (valid).
3373 * @param GuestPtr The guest pointer.
3374 * @param cbGuestPitch The guest pitch.
3375 * @param transfer The transfer direction.
3376 * @param pBox The box to copy (clipped, valid, except for guest's srcx, srcy, srcz).
3377 * @param pContext The context (for OpenGL).
3378 * @param rc The current rc for all boxes.
3379 * @param iBox The current box number (for Direct 3D).
3380 */
3381int vmsvga3dBackSurfaceDMACopyBox(PVGASTATE pThis, PVGASTATECC pThisCC, PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface,
3382 PVMSVGA3DMIPMAPLEVEL pMipLevel, uint32_t uHostFace, uint32_t uHostMipmap,
3383 SVGAGuestPtr GuestPtr, uint32_t cbGuestPitch, SVGA3dTransferType transfer,
3384 SVGA3dCopyBox const *pBox, PVMSVGA3DCONTEXT pContext, int rc, int iBox)
3385{
3386 RT_NOREF(pState, pMipLevel, pContext, iBox);
3387
3388 /* The called should not use the function for system memory surfaces. */
3389 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3390 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
3391
3392 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3393 {
3394 /** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
3395 AssertReturn(uHostFace == 0 && uHostMipmap == 0, VERR_INVALID_PARAMETER);
3396 AssertReturn(transfer == SVGA3D_WRITE_HOST_VRAM, VERR_NOT_IMPLEMENTED); /** @todo Implement */
3397
3398 uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
3399 uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
3400 Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
3401 Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
3402 uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3403 uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3404 AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
3405
3406 /* vmsvgaR3GmrTransfer verifies uGuestOffset.
3407 * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
3408 * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
3409 */
3410 uint64_t const uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
3411 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
3412
3413 SVGA3dSurfaceImageId image;
3414 image.sid = pSurface->id;
3415 image.face = uHostFace;
3416 image.mipmap = uHostMipmap;
3417
3418 SVGA3dBox box;
3419 box.x = pBox->x;
3420 box.y = pBox->y;
3421 box.z = 0;
3422 box.w = pBox->w;
3423 box.h = pBox->h;
3424 box.d = 1;
3425
3426 VMSVGA3D_MAPPED_SURFACE map;
3427 rc = vmsvga3dSurfaceMap(pThisCC, pSurface->idAssociatedContext, &image, &box, VMSVGA3D_SURFACE_MAP_WRITE_DISCARD, &map);
3428 if (RT_SUCCESS(rc))
3429 {
3430 /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
3431 * and offset of the first scanline.
3432 */
3433 uint32_t const cbLockedBuf = map.cbRowPitch * cBlocksY;
3434 uint8_t *pu8LockedBuf = (uint8_t *)map.pvData;
3435 uint32_t const offLockedBuf = 0;
3436
3437 rc = vmsvgaR3GmrTransfer(pThis,
3438 pThisCC,
3439 transfer,
3440 pu8LockedBuf,
3441 cbLockedBuf,
3442 offLockedBuf,
3443 map.cbRowPitch,
3444 GuestPtr,
3445 (uint32_t)uGuestOffset,
3446 cbGuestPitch,
3447 cBlocksX * pSurface->cbBlock,
3448 cBlocksY);
3449 AssertRC(rc);
3450
3451 // Log4(("first line:\n%.*Rhxd\n", cBlocksX * pSurface->cbBlock, LockedRect.pBits));
3452
3453 //vmsvga3dMapWriteBmpFile(&map, "Dynamic");
3454
3455 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ true);
3456 }
3457#if 0
3458//ASMBreakpoint();
3459 rc = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
3460 if (RT_SUCCESS(rc))
3461 {
3462 vmsvga3dMapWriteBmpFile(&map, "Staging");
3463
3464 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
3465 }
3466#endif
3467 }
3468 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
3469 {
3470 /** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
3471 AssertReturn(uHostFace == 0 && uHostMipmap == 0, VERR_INVALID_PARAMETER);
3472
3473 uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
3474 uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
3475 Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
3476 Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
3477 uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3478 uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3479 AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
3480
3481 /* vmsvgaR3GmrTransfer verifies uGuestOffset.
3482 * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
3483 * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
3484 */
3485 uint64_t const uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
3486 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
3487
3488 SVGA3dSurfaceImageId image;
3489 image.sid = pSurface->id;
3490 image.face = uHostFace;
3491 image.mipmap = uHostMipmap;
3492
3493 SVGA3dBox box;
3494 box.x = pBox->x;
3495 box.y = pBox->y;
3496 box.z = 0;
3497 box.w = pBox->w;
3498 box.h = pBox->h;
3499 box.d = 1;
3500
3501 VMSVGA3D_SURFACE_MAP const enmMap = transfer == SVGA3D_WRITE_HOST_VRAM
3502 ? VMSVGA3D_SURFACE_MAP_WRITE_DISCARD
3503 : VMSVGA3D_SURFACE_MAP_READ;
3504
3505 VMSVGA3D_MAPPED_SURFACE map;
3506 rc = vmsvga3dSurfaceMap(pThisCC, pSurface->idAssociatedContext, &image, &box, enmMap, &map);
3507 if (RT_SUCCESS(rc))
3508 {
3509 /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
3510 * and offset of the first scanline.
3511 */
3512 uint32_t const cbLockedBuf = map.cbRowPitch * cBlocksY;
3513 uint8_t *pu8LockedBuf = (uint8_t *)map.pvData;
3514 uint32_t const offLockedBuf = 0;
3515
3516 rc = vmsvgaR3GmrTransfer(pThis,
3517 pThisCC,
3518 transfer,
3519 pu8LockedBuf,
3520 cbLockedBuf,
3521 offLockedBuf,
3522 map.cbRowPitch,
3523 GuestPtr,
3524 (uint32_t)uGuestOffset,
3525 cbGuestPitch,
3526 cBlocksX * pSurface->cbBlock,
3527 cBlocksY);
3528 AssertRC(rc);
3529
3530 bool const fWritten = (transfer == SVGA3D_WRITE_HOST_VRAM);
3531 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, fWritten);
3532 }
3533 }
3534 else
3535 {
3536 AssertMsgFailed(("Unsupported surface type %d\n", pBackendSurface->enmResType));
3537 rc = VERR_NOT_IMPLEMENTED;
3538 }
3539
3540 return rc;
3541}
3542
3543
3544/**
3545 * Create D3D/OpenGL texture object for the specified surface.
3546 *
3547 * Surfaces are created when needed.
3548 *
3549 * @param pState The VMSVGA3d state.
3550 * @param pContext The context.
3551 * @param idAssociatedContext Probably the same as pContext->id.
3552 * @param pSurface The surface to create the texture for.
3553 */
3554int vmsvga3dBackCreateTexture(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext, uint32_t idAssociatedContext,
3555 PVMSVGA3DSURFACE pSurface)
3556
3557{
3558 RT_NOREF(pState, pContext, idAssociatedContext, pSurface);
3559
3560 AssertFailed();
3561 return VINF_SUCCESS;
3562}
3563
3564
3565int vmsvga3dOcclusionQueryCreate(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
3566{
3567 RT_NOREF(pState, pContext);
3568 AssertFailed();
3569 return VINF_SUCCESS;
3570}
3571
3572
3573int vmsvga3dOcclusionQueryBegin(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
3574{
3575 RT_NOREF(pState, pContext);
3576 AssertFailed();
3577 return VINF_SUCCESS;
3578}
3579
3580
3581int vmsvga3dOcclusionQueryEnd(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
3582{
3583 RT_NOREF(pState, pContext);
3584 AssertFailed();
3585 return VINF_SUCCESS;
3586}
3587
3588
3589int vmsvga3dOcclusionQueryGetData(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext, uint32_t *pu32Pixels)
3590{
3591 RT_NOREF(pState, pContext);
3592 *pu32Pixels = 0;
3593 AssertFailed();
3594 return VINF_SUCCESS;
3595}
3596
3597
3598int vmsvga3dOcclusionQueryDelete(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
3599{
3600 RT_NOREF(pState, pContext);
3601 AssertFailed();
3602 return VINF_SUCCESS;
3603}
3604
3605
3606/*
3607 * DX callbacks.
3608 */
3609
3610static DECLCALLBACK(int) vmsvga3dBackDXDefineContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3611{
3612 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3613
3614 /* Allocate a backend specific context structure. */
3615 PVMSVGA3DBACKENDDXCONTEXT pBackendDXContext = (PVMSVGA3DBACKENDDXCONTEXT)RTMemAllocZ(sizeof(VMSVGA3DBACKENDDXCONTEXT));
3616 AssertPtrReturn(pBackendDXContext, VERR_NO_MEMORY);
3617 pDXContext->pBackendDXContext = pBackendDXContext;
3618
3619 int rc = dxDeviceCreate(pBackend, &pBackendDXContext->device);
3620 return rc;
3621}
3622
3623
3624static DECLCALLBACK(int) vmsvga3dBackDXDestroyContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3625{
3626 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3627
3628 if (pDXContext->pBackendDXContext)
3629 {
3630 dxDeviceDestroy(pBackend, &pDXContext->pBackendDXContext->device);
3631
3632 RTMemFree(pDXContext->pBackendDXContext);
3633 pDXContext->pBackendDXContext = NULL;
3634 }
3635 return VINF_SUCCESS;
3636}
3637
3638
3639static DECLCALLBACK(int) vmsvga3dBackDXBindContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3640{
3641 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3642 RT_NOREF(pBackend, pDXContext);
3643 return VINF_SUCCESS;
3644}
3645
3646
3647static DECLCALLBACK(int) vmsvga3dBackDXReadbackContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3648{
3649 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3650
3651 RT_NOREF(pBackend, pDXContext);
3652 AssertFailed(); /** @todo Implement */
3653 return VERR_NOT_IMPLEMENTED;
3654}
3655
3656
3657static DECLCALLBACK(int) vmsvga3dBackDXInvalidateContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3658{
3659 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3660
3661 RT_NOREF(pBackend, pDXContext);
3662 AssertFailed(); /** @todo Implement */
3663 return VERR_NOT_IMPLEMENTED;
3664}
3665
3666
3667static DECLCALLBACK(int) vmsvga3dBackDXSetSingleConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t slot, SVGA3dShaderType type, SVGA3dSurfaceId sid, uint32_t offsetInBytes, uint32_t sizeInBytes)
3668{
3669 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3670 RT_NOREF(pBackend);
3671
3672 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3673 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3674
3675 PVMSVGA3DSURFACE pSurface;
3676 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
3677 AssertRCReturn(rc, rc);
3678
3679 uint32_t const cbSurface = pSurface->paMipmapLevels[0].cbSurface;
3680 ASSERT_GUEST_RETURN( offsetInBytes < cbSurface
3681 && sizeInBytes <= cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
3682
3683 if (pSurface->pBackendSurface == NULL)
3684 {
3685 /* Create the resource. */
3686 rc = vmsvga3dBackSurfaceCreateConstantBuffer(pThisCC->svga.p3dState, pDXContext, pSurface);
3687 AssertRCReturn(rc, rc);
3688 }
3689
3690 if (pSurface->fDirty)
3691 {
3692 /* Get mobid for the surface and read from the MOB. */
3693 SVGA3dSurfaceImageId imageId;
3694 imageId.sid = sid;
3695 imageId.face = 0;
3696 imageId.mipmap = 0;
3697
3698 SVGA3dPoint ptSrc;
3699 ptSrc.x = offsetInBytes / pSurface->cbBlock;
3700 ptSrc.y = 0;
3701 ptSrc.z = 0;
3702
3703 SVGA3dBox boxDst;
3704 boxDst.x = 0;
3705 boxDst.y = 0;
3706 boxDst.z = 0;
3707 boxDst.w = sizeInBytes / pSurface->cbBlock;
3708 boxDst.h = 1;
3709 boxDst.d = 1;
3710
3711 rc = vmsvgaR3UpdateGBSurfaceEx(pThisCC, pDXContext->cid, &imageId, &boxDst, &ptSrc);
3712 AssertRCReturn(rc, rc);
3713 }
3714
3715 dxConstantBufferSet(pDevice, slot, type, pSurface->pBackendSurface->u.Buffer.pBuffer);
3716 return VINF_SUCCESS;
3717}
3718
3719
3720static DECLCALLBACK(int) vmsvga3dBackDXSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startView, SVGA3dShaderType type, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
3721{
3722 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3723 RT_NOREF(pBackend);
3724
3725 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3726 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3727
3728 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
3729 ID3D11ShaderResourceView *papShaderResourceView[SVGA3D_DX_MAX_SRVIEWS];
3730 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
3731 {
3732 SVGA3dShaderResourceViewId shaderResourceViewId = paShaderResourceViewId[i];
3733 if (shaderResourceViewId != SVGA3D_INVALID_ID)
3734 {
3735 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->pBackendDXContext->cShaderResourceView, VERR_INVALID_PARAMETER);
3736 papShaderResourceView[i] = pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId];
3737 }
3738 else
3739 papShaderResourceView[i] = NULL;
3740
3741 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[startView + i] = shaderResourceViewId;
3742 }
3743
3744 dxShaderResourceViewSet(pDevice, type, startView, cShaderResourceViewId, papShaderResourceView);
3745 return VINF_SUCCESS;
3746}
3747
3748
3749static DECLCALLBACK(int) vmsvga3dBackDXSetShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader)
3750{
3751 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3752 RT_NOREF(pBackend);
3753
3754 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3755 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3756
3757 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
3758 uint32_t const idxShaderState = pDXShader->enmShaderType - SVGA3D_SHADERTYPE_MIN;
3759 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId = pShader->id;
3760
3761 dxShaderSet(pDevice, pShader, pDXShader);
3762 return VINF_SUCCESS;
3763}
3764
3765
3766static DECLCALLBACK(int) vmsvga3dBackDXSetSamplers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startSampler, SVGA3dShaderType type, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
3767{
3768 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3769 RT_NOREF(pBackend);
3770
3771 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3772 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3773
3774 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
3775 ID3D11SamplerState *papSamplerState[SVGA3D_DX_MAX_SAMPLERS];
3776 for (uint32_t i = 0; i < cSamplerId; ++i)
3777 {
3778 SVGA3dSamplerId samplerId = paSamplerId[i];
3779 if (samplerId != SVGA3D_INVALID_ID)
3780 {
3781 ASSERT_GUEST_RETURN(samplerId < pDXContext->pBackendDXContext->cSamplerState, VERR_INVALID_PARAMETER);
3782 papSamplerState[i] = pDXContext->pBackendDXContext->papSamplerState[samplerId];
3783 }
3784 else
3785 papSamplerState[i] = NULL;
3786
3787 pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[startSampler + i] = samplerId;
3788 }
3789
3790 dxSamplerSet(pDevice, type, startSampler, cSamplerId, papSamplerState);
3791 return VINF_SUCCESS;
3792}
3793
3794
3795static DECLCALLBACK(int) vmsvga3dBackDXDraw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
3796{
3797 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3798 RT_NOREF(pBackend);
3799
3800 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3801 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3802
3803 if (pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN)
3804 pDevice->pImmediateContext->Draw(vertexCount, startVertexLocation);
3805 else
3806 {
3807 /*
3808 * Emulate SVGA3D_PRIMITIVE_TRIANGLEFAN using an indexed draw of a triangle list.
3809 */
3810
3811 /* Make sure that 16 bit indices are enough. 20000 ~= 65536 / 3 */
3812 AssertReturn(vertexCount <= 20000, VERR_NOT_SUPPORTED);
3813
3814 /* Generate indices. */
3815 UINT const IndexCount = 3 * (vertexCount - 2); /* 3_per_triangle * num_triangles */
3816 UINT const cbAlloc = IndexCount * sizeof(USHORT);
3817 USHORT *paIndices = (USHORT *)RTMemAlloc(cbAlloc);
3818 AssertReturn(paIndices, VERR_NO_MEMORY);
3819 USHORT iVertex = 1;
3820 for (UINT i = 0; i < IndexCount; i+= 3)
3821 {
3822 paIndices[i] = 0;
3823 paIndices[i + 1] = iVertex;
3824 ++iVertex;
3825 paIndices[i + 2] = iVertex;
3826 }
3827
3828 D3D11_SUBRESOURCE_DATA InitData;
3829 InitData.pSysMem = paIndices;
3830 InitData.SysMemPitch = cbAlloc;
3831 InitData.SysMemSlicePitch = cbAlloc;
3832
3833 D3D11_BUFFER_DESC bd;
3834 RT_ZERO(bd);
3835 bd.ByteWidth = cbAlloc;
3836 bd.Usage = D3D11_USAGE_IMMUTABLE;
3837 bd.BindFlags = D3D11_BIND_INDEX_BUFFER;
3838 //bd.CPUAccessFlags = 0;
3839 //bd.MiscFlags = 0;
3840 //bd.StructureByteStride = 0;
3841
3842 ID3D11Buffer *pIndexBuffer = 0;
3843 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, &InitData, &pIndexBuffer);
3844 Assert(SUCCEEDED(hr));RT_NOREF(hr);
3845
3846 /* Save the current index buffer. */
3847 ID3D11Buffer *pSavedIndexBuffer = 0;
3848 DXGI_FORMAT SavedFormat = DXGI_FORMAT_UNKNOWN;
3849 UINT SavedOffset = 0;
3850 pDevice->pImmediateContext->IAGetIndexBuffer(&pSavedIndexBuffer, &SavedFormat, &SavedOffset);
3851
3852 /* Set up the device state. */
3853 pDevice->pImmediateContext->IASetIndexBuffer(pIndexBuffer, DXGI_FORMAT_R16_UINT, 0);
3854 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
3855
3856 UINT const StartIndexLocation = 0;
3857 INT const BaseVertexLocation = startVertexLocation;
3858 pDevice->pImmediateContext->DrawIndexed(IndexCount, StartIndexLocation, BaseVertexLocation);
3859
3860 /* Restore the device state. */
3861 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
3862 pDevice->pImmediateContext->IASetIndexBuffer(pSavedIndexBuffer, SavedFormat, SavedOffset);
3863 D3D_RELEASE(pSavedIndexBuffer);
3864
3865 /* Cleanup. */
3866 D3D_RELEASE(pIndexBuffer);
3867 RTMemFree(paIndices);
3868 }
3869
3870 return VINF_SUCCESS;
3871}
3872
3873
3874static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
3875{
3876 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3877 RT_NOREF(pBackend);
3878
3879 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3880 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3881
3882 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
3883
3884 pDevice->pImmediateContext->DrawIndexed(indexCount, startIndexLocation, baseVertexLocation);
3885 return VINF_SUCCESS;
3886}
3887
3888
3889static DECLCALLBACK(int) vmsvga3dBackDXDrawInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3890{
3891 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
3892 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3893
3894 RT_NOREF(pBackend, pDXContext);
3895 AssertFailed(); /** @todo Implement */
3896 return VERR_NOT_IMPLEMENTED;
3897}
3898
3899
3900static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3901{
3902 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
3903 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3904
3905 RT_NOREF(pBackend, pDXContext);
3906 AssertFailed(); /** @todo Implement */
3907 return VERR_NOT_IMPLEMENTED;
3908}
3909
3910
3911static DECLCALLBACK(int) vmsvga3dBackDXDrawAuto(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3912{
3913 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
3914 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3915
3916 RT_NOREF(pBackend, pDXContext);
3917 AssertFailed(); /** @todo Implement */
3918 return VERR_NOT_IMPLEMENTED;
3919}
3920
3921
3922static DECLCALLBACK(int) vmsvga3dBackDXSetInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
3923{
3924 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3925 RT_NOREF(pBackend);
3926
3927 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3928 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3929
3930 pDXContext->svgaDXContext.inputAssembly.layoutId = elementLayoutId;
3931
3932 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
3933 if (!pDXElementLayout->pElementLayout)
3934 {
3935 uint32_t const idxShaderState = SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN;
3936 uint32_t const shid = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
3937 AssertReturnStmt(shid < pDXContext->pBackendDXContext->cShader,
3938 LogRelMax(16, ("VMSVGA: DX shader is not set in DXSetInputLayout: shid = 0x%x\n", shid)),
3939 VERR_INVALID_STATE);
3940 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shid];
3941 AssertReturnStmt(pDXShader->pvDXBC,
3942 LogRelMax(16, ("VMSVGA: DX shader bytecode is not available in DXSetInputLayout: shid = %u\n", shid)),
3943 VERR_INVALID_STATE);
3944 HRESULT hr = pDevice->pDevice->CreateInputLayout(pDXElementLayout->aElementDesc,
3945 pDXElementLayout->cElementDesc,
3946 pDXShader->pvDXBC,
3947 pDXShader->cbDXBC,
3948 &pDXElementLayout->pElementLayout);
3949 AssertReturn(SUCCEEDED(hr), VERR_NO_MEMORY);
3950 }
3951
3952 pDevice->pImmediateContext->IASetInputLayout(pDXElementLayout->pElementLayout);
3953 return VINF_SUCCESS;
3954}
3955
3956
3957static DECLCALLBACK(int) vmsvga3dBackDXSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
3958{
3959 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3960 RT_NOREF(pBackend);
3961
3962 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3963 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3964
3965 /* For each paVertexBuffer[i]:
3966 * If the vertex buffer object does not exist then create it.
3967 * If the surface has been updated by the guest then update the buffer object.
3968 * Use IASetVertexBuffers to set the buffers.
3969 */
3970
3971 ID3D11Buffer *paResources[SVGA3D_DX_MAX_VERTEXBUFFERS];
3972 UINT paStride[SVGA3D_DX_MAX_VERTEXBUFFERS];
3973 UINT paOffset[SVGA3D_DX_MAX_VERTEXBUFFERS];
3974
3975 for (uint32_t i = 0; i < cVertexBuffer; ++i)
3976 {
3977 uint32_t const idxVertexBuffer = startBuffer + i;
3978
3979 /* Get corresponding resource. Create the buffer if does not yet exist. */
3980 if (paVertexBuffer[i].sid != SVGA_ID_INVALID)
3981 {
3982 PVMSVGA3DSURFACE pSurface;
3983 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paVertexBuffer[i].sid, &pSurface);
3984 AssertRCReturn(rc, rc);
3985
3986 if (pSurface->pBackendSurface == NULL)
3987 {
3988 /* Create the resource. */
3989 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC->svga.p3dState, pDXContext, pSurface);
3990 AssertRCReturn(rc, rc);
3991 }
3992
3993 if (pSurface->fDirty)
3994 {
3995 /* Get mobid for the surface and read from the MOB. */
3996 SVGA3dSurfaceImageId imageId;
3997 imageId.sid = paVertexBuffer[i].sid;
3998 imageId.face = 0;
3999 imageId.mipmap = 0;
4000
4001 SVGA3dBox box;
4002 box.x = 0;
4003 box.y = 0;
4004 box.z = 0;
4005 box.w = pSurface->paMipmapLevels[0].mipmapSize.width;
4006 box.h = 1;
4007 box.d = 1;
4008
4009 rc = vmsvgaR3UpdateGBSurface(pThisCC, pDXContext->cid, &imageId, &box);
4010 AssertRCReturn(rc, rc);
4011 }
4012
4013 paResources[idxVertexBuffer] = pSurface->pBackendSurface->u.Buffer.pBuffer;
4014 paStride[idxVertexBuffer] = paVertexBuffer[i].stride;
4015 paOffset[idxVertexBuffer] = paVertexBuffer[i].offset;
4016 }
4017 else
4018 {
4019 paResources[idxVertexBuffer] = NULL;
4020 paStride[idxVertexBuffer] = 0;
4021 paOffset[idxVertexBuffer] = 0;
4022 }
4023
4024 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].bufferId = paVertexBuffer[i].sid;
4025 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].stride = paVertexBuffer[i].stride;
4026 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].offset = paVertexBuffer[i].offset;
4027 }
4028
4029 pDevice->pImmediateContext->IASetVertexBuffers(startBuffer, cVertexBuffer, paResources, paStride, paOffset);
4030
4031 return VINF_SUCCESS;
4032}
4033
4034
4035static DECLCALLBACK(int) vmsvga3dBackDXSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId sid, SVGA3dSurfaceFormat format, uint32_t offset)
4036{
4037 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4038 RT_NOREF(pBackend);
4039
4040 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4041 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4042
4043 /* Get corresponding resource. Create the buffer if does not yet exist. */
4044 ID3D11Buffer *pResource;
4045 DXGI_FORMAT enmDxgiFormat;
4046
4047 if (sid != SVGA_ID_INVALID)
4048 {
4049 PVMSVGA3DSURFACE pSurface;
4050 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
4051 AssertRCReturn(rc, rc);
4052
4053 if (pSurface->pBackendSurface == NULL)
4054 {
4055 /* Create the resource. */
4056 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC->svga.p3dState, pDXContext, pSurface);
4057 AssertRCReturn(rc, rc);
4058 }
4059
4060 if (pSurface->fDirty)
4061 {
4062 /* Get mobid for the surface and read from the MOB. */
4063 SVGA3dSurfaceImageId imageId;
4064 imageId.sid = sid;
4065 imageId.face = 0;
4066 imageId.mipmap = 0;
4067
4068 SVGA3dBox box;
4069 box.x = 0;
4070 box.y = 0;
4071 box.z = 0;
4072 box.w = pSurface->paMipmapLevels[0].mipmapSize.width;
4073 box.h = 1;
4074 box.d = 1;
4075
4076 rc = vmsvgaR3UpdateGBSurface(pThisCC, pDXContext->cid, &imageId, &box);
4077 AssertRCReturn(rc, rc);
4078 }
4079
4080 pResource = pSurface->pBackendSurface->u.Buffer.pBuffer;
4081 enmDxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(format);
4082 AssertReturn(enmDxgiFormat == DXGI_FORMAT_R16_UINT || enmDxgiFormat == DXGI_FORMAT_R32_UINT, VERR_INVALID_PARAMETER);
4083 }
4084 else
4085 {
4086 pResource = NULL;
4087 enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
4088 }
4089
4090 pDevice->pImmediateContext->IASetIndexBuffer(pResource, enmDxgiFormat, offset);
4091 return VINF_SUCCESS;
4092}
4093
4094static D3D11_PRIMITIVE_TOPOLOGY dxTopology(SVGA3dPrimitiveType primitiveType)
4095{
4096 static D3D11_PRIMITIVE_TOPOLOGY const aD3D11PrimitiveTopology[SVGA3D_PRIMITIVE_MAX] =
4097 {
4098 D3D11_PRIMITIVE_TOPOLOGY_UNDEFINED,
4099 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST,
4100 D3D11_PRIMITIVE_TOPOLOGY_POINTLIST,
4101 D3D11_PRIMITIVE_TOPOLOGY_LINELIST,
4102 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP,
4103 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP,
4104 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP, /* SVGA3D_PRIMITIVE_TRIANGLEFAN: No FAN in D3D11. */
4105 D3D11_PRIMITIVE_TOPOLOGY_LINELIST_ADJ,
4106 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP_ADJ,
4107 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST_ADJ,
4108 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP_ADJ,
4109 D3D11_PRIMITIVE_TOPOLOGY_1_CONTROL_POINT_PATCHLIST,
4110 D3D11_PRIMITIVE_TOPOLOGY_2_CONTROL_POINT_PATCHLIST,
4111 D3D11_PRIMITIVE_TOPOLOGY_3_CONTROL_POINT_PATCHLIST,
4112 D3D11_PRIMITIVE_TOPOLOGY_4_CONTROL_POINT_PATCHLIST,
4113 D3D11_PRIMITIVE_TOPOLOGY_5_CONTROL_POINT_PATCHLIST,
4114 D3D11_PRIMITIVE_TOPOLOGY_6_CONTROL_POINT_PATCHLIST,
4115 D3D11_PRIMITIVE_TOPOLOGY_7_CONTROL_POINT_PATCHLIST,
4116 D3D11_PRIMITIVE_TOPOLOGY_8_CONTROL_POINT_PATCHLIST,
4117 D3D11_PRIMITIVE_TOPOLOGY_9_CONTROL_POINT_PATCHLIST,
4118 D3D11_PRIMITIVE_TOPOLOGY_10_CONTROL_POINT_PATCHLIST,
4119 D3D11_PRIMITIVE_TOPOLOGY_11_CONTROL_POINT_PATCHLIST,
4120 D3D11_PRIMITIVE_TOPOLOGY_12_CONTROL_POINT_PATCHLIST,
4121 D3D11_PRIMITIVE_TOPOLOGY_13_CONTROL_POINT_PATCHLIST,
4122 D3D11_PRIMITIVE_TOPOLOGY_14_CONTROL_POINT_PATCHLIST,
4123 D3D11_PRIMITIVE_TOPOLOGY_15_CONTROL_POINT_PATCHLIST,
4124 D3D11_PRIMITIVE_TOPOLOGY_16_CONTROL_POINT_PATCHLIST,
4125 D3D11_PRIMITIVE_TOPOLOGY_17_CONTROL_POINT_PATCHLIST,
4126 D3D11_PRIMITIVE_TOPOLOGY_18_CONTROL_POINT_PATCHLIST,
4127 D3D11_PRIMITIVE_TOPOLOGY_19_CONTROL_POINT_PATCHLIST,
4128 D3D11_PRIMITIVE_TOPOLOGY_20_CONTROL_POINT_PATCHLIST,
4129 D3D11_PRIMITIVE_TOPOLOGY_21_CONTROL_POINT_PATCHLIST,
4130 D3D11_PRIMITIVE_TOPOLOGY_22_CONTROL_POINT_PATCHLIST,
4131 D3D11_PRIMITIVE_TOPOLOGY_23_CONTROL_POINT_PATCHLIST,
4132 D3D11_PRIMITIVE_TOPOLOGY_24_CONTROL_POINT_PATCHLIST,
4133 D3D11_PRIMITIVE_TOPOLOGY_25_CONTROL_POINT_PATCHLIST,
4134 D3D11_PRIMITIVE_TOPOLOGY_26_CONTROL_POINT_PATCHLIST,
4135 D3D11_PRIMITIVE_TOPOLOGY_27_CONTROL_POINT_PATCHLIST,
4136 D3D11_PRIMITIVE_TOPOLOGY_28_CONTROL_POINT_PATCHLIST,
4137 D3D11_PRIMITIVE_TOPOLOGY_29_CONTROL_POINT_PATCHLIST,
4138 D3D11_PRIMITIVE_TOPOLOGY_30_CONTROL_POINT_PATCHLIST,
4139 D3D11_PRIMITIVE_TOPOLOGY_31_CONTROL_POINT_PATCHLIST,
4140 D3D11_PRIMITIVE_TOPOLOGY_32_CONTROL_POINT_PATCHLIST,
4141 };
4142 return aD3D11PrimitiveTopology[primitiveType];
4143}
4144
4145static DECLCALLBACK(int) vmsvga3dBackDXSetTopology(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dPrimitiveType topology)
4146{
4147 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4148 RT_NOREF(pBackend);
4149
4150 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4151 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4152
4153 D3D11_PRIMITIVE_TOPOLOGY const enmTopology = dxTopology(topology);
4154 pDevice->pImmediateContext->IASetPrimitiveTopology(enmTopology);
4155 return VINF_SUCCESS;
4156}
4157
4158
4159static DECLCALLBACK(int) vmsvga3dBackDXSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
4160{
4161 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4162 RT_NOREF(pBackend);
4163
4164 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4165 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4166
4167 ID3D11RenderTargetView *papRenderTargetViews[SVGA3D_MAX_RENDER_TARGETS];
4168 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
4169 {
4170 SVGA3dRenderTargetViewId const renderTargetViewId = paRenderTargetViewId[i];
4171 if (renderTargetViewId != SVGA3D_INVALID_ID)
4172 {
4173 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->pBackendDXContext->cRenderTargetView, VERR_INVALID_PARAMETER);
4174 papRenderTargetViews[i] = pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId];
4175 }
4176 else
4177 papRenderTargetViews[i] = NULL;
4178 }
4179
4180 ID3D11DepthStencilView *pDepthStencilView;
4181 if (depthStencilViewId != SVGA_ID_INVALID)
4182 pDepthStencilView = pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId];
4183 else
4184 pDepthStencilView = NULL;
4185
4186 pDevice->pImmediateContext->OMSetRenderTargets(cRenderTargetViewId, papRenderTargetViews, pDepthStencilView);
4187 return VINF_SUCCESS;
4188}
4189
4190
4191static DECLCALLBACK(int) vmsvga3dBackDXSetBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId, float const blendFactor[4], uint32_t sampleMask)
4192{
4193 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4194 RT_NOREF(pBackend);
4195
4196 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4197 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4198
4199 ID3D11BlendState *pBlendState = pDXContext->pBackendDXContext->papBlendState[blendId];
4200 pDevice->pImmediateContext->OMSetBlendState(pBlendState, blendFactor, sampleMask);
4201
4202 pDXContext->svgaDXContext.renderState.blendStateId = blendId;
4203 memcpy(pDXContext->svgaDXContext.renderState.blendFactor, blendFactor, sizeof(blendFactor));
4204 pDXContext->svgaDXContext.renderState.sampleMask = sampleMask;
4205
4206 return VINF_SUCCESS;
4207}
4208
4209
4210static DECLCALLBACK(int) vmsvga3dBackDXSetDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, uint32_t stencilRef)
4211{
4212 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4213 RT_NOREF(pBackend);
4214
4215 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4216 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4217
4218 ID3D11DepthStencilState *pDepthStencilState = pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId];
4219 pDevice->pImmediateContext->OMSetDepthStencilState(pDepthStencilState, stencilRef);
4220
4221 pDXContext->svgaDXContext.renderState.depthStencilStateId = depthStencilId;
4222 pDXContext->svgaDXContext.renderState.stencilRef = stencilRef;
4223
4224 return VINF_SUCCESS;
4225}
4226
4227
4228static DECLCALLBACK(int) vmsvga3dBackDXSetRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
4229{
4230 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4231 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4232 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4233
4234 RT_NOREF(pBackend);
4235
4236 pDevice->pImmediateContext->RSSetState(pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
4237 return VINF_SUCCESS;
4238}
4239
4240
4241static DECLCALLBACK(int) vmsvga3dBackDXDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4242{
4243 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4244
4245 RT_NOREF(pBackend, pDXContext);
4246 AssertFailed(); /** @todo Implement */
4247 return VERR_NOT_IMPLEMENTED;
4248}
4249
4250
4251static DECLCALLBACK(int) vmsvga3dBackDXDestroyQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4252{
4253 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4254
4255 RT_NOREF(pBackend, pDXContext);
4256 AssertFailed(); /** @todo Implement */
4257 return VERR_NOT_IMPLEMENTED;
4258}
4259
4260
4261static DECLCALLBACK(int) vmsvga3dBackDXBindQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4262{
4263 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4264
4265 RT_NOREF(pBackend, pDXContext);
4266 AssertFailed(); /** @todo Implement */
4267 return VERR_NOT_IMPLEMENTED;
4268}
4269
4270
4271static DECLCALLBACK(int) vmsvga3dBackDXSetQueryOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4272{
4273 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4274
4275 RT_NOREF(pBackend, pDXContext);
4276 AssertFailed(); /** @todo Implement */
4277 return VERR_NOT_IMPLEMENTED;
4278}
4279
4280
4281static DECLCALLBACK(int) vmsvga3dBackDXBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4282{
4283 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4284
4285 RT_NOREF(pBackend, pDXContext);
4286 AssertFailed(); /** @todo Implement */
4287 return VERR_NOT_IMPLEMENTED;
4288}
4289
4290
4291static DECLCALLBACK(int) vmsvga3dBackDXEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4292{
4293 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4294
4295 RT_NOREF(pBackend, pDXContext);
4296 AssertFailed(); /** @todo Implement */
4297 return VERR_NOT_IMPLEMENTED;
4298}
4299
4300
4301static DECLCALLBACK(int) vmsvga3dBackDXReadbackQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4302{
4303 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4304
4305 RT_NOREF(pBackend, pDXContext);
4306 AssertFailed(); /** @todo Implement */
4307 return VERR_NOT_IMPLEMENTED;
4308}
4309
4310
4311static DECLCALLBACK(int) vmsvga3dBackDXSetPredication(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4312{
4313 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4314
4315 RT_NOREF(pBackend, pDXContext);
4316 AssertFailed(); /** @todo Implement */
4317 return VERR_NOT_IMPLEMENTED;
4318}
4319
4320
4321static DECLCALLBACK(int) vmsvga3dBackDXSetSOTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4322{
4323 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4324
4325 RT_NOREF(pBackend, pDXContext);
4326 AssertFailed(); /** @todo Implement */
4327 return VERR_NOT_IMPLEMENTED;
4328}
4329
4330
4331static DECLCALLBACK(int) vmsvga3dBackDXSetViewports(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
4332{
4333 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4334 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4335 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4336
4337 RT_NOREF(pBackend);
4338
4339 /* D3D11_VIEWPORT is identical to SVGA3dViewport. */
4340 D3D11_VIEWPORT *pViewports = (D3D11_VIEWPORT *)paViewport;
4341
4342 pDevice->pImmediateContext->RSSetViewports(cViewport, pViewports);
4343 return VINF_SUCCESS;
4344}
4345
4346
4347static DECLCALLBACK(int) vmsvga3dBackDXSetScissorRects(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cRect, SVGASignedRect const *paRect)
4348{
4349 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4350 RT_NOREF(pBackend);
4351
4352 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4353 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4354
4355 /* D3D11_RECT is identical to SVGASignedRect. */
4356 D3D11_RECT *pRects = (D3D11_RECT *)paRect;
4357
4358 pDevice->pImmediateContext->RSSetScissorRects(cRect, pRects);
4359 return VINF_SUCCESS;
4360}
4361
4362
4363static DECLCALLBACK(int) vmsvga3dBackDXClearRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGA3dRGBAFloat const *pRGBA)
4364{
4365 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4366 RT_NOREF(pBackend);
4367
4368 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4369 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4370
4371 ID3D11RenderTargetView *pRenderTargetView = pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId];
4372 AssertReturn(pRenderTargetView, VERR_INVALID_STATE);
4373 pDevice->pImmediateContext->ClearRenderTargetView(pRenderTargetView, pRGBA->value);
4374 return VINF_SUCCESS;
4375}
4376
4377
4378static DECLCALLBACK(int) vmsvga3dBackDXClearDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t flags, SVGA3dDepthStencilViewId depthStencilViewId, float depth, uint8_t stencil)
4379{
4380 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4381 RT_NOREF(pBackend);
4382
4383 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4384 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4385
4386 ID3D11DepthStencilView *pDepthStencilView = pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId];
4387 AssertReturn(pDepthStencilView, VERR_INVALID_STATE);
4388 pDevice->pImmediateContext->ClearDepthStencilView(pDepthStencilView, flags, depth, stencil);
4389 return VINF_SUCCESS;
4390}
4391
4392
4393static DECLCALLBACK(int) vmsvga3dBackDXPredCopyRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dCopyBox const *pBox)
4394{
4395 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4396 RT_NOREF(pBackend);
4397
4398 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4399 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4400
4401 PVMSVGA3DSURFACE pSrcSurface;
4402 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
4403 AssertRCReturn(rc, rc);
4404
4405 PVMSVGA3DSURFACE pDstSurface;
4406 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
4407 AssertRCReturn(rc, rc);
4408
4409 if (pSrcSurface->pBackendSurface == NULL)
4410 {
4411 /* Create the resource. */
4412 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC->svga.p3dState, pDXContext, pSrcSurface);
4413 AssertRCReturn(rc, rc);
4414 }
4415
4416 if (pDstSurface->pBackendSurface == NULL)
4417 {
4418 /* Create the resource. */
4419 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC->svga.p3dState, pDXContext, pDstSurface);
4420 AssertRCReturn(rc, rc);
4421 }
4422
4423 ID3D11Resource *pDstResource = pDstSurface->pBackendSurface->u.Texture.pTexture;
4424 UINT DstSubresource = dstSubResource;
4425 UINT DstX = pBox->x;
4426 UINT DstY = pBox->y;
4427 UINT DstZ = pBox->z;
4428
4429 ID3D11Resource *pSrcResource = pSrcSurface->pBackendSurface->u.Texture.pTexture;
4430 UINT SrcSubresource = srcSubResource;
4431 D3D11_BOX SrcBox;
4432 SrcBox.left = pBox->x;
4433 SrcBox.top = pBox->y;
4434 SrcBox.front = pBox->z;
4435 SrcBox.right = pBox->x + pBox->w;
4436 SrcBox.bottom = pBox->y + pBox->h;
4437 SrcBox.back = pBox->z + pBox->d;
4438 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4439 pSrcResource, SrcSubresource, &SrcBox);
4440 return VINF_SUCCESS;
4441}
4442
4443
4444static DECLCALLBACK(int) vmsvga3dBackDXPredCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4445{
4446 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4447
4448 RT_NOREF(pBackend, pDXContext);
4449 AssertFailed(); /** @todo Implement */
4450 return VERR_NOT_IMPLEMENTED;
4451}
4452
4453
4454static DECLCALLBACK(int) vmsvga3dBackDXPresentBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4455{
4456 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4457
4458 RT_NOREF(pBackend, pDXContext);
4459 AssertFailed(); /** @todo Implement */
4460 return VERR_NOT_IMPLEMENTED;
4461}
4462
4463
4464static DECLCALLBACK(int) vmsvga3dBackDXGenMips(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
4465{
4466 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4467 RT_NOREF(pBackend);
4468
4469 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4470 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4471
4472 ID3D11ShaderResourceView *pShaderResourceView = pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId];
4473 AssertReturn(pShaderResourceView, VERR_INVALID_STATE);
4474 pDevice->pImmediateContext->GenerateMips(pShaderResourceView);
4475 return VINF_SUCCESS;
4476}
4477
4478
4479static DECLCALLBACK(int) vmsvga3dBackDXUpdateSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4480{
4481 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4482
4483 RT_NOREF(pBackend, pDXContext);
4484 AssertFailed(); /** @todo Implement */
4485 return VERR_NOT_IMPLEMENTED;
4486}
4487
4488
4489static DECLCALLBACK(int) vmsvga3dBackDXReadbackSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4490{
4491 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4492
4493 RT_NOREF(pBackend, pDXContext);
4494 AssertFailed(); /** @todo Implement */
4495 return VERR_NOT_IMPLEMENTED;
4496}
4497
4498
4499static DECLCALLBACK(int) vmsvga3dBackDXInvalidateSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4500{
4501 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4502
4503 RT_NOREF(pBackend, pDXContext);
4504 AssertFailed(); /** @todo Implement */
4505 return VERR_NOT_IMPLEMENTED;
4506}
4507
4508
4509static DECLCALLBACK(int) vmsvga3dBackDXDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
4510{
4511 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4512 RT_NOREF(pBackend);
4513
4514 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4515 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4516
4517 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
4518 PVMSVGA3DSURFACE pSurface;
4519 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
4520 AssertRCReturn(rc, rc);
4521
4522 if (pSurface->pBackendSurface == NULL)
4523 {
4524 /* Create the actual texture. */
4525 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC->svga.p3dState, pDXContext, pSurface);
4526 AssertRCReturn(rc, rc);
4527 }
4528
4529 HRESULT hr = dxShaderResourceViewCreate(pDevice, pEntry, pSurface->pBackendSurface, &pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId]);
4530 if (SUCCEEDED(hr))
4531 return VINF_SUCCESS;
4532 return VERR_INVALID_STATE;
4533}
4534
4535
4536static DECLCALLBACK(int) vmsvga3dBackDXDestroyShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
4537{
4538 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4539 RT_NOREF(pBackend);
4540
4541 D3D_RELEASE(pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId]);
4542 return VINF_SUCCESS;
4543}
4544
4545
4546static DECLCALLBACK(int) vmsvga3dBackDXDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
4547{
4548 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4549 RT_NOREF(pBackend);
4550
4551 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4552 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4553
4554 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
4555 PVMSVGA3DSURFACE pSurface;
4556 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
4557 AssertRCReturn(rc, rc);
4558
4559 if (pSurface->pBackendSurface == NULL)
4560 {
4561 /* Create the actual texture. */
4562 rc = vmsvga3dBackSurfaceCreateRenderTarget(pThisCC->svga.p3dState, pDXContext, pSurface);
4563 AssertRCReturn(rc, rc);
4564 }
4565
4566 HRESULT hr = dxRenderTargetViewCreate(pDevice, pEntry, pSurface->pBackendSurface, &pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId]);
4567 if (SUCCEEDED(hr))
4568 return VINF_SUCCESS;
4569 return VERR_INVALID_STATE;
4570}
4571
4572
4573static DECLCALLBACK(int) vmsvga3dBackDXDestroyRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId)
4574{
4575 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4576 RT_NOREF(pBackend);
4577
4578 D3D_RELEASE(pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId]);
4579 return VINF_SUCCESS;
4580}
4581
4582
4583static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
4584{
4585 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4586 RT_NOREF(pBackend);
4587
4588 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4589 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4590
4591 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
4592 PVMSVGA3DSURFACE pSurface;
4593 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
4594 AssertRCReturn(rc, rc);
4595
4596 if (pSurface->pBackendSurface == NULL)
4597 {
4598 /* Create the actual texture. */
4599 rc = vmsvga3dBackSurfaceCreateDepthStencilTexture(pThisCC->svga.p3dState, pDXContext, pSurface);
4600 AssertRCReturn(rc, rc);
4601 }
4602
4603 HRESULT hr = dxDepthStencilViewCreate(pDevice, pEntry, pSurface->pBackendSurface, &pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId]);
4604 if (SUCCEEDED(hr))
4605 return VINF_SUCCESS;
4606 return VERR_INVALID_STATE;
4607}
4608
4609
4610static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId)
4611{
4612 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4613 RT_NOREF(pBackend);
4614
4615 D3D_RELEASE(pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId]);
4616 return VINF_SUCCESS;
4617}
4618
4619
4620static DECLCALLBACK(int) vmsvga3dBackDXDefineElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
4621{
4622 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4623 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4624 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4625
4626 RT_NOREF(pBackend, elementLayoutId, pEntry);
4627
4628 /* Not much can be done here because ID3D11Device::CreateInputLayout requires
4629 * a pShaderBytecodeWithInputSignature which is not known at this moment.
4630 * InputLayout object will be created in SVGA_3D_CMD_DX_SET_INPUT_LAYOUT.
4631 */
4632
4633 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[pEntry->elid];
4634 D3D_RELEASE(pDXElementLayout->pElementLayout);
4635
4636 /* Semantic name is not interpreted by D3D, therefore arbitrary names can be used
4637 * if they are consistent between the element layout and shader input signature.
4638 * "In general, data passed between pipeline stages is completely generic and is not uniquely
4639 * interpreted by the system; arbitrary semantics are allowed ..."
4640 *
4641 * However D3D runtime insists that "SemanticName string ("POSITIO1") cannot end with a number."
4642 *
4643 * System-Value semantics ("SV_*") between shaders require proper names of course.
4644 * But they are irrelevant for input attributes.
4645 */
4646 pDXElementLayout->cElementDesc = pEntry->numDescs;
4647 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
4648 {
4649 D3D11_INPUT_ELEMENT_DESC *pDst = &pDXElementLayout->aElementDesc[i];
4650 SVGA3dInputElementDesc const *pSrc = &pEntry->descs[i];
4651 pDst->SemanticName = "ATTRIB";
4652 pDst->SemanticIndex = i; /// @todo 'pSrc->inputRegister' is unused, maybe it should somehow.
4653 pDst->Format = vmsvgaDXSurfaceFormat2Dxgi(pSrc->format);
4654 AssertReturn(pDst->Format != DXGI_FORMAT_UNKNOWN, VERR_NOT_IMPLEMENTED);
4655 pDst->InputSlot = pSrc->inputSlot;
4656 pDst->AlignedByteOffset = pSrc->alignedByteOffset;
4657 pDst->InputSlotClass = (D3D11_INPUT_CLASSIFICATION)pSrc->inputSlotClass;
4658 pDst->InstanceDataStepRate = pSrc->instanceDataStepRate;
4659 }
4660
4661 return VINF_SUCCESS;
4662}
4663
4664
4665static DECLCALLBACK(int) vmsvga3dBackDXDestroyElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4666{
4667 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4668
4669 RT_NOREF(pBackend, pDXContext);
4670 AssertFailed(); /** @todo Implement */
4671 return VERR_NOT_IMPLEMENTED;
4672}
4673
4674
4675static DECLCALLBACK(int) vmsvga3dBackDXDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
4676 SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
4677{
4678 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4679 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4680 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4681
4682 RT_NOREF(pBackend);
4683
4684 HRESULT hr = dxBlendStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papBlendState[blendId]);
4685 if (SUCCEEDED(hr))
4686 return VINF_SUCCESS;
4687 return VERR_INVALID_STATE;
4688}
4689
4690
4691static DECLCALLBACK(int) vmsvga3dBackDXDestroyBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4692{
4693 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4694
4695 RT_NOREF(pBackend, pDXContext);
4696 AssertFailed(); /** @todo Implement */
4697 return VERR_NOT_IMPLEMENTED;
4698}
4699
4700
4701static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry *pEntry)
4702{
4703 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4704 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4705 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4706
4707 RT_NOREF(pBackend);
4708
4709 HRESULT hr = dxDepthStencilStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
4710 if (SUCCEEDED(hr))
4711 return VINF_SUCCESS;
4712 return VERR_INVALID_STATE;
4713}
4714
4715
4716static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4717{
4718 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4719
4720 RT_NOREF(pBackend, pDXContext);
4721 AssertFailed(); /** @todo Implement */
4722 return VERR_NOT_IMPLEMENTED;
4723}
4724
4725
4726static DECLCALLBACK(int) vmsvga3dBackDXDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
4727{
4728 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4729 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4730 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4731
4732 RT_NOREF(pBackend);
4733
4734 HRESULT hr = dxRasterizerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
4735 if (SUCCEEDED(hr))
4736 return VINF_SUCCESS;
4737 return VERR_INVALID_STATE;
4738}
4739
4740
4741static DECLCALLBACK(int) vmsvga3dBackDXDestroyRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4742{
4743 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4744
4745 RT_NOREF(pBackend, pDXContext);
4746 AssertFailed(); /** @todo Implement */
4747 return VERR_NOT_IMPLEMENTED;
4748}
4749
4750
4751static DECLCALLBACK(int) vmsvga3dBackDXDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
4752{
4753 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4754 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4755 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4756
4757 RT_NOREF(pBackend);
4758
4759 HRESULT hr = dxSamplerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papSamplerState[samplerId]);
4760 if (SUCCEEDED(hr))
4761 return VINF_SUCCESS;
4762 return VERR_INVALID_STATE;
4763}
4764
4765
4766static DECLCALLBACK(int) vmsvga3dBackDXDestroySamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4767{
4768 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4769
4770 RT_NOREF(pBackend, pDXContext);
4771 AssertFailed(); /** @todo Implement */
4772 return VERR_NOT_IMPLEMENTED;
4773}
4774
4775
4776static DECLCALLBACK(int) vmsvga3dBackDXDefineShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader)
4777{
4778 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4779
4780 RT_NOREF(pBackend);
4781
4782 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
4783 D3D_RELEASE(pDXShader->pShader);
4784 pDXShader->enmShaderType = pShader->type;
4785 pShader->u.pvBackendShader = pDXShader;
4786 return VINF_SUCCESS;
4787}
4788
4789
4790static DECLCALLBACK(int) vmsvga3dBackDXDestroyShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4791{
4792 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4793
4794 RT_NOREF(pBackend, pDXContext);
4795 AssertFailed(); /** @todo Implement */
4796 return VERR_NOT_IMPLEMENTED;
4797}
4798
4799
4800static DECLCALLBACK(int) vmsvga3dBackDXBindShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader, void const *pvShaderBytecode)
4801{
4802 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4803 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4804 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4805
4806 RT_NOREF(pBackend);
4807
4808 int rc = VINF_SUCCESS;
4809
4810 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
4811 if (pDXShader->pvDXBC)
4812 {
4813 RTMemFree(pDXShader->pvDXBC);
4814 pDXShader->pvDXBC = NULL;
4815 pDXShader->cbDXBC = 0;
4816 }
4817
4818 if (pvShaderBytecode)
4819 {
4820#ifdef LOG_ENABLED
4821 Log(("Shader: cid=%u shid=%u type=%d:\n", pDXContext->cid, pShader->id, pDXShader->enmShaderType));
4822 uint8_t *pu8 = (uint8_t *)pvShaderBytecode;
4823 for (uint32_t i = 0; i < pShader->cbData; ++i)
4824 {
4825 if ((i % 16) == 0)
4826 {
4827 if (i > 0)
4828 Log((",\n"));
4829
4830 Log((" %#04x", pu8[i]));
4831 }
4832 else
4833 {
4834 Log((", %#04x", pu8[i]));
4835 }
4836 }
4837 Log(("\n"));
4838#endif
4839
4840 rc = DXShaderCreateDXBC(&pShader->shaderInfo, pvShaderBytecode, pShader->cbData, &pDXShader->pvDXBC, &pDXShader->cbDXBC);
4841 if (RT_SUCCESS(rc))
4842 {
4843#ifdef LOG_ENABLED
4844 if (pBackend->pfnD3DDisassemble && LogIs6Enabled())
4845 {
4846 ID3D10Blob *pBlob = 0;
4847 HRESULT hr2 = pBackend->pfnD3DDisassemble(pDXShader->pvDXBC, pDXShader->cbDXBC, 0, NULL, &pBlob);
4848 if (SUCCEEDED(hr2) && pBlob && pBlob->GetBufferSize())
4849 {
4850 Log6(("Shader: cid=%u shid=%u type=%d:\n%s\n",
4851 pDXContext->cid, pShader->id, pDXShader->enmShaderType, pBlob->GetBufferPointer()));
4852 }
4853 else
4854 AssertFailed();
4855 D3D_RELEASE(pBlob);
4856 }
4857#endif
4858
4859 HRESULT hr = dxShaderCreate(pDevice, pShader, pDXShader);
4860 if (FAILED(hr))
4861 rc = VERR_INVALID_STATE;
4862 }
4863 else
4864 rc = VERR_NO_MEMORY;
4865 }
4866
4867 return rc;
4868}
4869
4870
4871static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4872{
4873 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4874
4875 RT_NOREF(pBackend, pDXContext);
4876 AssertFailed(); /** @todo Implement */
4877 return VERR_NOT_IMPLEMENTED;
4878}
4879
4880
4881static DECLCALLBACK(int) vmsvga3dBackDXDestroyStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4882{
4883 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4884
4885 RT_NOREF(pBackend, pDXContext);
4886 AssertFailed(); /** @todo Implement */
4887 return VERR_NOT_IMPLEMENTED;
4888}
4889
4890
4891static DECLCALLBACK(int) vmsvga3dBackDXSetStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4892{
4893 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4894
4895 RT_NOREF(pBackend, pDXContext);
4896 AssertFailed(); /** @todo Implement */
4897 return VERR_NOT_IMPLEMENTED;
4898}
4899
4900static DECLCALLBACK(int) vmsvga3dBackDXSetCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableType type, uint32_t cEntries)
4901{
4902 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4903 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
4904
4905 RT_NOREF(pBackend, pDXContext, type);
4906
4907 int rc = VINF_SUCCESS;
4908
4909 /* Allocate paBlendState for example. */
4910 switch (type)
4911 {
4912 case SVGA_COTABLE_RTVIEW:
4913 if (pBackendDXContext->papRenderTargetView)
4914 {
4915 DX_RELEASE_ARRAY(pBackendDXContext->cRenderTargetView, pBackendDXContext->papRenderTargetView);
4916 RTMemFree(pBackendDXContext->papRenderTargetView);
4917 pBackendDXContext->papRenderTargetView = NULL;
4918 pBackendDXContext->cRenderTargetView = 0;
4919 }
4920
4921 if (cEntries)
4922 {
4923 pBackendDXContext->papRenderTargetView = (ID3D11RenderTargetView **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papRenderTargetView[0]));
4924 AssertBreakStmt(pBackendDXContext->papRenderTargetView, rc = VERR_NO_MEMORY);
4925 pBackendDXContext->cRenderTargetView = cEntries;
4926 }
4927 break;
4928 case SVGA_COTABLE_DSVIEW:
4929 if (pBackendDXContext->papDepthStencilView)
4930 {
4931 DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilView, pBackendDXContext->papDepthStencilView);
4932 RTMemFree(pBackendDXContext->papDepthStencilView);
4933 pBackendDXContext->papDepthStencilView = NULL;
4934 pBackendDXContext->cDepthStencilView = 0;
4935 }
4936
4937 if (cEntries)
4938 {
4939 pBackendDXContext->papDepthStencilView = (ID3D11DepthStencilView **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papDepthStencilView[0]));
4940 AssertBreakStmt(pBackendDXContext->papDepthStencilView, rc = VERR_NO_MEMORY);
4941 pBackendDXContext->cDepthStencilView = cEntries;
4942 }
4943 break;
4944 case SVGA_COTABLE_SRVIEW:
4945 if (pBackendDXContext->papShaderResourceView)
4946 {
4947 DX_RELEASE_ARRAY(pBackendDXContext->cShaderResourceView, pBackendDXContext->papShaderResourceView);
4948 RTMemFree(pBackendDXContext->papShaderResourceView);
4949 pBackendDXContext->papShaderResourceView = NULL;
4950 pBackendDXContext->cShaderResourceView = 0;
4951 }
4952
4953 if (cEntries)
4954 {
4955 pBackendDXContext->papShaderResourceView = (ID3D11ShaderResourceView **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papShaderResourceView[0]));
4956 AssertBreakStmt(pBackendDXContext->papShaderResourceView, rc = VERR_NO_MEMORY);
4957 pBackendDXContext->cShaderResourceView = cEntries;
4958 }
4959 break;
4960 case SVGA_COTABLE_ELEMENTLAYOUT:
4961 if (pBackendDXContext->paElementLayout)
4962 {
4963 for (uint32_t i = 0; i < pBackendDXContext->cElementLayout; ++i)
4964 D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
4965 RTMemFree(pBackendDXContext->paElementLayout);
4966 pBackendDXContext->paElementLayout = NULL;
4967 pBackendDXContext->cElementLayout = 0;
4968 }
4969
4970 if (cEntries)
4971 {
4972 pBackendDXContext->paElementLayout = (DXELEMENTLAYOUT *)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->paElementLayout[0]));
4973 AssertBreakStmt(pBackendDXContext->paElementLayout, rc = VERR_NO_MEMORY);
4974 pBackendDXContext->cElementLayout = cEntries;
4975 }
4976 break;
4977 case SVGA_COTABLE_BLENDSTATE:
4978 if (pBackendDXContext->papBlendState)
4979 {
4980 DX_RELEASE_ARRAY(pBackendDXContext->cBlendState, pBackendDXContext->papBlendState);
4981 RTMemFree(pBackendDXContext->papBlendState);
4982 pBackendDXContext->papBlendState = NULL;
4983 pBackendDXContext->cBlendState = 0;
4984 }
4985
4986 if (cEntries)
4987 {
4988 pBackendDXContext->papBlendState = (ID3D11BlendState **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papBlendState[0]));
4989 AssertBreakStmt(pBackendDXContext->papBlendState, rc = VERR_NO_MEMORY);
4990 pBackendDXContext->cBlendState = cEntries;
4991 }
4992 break;
4993 case SVGA_COTABLE_DEPTHSTENCIL:
4994 if (pBackendDXContext->papDepthStencilState)
4995 {
4996 DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilState, pBackendDXContext->papDepthStencilState);
4997 RTMemFree(pBackendDXContext->papDepthStencilState);
4998 pBackendDXContext->papDepthStencilState = NULL;
4999 pBackendDXContext->cDepthStencilState = 0;
5000 }
5001
5002 if (cEntries)
5003 {
5004 pBackendDXContext->papDepthStencilState = (ID3D11DepthStencilState **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papDepthStencilState[0]));
5005 AssertBreakStmt(pBackendDXContext->papDepthStencilState, rc = VERR_NO_MEMORY);
5006 pBackendDXContext->cDepthStencilState = cEntries;
5007 }
5008 break;
5009 case SVGA_COTABLE_RASTERIZERSTATE:
5010 if (pBackendDXContext->papRasterizerState)
5011 {
5012 DX_RELEASE_ARRAY(pBackendDXContext->cRasterizerState, pBackendDXContext->papRasterizerState);
5013 RTMemFree(pBackendDXContext->papRasterizerState);
5014 pBackendDXContext->papRasterizerState = NULL;
5015 pBackendDXContext->cRasterizerState = 0;
5016 }
5017
5018 if (cEntries)
5019 {
5020 pBackendDXContext->papRasterizerState = (ID3D11RasterizerState **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papRasterizerState[0]));
5021 AssertBreakStmt(pBackendDXContext->papRasterizerState, rc = VERR_NO_MEMORY);
5022 pBackendDXContext->cRasterizerState = cEntries;
5023 }
5024 break;
5025 case SVGA_COTABLE_SAMPLER:
5026 if (pBackendDXContext->papSamplerState)
5027 {
5028 DX_RELEASE_ARRAY(pBackendDXContext->cSamplerState, pBackendDXContext->papSamplerState);
5029 RTMemFree(pBackendDXContext->papSamplerState);
5030 pBackendDXContext->papSamplerState = NULL;
5031 pBackendDXContext->cSamplerState = 0;
5032 }
5033
5034 if (cEntries)
5035 {
5036 pBackendDXContext->papSamplerState = (ID3D11SamplerState **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papSamplerState[0]));
5037 AssertBreakStmt(pBackendDXContext->papSamplerState, rc = VERR_NO_MEMORY);
5038 pBackendDXContext->cSamplerState = cEntries;
5039 }
5040 break;
5041 case SVGA_COTABLE_STREAMOUTPUT:
5042 //AssertFailed(); /** @todo Implement */
5043 break;
5044 case SVGA_COTABLE_DXQUERY:
5045 if (pBackendDXContext->papQuery)
5046 {
5047 DX_RELEASE_ARRAY(pBackendDXContext->cQuery, pBackendDXContext->papQuery);
5048 RTMemFree(pBackendDXContext->papQuery);
5049 pBackendDXContext->papQuery = NULL;
5050 pBackendDXContext->cQuery = 0;
5051 }
5052
5053 if (cEntries)
5054 {
5055 pBackendDXContext->papQuery = (ID3D11Query **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papQuery[0]));
5056 AssertBreakStmt(pBackendDXContext->papQuery, rc = VERR_NO_MEMORY);
5057 pBackendDXContext->cQuery = cEntries;
5058 }
5059 break;
5060 case SVGA_COTABLE_DXSHADER:
5061 if (pBackendDXContext->paShader)
5062 {
5063 for (uint32_t i = 0; i < pBackendDXContext->cShader; ++i)
5064 D3D_RELEASE(pBackendDXContext->paShader[i].pShader);
5065 RTMemFree(pBackendDXContext->paShader);
5066 pBackendDXContext->paShader = NULL;
5067 pBackendDXContext->cShader = 0;
5068 }
5069
5070 if (cEntries)
5071 {
5072 pBackendDXContext->paShader = (DXSHADER *)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->paShader[0]));
5073 AssertBreakStmt(pBackendDXContext->paShader, rc = VERR_NO_MEMORY);
5074 pBackendDXContext->cShader = cEntries;
5075 }
5076 break;
5077 case SVGA_COTABLE_UAVIEW:
5078 AssertFailed(); /** @todo Implement */
5079 break;
5080 case SVGA_COTABLE_MAX: break; /* Compiler warning */
5081 }
5082 return rc;
5083}
5084
5085
5086static DECLCALLBACK(int) vmsvga3dBackDXReadbackCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5087{
5088 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5089
5090 RT_NOREF(pBackend, pDXContext);
5091 AssertFailed(); /** @todo Implement */
5092 return VERR_NOT_IMPLEMENTED;
5093}
5094
5095
5096static DECLCALLBACK(int) vmsvga3dBackDXBufferCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5097{
5098 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5099
5100 RT_NOREF(pBackend, pDXContext);
5101 AssertFailed(); /** @todo Implement */
5102 return VERR_NOT_IMPLEMENTED;
5103}
5104
5105
5106static DECLCALLBACK(int) vmsvga3dBackDXTransferFromBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5107{
5108 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5109
5110 RT_NOREF(pBackend, pDXContext);
5111 AssertFailed(); /** @todo Implement */
5112 return VERR_NOT_IMPLEMENTED;
5113}
5114
5115
5116static DECLCALLBACK(int) vmsvga3dBackDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5117{
5118 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5119
5120 RT_NOREF(pBackend, pDXContext);
5121 AssertFailed(); /** @todo Implement */
5122 return VERR_NOT_IMPLEMENTED;
5123}
5124
5125
5126static DECLCALLBACK(int) vmsvga3dBackDXMoveQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5127{
5128 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5129
5130 RT_NOREF(pBackend, pDXContext);
5131 AssertFailed(); /** @todo Implement */
5132 return VERR_NOT_IMPLEMENTED;
5133}
5134
5135
5136static DECLCALLBACK(int) vmsvga3dBackDXBindAllQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5137{
5138 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5139
5140 RT_NOREF(pBackend, pDXContext);
5141 AssertFailed(); /** @todo Implement */
5142 return VERR_NOT_IMPLEMENTED;
5143}
5144
5145
5146static DECLCALLBACK(int) vmsvga3dBackDXReadbackAllQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5147{
5148 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5149
5150 RT_NOREF(pBackend, pDXContext);
5151 AssertFailed(); /** @todo Implement */
5152 return VERR_NOT_IMPLEMENTED;
5153}
5154
5155
5156static DECLCALLBACK(int) vmsvga3dBackDXPredTransferFromBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5157{
5158 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5159
5160 RT_NOREF(pBackend, pDXContext);
5161 AssertFailed(); /** @todo Implement */
5162 return VERR_NOT_IMPLEMENTED;
5163}
5164
5165
5166static DECLCALLBACK(int) vmsvga3dBackDXMobFence64(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5167{
5168 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5169
5170 RT_NOREF(pBackend, pDXContext);
5171 AssertFailed(); /** @todo Implement */
5172 return VERR_NOT_IMPLEMENTED;
5173}
5174
5175
5176static DECLCALLBACK(int) vmsvga3dBackDXBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5177{
5178 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5179
5180 RT_NOREF(pBackend, pDXContext);
5181 AssertFailed(); /** @todo Implement */
5182 return VERR_NOT_IMPLEMENTED;
5183}
5184
5185
5186static DECLCALLBACK(int) vmsvga3dBackDXHint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5187{
5188 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5189
5190 RT_NOREF(pBackend, pDXContext);
5191 AssertFailed(); /** @todo Implement */
5192 return VERR_NOT_IMPLEMENTED;
5193}
5194
5195
5196static DECLCALLBACK(int) vmsvga3dBackDXBufferUpdate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5197{
5198 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5199
5200 RT_NOREF(pBackend, pDXContext);
5201 AssertFailed(); /** @todo Implement */
5202 return VERR_NOT_IMPLEMENTED;
5203}
5204
5205
5206static DECLCALLBACK(int) vmsvga3dBackDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5207{
5208 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5209
5210 RT_NOREF(pBackend, pDXContext);
5211 AssertFailed(); /** @todo Implement */
5212 return VERR_NOT_IMPLEMENTED;
5213}
5214
5215
5216static DECLCALLBACK(int) vmsvga3dBackDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5217{
5218 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5219
5220 RT_NOREF(pBackend, pDXContext);
5221 AssertFailed(); /** @todo Implement */
5222 return VERR_NOT_IMPLEMENTED;
5223}
5224
5225
5226static DECLCALLBACK(int) vmsvga3dBackDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5227{
5228 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5229
5230 RT_NOREF(pBackend, pDXContext);
5231 AssertFailed(); /** @todo Implement */
5232 return VERR_NOT_IMPLEMENTED;
5233}
5234
5235
5236static DECLCALLBACK(int) vmsvga3dBackDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5237{
5238 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5239
5240 RT_NOREF(pBackend, pDXContext);
5241 AssertFailed(); /** @todo Implement */
5242 return VERR_NOT_IMPLEMENTED;
5243}
5244
5245
5246static DECLCALLBACK(int) vmsvga3dBackDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5247{
5248 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5249
5250 RT_NOREF(pBackend, pDXContext);
5251 AssertFailed(); /** @todo Implement */
5252 return VERR_NOT_IMPLEMENTED;
5253}
5254
5255
5256static DECLCALLBACK(int) vmsvga3dBackDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5257{
5258 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5259
5260 RT_NOREF(pBackend, pDXContext);
5261 AssertFailed(); /** @todo Implement */
5262 return VERR_NOT_IMPLEMENTED;
5263}
5264
5265
5266static DECLCALLBACK(int) vmsvga3dBackDXCondBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5267{
5268 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5269
5270 RT_NOREF(pBackend, pDXContext);
5271 AssertFailed(); /** @todo Implement */
5272 return VERR_NOT_IMPLEMENTED;
5273}
5274
5275
5276static DECLCALLBACK(int) vmsvga3dBackScreenCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5277{
5278 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5279
5280 RT_NOREF(pBackend, pDXContext);
5281 AssertFailed(); /** @todo Implement */
5282 return VERR_NOT_IMPLEMENTED;
5283}
5284
5285
5286static DECLCALLBACK(int) vmsvga3dBackGrowOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5287{
5288 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5289
5290 RT_NOREF(pBackend, pDXContext);
5291 AssertFailed(); /** @todo Implement */
5292 return VERR_NOT_IMPLEMENTED;
5293}
5294
5295
5296static DECLCALLBACK(int) vmsvga3dBackDXGrowCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5297{
5298 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5299
5300 RT_NOREF(pBackend, pDXContext);
5301 AssertFailed(); /** @todo Implement */
5302 return VERR_NOT_IMPLEMENTED;
5303}
5304
5305
5306static DECLCALLBACK(int) vmsvga3dBackIntraSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5307{
5308 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5309
5310 RT_NOREF(pBackend, pDXContext);
5311 AssertFailed(); /** @todo Implement */
5312 return VERR_NOT_IMPLEMENTED;
5313}
5314
5315
5316static DECLCALLBACK(int) vmsvga3dBackDefineGBSurface_v3(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5317{
5318 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5319
5320 RT_NOREF(pBackend, pDXContext);
5321 AssertFailed(); /** @todo Implement */
5322 return VERR_NOT_IMPLEMENTED;
5323}
5324
5325
5326static DECLCALLBACK(int) vmsvga3dBackDXResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5327{
5328 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5329
5330 RT_NOREF(pBackend, pDXContext);
5331 AssertFailed(); /** @todo Implement */
5332 return VERR_NOT_IMPLEMENTED;
5333}
5334
5335
5336static DECLCALLBACK(int) vmsvga3dBackDXPredResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5337{
5338 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5339
5340 RT_NOREF(pBackend, pDXContext);
5341 AssertFailed(); /** @todo Implement */
5342 return VERR_NOT_IMPLEMENTED;
5343}
5344
5345
5346static DECLCALLBACK(int) vmsvga3dBackDXPredConvertRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5347{
5348 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5349
5350 RT_NOREF(pBackend, pDXContext);
5351 AssertFailed(); /** @todo Implement */
5352 return VERR_NOT_IMPLEMENTED;
5353}
5354
5355
5356static DECLCALLBACK(int) vmsvga3dBackDXPredConvert(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5357{
5358 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5359
5360 RT_NOREF(pBackend, pDXContext);
5361 AssertFailed(); /** @todo Implement */
5362 return VERR_NOT_IMPLEMENTED;
5363}
5364
5365
5366static DECLCALLBACK(int) vmsvga3dBackWholeSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5367{
5368 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5369
5370 RT_NOREF(pBackend, pDXContext);
5371 AssertFailed(); /** @todo Implement */
5372 return VERR_NOT_IMPLEMENTED;
5373}
5374
5375
5376static DECLCALLBACK(int) vmsvga3dBackDXDefineUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5377{
5378 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5379
5380 RT_NOREF(pBackend, pDXContext);
5381 AssertFailed(); /** @todo Implement */
5382 return VERR_NOT_IMPLEMENTED;
5383}
5384
5385
5386static DECLCALLBACK(int) vmsvga3dBackDXDestroyUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5387{
5388 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5389
5390 RT_NOREF(pBackend, pDXContext);
5391 AssertFailed(); /** @todo Implement */
5392 return VERR_NOT_IMPLEMENTED;
5393}
5394
5395
5396static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewUint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5397{
5398 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5399
5400 RT_NOREF(pBackend, pDXContext);
5401 AssertFailed(); /** @todo Implement */
5402 return VERR_NOT_IMPLEMENTED;
5403}
5404
5405
5406static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewFloat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5407{
5408 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5409
5410 RT_NOREF(pBackend, pDXContext);
5411 AssertFailed(); /** @todo Implement */
5412 return VERR_NOT_IMPLEMENTED;
5413}
5414
5415
5416static DECLCALLBACK(int) vmsvga3dBackDXCopyStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5417{
5418 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5419
5420 RT_NOREF(pBackend, pDXContext);
5421 AssertFailed(); /** @todo Implement */
5422 return VERR_NOT_IMPLEMENTED;
5423}
5424
5425
5426static DECLCALLBACK(int) vmsvga3dBackDXSetUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5427{
5428 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5429
5430 RT_NOREF(pBackend, pDXContext);
5431 AssertFailed(); /** @todo Implement */
5432 return VERR_NOT_IMPLEMENTED;
5433}
5434
5435
5436static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5437{
5438 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5439
5440 RT_NOREF(pBackend, pDXContext);
5441 AssertFailed(); /** @todo Implement */
5442 return VERR_NOT_IMPLEMENTED;
5443}
5444
5445
5446static DECLCALLBACK(int) vmsvga3dBackDXDrawInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5447{
5448 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5449
5450 RT_NOREF(pBackend, pDXContext);
5451 AssertFailed(); /** @todo Implement */
5452 return VERR_NOT_IMPLEMENTED;
5453}
5454
5455
5456static DECLCALLBACK(int) vmsvga3dBackDXDispatch(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5457{
5458 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5459
5460 RT_NOREF(pBackend, pDXContext);
5461 AssertFailed(); /** @todo Implement */
5462 return VERR_NOT_IMPLEMENTED;
5463}
5464
5465
5466static DECLCALLBACK(int) vmsvga3dBackDXDispatchIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5467{
5468 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5469
5470 RT_NOREF(pBackend, pDXContext);
5471 AssertFailed(); /** @todo Implement */
5472 return VERR_NOT_IMPLEMENTED;
5473}
5474
5475
5476static DECLCALLBACK(int) vmsvga3dBackWriteZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5477{
5478 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5479
5480 RT_NOREF(pBackend, pDXContext);
5481 AssertFailed(); /** @todo Implement */
5482 return VERR_NOT_IMPLEMENTED;
5483}
5484
5485
5486static DECLCALLBACK(int) vmsvga3dBackHintZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5487{
5488 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5489
5490 RT_NOREF(pBackend, pDXContext);
5491 AssertFailed(); /** @todo Implement */
5492 return VERR_NOT_IMPLEMENTED;
5493}
5494
5495
5496static DECLCALLBACK(int) vmsvga3dBackDXTransferToBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5497{
5498 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5499
5500 RT_NOREF(pBackend, pDXContext);
5501 AssertFailed(); /** @todo Implement */
5502 return VERR_NOT_IMPLEMENTED;
5503}
5504
5505
5506static DECLCALLBACK(int) vmsvga3dBackDXSetStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5507{
5508 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5509
5510 RT_NOREF(pBackend, pDXContext);
5511 AssertFailed(); /** @todo Implement */
5512 return VERR_NOT_IMPLEMENTED;
5513}
5514
5515
5516static DECLCALLBACK(int) vmsvga3dBackLogicOpsBitBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5517{
5518 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5519
5520 RT_NOREF(pBackend, pDXContext);
5521 AssertFailed(); /** @todo Implement */
5522 return VERR_NOT_IMPLEMENTED;
5523}
5524
5525
5526static DECLCALLBACK(int) vmsvga3dBackLogicOpsTransBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5527{
5528 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5529
5530 RT_NOREF(pBackend, pDXContext);
5531 AssertFailed(); /** @todo Implement */
5532 return VERR_NOT_IMPLEMENTED;
5533}
5534
5535
5536static DECLCALLBACK(int) vmsvga3dBackLogicOpsStretchBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5537{
5538 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5539
5540 RT_NOREF(pBackend, pDXContext);
5541 AssertFailed(); /** @todo Implement */
5542 return VERR_NOT_IMPLEMENTED;
5543}
5544
5545
5546static DECLCALLBACK(int) vmsvga3dBackLogicOpsColorFill(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5547{
5548 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5549
5550 RT_NOREF(pBackend, pDXContext);
5551 AssertFailed(); /** @todo Implement */
5552 return VERR_NOT_IMPLEMENTED;
5553}
5554
5555
5556static DECLCALLBACK(int) vmsvga3dBackLogicOpsAlphaBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5557{
5558 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5559
5560 RT_NOREF(pBackend, pDXContext);
5561 AssertFailed(); /** @todo Implement */
5562 return VERR_NOT_IMPLEMENTED;
5563}
5564
5565
5566static DECLCALLBACK(int) vmsvga3dBackLogicOpsClearTypeBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5567{
5568 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5569
5570 RT_NOREF(pBackend, pDXContext);
5571 AssertFailed(); /** @todo Implement */
5572 return VERR_NOT_IMPLEMENTED;
5573}
5574
5575
5576static DECLCALLBACK(int) vmsvga3dBackDefineGBSurface_v4(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5577{
5578 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5579
5580 RT_NOREF(pBackend, pDXContext);
5581 AssertFailed(); /** @todo Implement */
5582 return VERR_NOT_IMPLEMENTED;
5583}
5584
5585
5586static DECLCALLBACK(int) vmsvga3dBackDXSetCSUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5587{
5588 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5589
5590 RT_NOREF(pBackend, pDXContext);
5591 AssertFailed(); /** @todo Implement */
5592 return VERR_NOT_IMPLEMENTED;
5593}
5594
5595
5596static DECLCALLBACK(int) vmsvga3dBackDXSetMinLOD(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5597{
5598 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5599
5600 RT_NOREF(pBackend, pDXContext);
5601 AssertFailed(); /** @todo Implement */
5602 return VERR_NOT_IMPLEMENTED;
5603}
5604
5605
5606static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5607{
5608 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5609
5610 RT_NOREF(pBackend, pDXContext);
5611 AssertFailed(); /** @todo Implement */
5612 return VERR_NOT_IMPLEMENTED;
5613}
5614
5615
5616static DECLCALLBACK(int) vmsvga3dBackDXSetShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5617{
5618 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5619
5620 RT_NOREF(pBackend, pDXContext);
5621 AssertFailed(); /** @todo Implement */
5622 return VERR_NOT_IMPLEMENTED;
5623}
5624
5625
5626static DECLCALLBACK(int) vmsvga3dBackDXBindStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5627{
5628 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5629
5630 RT_NOREF(pBackend, pDXContext);
5631 AssertFailed(); /** @todo Implement */
5632 return VERR_NOT_IMPLEMENTED;
5633}
5634
5635
5636static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5637{
5638 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5639
5640 RT_NOREF(pBackend, pDXContext);
5641 AssertFailed(); /** @todo Implement */
5642 return VERR_NOT_IMPLEMENTED;
5643}
5644
5645
5646static DECLCALLBACK(int) vmsvga3dBackDXBindShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5647{
5648 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5649
5650 RT_NOREF(pBackend, pDXContext);
5651 AssertFailed(); /** @todo Implement */
5652 return VERR_NOT_IMPLEMENTED;
5653}
5654
5655
5656int vmsvga3dQueryInterface(PVGASTATECC pThisCC, char const *pszInterfaceName, void *pvInterfaceFuncs, size_t cbInterfaceFuncs)
5657{
5658 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
5659 AssertReturn(p3dState, VERR_NOT_SUPPORTED);
5660
5661 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5662 AssertReturn(pBackend, VERR_NOT_SUPPORTED);
5663
5664 if (pvInterfaceFuncs)
5665 RT_BZERO(pvInterfaceFuncs, cbInterfaceFuncs);
5666
5667 int rc = VINF_SUCCESS;
5668 if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_DX) == 0)
5669 {
5670 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSDX))
5671 {
5672 if (pvInterfaceFuncs)
5673 {
5674 VMSVGA3DBACKENDFUNCSDX *p = (VMSVGA3DBACKENDFUNCSDX *)pvInterfaceFuncs;
5675 p->pfnDXDefineContext = vmsvga3dBackDXDefineContext;
5676 p->pfnDXDestroyContext = vmsvga3dBackDXDestroyContext;
5677 p->pfnDXBindContext = vmsvga3dBackDXBindContext;
5678 p->pfnDXReadbackContext = vmsvga3dBackDXReadbackContext;
5679 p->pfnDXInvalidateContext = vmsvga3dBackDXInvalidateContext;
5680 p->pfnDXSetSingleConstantBuffer = vmsvga3dBackDXSetSingleConstantBuffer;
5681 p->pfnDXSetShaderResources = vmsvga3dBackDXSetShaderResources;
5682 p->pfnDXSetShader = vmsvga3dBackDXSetShader;
5683 p->pfnDXSetSamplers = vmsvga3dBackDXSetSamplers;
5684 p->pfnDXDraw = vmsvga3dBackDXDraw;
5685 p->pfnDXDrawIndexed = vmsvga3dBackDXDrawIndexed;
5686 p->pfnDXDrawInstanced = vmsvga3dBackDXDrawInstanced;
5687 p->pfnDXDrawIndexedInstanced = vmsvga3dBackDXDrawIndexedInstanced;
5688 p->pfnDXDrawAuto = vmsvga3dBackDXDrawAuto;
5689 p->pfnDXSetInputLayout = vmsvga3dBackDXSetInputLayout;
5690 p->pfnDXSetVertexBuffers = vmsvga3dBackDXSetVertexBuffers;
5691 p->pfnDXSetIndexBuffer = vmsvga3dBackDXSetIndexBuffer;
5692 p->pfnDXSetTopology = vmsvga3dBackDXSetTopology;
5693 p->pfnDXSetRenderTargets = vmsvga3dBackDXSetRenderTargets;
5694 p->pfnDXSetBlendState = vmsvga3dBackDXSetBlendState;
5695 p->pfnDXSetDepthStencilState = vmsvga3dBackDXSetDepthStencilState;
5696 p->pfnDXSetRasterizerState = vmsvga3dBackDXSetRasterizerState;
5697 p->pfnDXDefineQuery = vmsvga3dBackDXDefineQuery;
5698 p->pfnDXDestroyQuery = vmsvga3dBackDXDestroyQuery;
5699 p->pfnDXBindQuery = vmsvga3dBackDXBindQuery;
5700 p->pfnDXSetQueryOffset = vmsvga3dBackDXSetQueryOffset;
5701 p->pfnDXBeginQuery = vmsvga3dBackDXBeginQuery;
5702 p->pfnDXEndQuery = vmsvga3dBackDXEndQuery;
5703 p->pfnDXReadbackQuery = vmsvga3dBackDXReadbackQuery;
5704 p->pfnDXSetPredication = vmsvga3dBackDXSetPredication;
5705 p->pfnDXSetSOTargets = vmsvga3dBackDXSetSOTargets;
5706 p->pfnDXSetViewports = vmsvga3dBackDXSetViewports;
5707 p->pfnDXSetScissorRects = vmsvga3dBackDXSetScissorRects;
5708 p->pfnDXClearRenderTargetView = vmsvga3dBackDXClearRenderTargetView;
5709 p->pfnDXClearDepthStencilView = vmsvga3dBackDXClearDepthStencilView;
5710 p->pfnDXPredCopyRegion = vmsvga3dBackDXPredCopyRegion;
5711 p->pfnDXPredCopy = vmsvga3dBackDXPredCopy;
5712 p->pfnDXPresentBlt = vmsvga3dBackDXPresentBlt;
5713 p->pfnDXGenMips = vmsvga3dBackDXGenMips;
5714 p->pfnDXUpdateSubResource = vmsvga3dBackDXUpdateSubResource;
5715 p->pfnDXReadbackSubResource = vmsvga3dBackDXReadbackSubResource;
5716 p->pfnDXInvalidateSubResource = vmsvga3dBackDXInvalidateSubResource;
5717 p->pfnDXDefineShaderResourceView = vmsvga3dBackDXDefineShaderResourceView;
5718 p->pfnDXDestroyShaderResourceView = vmsvga3dBackDXDestroyShaderResourceView;
5719 p->pfnDXDefineRenderTargetView = vmsvga3dBackDXDefineRenderTargetView;
5720 p->pfnDXDestroyRenderTargetView = vmsvga3dBackDXDestroyRenderTargetView;
5721 p->pfnDXDefineDepthStencilView = vmsvga3dBackDXDefineDepthStencilView;
5722 p->pfnDXDestroyDepthStencilView = vmsvga3dBackDXDestroyDepthStencilView;
5723 p->pfnDXDefineElementLayout = vmsvga3dBackDXDefineElementLayout;
5724 p->pfnDXDestroyElementLayout = vmsvga3dBackDXDestroyElementLayout;
5725 p->pfnDXDefineBlendState = vmsvga3dBackDXDefineBlendState;
5726 p->pfnDXDestroyBlendState = vmsvga3dBackDXDestroyBlendState;
5727 p->pfnDXDefineDepthStencilState = vmsvga3dBackDXDefineDepthStencilState;
5728 p->pfnDXDestroyDepthStencilState = vmsvga3dBackDXDestroyDepthStencilState;
5729 p->pfnDXDefineRasterizerState = vmsvga3dBackDXDefineRasterizerState;
5730 p->pfnDXDestroyRasterizerState = vmsvga3dBackDXDestroyRasterizerState;
5731 p->pfnDXDefineSamplerState = vmsvga3dBackDXDefineSamplerState;
5732 p->pfnDXDestroySamplerState = vmsvga3dBackDXDestroySamplerState;
5733 p->pfnDXDefineShader = vmsvga3dBackDXDefineShader;
5734 p->pfnDXDestroyShader = vmsvga3dBackDXDestroyShader;
5735 p->pfnDXBindShader = vmsvga3dBackDXBindShader;
5736 p->pfnDXDefineStreamOutput = vmsvga3dBackDXDefineStreamOutput;
5737 p->pfnDXDestroyStreamOutput = vmsvga3dBackDXDestroyStreamOutput;
5738 p->pfnDXSetStreamOutput = vmsvga3dBackDXSetStreamOutput;
5739 p->pfnDXSetCOTable = vmsvga3dBackDXSetCOTable;
5740 p->pfnDXReadbackCOTable = vmsvga3dBackDXReadbackCOTable;
5741 p->pfnDXBufferCopy = vmsvga3dBackDXBufferCopy;
5742 p->pfnDXTransferFromBuffer = vmsvga3dBackDXTransferFromBuffer;
5743 p->pfnDXSurfaceCopyAndReadback = vmsvga3dBackDXSurfaceCopyAndReadback;
5744 p->pfnDXMoveQuery = vmsvga3dBackDXMoveQuery;
5745 p->pfnDXBindAllQuery = vmsvga3dBackDXBindAllQuery;
5746 p->pfnDXReadbackAllQuery = vmsvga3dBackDXReadbackAllQuery;
5747 p->pfnDXPredTransferFromBuffer = vmsvga3dBackDXPredTransferFromBuffer;
5748 p->pfnDXMobFence64 = vmsvga3dBackDXMobFence64;
5749 p->pfnDXBindAllShader = vmsvga3dBackDXBindAllShader;
5750 p->pfnDXHint = vmsvga3dBackDXHint;
5751 p->pfnDXBufferUpdate = vmsvga3dBackDXBufferUpdate;
5752 p->pfnDXSetVSConstantBufferOffset = vmsvga3dBackDXSetVSConstantBufferOffset;
5753 p->pfnDXSetPSConstantBufferOffset = vmsvga3dBackDXSetPSConstantBufferOffset;
5754 p->pfnDXSetGSConstantBufferOffset = vmsvga3dBackDXSetGSConstantBufferOffset;
5755 p->pfnDXSetHSConstantBufferOffset = vmsvga3dBackDXSetHSConstantBufferOffset;
5756 p->pfnDXSetDSConstantBufferOffset = vmsvga3dBackDXSetDSConstantBufferOffset;
5757 p->pfnDXSetCSConstantBufferOffset = vmsvga3dBackDXSetCSConstantBufferOffset;
5758 p->pfnDXCondBindAllShader = vmsvga3dBackDXCondBindAllShader;
5759 p->pfnScreenCopy = vmsvga3dBackScreenCopy;
5760 p->pfnGrowOTable = vmsvga3dBackGrowOTable;
5761 p->pfnDXGrowCOTable = vmsvga3dBackDXGrowCOTable;
5762 p->pfnIntraSurfaceCopy = vmsvga3dBackIntraSurfaceCopy;
5763 p->pfnDefineGBSurface_v3 = vmsvga3dBackDefineGBSurface_v3;
5764 p->pfnDXResolveCopy = vmsvga3dBackDXResolveCopy;
5765 p->pfnDXPredResolveCopy = vmsvga3dBackDXPredResolveCopy;
5766 p->pfnDXPredConvertRegion = vmsvga3dBackDXPredConvertRegion;
5767 p->pfnDXPredConvert = vmsvga3dBackDXPredConvert;
5768 p->pfnWholeSurfaceCopy = vmsvga3dBackWholeSurfaceCopy;
5769 p->pfnDXDefineUAView = vmsvga3dBackDXDefineUAView;
5770 p->pfnDXDestroyUAView = vmsvga3dBackDXDestroyUAView;
5771 p->pfnDXClearUAViewUint = vmsvga3dBackDXClearUAViewUint;
5772 p->pfnDXClearUAViewFloat = vmsvga3dBackDXClearUAViewFloat;
5773 p->pfnDXCopyStructureCount = vmsvga3dBackDXCopyStructureCount;
5774 p->pfnDXSetUAViews = vmsvga3dBackDXSetUAViews;
5775 p->pfnDXDrawIndexedInstancedIndirect = vmsvga3dBackDXDrawIndexedInstancedIndirect;
5776 p->pfnDXDrawInstancedIndirect = vmsvga3dBackDXDrawInstancedIndirect;
5777 p->pfnDXDispatch = vmsvga3dBackDXDispatch;
5778 p->pfnDXDispatchIndirect = vmsvga3dBackDXDispatchIndirect;
5779 p->pfnWriteZeroSurface = vmsvga3dBackWriteZeroSurface;
5780 p->pfnHintZeroSurface = vmsvga3dBackHintZeroSurface;
5781 p->pfnDXTransferToBuffer = vmsvga3dBackDXTransferToBuffer;
5782 p->pfnDXSetStructureCount = vmsvga3dBackDXSetStructureCount;
5783 p->pfnLogicOpsBitBlt = vmsvga3dBackLogicOpsBitBlt;
5784 p->pfnLogicOpsTransBlt = vmsvga3dBackLogicOpsTransBlt;
5785 p->pfnLogicOpsStretchBlt = vmsvga3dBackLogicOpsStretchBlt;
5786 p->pfnLogicOpsColorFill = vmsvga3dBackLogicOpsColorFill;
5787 p->pfnLogicOpsAlphaBlend = vmsvga3dBackLogicOpsAlphaBlend;
5788 p->pfnLogicOpsClearTypeBlend = vmsvga3dBackLogicOpsClearTypeBlend;
5789 p->pfnDefineGBSurface_v4 = vmsvga3dBackDefineGBSurface_v4;
5790 p->pfnDXSetCSUAViews = vmsvga3dBackDXSetCSUAViews;
5791 p->pfnDXSetMinLOD = vmsvga3dBackDXSetMinLOD;
5792 p->pfnDXDefineStreamOutputWithMob = vmsvga3dBackDXDefineStreamOutputWithMob;
5793 p->pfnDXSetShaderIface = vmsvga3dBackDXSetShaderIface;
5794 p->pfnDXBindStreamOutput = vmsvga3dBackDXBindStreamOutput;
5795 p->pfnSurfaceStretchBltNonMSToMS = vmsvga3dBackSurfaceStretchBltNonMSToMS;
5796 p->pfnDXBindShaderIface = vmsvga3dBackDXBindShaderIface;
5797 }
5798 }
5799 else
5800 {
5801 AssertFailed();
5802 rc = VERR_INVALID_PARAMETER;
5803 }
5804 }
5805 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_MAP) == 0)
5806 {
5807 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSMAP))
5808 {
5809 if (pvInterfaceFuncs)
5810 {
5811 VMSVGA3DBACKENDFUNCSMAP *p = (VMSVGA3DBACKENDFUNCSMAP *)pvInterfaceFuncs;
5812 p->pfnSurfaceMap = vmsvga3dSurfaceMap;
5813 p->pfnSurfaceUnmap = vmsvga3dSurfaceUnmap;
5814 }
5815 }
5816 else
5817 {
5818 AssertFailed();
5819 rc = VERR_INVALID_PARAMETER;
5820 }
5821 }
5822 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_GBO) == 0)
5823 {
5824 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSGBO))
5825 {
5826 if (pvInterfaceFuncs)
5827 {
5828 VMSVGA3DBACKENDFUNCSGBO *p = (VMSVGA3DBACKENDFUNCSGBO *)pvInterfaceFuncs;
5829 p->pfnScreenTargetBind = vmsvga3dScreenTargetBind;
5830 p->pfnScreenTargetUpdate = vmsvga3dScreenTargetUpdate;
5831 }
5832 }
5833 else
5834 {
5835 AssertFailed();
5836 rc = VERR_INVALID_PARAMETER;
5837 }
5838 }
5839 else
5840 rc = VERR_NOT_IMPLEMENTED;
5841 return rc;
5842}
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