DevVGA-SVGA3d-win-dx.cpp@ 88830

最後變更在這個檔案從88830是 88803,由 vboxsync 提交於 4 年前
Devices/Graphics: more DX commands; disassemble shaders for debug log. bugref:9830
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1	/* $Id: DevVGA-SVGA3d-win-dx.cpp 88803 2021-04-30 13:23:05Z vboxsync $ */
2	/** @file
3	* DevVMWare - VMWare SVGA device
4	*/
5
6	/*
7	* Copyright (C) 2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.alldomusa.eu.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23	#include <VBox/AssertGuest.h>
24	#include <VBox/log.h>
25	#include <VBox/vmm/pdmdev.h>
26	#include <VBox/vmm/pgm.h>
27
28	#include <iprt/assert.h>
29	#include <iprt/errcore.h>
30	#include <iprt/mem.h>
31
32	#include <VBoxVideo.h> /* required by DevVGA.h */
33	#include <VBoxVideo3D.h>
34
35	/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
36	#include "DevVGA.h"
37
38	#include "DevVGA-SVGA.h"
39	#include "DevVGA-SVGA3d.h"
40	#include "DevVGA-SVGA3d-internal.h"
41	#include "DevVGA-SVGA3d-dx-shader.h"
42
43	#include <d3d11.h>
44
45	#define DX_RELEASE_ARRAY(a_Count, a_papArray) do { \
46	for (uint32_t i = 0; i < (a_Count); ++i) \
47	D3D_RELEASE((a_papArray)[i]); \
48	} while (0)
49
50	typedef struct DXDEVICE
51	{
52	ID3D11Device pDevice; / Device. */
53	ID3D11DeviceContext pImmediateContext; / Corresponding context. */
54	IDXGIFactory pDxgiFactory; / DXGI Factory. */
55	D3D_FEATURE_LEVEL FeatureLevel;
56	} DXDEVICE;
57
58	/* What kind of resource has been created for the VMSVGA3D surface. */
59	typedef enum VMSVGA3DBACKRESTYPE
60	{
61	VMSVGA3D_RESTYPE_NONE = 0,
62	VMSVGA3D_RESTYPE_SCREEN_TARGET = 1,
63	VMSVGA3D_RESTYPE_SURFACE = 2,
64	VMSVGA3D_RESTYPE_TEXTURE = 3,
65	VMSVGA3D_RESTYPE_CUBE_TEXTURE = 4,
66	VMSVGA3D_RESTYPE_VOLUME_TEXTURE = 5,
67	VMSVGA3D_RESTYPE_BUFFER = 6,
68	} VMSVGA3DBACKRESTYPE;
69
70	typedef struct VMSVGA3DBACKENDSURFACE
71	{
72	VMSVGA3DBACKRESTYPE enmResType;
73	DXGI_FORMAT enmDxgiFormat;
74	union
75	{
76	struct
77	{
78	ID3D11Texture2D pTexture; / The texture for the screen content. */
79	ID3D11Texture2D pDynamicTexture; / For screen updates from memory. / /* @todo One for all screens. */
80	ID3D11Texture2D pStagingTexture; / For Reading the screen content. / /* @todo One for all screens. */
81	} ScreenTarget;
82	struct
83	{
84	ID3D11Texture2D pTexture; / The texture for the screen content. */
85	ID3D11Texture2D pDynamicTexture; / For screen updates from memory. / /* @todo One for all screens. */
86	ID3D11Texture2D pStagingTexture; / For Reading the screen content. / /* @todo One for all screens. */
87	} Texture;
88	struct
89	{
90	ID3D11Buffer *pBuffer;
91	} Buffer;
92	} u;
93	} VMSVGA3DBACKENDSURFACE;
94
95	typedef struct VMSVGAHWSCREEN
96	{
97	ID3D11Texture2D pTexture; / Shared texture for the screen content. Only used as CopyResource target. */
98	IDXGIResource pDxgiResource; / Interface of the texture. */
99	IDXGIKeyedMutex pDXGIKeyedMutex; / Synchronization interface for the render device. */
100	HANDLE SharedHandle; /* The shared handle of this structure. */
101	uint32_t sidScreenTarget; /* The source surface for this screen. */
102	} VMSVGAHWSCREEN;
103
104
105	typedef struct DXELEMENTLAYOUT
106	{
107	ID3D11InputLayout *pElementLayout;
108	uint32_t cElementDesc;
109	D3D11_INPUT_ELEMENT_DESC aElementDesc[32];
110	} DXELEMENTLAYOUT;
111
112	typedef struct DXSHADER
113	{
114	SVGA3dShaderType enmShaderType;
115	union
116	{
117	ID3D11DeviceChild pShader; / All. */
118	ID3D11VertexShader pVertexShader; / SVGA3D_SHADERTYPE_VS */
119	ID3D11PixelShader pPixelShader; / SVGA3D_SHADERTYPE_PS */
120	ID3D11GeometryShader pGeometryShader; / SVGA3D_SHADERTYPE_GS */
121	ID3D11HullShader pHullShader; / SVGA3D_SHADERTYPE_HS */
122	ID3D11DomainShader pDomainShader; / SVGA3D_SHADERTYPE_DS */
123	ID3D11ComputeShader pComputeShader; / SVGA3D_SHADERTYPE_CS */
124	};
125	void *pvDXBC;
126	uint32_t cbDXBC;
127	} DXSHADER;
128
129	typedef struct VMSVGA3DBACKENDDXCONTEXT
130	{
131	DXDEVICE device; /* Device for the this context operation. */
132
133	/* Arrays for Context-Object Tables. Number of entries depends on COTable size. */
134	uint32_t cBlendState; /* Number of entries in the papBlendState array. */
135	uint32_t cDepthStencilState; /* papDepthStencilState */
136	uint32_t cSamplerState; /* papSamplerState */
137	uint32_t cRasterizerState; /* papRasterizerState */
138	uint32_t cElementLayout; /* papElementLayout */
139	uint32_t cRenderTargetView; /* papRenderTargetView */
140	uint32_t cDepthStencilView; /* papDepthStencilView */
141	uint32_t cShaderResourceView; /* papShaderResourceView */
142	uint32_t cQuery; /* papQuery */
143	uint32_t cShader; /* papShader */
144	ID3D11BlendState **papBlendState;
145	ID3D11DepthStencilState **papDepthStencilState;
146	ID3D11SamplerState **papSamplerState;
147	ID3D11RasterizerState **papRasterizerState;
148	DXELEMENTLAYOUT *paElementLayout;
149	ID3D11RenderTargetView **papRenderTargetView;
150	ID3D11DepthStencilView **papDepthStencilView;
151	ID3D11ShaderResourceView **papShaderResourceView;
152	ID3D11Query **papQuery;
153	DXSHADER *paShader;
154	} VMSVGA3DBACKENDDXCONTEXT;
155
156	typedef HRESULT FN_D3D_DISASSEMBLE(LPCVOID pSrcData, SIZE_T SrcDataSize, UINT Flags, LPCSTR szComments, ID3D10Blob **ppDisassembly);
157	typedef FN_D3D_DISASSEMBLE *PFN_D3D_DISASSEMBLE;
158
159	typedef struct VMSVGA3DBACKEND
160	{
161	RTLDRMOD hD3D11;
162	PFN_D3D11_CREATE_DEVICE pfnD3D11CreateDevice;
163
164	RTLDRMOD hD3DCompiler;
165	PFN_D3D_DISASSEMBLE pfnD3DDisassemble;
166
167	ID3D11Device pDevice; / Device for the VMSVGA3D context independent operation. */
168	ID3D11DeviceContext pImmediateContext; / Corresponding context. */
169	IDXGIFactory pDxgiFactory; / DXGI Factory. */
170	D3D_FEATURE_LEVEL FeatureLevel;
171	} VMSVGA3DBACKEND;
172
173
174	static DXGI_FORMAT vmsvgaDXScreenTargetFormat2Dxgi(SVGA3dSurfaceFormat format)
175	{
176	switch (format)
177	{
178	/** @todo More formats. */
179	case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
180	case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
181	case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
182	default:
183	AssertFailed();
184	break;
185	}
186	return DXGI_FORMAT_UNKNOWN;
187	}
188
189
190	static DXGI_FORMAT vmsvgaDXSurfaceFormat2Dxgi(SVGA3dSurfaceFormat format)
191	{
192	/* Ensure that correct headers are used.
193	* SVGA3D_AYUV was equal to 45, then replaced with SVGA3D_FORMAT_DEAD2 = 45, and redefined as SVGA3D_AYUV = 152.
194	*/
195	AssertCompile(SVGA3D_AYUV == 152);
196
197	#define DXGI_FORMAT_ DXGI_FORMAT_UNKNOWN
198	/** @todo More formats. */
199	switch (format)
200	{
201	case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8X8_UNORM;
202	case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
203	case SVGA3D_R5G6B5: return DXGI_FORMAT_B5G6R5_UNORM;
204	case SVGA3D_X1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
205	case SVGA3D_A1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
206	case SVGA3D_A4R4G4B4: break; // 11.1 return DXGI_FORMAT_B4G4R4A4_UNORM;
207	case SVGA3D_Z_D32: break;
208	case SVGA3D_Z_D16: return DXGI_FORMAT_D16_UNORM;
209	case SVGA3D_Z_D24S8: return DXGI_FORMAT_D24_UNORM_S8_UINT;
210	case SVGA3D_Z_D15S1: break;
211	case SVGA3D_LUMINANCE8: return DXGI_FORMAT_;
212	case SVGA3D_LUMINANCE4_ALPHA4: return DXGI_FORMAT_;
213	case SVGA3D_LUMINANCE16: return DXGI_FORMAT_;
214	case SVGA3D_LUMINANCE8_ALPHA8: return DXGI_FORMAT_;
215	case SVGA3D_DXT1: return DXGI_FORMAT_;
216	case SVGA3D_DXT2: return DXGI_FORMAT_;
217	case SVGA3D_DXT3: return DXGI_FORMAT_;
218	case SVGA3D_DXT4: return DXGI_FORMAT_;
219	case SVGA3D_DXT5: return DXGI_FORMAT_;
220	case SVGA3D_BUMPU8V8: return DXGI_FORMAT_;
221	case SVGA3D_BUMPL6V5U5: return DXGI_FORMAT_;
222	case SVGA3D_BUMPX8L8V8U8: return DXGI_FORMAT_;
223	case SVGA3D_FORMAT_DEAD1: break;
224	case SVGA3D_ARGB_S10E5: return DXGI_FORMAT_;
225	case SVGA3D_ARGB_S23E8: return DXGI_FORMAT_;
226	case SVGA3D_A2R10G10B10: return DXGI_FORMAT_;
227	case SVGA3D_V8U8: return DXGI_FORMAT_;
228	case SVGA3D_Q8W8V8U8: return DXGI_FORMAT_;
229	case SVGA3D_CxV8U8: return DXGI_FORMAT_;
230	case SVGA3D_X8L8V8U8: return DXGI_FORMAT_;
231	case SVGA3D_A2W10V10U10: return DXGI_FORMAT_;
232	case SVGA3D_ALPHA8: return DXGI_FORMAT_;
233	case SVGA3D_R_S10E5: return DXGI_FORMAT_;
234	case SVGA3D_R_S23E8: return DXGI_FORMAT_;
235	case SVGA3D_RG_S10E5: return DXGI_FORMAT_;
236	case SVGA3D_RG_S23E8: return DXGI_FORMAT_;
237	case SVGA3D_BUFFER: return DXGI_FORMAT_;
238	case SVGA3D_Z_D24X8: return DXGI_FORMAT_;
239	case SVGA3D_V16U16: return DXGI_FORMAT_;
240	case SVGA3D_G16R16: return DXGI_FORMAT_;
241	case SVGA3D_A16B16G16R16: return DXGI_FORMAT_;
242	case SVGA3D_UYVY: return DXGI_FORMAT_;
243	case SVGA3D_YUY2: return DXGI_FORMAT_;
244	case SVGA3D_NV12: return DXGI_FORMAT_;
245	case SVGA3D_FORMAT_DEAD2: break; /* Old SVGA3D_AYUV */
246	case SVGA3D_R32G32B32A32_TYPELESS: return DXGI_FORMAT_R32G32B32A32_TYPELESS;
247	case SVGA3D_R32G32B32A32_UINT: return DXGI_FORMAT_R32G32B32A32_UINT;
248	case SVGA3D_R32G32B32A32_SINT: return DXGI_FORMAT_R32G32B32A32_SINT;
249	case SVGA3D_R32G32B32_TYPELESS: return DXGI_FORMAT_R32G32B32_TYPELESS;
250	case SVGA3D_R32G32B32_FLOAT: return DXGI_FORMAT_R32G32B32_FLOAT;
251	case SVGA3D_R32G32B32_UINT: return DXGI_FORMAT_R32G32B32_UINT;
252	case SVGA3D_R32G32B32_SINT: return DXGI_FORMAT_R32G32B32_SINT;
253	case SVGA3D_R16G16B16A16_TYPELESS: return DXGI_FORMAT_R16G16B16A16_TYPELESS;
254	case SVGA3D_R16G16B16A16_UINT: return DXGI_FORMAT_R16G16B16A16_UINT;
255	case SVGA3D_R16G16B16A16_SNORM: return DXGI_FORMAT_R16G16B16A16_SNORM;
256	case SVGA3D_R16G16B16A16_SINT: return DXGI_FORMAT_R16G16B16A16_SINT;
257	case SVGA3D_R32G32_TYPELESS: return DXGI_FORMAT_R32G32_TYPELESS;
258	case SVGA3D_R32G32_UINT: return DXGI_FORMAT_R32G32_UINT;
259	case SVGA3D_R32G32_SINT: return DXGI_FORMAT_R32G32_SINT;
260	case SVGA3D_R32G8X24_TYPELESS: return DXGI_FORMAT_R32G8X24_TYPELESS;
261	case SVGA3D_D32_FLOAT_S8X24_UINT: return DXGI_FORMAT_D32_FLOAT_S8X24_UINT;
262	case SVGA3D_R32_FLOAT_X8X24: return DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS;
263	case SVGA3D_X32_G8X24_UINT: return DXGI_FORMAT_X32_TYPELESS_G8X24_UINT;
264	case SVGA3D_R10G10B10A2_TYPELESS: return DXGI_FORMAT_R10G10B10A2_TYPELESS;
265	case SVGA3D_R10G10B10A2_UINT: return DXGI_FORMAT_R10G10B10A2_UINT;
266	case SVGA3D_R11G11B10_FLOAT: return DXGI_FORMAT_R11G11B10_FLOAT;
267	case SVGA3D_R8G8B8A8_TYPELESS: return DXGI_FORMAT_R8G8B8A8_TYPELESS;
268	case SVGA3D_R8G8B8A8_UNORM: return DXGI_FORMAT_R8G8B8A8_UNORM;
269	case SVGA3D_R8G8B8A8_UNORM_SRGB: return DXGI_FORMAT_R8G8B8A8_UNORM_SRGB;
270	case SVGA3D_R8G8B8A8_UINT: return DXGI_FORMAT_R8G8B8A8_UINT;
271	case SVGA3D_R8G8B8A8_SINT: return DXGI_FORMAT_R8G8B8A8_SINT;
272	case SVGA3D_R16G16_TYPELESS: return DXGI_FORMAT_R16G16_TYPELESS;
273	case SVGA3D_R16G16_UINT: return DXGI_FORMAT_R16G16_UINT;
274	case SVGA3D_R16G16_SINT: return DXGI_FORMAT_R16G16_SINT;
275	case SVGA3D_R32_TYPELESS: return DXGI_FORMAT_R32_TYPELESS;
276	case SVGA3D_D32_FLOAT: return DXGI_FORMAT_D32_FLOAT;
277	case SVGA3D_R32_UINT: return DXGI_FORMAT_R32_UINT;
278	case SVGA3D_R32_SINT: return DXGI_FORMAT_R32_SINT;
279	case SVGA3D_R24G8_TYPELESS: return DXGI_FORMAT_R24G8_TYPELESS;
280	case SVGA3D_D24_UNORM_S8_UINT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
281	case SVGA3D_R24_UNORM_X8: return DXGI_FORMAT_R24_UNORM_X8_TYPELESS;
282	case SVGA3D_X24_G8_UINT: return DXGI_FORMAT_X24_TYPELESS_G8_UINT;
283	case SVGA3D_R8G8_TYPELESS: return DXGI_FORMAT_R8G8_TYPELESS;
284	case SVGA3D_R8G8_UNORM: return DXGI_FORMAT_R8G8_UNORM;
285	case SVGA3D_R8G8_UINT: return DXGI_FORMAT_R8G8_UINT;
286	case SVGA3D_R8G8_SINT: return DXGI_FORMAT_R8G8_SINT;
287	case SVGA3D_R16_TYPELESS: return DXGI_FORMAT_R16_TYPELESS;
288	case SVGA3D_R16_UNORM: return DXGI_FORMAT_R16_UNORM;
289	case SVGA3D_R16_UINT: return DXGI_FORMAT_R16_UINT;
290	case SVGA3D_R16_SNORM: return DXGI_FORMAT_R16_SNORM;
291	case SVGA3D_R16_SINT: return DXGI_FORMAT_R16_SINT;
292	case SVGA3D_R8_TYPELESS: return DXGI_FORMAT_R8_TYPELESS;
293	case SVGA3D_R8_UNORM: return DXGI_FORMAT_R8_UNORM;
294	case SVGA3D_R8_UINT: return DXGI_FORMAT_R8_UINT;
295	case SVGA3D_R8_SNORM: return DXGI_FORMAT_R8_SNORM;
296	case SVGA3D_R8_SINT: return DXGI_FORMAT_R8_SINT;
297	case SVGA3D_P8: break;
298	case SVGA3D_R9G9B9E5_SHAREDEXP: return DXGI_FORMAT_R9G9B9E5_SHAREDEXP;
299	case SVGA3D_R8G8_B8G8_UNORM: return DXGI_FORMAT_R8G8_B8G8_UNORM;
300	case SVGA3D_G8R8_G8B8_UNORM: return DXGI_FORMAT_G8R8_G8B8_UNORM;
301	case SVGA3D_BC1_TYPELESS: return DXGI_FORMAT_BC1_TYPELESS;
302	case SVGA3D_BC1_UNORM_SRGB: return DXGI_FORMAT_BC1_UNORM_SRGB;
303	case SVGA3D_BC2_TYPELESS: return DXGI_FORMAT_BC2_TYPELESS;
304	case SVGA3D_BC2_UNORM_SRGB: return DXGI_FORMAT_BC2_UNORM_SRGB;
305	case SVGA3D_BC3_TYPELESS: return DXGI_FORMAT_BC3_TYPELESS;
306	case SVGA3D_BC3_UNORM_SRGB: return DXGI_FORMAT_BC3_UNORM_SRGB;
307	case SVGA3D_BC4_TYPELESS: return DXGI_FORMAT_BC4_TYPELESS;
308	case SVGA3D_ATI1: break;
309	case SVGA3D_BC4_SNORM: return DXGI_FORMAT_BC4_SNORM;
310	case SVGA3D_BC5_TYPELESS: return DXGI_FORMAT_BC5_TYPELESS;
311	case SVGA3D_ATI2: break;
312	case SVGA3D_BC5_SNORM: return DXGI_FORMAT_BC5_SNORM;
313	case SVGA3D_R10G10B10_XR_BIAS_A2_UNORM: return DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM;
314	case SVGA3D_B8G8R8A8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
315	case SVGA3D_B8G8R8A8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
316	case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8X8_TYPELESS;
317	case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8X8_UNORM_SRGB;
318	case SVGA3D_Z_DF16: break;
319	case SVGA3D_Z_DF24: break;
320	case SVGA3D_Z_D24S8_INT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
321	case SVGA3D_YV12: break;
322	case SVGA3D_R32G32B32A32_FLOAT: return DXGI_FORMAT_R32G32B32A32_FLOAT;
323	case SVGA3D_R16G16B16A16_FLOAT: return DXGI_FORMAT_R16G16B16A16_FLOAT;
324	case SVGA3D_R16G16B16A16_UNORM: return DXGI_FORMAT_R16G16B16A16_UNORM;
325	case SVGA3D_R32G32_FLOAT: return DXGI_FORMAT_R32G32_FLOAT;
326	case SVGA3D_R10G10B10A2_UNORM: return DXGI_FORMAT_R10G10B10A2_UNORM;
327	case SVGA3D_R8G8B8A8_SNORM: return DXGI_FORMAT_R8G8B8A8_SNORM;
328	case SVGA3D_R16G16_FLOAT: return DXGI_FORMAT_R16G16_FLOAT;
329	case SVGA3D_R16G16_UNORM: return DXGI_FORMAT_R16G16_UNORM;
330	case SVGA3D_R16G16_SNORM: return DXGI_FORMAT_R16G16_SNORM;
331	case SVGA3D_R32_FLOAT: return DXGI_FORMAT_R32_FLOAT;
332	case SVGA3D_R8G8_SNORM: return DXGI_FORMAT_R8G8_SNORM;
333	case SVGA3D_R16_FLOAT: return DXGI_FORMAT_R16_FLOAT;
334	case SVGA3D_D16_UNORM: return DXGI_FORMAT_D16_UNORM;
335	case SVGA3D_A8_UNORM: return DXGI_FORMAT_A8_UNORM;
336	case SVGA3D_BC1_UNORM: return DXGI_FORMAT_BC1_UNORM;
337	case SVGA3D_BC2_UNORM: return DXGI_FORMAT_BC2_UNORM;
338	case SVGA3D_BC3_UNORM: return DXGI_FORMAT_BC3_UNORM;
339	case SVGA3D_B5G6R5_UNORM: return DXGI_FORMAT_B5G6R5_UNORM;
340	case SVGA3D_B5G5R5A1_UNORM: return DXGI_FORMAT_B5G5R5A1_UNORM;
341	case SVGA3D_B8G8R8A8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
342	case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8X8_UNORM;
343	case SVGA3D_BC4_UNORM: return DXGI_FORMAT_BC4_UNORM;
344	case SVGA3D_BC5_UNORM: return DXGI_FORMAT_BC5_UNORM;
345
346	case SVGA3D_B4G4R4A4_UNORM: return DXGI_FORMAT_;
347	case SVGA3D_BC6H_TYPELESS: return DXGI_FORMAT_;
348	case SVGA3D_BC6H_UF16: return DXGI_FORMAT_;
349	case SVGA3D_BC6H_SF16: return DXGI_FORMAT_;
350	case SVGA3D_BC7_TYPELESS: return DXGI_FORMAT_;
351	case SVGA3D_BC7_UNORM: return DXGI_FORMAT_;
352	case SVGA3D_BC7_UNORM_SRGB: return DXGI_FORMAT_;
353	case SVGA3D_AYUV: return DXGI_FORMAT_;
354
355	case SVGA3D_FORMAT_INVALID:
356	case SVGA3D_FORMAT_MAX: break;
357	}
358	// AssertFailed();
359	return DXGI_FORMAT_UNKNOWN;
360	#undef DXGI_FORMAT_
361	}
362
363
364	static SVGA3dSurfaceFormat vmsvgaDXDevCapSurfaceFmt2Format(SVGA3dDevCapIndex enmDevCap)
365	{
366	switch (enmDevCap)
367	{
368	case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
369	case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
370	case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
371	case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
372	case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
373	case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
374	case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5: return SVGA3D_R5G6B5;
375	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
376	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
377	case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8: return SVGA3D_ALPHA8;
378	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
379	case SVGA3D_DEVCAP_SURFACEFMT_Z_D16: return SVGA3D_Z_D16;
380	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8: return SVGA3D_Z_D24S8;
381	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8: return SVGA3D_Z_D24X8;
382	case SVGA3D_DEVCAP_SURFACEFMT_DXT1: return SVGA3D_DXT1;
383	case SVGA3D_DEVCAP_SURFACEFMT_DXT2: return SVGA3D_DXT2;
384	case SVGA3D_DEVCAP_SURFACEFMT_DXT3: return SVGA3D_DXT3;
385	case SVGA3D_DEVCAP_SURFACEFMT_DXT4: return SVGA3D_DXT4;
386	case SVGA3D_DEVCAP_SURFACEFMT_DXT5: return SVGA3D_DXT5;
387	case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
388	case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
389	case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
390	case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
391	case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8: return SVGA3D_CxV8U8;
392	case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5: return SVGA3D_R_S10E5;
393	case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8: return SVGA3D_R_S23E8;
394	case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5: return SVGA3D_RG_S10E5;
395	case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8: return SVGA3D_RG_S23E8;
396	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
397	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
398	case SVGA3D_DEVCAP_SURFACEFMT_V16U16: return SVGA3D_V16U16;
399	case SVGA3D_DEVCAP_SURFACEFMT_G16R16: return SVGA3D_G16R16;
400	case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
401	case SVGA3D_DEVCAP_SURFACEFMT_UYVY: return SVGA3D_UYVY;
402	case SVGA3D_DEVCAP_SURFACEFMT_YUY2: return SVGA3D_YUY2;
403	case SVGA3D_DEVCAP_SURFACEFMT_NV12: return SVGA3D_NV12;
404	case SVGA3D_DEVCAP_DEAD10: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_SURFACEFMT_AYUV -> SVGA3D_AYUV */
405	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16: return SVGA3D_Z_DF16;
406	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24: return SVGA3D_Z_DF24;
407	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
408	case SVGA3D_DEVCAP_SURFACEFMT_ATI1: return SVGA3D_ATI1;
409	case SVGA3D_DEVCAP_SURFACEFMT_ATI2: return SVGA3D_ATI2;
410	case SVGA3D_DEVCAP_SURFACEFMT_YV12: return SVGA3D_YV12;
411	default:
412	AssertFailed();
413	break;
414	}
415	return SVGA3D_FORMAT_INVALID;
416	}
417
418
419	static SVGA3dSurfaceFormat vmsvgaDXDevCapDxfmt2Format(SVGA3dDevCapIndex enmDevCap)
420	{
421	switch (enmDevCap)
422	{
423	case SVGA3D_DEVCAP_DXFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
424	case SVGA3D_DEVCAP_DXFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
425	case SVGA3D_DEVCAP_DXFMT_R5G6B5: return SVGA3D_R5G6B5;
426	case SVGA3D_DEVCAP_DXFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
427	case SVGA3D_DEVCAP_DXFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
428	case SVGA3D_DEVCAP_DXFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
429	case SVGA3D_DEVCAP_DXFMT_Z_D32: return SVGA3D_Z_D32;
430	case SVGA3D_DEVCAP_DXFMT_Z_D16: return SVGA3D_Z_D16;
431	case SVGA3D_DEVCAP_DXFMT_Z_D24S8: return SVGA3D_Z_D24S8;
432	case SVGA3D_DEVCAP_DXFMT_Z_D15S1: return SVGA3D_Z_D15S1;
433	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
434	case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4: return SVGA3D_LUMINANCE4_ALPHA4;
435	case SVGA3D_DEVCAP_DXFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
436	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
437	case SVGA3D_DEVCAP_DXFMT_DXT1: return SVGA3D_DXT1;
438	case SVGA3D_DEVCAP_DXFMT_DXT2: return SVGA3D_DXT2;
439	case SVGA3D_DEVCAP_DXFMT_DXT3: return SVGA3D_DXT3;
440	case SVGA3D_DEVCAP_DXFMT_DXT4: return SVGA3D_DXT4;
441	case SVGA3D_DEVCAP_DXFMT_DXT5: return SVGA3D_DXT5;
442	case SVGA3D_DEVCAP_DXFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
443	case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5: return SVGA3D_BUMPL6V5U5;
444	case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
445	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1: return SVGA3D_FORMAT_DEAD1;
446	case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
447	case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
448	case SVGA3D_DEVCAP_DXFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
449	case SVGA3D_DEVCAP_DXFMT_V8U8: return SVGA3D_V8U8;
450	case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
451	case SVGA3D_DEVCAP_DXFMT_CxV8U8: return SVGA3D_CxV8U8;
452	case SVGA3D_DEVCAP_DXFMT_X8L8V8U8: return SVGA3D_X8L8V8U8;
453	case SVGA3D_DEVCAP_DXFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
454	case SVGA3D_DEVCAP_DXFMT_ALPHA8: return SVGA3D_ALPHA8;
455	case SVGA3D_DEVCAP_DXFMT_R_S10E5: return SVGA3D_R_S10E5;
456	case SVGA3D_DEVCAP_DXFMT_R_S23E8: return SVGA3D_R_S23E8;
457	case SVGA3D_DEVCAP_DXFMT_RG_S10E5: return SVGA3D_RG_S10E5;
458	case SVGA3D_DEVCAP_DXFMT_RG_S23E8: return SVGA3D_RG_S23E8;
459	case SVGA3D_DEVCAP_DXFMT_BUFFER: return SVGA3D_BUFFER;
460	case SVGA3D_DEVCAP_DXFMT_Z_D24X8: return SVGA3D_Z_D24X8;
461	case SVGA3D_DEVCAP_DXFMT_V16U16: return SVGA3D_V16U16;
462	case SVGA3D_DEVCAP_DXFMT_G16R16: return SVGA3D_G16R16;
463	case SVGA3D_DEVCAP_DXFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
464	case SVGA3D_DEVCAP_DXFMT_UYVY: return SVGA3D_UYVY;
465	case SVGA3D_DEVCAP_DXFMT_YUY2: return SVGA3D_YUY2;
466	case SVGA3D_DEVCAP_DXFMT_NV12: return SVGA3D_NV12;
467	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_DXFMT_AYUV -> SVGA3D_AYUV */
468	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS: return SVGA3D_R32G32B32A32_TYPELESS;
469	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT: return SVGA3D_R32G32B32A32_UINT;
470	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT: return SVGA3D_R32G32B32A32_SINT;
471	case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS: return SVGA3D_R32G32B32_TYPELESS;
472	case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT: return SVGA3D_R32G32B32_FLOAT;
473	case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT: return SVGA3D_R32G32B32_UINT;
474	case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT: return SVGA3D_R32G32B32_SINT;
475	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS: return SVGA3D_R16G16B16A16_TYPELESS;
476	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT: return SVGA3D_R16G16B16A16_UINT;
477	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM: return SVGA3D_R16G16B16A16_SNORM;
478	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT: return SVGA3D_R16G16B16A16_SINT;
479	case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS: return SVGA3D_R32G32_TYPELESS;
480	case SVGA3D_DEVCAP_DXFMT_R32G32_UINT: return SVGA3D_R32G32_UINT;
481	case SVGA3D_DEVCAP_DXFMT_R32G32_SINT: return SVGA3D_R32G32_SINT;
482	case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS: return SVGA3D_R32G8X24_TYPELESS;
483	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT: return SVGA3D_D32_FLOAT_S8X24_UINT;
484	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24: return SVGA3D_R32_FLOAT_X8X24;
485	case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT: return SVGA3D_X32_G8X24_UINT;
486	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS: return SVGA3D_R10G10B10A2_TYPELESS;
487	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT: return SVGA3D_R10G10B10A2_UINT;
488	case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT: return SVGA3D_R11G11B10_FLOAT;
489	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS: return SVGA3D_R8G8B8A8_TYPELESS;
490	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM: return SVGA3D_R8G8B8A8_UNORM;
491	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB: return SVGA3D_R8G8B8A8_UNORM_SRGB;
492	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT: return SVGA3D_R8G8B8A8_UINT;
493	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT: return SVGA3D_R8G8B8A8_SINT;
494	case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS: return SVGA3D_R16G16_TYPELESS;
495	case SVGA3D_DEVCAP_DXFMT_R16G16_UINT: return SVGA3D_R16G16_UINT;
496	case SVGA3D_DEVCAP_DXFMT_R16G16_SINT: return SVGA3D_R16G16_SINT;
497	case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS: return SVGA3D_R32_TYPELESS;
498	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT: return SVGA3D_D32_FLOAT;
499	case SVGA3D_DEVCAP_DXFMT_R32_UINT: return SVGA3D_R32_UINT;
500	case SVGA3D_DEVCAP_DXFMT_R32_SINT: return SVGA3D_R32_SINT;
501	case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS: return SVGA3D_R24G8_TYPELESS;
502	case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT: return SVGA3D_D24_UNORM_S8_UINT;
503	case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8: return SVGA3D_R24_UNORM_X8;
504	case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT: return SVGA3D_X24_G8_UINT;
505	case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS: return SVGA3D_R8G8_TYPELESS;
506	case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM: return SVGA3D_R8G8_UNORM;
507	case SVGA3D_DEVCAP_DXFMT_R8G8_UINT: return SVGA3D_R8G8_UINT;
508	case SVGA3D_DEVCAP_DXFMT_R8G8_SINT: return SVGA3D_R8G8_SINT;
509	case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS: return SVGA3D_R16_TYPELESS;
510	case SVGA3D_DEVCAP_DXFMT_R16_UNORM: return SVGA3D_R16_UNORM;
511	case SVGA3D_DEVCAP_DXFMT_R16_UINT: return SVGA3D_R16_UINT;
512	case SVGA3D_DEVCAP_DXFMT_R16_SNORM: return SVGA3D_R16_SNORM;
513	case SVGA3D_DEVCAP_DXFMT_R16_SINT: return SVGA3D_R16_SINT;
514	case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS: return SVGA3D_R8_TYPELESS;
515	case SVGA3D_DEVCAP_DXFMT_R8_UNORM: return SVGA3D_R8_UNORM;
516	case SVGA3D_DEVCAP_DXFMT_R8_UINT: return SVGA3D_R8_UINT;
517	case SVGA3D_DEVCAP_DXFMT_R8_SNORM: return SVGA3D_R8_SNORM;
518	case SVGA3D_DEVCAP_DXFMT_R8_SINT: return SVGA3D_R8_SINT;
519	case SVGA3D_DEVCAP_DXFMT_P8: return SVGA3D_P8;
520	case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP: return SVGA3D_R9G9B9E5_SHAREDEXP;
521	case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM: return SVGA3D_R8G8_B8G8_UNORM;
522	case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM: return SVGA3D_G8R8_G8B8_UNORM;
523	case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS: return SVGA3D_BC1_TYPELESS;
524	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB: return SVGA3D_BC1_UNORM_SRGB;
525	case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS: return SVGA3D_BC2_TYPELESS;
526	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB: return SVGA3D_BC2_UNORM_SRGB;
527	case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS: return SVGA3D_BC3_TYPELESS;
528	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB: return SVGA3D_BC3_UNORM_SRGB;
529	case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS: return SVGA3D_BC4_TYPELESS;
530	case SVGA3D_DEVCAP_DXFMT_ATI1: return SVGA3D_ATI1;
531	case SVGA3D_DEVCAP_DXFMT_BC4_SNORM: return SVGA3D_BC4_SNORM;
532	case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS: return SVGA3D_BC5_TYPELESS;
533	case SVGA3D_DEVCAP_DXFMT_ATI2: return SVGA3D_ATI2;
534	case SVGA3D_DEVCAP_DXFMT_BC5_SNORM: return SVGA3D_BC5_SNORM;
535	case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM: return SVGA3D_R10G10B10_XR_BIAS_A2_UNORM;
536	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS: return SVGA3D_B8G8R8A8_TYPELESS;
537	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB: return SVGA3D_B8G8R8A8_UNORM_SRGB;
538	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS: return SVGA3D_B8G8R8X8_TYPELESS;
539	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB: return SVGA3D_B8G8R8X8_UNORM_SRGB;
540	case SVGA3D_DEVCAP_DXFMT_Z_DF16: return SVGA3D_Z_DF16;
541	case SVGA3D_DEVCAP_DXFMT_Z_DF24: return SVGA3D_Z_DF24;
542	case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
543	case SVGA3D_DEVCAP_DXFMT_YV12: return SVGA3D_YV12;
544	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT: return SVGA3D_R32G32B32A32_FLOAT;
545	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT: return SVGA3D_R16G16B16A16_FLOAT;
546	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM: return SVGA3D_R16G16B16A16_UNORM;
547	case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT: return SVGA3D_R32G32_FLOAT;
548	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM: return SVGA3D_R10G10B10A2_UNORM;
549	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM: return SVGA3D_R8G8B8A8_SNORM;
550	case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT: return SVGA3D_R16G16_FLOAT;
551	case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM: return SVGA3D_R16G16_UNORM;
552	case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM: return SVGA3D_R16G16_SNORM;
553	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT: return SVGA3D_R32_FLOAT;
554	case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM: return SVGA3D_R8G8_SNORM;
555	case SVGA3D_DEVCAP_DXFMT_R16_FLOAT: return SVGA3D_R16_FLOAT;
556	case SVGA3D_DEVCAP_DXFMT_D16_UNORM: return SVGA3D_D16_UNORM;
557	case SVGA3D_DEVCAP_DXFMT_A8_UNORM: return SVGA3D_A8_UNORM;
558	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM: return SVGA3D_BC1_UNORM;
559	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM: return SVGA3D_BC2_UNORM;
560	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM: return SVGA3D_BC3_UNORM;
561	case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM: return SVGA3D_B5G6R5_UNORM;
562	case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM: return SVGA3D_B5G5R5A1_UNORM;
563	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM: return SVGA3D_B8G8R8A8_UNORM;
564	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM: return SVGA3D_B8G8R8X8_UNORM;
565	case SVGA3D_DEVCAP_DXFMT_BC4_UNORM: return SVGA3D_BC4_UNORM;
566	case SVGA3D_DEVCAP_DXFMT_BC5_UNORM: return SVGA3D_BC5_UNORM;
567	case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS: return SVGA3D_BC6H_TYPELESS;
568	case SVGA3D_DEVCAP_DXFMT_BC6H_UF16: return SVGA3D_BC6H_UF16;
569	case SVGA3D_DEVCAP_DXFMT_BC6H_SF16: return SVGA3D_BC6H_SF16;
570	case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS: return SVGA3D_BC7_TYPELESS;
571	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM: return SVGA3D_BC7_UNORM;
572	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB: return SVGA3D_BC7_UNORM_SRGB;
573	default:
574	AssertFailed();
575	break;
576	}
577	return SVGA3D_FORMAT_INVALID;
578	}
579
580
581	static int vmsvgaDXCheckFormatSupportPreDX(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
582	{
583	int rc = VINF_SUCCESS;
584
585	*pu32DevCap = 0;
586
587	DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
588	if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
589	{
590	RT_NOREF(pState);
591	/** @todo Implement */
592	}
593	else
594	rc = VERR_NOT_SUPPORTED;
595	return rc;
596	}
597
598	static int vmsvgaDXCheckFormatSupport(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
599	{
600	int rc = VINF_SUCCESS;
601
602	*pu32DevCap = 0;
603
604	DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
605	if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
606	{
607	ID3D11Device *pDevice = pState->pBackend->pDevice;
608	UINT FormatSupport = 0;
609	HRESULT hr = pDevice->CheckFormatSupport(dxgiFormat, &FormatSupport);
610	if (SUCCEEDED(hr))
611	{
612	*pu32DevCap \|= SVGA3D_DXFMT_SUPPORTED;
613
614	if (FormatSupport & D3D11_FORMAT_SUPPORT_SHADER_SAMPLE)
615	*pu32DevCap \|= SVGA3D_DXFMT_SHADER_SAMPLE;
616
617	if (FormatSupport & D3D11_FORMAT_SUPPORT_RENDER_TARGET)
618	*pu32DevCap \|= SVGA3D_DXFMT_COLOR_RENDERTARGET;
619
620	if (FormatSupport & D3D11_FORMAT_SUPPORT_DEPTH_STENCIL)
621	*pu32DevCap \|= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
622
623	if (FormatSupport & D3D11_FORMAT_SUPPORT_BLENDABLE)
624	*pu32DevCap \|= SVGA3D_DXFMT_BLENDABLE;
625
626	if (FormatSupport & D3D11_FORMAT_SUPPORT_MIP)
627	*pu32DevCap \|= SVGA3D_DXFMT_MIPS;
628
629	if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURECUBE)
630	*pu32DevCap \|= SVGA3D_DXFMT_ARRAY;
631
632	if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURE3D)
633	*pu32DevCap \|= SVGA3D_DXFMT_VOLUME;
634
635	if (FormatSupport & D3D11_FORMAT_SUPPORT_IA_VERTEX_BUFFER)
636	*pu32DevCap \|= SVGA3D_DXFMT_DX_VERTEX_BUFFER;
637
638	UINT NumQualityLevels;
639	hr = pDevice->CheckMultisampleQualityLevels(dxgiFormat, 2, &NumQualityLevels);
640	if (SUCCEEDED(hr) && NumQualityLevels != 0)
641	*pu32DevCap \|= SVGA3D_DXFMT_MULTISAMPLE;
642	}
643	else
644	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
645	}
646	else
647	rc = VERR_NOT_SUPPORTED;
648	return rc;
649	}
650
651
652	static int dxDeviceCreate(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
653	{
654	int rc = VINF_SUCCESS;
655
656	IDXGIAdapter pAdapter = NULL; / Default adapter. */
657	static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
658	{
659	/// @todo Requires a Windows 8+ _SDKS: D3D_FEATURE_LEVEL_11_1,
660	D3D_FEATURE_LEVEL_11_0
661	};
662	UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
663	#ifdef DEBUG
664	Flags \|= D3D11_CREATE_DEVICE_DEBUG;
665	#endif
666
667	HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
668	D3D_DRIVER_TYPE_HARDWARE,
669	NULL,
670	Flags,
671	s_aFeatureLevels,
672	RT_ELEMENTS(s_aFeatureLevels),
673	D3D11_SDK_VERSION,
674	&pDevice->pDevice,
675	&pDevice->FeatureLevel,
676	&pDevice->pImmediateContext);
677	if (SUCCEEDED(hr))
678	{
679	LogRel(("VMSVGA: Feature level %#x\n", pDevice->FeatureLevel));
680
681	IDXGIDevice *pDxgiDevice = 0;
682	hr = pBackend->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
683	if (SUCCEEDED(hr))
684	{
685	IDXGIAdapter *pDxgiAdapter = 0;
686	hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
687	if (SUCCEEDED(hr))
688	{
689	hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pDevice->pDxgiFactory);
690	D3D_RELEASE(pDxgiAdapter);
691	}
692
693	D3D_RELEASE(pDxgiDevice);
694	}
695	}
696
697	if (FAILED(hr))
698	rc = VERR_NOT_SUPPORTED;
699
700	return rc;
701	}
702
703
704	static void dxDeviceDestroy(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
705	{
706	RT_NOREF(pBackend);
707	D3D_RELEASE(pDevice->pDevice);
708	D3D_RELEASE(pDevice->pImmediateContext);
709	D3D_RELEASE(pDevice->pDxgiFactory);
710	RT_ZERO(*pDevice);
711	}
712
713
714	/** @todo AssertCompile for types like D3D11_COMPARISON_FUNC and SVGA3dComparisonFunc */
715	static HRESULT dxBlendStateCreate(DXDEVICE pDevice, SVGACOTableDXBlendStateEntry const pEntry, ID3D11BlendState **pp)
716	{
717	D3D11_BLEND_DESC BlendDesc;
718	BlendDesc.AlphaToCoverageEnable = RT_BOOL(pEntry->alphaToCoverageEnable);
719	BlendDesc.IndependentBlendEnable = RT_BOOL(pEntry->independentBlendEnable);
720	for (int i = 0; i < SVGA3D_MAX_RENDER_TARGETS; ++i)
721	{
722	BlendDesc.RenderTarget[i].BlendEnable = RT_BOOL(pEntry->perRT[i].blendEnable);
723	BlendDesc.RenderTarget[i].SrcBlend = (D3D11_BLEND)pEntry->perRT[i].srcBlend;
724	BlendDesc.RenderTarget[i].DestBlend = (D3D11_BLEND)pEntry->perRT[i].destBlend;
725	BlendDesc.RenderTarget[i].BlendOp = (D3D11_BLEND_OP)pEntry->perRT[i].blendOp;
726	BlendDesc.RenderTarget[i].SrcBlendAlpha = (D3D11_BLEND)pEntry->perRT[i].srcBlendAlpha;
727	BlendDesc.RenderTarget[i].DestBlendAlpha = (D3D11_BLEND)pEntry->perRT[i].destBlendAlpha;
728	BlendDesc.RenderTarget[i].BlendOpAlpha = (D3D11_BLEND_OP)pEntry->perRT[i].blendOpAlpha;
729	BlendDesc.RenderTarget[i].RenderTargetWriteMask = pEntry->perRT[i].renderTargetWriteMask;
730	/** @todo logicOpEnable and logicOp */
731	}
732
733	HRESULT hr = pDevice->pDevice->CreateBlendState(&BlendDesc, pp);
734	Assert(SUCCEEDED(hr));
735	return hr;
736	}
737
738
739	static HRESULT dxDepthStencilStateCreate(DXDEVICE pDevice, SVGACOTableDXDepthStencilEntry const pEntry, ID3D11DepthStencilState **pp)
740	{
741	D3D11_DEPTH_STENCIL_DESC desc;
742	desc.DepthEnable = pEntry->depthEnable;
743	desc.DepthWriteMask = (D3D11_DEPTH_WRITE_MASK)pEntry->depthWriteMask;
744	desc.DepthFunc = (D3D11_COMPARISON_FUNC)pEntry->depthFunc;
745	desc.StencilEnable = pEntry->stencilEnable;
746	desc.StencilReadMask = pEntry->stencilReadMask;
747	desc.StencilWriteMask = pEntry->stencilWriteMask;
748	desc.FrontFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilFailOp;
749	desc.FrontFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilDepthFailOp;
750	desc.FrontFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->frontStencilPassOp;
751	desc.FrontFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->frontStencilFunc;
752	desc.BackFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->backStencilFailOp;
753	desc.BackFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->backStencilDepthFailOp;
754	desc.BackFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->backStencilPassOp;
755	desc.BackFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->backStencilFunc;
756	/** @todo frontEnable, backEnable */
757
758	HRESULT hr = pDevice->pDevice->CreateDepthStencilState(&desc, pp);
759	Assert(SUCCEEDED(hr));
760	return hr;
761	}
762
763
764	static HRESULT dxSamplerStateCreate(DXDEVICE pDevice, SVGACOTableDXSamplerEntry const pEntry, ID3D11SamplerState **pp)
765	{
766	D3D11_SAMPLER_DESC desc;
767	desc.Filter = (D3D11_FILTER)pEntry->filter;
768	desc.AddressU = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressU;
769	desc.AddressV = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressV;
770	desc.AddressW = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressW;
771	desc.MipLODBias = pEntry->mipLODBias;
772	desc.MaxAnisotropy = RT_CLAMP(pEntry->maxAnisotropy, 1, 16); /* "Valid values are between 1 and 16" */
773	desc.ComparisonFunc = (D3D11_COMPARISON_FUNC)pEntry->comparisonFunc;
774	desc.BorderColor[0] = pEntry->borderColor.value[0];
775	desc.BorderColor[1] = pEntry->borderColor.value[1];
776	desc.BorderColor[2] = pEntry->borderColor.value[2];
777	desc.BorderColor[3] = pEntry->borderColor.value[3];
778	desc.MinLOD = pEntry->minLOD;
779	desc.MaxLOD = pEntry->maxLOD;
780
781	HRESULT hr = pDevice->pDevice->CreateSamplerState(&desc, pp);
782	Assert(SUCCEEDED(hr));
783	return hr;
784	}
785
786
787	static HRESULT dxRasterizerStateCreate(DXDEVICE pDevice, SVGACOTableDXRasterizerStateEntry const pEntry, ID3D11RasterizerState **pp)
788	{
789	D3D11_RASTERIZER_DESC desc;
790	desc.FillMode = (D3D11_FILL_MODE)pEntry->fillMode;
791	desc.CullMode = (D3D11_CULL_MODE)pEntry->cullMode;
792	desc.FrontCounterClockwise = pEntry->frontCounterClockwise;
793	/** provokingVertexLast */
794	desc.DepthBias = pEntry->depthBias;
795	desc.DepthBiasClamp = pEntry->depthBiasClamp;
796	desc.SlopeScaledDepthBias = pEntry->slopeScaledDepthBias;
797	desc.DepthClipEnable = pEntry->depthClipEnable;
798	desc.ScissorEnable = pEntry->scissorEnable;
799	desc.MultisampleEnable = pEntry->multisampleEnable;
800	desc.AntialiasedLineEnable = pEntry->antialiasedLineEnable;
801	/** @todo lineWidth lineStippleEnable lineStippleFactor lineStipplePattern forcedSampleCount */
802
803	HRESULT hr = pDevice->pDevice->CreateRasterizerState(&desc, pp);
804	Assert(SUCCEEDED(hr));
805	return hr;
806	}
807
808
809	static HRESULT dxRenderTargetViewCreate(DXDEVICE pDevice, SVGACOTableDXRTViewEntry const pEntry, VMSVGA3DBACKENDSURFACE pBackendSurface, ID3D11RenderTargetView *pp)
810	{
811	ID3D11Resource *pResource = pBackendSurface->u.Texture.pTexture;
812
813	D3D11_RENDER_TARGET_VIEW_DESC desc;
814	RT_ZERO(desc);
815	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
816	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
817	switch (pEntry->resourceDimension)
818	{
819	case SVGA3D_RESOURCE_BUFFER:
820	desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
821	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
822	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
823	break;
824	case SVGA3D_RESOURCE_TEXTURE1D:
825	if (pEntry->desc.tex.arraySize <= 1)
826	{
827	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1D;
828	desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
829	}
830	else
831	{
832	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1DARRAY;
833	desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
834	desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
835	desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
836	}
837	break;
838	case SVGA3D_RESOURCE_TEXTURE2D:
839	if (pEntry->desc.tex.arraySize <= 1)
840	{
841	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2D;
842	desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
843	}
844	else
845	{
846	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
847	desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
848	desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
849	desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
850	}
851	break;
852	case SVGA3D_RESOURCE_TEXTURE3D:
853	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE3D;
854	desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
855	desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
856	desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
857	break;
858	case SVGA3D_RESOURCE_TEXTURECUBE:
859	AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
860	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
861	desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
862	desc.Texture2DArray.FirstArraySlice = 0;
863	desc.Texture2DArray.ArraySize = 6;
864	break;
865	case SVGA3D_RESOURCE_BUFFEREX:
866	AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
867	desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
868	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
869	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
870	break;
871	default:
872	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
873	}
874
875	HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pResource, &desc, pp);
876	Assert(SUCCEEDED(hr));
877	return hr;
878	}
879
880
881	static HRESULT dxShaderResourceViewCreate(DXDEVICE pDevice, SVGACOTableDXSRViewEntry const pEntry, VMSVGA3DBACKENDSURFACE pBackendSurface, ID3D11ShaderResourceView *pp)
882	{
883	ID3D11Resource *pResource = pBackendSurface->u.Texture.pTexture;
884
885	D3D11_SHADER_RESOURCE_VIEW_DESC desc;
886	RT_ZERO(desc);
887	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
888	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
889
890	switch (pEntry->resourceDimension)
891	{
892	case SVGA3D_RESOURCE_BUFFER:
893	desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFER;
894	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
895	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
896	break;
897	case SVGA3D_RESOURCE_TEXTURE1D:
898	if (pEntry->desc.tex.arraySize <= 1)
899	{
900	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1D;
901	desc.Texture1D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
902	desc.Texture1D.MipLevels = pEntry->desc.tex.mipLevels;
903	}
904	else
905	{
906	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1DARRAY;
907	desc.Texture1DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
908	desc.Texture1DArray.MipLevels = pEntry->desc.tex.mipLevels;
909	desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
910	desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
911	}
912	break;
913	case SVGA3D_RESOURCE_TEXTURE2D:
914	if (pEntry->desc.tex.arraySize <= 1)
915	{
916	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2D;
917	desc.Texture2D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
918	desc.Texture2D.MipLevels = pEntry->desc.tex.mipLevels;
919	}
920	else
921	{
922	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2DARRAY;
923	desc.Texture2DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
924	desc.Texture2DArray.MipLevels = pEntry->desc.tex.mipLevels;
925	desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
926	desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
927	}
928	break;
929	case SVGA3D_RESOURCE_TEXTURE3D:
930	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE3D;
931	desc.Texture3D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
932	desc.Texture3D.MipLevels = pEntry->desc.tex.mipLevels;
933	break;
934	case SVGA3D_RESOURCE_TEXTURECUBE:
935	AssertFailed(); /** @todo test. */
936	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBE;
937	desc.TextureCube.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
938	desc.TextureCube.MipLevels = pEntry->desc.tex.mipLevels;
939	break;
940	case SVGA3D_RESOURCE_BUFFEREX:
941	AssertFailed(); /** @todo test. */
942	desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFEREX;
943	desc.BufferEx.FirstElement = pEntry->desc.bufferex.firstElement;
944	desc.BufferEx.NumElements = pEntry->desc.bufferex.numElements;
945	desc.BufferEx.Flags = pEntry->desc.bufferex.flags;
946	break;
947	default:
948	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
949	}
950
951	HRESULT hr = pDevice->pDevice->CreateShaderResourceView(pResource, &desc, pp);
952	Assert(SUCCEEDED(hr));
953	return hr;
954	}
955
956
957	static HRESULT dxDepthStencilViewCreate(DXDEVICE pDevice, SVGACOTableDXDSViewEntry const pEntry, VMSVGA3DBACKENDSURFACE pBackendSurface, ID3D11DepthStencilView *pp)
958	{
959	ID3D11Resource *pResource = pBackendSurface->u.Texture.pTexture;
960
961	D3D11_DEPTH_STENCIL_VIEW_DESC desc;
962	RT_ZERO(desc);
963	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
964	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
965	desc.Flags = pEntry->flags;
966	switch (pEntry->resourceDimension)
967	{
968	case SVGA3D_RESOURCE_TEXTURE1D:
969	if (pEntry->arraySize <= 1)
970	{
971	desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1D;
972	desc.Texture1D.MipSlice = pEntry->mipSlice;
973	}
974	else
975	{
976	desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1DARRAY;
977	desc.Texture1DArray.MipSlice = pEntry->mipSlice;
978	desc.Texture1DArray.FirstArraySlice = pEntry->firstArraySlice;
979	desc.Texture1DArray.ArraySize = pEntry->arraySize;
980	}
981	break;
982	case SVGA3D_RESOURCE_TEXTURE2D:
983	if (pEntry->arraySize <= 1)
984	{
985	desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2D;
986	desc.Texture2D.MipSlice = pEntry->mipSlice;
987	}
988	else
989	{
990	desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2DARRAY;
991	desc.Texture2DArray.MipSlice = pEntry->mipSlice;
992	desc.Texture2DArray.FirstArraySlice = pEntry->firstArraySlice;
993	desc.Texture2DArray.ArraySize = pEntry->arraySize;
994	}
995	break;
996	default:
997	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
998	}
999
1000	HRESULT hr = pDevice->pDevice->CreateDepthStencilView(pResource, &desc, pp);
1001	Assert(SUCCEEDED(hr));
1002	return hr;
1003	}
1004
1005
1006	static HRESULT dxShaderCreate(DXDEVICE pDevice, PVMSVGA3DSHADER pShader, DXSHADER pDXShader)
1007	{
1008	HRESULT hr = S_OK;
1009
1010	switch (pShader->type)
1011	{
1012	case SVGA3D_SHADERTYPE_VS:
1013	hr = pDevice->pDevice->CreateVertexShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pVertexShader);
1014	Assert(SUCCEEDED(hr));
1015	break;
1016	case SVGA3D_SHADERTYPE_PS:
1017	hr = pDevice->pDevice->CreatePixelShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pPixelShader);
1018	Assert(SUCCEEDED(hr));
1019	break;
1020	case SVGA3D_SHADERTYPE_GS:
1021	case SVGA3D_SHADERTYPE_HS:
1022	case SVGA3D_SHADERTYPE_DS:
1023	case SVGA3D_SHADERTYPE_CS:
1024	default:
1025	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1026	}
1027
1028	return hr;
1029	}
1030
1031
1032	static void dxShaderSet(DXDEVICE pDevice, PVMSVGA3DSHADER pShader, DXSHADER pDXShader)
1033	{
1034	switch (pShader->type)
1035	{
1036	case SVGA3D_SHADERTYPE_VS:
1037	pDevice->pImmediateContext->VSSetShader(pDXShader->pVertexShader, NULL, 0);
1038	break;
1039	case SVGA3D_SHADERTYPE_PS:
1040	pDevice->pImmediateContext->PSSetShader(pDXShader->pPixelShader, NULL, 0);
1041	break;
1042	case SVGA3D_SHADERTYPE_GS:
1043	case SVGA3D_SHADERTYPE_HS:
1044	case SVGA3D_SHADERTYPE_DS:
1045	case SVGA3D_SHADERTYPE_CS:
1046	default:
1047	ASSERT_GUEST_FAILED_RETURN_VOID();
1048	}
1049	}
1050
1051
1052	static void dxConstantBufferSet(DXDEVICE pDevice, uint32_t slot, SVGA3dShaderType type, ID3D11Buffer pConstantBuffer)
1053	{
1054	switch (type)
1055	{
1056	case SVGA3D_SHADERTYPE_VS:
1057	pDevice->pImmediateContext->VSSetConstantBuffers(slot, 1, &pConstantBuffer);
1058	break;
1059	case SVGA3D_SHADERTYPE_PS:
1060	pDevice->pImmediateContext->PSSetConstantBuffers(slot, 1, &pConstantBuffer);
1061	break;
1062	case SVGA3D_SHADERTYPE_GS:
1063	case SVGA3D_SHADERTYPE_HS:
1064	case SVGA3D_SHADERTYPE_DS:
1065	case SVGA3D_SHADERTYPE_CS:
1066	default:
1067	ASSERT_GUEST_FAILED_RETURN_VOID();
1068	}
1069	}
1070
1071
1072	static void dxSamplerSet(DXDEVICE pDevice, SVGA3dShaderType type, uint32_t startSampler, uint32_t cSampler, ID3D11SamplerState const *papSampler)
1073	{
1074	switch (type)
1075	{
1076	case SVGA3D_SHADERTYPE_VS:
1077	pDevice->pImmediateContext->VSSetSamplers(startSampler, cSampler, papSampler);
1078	break;
1079	case SVGA3D_SHADERTYPE_PS:
1080	pDevice->pImmediateContext->PSSetSamplers(startSampler, cSampler, papSampler);
1081	break;
1082	case SVGA3D_SHADERTYPE_GS:
1083	case SVGA3D_SHADERTYPE_HS:
1084	case SVGA3D_SHADERTYPE_DS:
1085	case SVGA3D_SHADERTYPE_CS:
1086	default:
1087	ASSERT_GUEST_FAILED_RETURN_VOID();
1088	}
1089	}
1090
1091
1092	static void dxShaderResourceViewSet(DXDEVICE pDevice, SVGA3dShaderType type, uint32_t startView, uint32_t cShaderResourceView, ID3D11ShaderResourceView const *papShaderResourceView)
1093	{
1094	switch (type)
1095	{
1096	case SVGA3D_SHADERTYPE_VS:
1097	pDevice->pImmediateContext->VSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
1098	break;
1099	case SVGA3D_SHADERTYPE_PS:
1100	pDevice->pImmediateContext->PSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
1101	break;
1102	case SVGA3D_SHADERTYPE_GS:
1103	case SVGA3D_SHADERTYPE_HS:
1104	case SVGA3D_SHADERTYPE_DS:
1105	case SVGA3D_SHADERTYPE_CS:
1106	default:
1107	ASSERT_GUEST_FAILED_RETURN_VOID();
1108	}
1109	}
1110
1111
1112
1113	static int vmsvga3dBackSurfaceCreateScreenTarget(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface)
1114	{
1115	PVMSVGA3DBACKEND pBackend = pState->pBackend;
1116	AssertReturn(pBackend, VERR_INVALID_STATE);
1117	AssertReturn(pBackend->pDevice, VERR_INVALID_STATE);
1118
1119	/* Surface must have SCREEN_TARGET flag. */
1120	ASSERT_GUEST_RETURN(RT_BOOL(pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET), VERR_INVALID_PARAMETER);
1121
1122	if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1123	{
1124	AssertFailed(); /* Should the function not be used like that? */
1125	vmsvga3dBackSurfaceDestroy(pState, pSurface);
1126	}
1127
1128	PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1129	AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1130
1131	D3D11_TEXTURE2D_DESC td;
1132	RT_ZERO(td);
1133	td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1134	td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1135	Assert(pSurface->cLevels == 1);
1136	td.MipLevels = 1;
1137	td.ArraySize = 1;
1138	td.Format = vmsvgaDXScreenTargetFormat2Dxgi(pSurface->format); // DXGI_FORMAT_B8G8R8A8_UNORM;
1139	td.SampleDesc.Count = 1;
1140	td.SampleDesc.Quality = 0;
1141	td.Usage = D3D11_USAGE_DEFAULT;
1142	td.BindFlags = D3D11_BIND_RENDER_TARGET \| D3D11_BIND_SHADER_RESOURCE;
1143	td.CPUAccessFlags = 0;
1144	td.MiscFlags = 0;
1145
1146	HRESULT hr = pBackend->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pTexture);
1147	Assert(SUCCEEDED(hr));
1148	if (SUCCEEDED(hr))
1149	{
1150	/* Map-able texture. */
1151	td.Usage = D3D11_USAGE_DYNAMIC;
1152	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1153	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1154	td.MiscFlags = 0;
1155	hr = pBackend->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pDynamicTexture);
1156	Assert(SUCCEEDED(hr));
1157	}
1158
1159	if (SUCCEEDED(hr))
1160	{
1161	/* Staging texture. */
1162	td.Usage = D3D11_USAGE_STAGING;
1163	td.BindFlags = 0; /* No flags allowed. */
1164	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1165	td.MiscFlags = 0;
1166	hr = pBackend->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pStagingTexture);
1167	Assert(SUCCEEDED(hr));
1168	}
1169
1170	if (SUCCEEDED(hr))
1171	{
1172	/*
1173	* Success.
1174	*/
1175	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
1176	pBackendSurface->enmDxgiFormat = td.Format;
1177	pSurface->pBackendSurface = pBackendSurface;
1178	pSurface->idAssociatedContext = SVGA_ID_INVALID;
1179	pSurface->fDirty = true;
1180	return VINF_SUCCESS;
1181	}
1182
1183	/* Failure. */
1184	D3D_RELEASE(pBackendSurface->u.ScreenTarget.pStagingTexture);
1185	D3D_RELEASE(pBackendSurface->u.ScreenTarget.pDynamicTexture);
1186	D3D_RELEASE(pBackendSurface->u.ScreenTarget.pTexture);
1187	RTMemFree(pBackendSurface);
1188	return VERR_NO_MEMORY;
1189	}
1190
1191
1192	static int vmsvga3dBackSurfaceCreateRenderTarget(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1193	{
1194	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1195	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1196
1197	if (pSurface->pBackendSurface != NULL)
1198	{
1199	AssertFailed(); /** @todo Should the function not be used like that? */
1200	vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1201	}
1202
1203	/** @todo Various texture types. */
1204
1205	PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1206	AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1207
1208	D3D11_TEXTURE2D_DESC td;
1209	RT_ZERO(td);
1210	td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1211	td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1212	Assert(pSurface->cLevels == 1);
1213	td.MipLevels = 1;
1214	td.ArraySize = 1;
1215	td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format); // DXGI_FORMAT_B8G8R8A8_UNORM;
1216	AssertReturn(td.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
1217	td.SampleDesc.Count = 1;
1218	td.SampleDesc.Quality = 0;
1219	td.Usage = D3D11_USAGE_DEFAULT;
1220	td.BindFlags = D3D11_BIND_RENDER_TARGET \| D3D11_BIND_SHADER_RESOURCE;
1221	td.CPUAccessFlags = 0;
1222	td.MiscFlags = 0;
1223
1224	HRESULT hr = pDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.Texture.pTexture);
1225	Assert(SUCCEEDED(hr));
1226	if (SUCCEEDED(hr))
1227	{
1228	/* Map-able texture. */
1229	td.Usage = D3D11_USAGE_DYNAMIC;
1230	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1231	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1232	td.MiscFlags = 0;
1233	hr = pDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.Texture.pDynamicTexture);
1234	Assert(SUCCEEDED(hr));
1235	}
1236
1237	if (SUCCEEDED(hr))
1238	{
1239	/* Staging texture. */
1240	td.Usage = D3D11_USAGE_STAGING;
1241	td.BindFlags = 0; /* No flags allowed. */
1242	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1243	td.MiscFlags = 0;
1244	hr = pDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.Texture.pStagingTexture);
1245	Assert(SUCCEEDED(hr));
1246	}
1247
1248	if (SUCCEEDED(hr))
1249	{
1250	/*
1251	* Success.
1252	*/
1253	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE;
1254	pBackendSurface->enmDxgiFormat = td.Format;
1255	pSurface->pBackendSurface = pBackendSurface;
1256	pSurface->idAssociatedContext = pDXContext->cid;
1257	pSurface->fDirty = true;
1258	return VINF_SUCCESS;
1259	}
1260
1261	/* Failure. */
1262	D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture);
1263	D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture);
1264	D3D_RELEASE(pBackendSurface->u.Texture.pTexture);
1265	RTMemFree(pBackendSurface);
1266	return VERR_NO_MEMORY;
1267	}
1268
1269
1270	static int vmsvga3dBackSurfaceCreateTexture(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1271	{
1272	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1273	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1274
1275	if (pSurface->pBackendSurface != NULL)
1276	{
1277	AssertFailed(); /** @todo Should the function not be used like that? */
1278	vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1279	}
1280
1281	PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1282	AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1283
1284	/** @todo Various texture types. */
1285	ASMBreakpoint();
1286
1287	RTMemFree(pBackendSurface);
1288	return VERR_NOT_IMPLEMENTED;
1289	}
1290
1291
1292	static int vmsvga3dBackSurfaceCreateDepthStencilTexture(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1293	{
1294	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1295	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1296
1297	if (pSurface->pBackendSurface != NULL)
1298	{
1299	AssertFailed(); /** @todo Should the function not be used like that? */
1300	vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1301	}
1302
1303	PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1304	AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1305
1306	D3D11_TEXTURE2D_DESC td;
1307	RT_ZERO(td);
1308	td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1309	td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1310	Assert(pSurface->cLevels == 1);
1311	td.MipLevels = 1;
1312	td.ArraySize = 1;
1313	td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
1314	AssertReturn(td.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
1315	td.SampleDesc.Count = 1;
1316	td.SampleDesc.Quality = 0;
1317	td.Usage = D3D11_USAGE_DEFAULT;
1318	td.BindFlags = D3D11_BIND_DEPTH_STENCIL;
1319	td.CPUAccessFlags = 0;
1320	td.MiscFlags = 0;
1321
1322	HRESULT hr = pDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.Texture.pTexture);
1323	Assert(SUCCEEDED(hr));
1324	if (SUCCEEDED(hr))
1325	{
1326	/*
1327	* Success.
1328	*/
1329	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE;
1330	pBackendSurface->enmDxgiFormat = td.Format;
1331	pSurface->pBackendSurface = pBackendSurface;
1332	pSurface->idAssociatedContext = pDXContext->cid;
1333	pSurface->fDirty = true;
1334	return VINF_SUCCESS;
1335	}
1336
1337	/* Failure. */
1338	D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture);
1339	D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture);
1340	D3D_RELEASE(pBackendSurface->u.Texture.pTexture);
1341	RTMemFree(pBackendSurface);
1342	return VERR_NO_MEMORY;
1343	}
1344
1345
1346	static int vmsvga3dBackSurfaceCreateBuffer(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1347	{
1348	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1349	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1350
1351	/* Buffers should be created as such. */
1352	AssertReturn(RT_BOOL(pSurface->surfaceFlags & ( SVGA3D_SURFACE_HINT_INDEXBUFFER
1353	\| SVGA3D_SURFACE_HINT_VERTEXBUFFER
1354	\| SVGA3D_SURFACE_BIND_VERTEX_BUFFER
1355	\| SVGA3D_SURFACE_BIND_INDEX_BUFFER
1356	/// @todo only for constant buffers\| SVGA3D_SURFACE_BIND_CONSTANT_BUFFER
1357	//\| SVGA3D_SURFACE_BIND_STREAM_OUTPUT
1358	)), VERR_INVALID_PARAMETER);
1359
1360	if (pSurface->pBackendSurface != NULL)
1361	{
1362	AssertFailed(); /** @todo Should the function not be used like that? */
1363	vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1364	}
1365
1366	PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1367	AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1368
1369	D3D11_BUFFER_DESC bd;
1370	RT_ZERO(bd);
1371	bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1372	bd.Usage = D3D11_USAGE_DYNAMIC;
1373	bd.BindFlags = D3D11_BIND_VERTEX_BUFFER
1374	\| D3D11_BIND_INDEX_BUFFER
1375	//\| D3D11_BIND_CONSTANT_BUFFER
1376	//\| D3D11_BIND_STREAM_OUTPUT
1377	;
1378	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1379	bd.MiscFlags = 0;
1380	bd.StructureByteStride = 0;
1381
1382	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.Buffer.pBuffer);
1383	if (SUCCEEDED(hr))
1384	{
1385	/*
1386	* Success.
1387	*/
1388	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1389	pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1390	pSurface->pBackendSurface = pBackendSurface;
1391	pSurface->idAssociatedContext = pDXContext->cid;
1392	pSurface->fDirty = true;
1393	return VINF_SUCCESS;
1394	}
1395
1396	/* Failure. */
1397	D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1398	RTMemFree(pBackendSurface);
1399	return VERR_NO_MEMORY;
1400	}
1401
1402
1403	static int vmsvga3dBackSurfaceCreateConstantBuffer(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1404	{
1405	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1406	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1407
1408	/* Buffers should be created as such. */
1409	AssertReturn(RT_BOOL(pSurface->surfaceFlags & ( SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)), VERR_INVALID_PARAMETER);
1410
1411	if (pSurface->pBackendSurface != NULL)
1412	{
1413	AssertFailed(); /** @todo Should the function not be used like that? */
1414	vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1415	}
1416
1417	PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1418	AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1419
1420	D3D11_BUFFER_DESC bd;
1421	RT_ZERO(bd);
1422	bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1423	bd.Usage = D3D11_USAGE_DYNAMIC;
1424	bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
1425	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1426	bd.MiscFlags = 0;
1427	bd.StructureByteStride = 0;
1428
1429	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.Buffer.pBuffer);
1430	if (SUCCEEDED(hr))
1431	{
1432	/*
1433	* Success.
1434	*/
1435	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1436	pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1437	pSurface->pBackendSurface = pBackendSurface;
1438	pSurface->idAssociatedContext = pDXContext->cid;
1439	pSurface->fDirty = true;
1440	return VINF_SUCCESS;
1441	}
1442
1443	/* Failure. */
1444	D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1445	RTMemFree(pBackendSurface);
1446	return VERR_NO_MEMORY;
1447	}
1448
1449
1450	int vmsvga3dInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
1451	{
1452	RT_NOREF(pDevIns, pThis);
1453
1454	PVMSVGA3DSTATE pState = (PVMSVGA3DSTATE)RTMemAllocZ(sizeof(VMSVGA3DSTATE));
1455	AssertReturn(pState, VERR_NO_MEMORY);
1456	pThisCC->svga.p3dState = pState;
1457
1458	PVMSVGA3DBACKEND pBackend = (PVMSVGA3DBACKEND)RTMemAllocZ(sizeof(VMSVGA3DBACKEND));
1459	AssertReturn(pBackend, VERR_NO_MEMORY);
1460	pState->pBackend = pBackend;
1461
1462	int rc = RTLdrLoadSystem("d3d11", /* fNoUnload = */ true, &pBackend->hD3D11);
1463	AssertRC(rc);
1464	if (RT_SUCCESS(rc))
1465	{
1466	rc = RTLdrGetSymbol(pBackend->hD3D11, "D3D11CreateDevice", (void **)&pBackend->pfnD3D11CreateDevice);
1467	AssertRC(rc);
1468	}
1469
1470	rc = RTLdrLoadSystem("D3DCompiler_47", /* fNoUnload = */ true, &pBackend->hD3DCompiler);
1471	AssertRC(rc);
1472	if (RT_SUCCESS(rc))
1473	{
1474	rc = RTLdrGetSymbol(pBackend->hD3DCompiler, "D3DDisassemble", (void **)&pBackend->pfnD3DDisassemble);
1475	AssertRC(rc);
1476	}
1477
1478	return rc;
1479	}
1480
1481
1482	int vmsvga3dPowerOn(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
1483	{
1484	RT_NOREF(pDevIns, pThis);
1485
1486	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1487	AssertReturn(pState, VERR_INVALID_STATE);
1488
1489	PVMSVGA3DBACKEND pBackend = pState->pBackend;
1490	AssertReturn(pBackend, VERR_INVALID_STATE);
1491
1492	int rc = VINF_SUCCESS;
1493
1494	IDXGIAdapter pAdapter = NULL; / Default adapter. */
1495	static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
1496	{
1497	/// @todo Requires a Windows 8+ _SDKS: D3D_FEATURE_LEVEL_11_1,
1498	D3D_FEATURE_LEVEL_11_0
1499	};
1500	UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
1501	#ifdef DEBUG
1502	Flags \|= D3D11_CREATE_DEVICE_DEBUG;
1503	#endif
1504
1505	HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
1506	D3D_DRIVER_TYPE_HARDWARE,
1507	NULL,
1508	Flags,
1509	s_aFeatureLevels,
1510	RT_ELEMENTS(s_aFeatureLevels),
1511	D3D11_SDK_VERSION,
1512	&pBackend->pDevice,
1513	&pBackend->FeatureLevel,
1514	&pBackend->pImmediateContext);
1515	if (SUCCEEDED(hr))
1516	{
1517	LogRel(("VMSVGA: Feature level %#x\n", pBackend->FeatureLevel));
1518
1519	IDXGIDevice *pDxgiDevice = 0;
1520	hr = pBackend->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
1521	if (SUCCEEDED(hr))
1522	{
1523	IDXGIAdapter *pDxgiAdapter = 0;
1524	hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
1525	if (SUCCEEDED(hr))
1526	{
1527	hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pBackend->pDxgiFactory);
1528	D3D_RELEASE(pDxgiAdapter);
1529	}
1530
1531	D3D_RELEASE(pDxgiDevice);
1532	}
1533	}
1534
1535	if (FAILED(hr))
1536	rc = VERR_NOT_SUPPORTED;
1537
1538	return rc;
1539	}
1540
1541
1542	int vmsvga3dTerminate(PVGASTATECC pThisCC)
1543	{
1544	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1545	AssertReturn(pState, VERR_INVALID_STATE);
1546
1547	if (pState->pBackend)
1548	{
1549	D3D_RELEASE(pState->pBackend->pDevice);
1550	D3D_RELEASE(pState->pBackend->pImmediateContext);
1551	D3D_RELEASE(pState->pBackend->pDxgiFactory);
1552
1553	RTMemFree(pState->pBackend);
1554	pState->pBackend = NULL;
1555	}
1556
1557	return VINF_SUCCESS;
1558	}
1559
1560
1561	int vmsvga3dReset(PVGASTATECC pThisCC)
1562	{
1563	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1564	AssertReturn(pState, VERR_INVALID_STATE);
1565
1566	/** @todo Cleanup all resources and recreate Device, ImmediateContext etc to be at the same state as after poweron. */
1567
1568	return VINF_SUCCESS;
1569	}
1570
1571
1572	static int vmsvga3dDrvNotifyDefineScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1573	{
1574	/** @todo Such structures must be in VBoxVideo3D.h */
1575	typedef struct VBOX3DNOTIFYDEFINESCREEN
1576	{
1577	VBOX3DNOTIFY Core;
1578	uint32_t cWidth;
1579	uint32_t cHeight;
1580	int32_t xRoot;
1581	int32_t yRoot;
1582	uint32_t fPrimary;
1583	uint32_t cDpi;
1584	} VBOX3DNOTIFYDEFINESCREEN;
1585
1586	VBOX3DNOTIFYDEFINESCREEN n;
1587	n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_CREATED;
1588	n.Core.iDisplay = pScreen->idScreen;
1589	n.Core.u32Reserved = 0;
1590	n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1591	RT_ZERO(n.Core.au8Data);
1592	n.cWidth = pScreen->cWidth;
1593	n.cHeight = pScreen->cHeight;
1594	n.xRoot = pScreen->xOrigin;
1595	n.yRoot = pScreen->yOrigin;
1596	n.fPrimary = RT_BOOL(pScreen->fuScreen & SVGA_SCREEN_IS_PRIMARY);
1597	n.cDpi = pScreen->cDpi;
1598
1599	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
1600	}
1601
1602
1603	static int vmsvga3dDrvNotifyDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1604	{
1605	VBOX3DNOTIFY n;
1606	n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_DESTROYED;
1607	n.iDisplay = pScreen->idScreen;
1608	n.u32Reserved = 0;
1609	n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1610	RT_ZERO(n.au8Data);
1611
1612	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
1613	}
1614
1615
1616	static int vmsvga3dDrvNotifyBindSurface(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, HANDLE hSharedSurface)
1617	{
1618	VBOX3DNOTIFY n;
1619	n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_BIND_SURFACE;
1620	n.iDisplay = pScreen->idScreen;
1621	n.u32Reserved = 0;
1622	n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1623	(uint64_t )&n.au8Data[0] = (uint64_t)hSharedSurface;
1624
1625	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
1626	}
1627
1628
1629	static int vmsvga3dDrvNotifyUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
1630	uint32_t x, uint32_t y, uint32_t w, uint32_t h)
1631	{
1632	typedef struct VBOX3DNOTIFYUPDATE
1633	{
1634	VBOX3DNOTIFY Core;
1635	uint32_t x;
1636	uint32_t y;
1637	uint32_t w;
1638	uint32_t h;
1639	} VBOX3DNOTIFYUPDATE;
1640
1641	VBOX3DNOTIFYUPDATE n;
1642	n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_UPDATE_END;
1643	n.Core.iDisplay = pScreen->idScreen;
1644	n.Core.u32Reserved = 0;
1645	n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1646	RT_ZERO(n.Core.au8Data);
1647	n.x = x;
1648	n.y = y;
1649	n.w = w;
1650	n.h = h;
1651
1652	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
1653	}
1654
1655	static int vmsvga3dHwScreenCreate(PVMSVGA3DSTATE pState, uint32_t cWidth, uint32_t cHeight, VMSVGAHWSCREEN *p)
1656	{
1657	PVMSVGA3DBACKEND pBackend = pState->pBackend;
1658
1659	D3D11_TEXTURE2D_DESC td;
1660	RT_ZERO(td);
1661	td.Width = cWidth;
1662	td.Height = cHeight;
1663	td.MipLevels = 1;
1664	td.ArraySize = 1;
1665	td.Format = DXGI_FORMAT_B8G8R8A8_UNORM;
1666	td.SampleDesc.Count = 1;
1667	td.SampleDesc.Quality = 0;
1668	td.Usage = D3D11_USAGE_DEFAULT;
1669	td.BindFlags = D3D11_BIND_RENDER_TARGET \| D3D11_BIND_SHADER_RESOURCE;
1670	td.CPUAccessFlags = 0;
1671	td.MiscFlags = D3D11_RESOURCE_MISC_SHARED_KEYEDMUTEX;
1672
1673	HRESULT hr = pBackend->pDevice->CreateTexture2D(&td, 0, &p->pTexture);
1674	if (SUCCEEDED(hr))
1675	{
1676	/* Get the shared handle. */
1677	hr = p->pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&p->pDxgiResource);
1678	if (SUCCEEDED(hr))
1679	{
1680	hr = p->pDxgiResource->GetSharedHandle(&p->SharedHandle);
1681	if (SUCCEEDED(hr))
1682	hr = p->pTexture->QueryInterface(__uuidof(IDXGIKeyedMutex), (void**)&p->pDXGIKeyedMutex);
1683	}
1684	}
1685
1686	if (SUCCEEDED(hr))
1687	return VINF_SUCCESS;
1688
1689	AssertFailed();
1690	return VERR_NOT_SUPPORTED;
1691	}
1692
1693
1694	static void vmsvga3dHwScreenDestroy(PVMSVGA3DSTATE pState, VMSVGAHWSCREEN *p)
1695	{
1696	RT_NOREF(pState);
1697	D3D_RELEASE(p->pDXGIKeyedMutex);
1698	D3D_RELEASE(p->pDxgiResource);
1699	D3D_RELEASE(p->pTexture);
1700	p->SharedHandle = 0;
1701	p->sidScreenTarget = SVGA_ID_INVALID;
1702	}
1703
1704
1705	int vmsvga3dBackDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1706	{
1707	RT_NOREF(pThis, pThisCC, pScreen);
1708
1709	LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: screen %u\n", pScreen->idScreen));
1710
1711	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1712	AssertReturn(pState, VERR_INVALID_STATE);
1713
1714	PVMSVGA3DBACKEND pBackend = pState->pBackend;
1715	AssertReturn(pBackend, VERR_INVALID_STATE);
1716
1717	Assert(pScreen->pHwScreen == NULL);
1718
1719	VMSVGAHWSCREEN p = (VMSVGAHWSCREEN )RTMemAllocZ(sizeof(VMSVGAHWSCREEN));
1720	AssertPtrReturn(p, VERR_NO_MEMORY);
1721
1722	p->sidScreenTarget = SVGA_ID_INVALID;
1723
1724	int rc = vmsvga3dDrvNotifyDefineScreen(pThisCC, pScreen);
1725	if (RT_SUCCESS(rc))
1726	{
1727	/* The frontend supports the screen. Create the actual resource. */
1728	rc = vmsvga3dHwScreenCreate(pState, pScreen->cWidth, pScreen->cHeight, p);
1729	if (RT_SUCCESS(rc))
1730	LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: created\n"));
1731	}
1732
1733	if (RT_SUCCESS(rc))
1734	{
1735	LogRel(("VMSVGA: Using HW accelerated screen %u\n", pScreen->idScreen));
1736	pScreen->pHwScreen = p;
1737	}
1738	else
1739	{
1740	LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: %Rrc\n", rc));
1741	vmsvga3dHwScreenDestroy(pState, p);
1742	RTMemFree(p);
1743	}
1744
1745	return rc;
1746	}
1747
1748
1749	int vmsvga3dBackDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1750	{
1751	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1752	AssertReturn(pState, VERR_INVALID_STATE);
1753
1754	vmsvga3dDrvNotifyDestroyScreen(pThisCC, pScreen);
1755
1756	if (pScreen->pHwScreen)
1757	{
1758	vmsvga3dHwScreenDestroy(pState, pScreen->pHwScreen);
1759	RTMemFree(pScreen->pHwScreen);
1760	pScreen->pHwScreen = NULL;
1761	}
1762
1763	return VINF_SUCCESS;
1764	}
1765
1766
1767	int vmsvga3dBackSurfaceBlitToScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
1768	SVGASignedRect destRect, SVGA3dSurfaceImageId srcImage,
1769	SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *paRects)
1770	{
1771	RT_NOREF(pThisCC, pScreen, destRect, srcImage, srcRect, cRects, paRects);
1772
1773	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1774	AssertReturn(pState, VERR_INVALID_STATE);
1775
1776	PVMSVGA3DBACKEND pBackend = pState->pBackend;
1777	AssertReturn(pBackend, VERR_INVALID_STATE);
1778
1779	VMSVGAHWSCREEN *p = pScreen->pHwScreen;
1780	AssertReturn(p, VERR_NOT_SUPPORTED);
1781
1782	PVMSVGA3DSURFACE pSurface;
1783	int rc = vmsvga3dSurfaceFromSid(pState, srcImage.sid, &pSurface);
1784	AssertRCReturn(rc, rc);
1785
1786	/** @todo Implement. */
1787	AssertFailed();
1788	return VERR_NOT_IMPLEMENTED;
1789	}
1790
1791
1792	static DECLCALLBACK(int) vmsvga3dSurfaceMap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, SVGA3dBox const pBox,
1793	VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
1794	{
1795	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1796	AssertReturn(pState, VERR_INVALID_STATE);
1797
1798	PVMSVGA3DBACKEND pBackend = pState->pBackend;
1799	AssertReturn(pBackend, VERR_INVALID_STATE);
1800	AssertReturn(pBackend->pImmediateContext, VERR_INVALID_STATE);
1801
1802	PVMSVGA3DSURFACE pSurface;
1803	int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
1804	AssertRCReturn(rc, rc);
1805
1806	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
1807	if (!pBackendSurface)
1808	return VERR_INVALID_PARAMETER;
1809	// AssertFailedReturn(VERR_INVALID_PARAMETER); /** @todo The caller must directly use the surface memory. */
1810
1811	PVMSVGA3DDXCONTEXT pDXContext;
1812	vmsvga3dDXContextFromCid(pState, pSurface->idAssociatedContext, &pDXContext);
1813
1814	DXDEVICE *pDevice = NULL;
1815	if (pDXContext)
1816	{
1817	pDevice = &pDXContext->pBackendDXContext->device;
1818	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1819	}
1820
1821	SVGA3dBox clipBox;
1822	if (pBox)
1823	{
1824	clipBox = *pBox;
1825	vmsvgaR3ClipBox(&pSurface->paMipmapLevels[0].mipmapSize, &clipBox);
1826	ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
1827	}
1828	else
1829	{
1830	clipBox.x = 0;
1831	clipBox.y = 0;
1832	clipBox.z = 0;
1833	clipBox.w = pSurface->paMipmapLevels[0].mipmapSize.width;
1834	clipBox.h = pSurface->paMipmapLevels[0].mipmapSize.height;
1835	clipBox.d = pSurface->paMipmapLevels[0].mipmapSize.depth;
1836	}
1837
1838	/** @todo D3D11_MAP_WRITE does not work with D3D11_USAGE_DYNAMIC resources. Probably VMSVGA3D_SURFACE_MAP_WRITE is not necessary. */
1839	D3D11_MAP d3d11MapType;
1840	switch (enmMapType)
1841	{
1842	case VMSVGA3D_SURFACE_MAP_READ: d3d11MapType = D3D11_MAP_READ; break;
1843	case VMSVGA3D_SURFACE_MAP_WRITE: d3d11MapType = D3D11_MAP_WRITE; break;
1844	case VMSVGA3D_SURFACE_MAP_READ_WRITE: d3d11MapType = D3D11_MAP_READ_WRITE; break;
1845	case VMSVGA3D_SURFACE_MAP_WRITE_DISCARD: d3d11MapType = D3D11_MAP_WRITE_DISCARD; break;
1846	default:
1847	AssertFailed();
1848	return VERR_INVALID_PARAMETER;
1849	}
1850
1851	D3D11_MAPPED_SUBRESOURCE mappedResource;
1852	RT_ZERO(mappedResource);
1853
1854	if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
1855	{
1856	ID3D11Texture2D *pMappedTexture;
1857	if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
1858	{
1859	pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
1860
1861	/* Copy the texture content to the staging texture. */
1862	pBackend->pImmediateContext->CopyResource(pBackendSurface->u.ScreenTarget.pStagingTexture, pBackendSurface->u.ScreenTarget.pTexture);
1863	}
1864	else
1865	pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
1866
1867	UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
1868	HRESULT hr = pBackend->pImmediateContext->Map(pMappedTexture, Subresource,
1869	d3d11MapType, /* MapFlags = */ 0, &mappedResource);
1870	if (SUCCEEDED(hr))
1871	{
1872	pMap->enmMapType = enmMapType;
1873	pMap->box = clipBox;
1874	pMap->cbPixel = pSurface->cbBlock;
1875	pMap->cbRowPitch = mappedResource.RowPitch;
1876	pMap->cbDepthPitch = mappedResource.DepthPitch;
1877	pMap->pvData = (uint8_t *)mappedResource.pData
1878	+ pMap->box.x * pMap->cbPixel
1879	+ pMap->box.y * pMap->cbRowPitch
1880	+ pMap->box.z * pMap->cbDepthPitch;
1881	}
1882	else
1883	rc = VERR_NOT_SUPPORTED;
1884	}
1885	else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
1886	{
1887	AssertReturn(pDevice && pDevice->pDevice, VERR_INTERNAL_ERROR);
1888
1889	ID3D11Texture2D *pMappedTexture;
1890	if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
1891	{
1892	pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
1893
1894	/* Copy the texture content to the staging texture. */
1895	pDevice->pImmediateContext->CopyResource(pBackendSurface->u.ScreenTarget.pStagingTexture, pBackendSurface->u.ScreenTarget.pTexture);
1896	}
1897	else
1898	pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
1899
1900	UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
1901	HRESULT hr = pDevice->pImmediateContext->Map(pMappedTexture, Subresource,
1902	d3d11MapType, /* MapFlags = */ 0, &mappedResource);
1903	if (SUCCEEDED(hr))
1904	{
1905	pMap->enmMapType = enmMapType;
1906	pMap->box = clipBox;
1907	pMap->cbPixel = pSurface->cbBlock;
1908	pMap->cbRowPitch = mappedResource.RowPitch;
1909	pMap->cbDepthPitch = mappedResource.DepthPitch;
1910	pMap->pvData = (uint8_t *)mappedResource.pData
1911	+ pMap->box.x * pMap->cbPixel
1912	+ pMap->box.y * pMap->cbRowPitch
1913	+ pMap->box.z * pMap->cbDepthPitch;
1914	}
1915	else
1916	rc = VERR_NOT_SUPPORTED;
1917	}
1918	else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
1919	{
1920	UINT const Subresource = 0; /* Buffers have only one subresource. */
1921	HRESULT hr = pDevice->pImmediateContext->Map(pSurface->pBackendSurface->u.Buffer.pBuffer, Subresource,
1922	d3d11MapType, /* MapFlags = */ 0, &mappedResource);
1923	if (SUCCEEDED(hr))
1924	{
1925	pMap->enmMapType = enmMapType;
1926	pMap->box = clipBox;
1927	pMap->cbPixel = pSurface->cbBlock;
1928	pMap->cbRowPitch = mappedResource.RowPitch;
1929	pMap->cbDepthPitch = mappedResource.DepthPitch;
1930	pMap->pvData = (uint8_t *)mappedResource.pData
1931	+ pMap->box.x * pMap->cbPixel
1932	+ pMap->box.y * pMap->cbRowPitch
1933	+ pMap->box.z * pMap->cbDepthPitch;
1934	}
1935	else
1936	rc = VERR_NOT_SUPPORTED;
1937	}
1938	else
1939	{
1940	// UINT D3D11CalcSubresource(UINT MipSlice, UINT ArraySlice, UINT MipLevels);
1941	/** @todo Implement. */
1942	AssertFailed();
1943	rc = VERR_NOT_IMPLEMENTED;
1944	}
1945
1946	return rc;
1947	}
1948
1949
1950	static DECLCALLBACK(int) vmsvga3dSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, VMSVGA3D_MAPPED_SURFACE pMap, bool fWritten)
1951	{
1952	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1953	AssertReturn(pState, VERR_INVALID_STATE);
1954
1955	PVMSVGA3DBACKEND pBackend = pState->pBackend;
1956	AssertReturn(pBackend, VERR_INVALID_STATE);
1957	AssertReturn(pBackend->pImmediateContext, VERR_INVALID_STATE);
1958
1959	PVMSVGA3DSURFACE pSurface;
1960	int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
1961	AssertRCReturn(rc, rc);
1962
1963	/* The called should not use the function for system memory surfaces. */
1964	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
1965	AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
1966
1967	PVMSVGA3DDXCONTEXT pDXContext;
1968	vmsvga3dDXContextFromCid(pState, pSurface->idAssociatedContext, &pDXContext);
1969
1970	DXDEVICE *pDevice = NULL;
1971	if (pDXContext)
1972	{
1973	pDevice = &pDXContext->pBackendDXContext->device;
1974	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1975	}
1976
1977	if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
1978	{
1979	ID3D11Texture2D *pMappedTexture;
1980	if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
1981	pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
1982	else
1983	pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
1984
1985	UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
1986	pBackend->pImmediateContext->Unmap(pMappedTexture, Subresource);
1987
1988	if ( fWritten
1989	&& ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
1990	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
1991	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
1992	{
1993	ID3D11Resource *pDstResource = pBackendSurface->u.ScreenTarget.pTexture;
1994	UINT DstSubresource = Subresource;
1995	UINT DstX = pMap->box.x;
1996	UINT DstY = pMap->box.y;
1997	UINT DstZ = pMap->box.z;
1998	ID3D11Resource *pSrcResource = pBackendSurface->u.ScreenTarget.pDynamicTexture;
1999	UINT SrcSubresource = Subresource;
2000	D3D11_BOX SrcBox;
2001	SrcBox.left = pMap->box.x;
2002	SrcBox.top = pMap->box.y;
2003	SrcBox.front = pMap->box.z;
2004	SrcBox.right = pMap->box.x + pMap->box.w;
2005	SrcBox.bottom = pMap->box.y + pMap->box.h;
2006	SrcBox.back = pMap->box.z + pMap->box.d;
2007	pBackend->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
2008	pSrcResource, SrcSubresource, &SrcBox);
2009	}
2010	}
2011	else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
2012	{
2013	AssertReturn(pDevice && pDevice->pDevice, VERR_INTERNAL_ERROR);
2014
2015	ID3D11Texture2D *pMappedTexture;
2016	if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2017	pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
2018	else
2019	pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2020
2021	UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2022	pDevice->pImmediateContext->Unmap(pMappedTexture, Subresource);
2023
2024	if ( fWritten
2025	&& ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
2026	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
2027	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
2028	{
2029	ID3D11Resource *pDstResource = pBackendSurface->u.ScreenTarget.pTexture;
2030	UINT DstSubresource = Subresource;
2031	UINT DstX = pMap->box.x;
2032	UINT DstY = pMap->box.y;
2033	UINT DstZ = pMap->box.z;
2034	ID3D11Resource *pSrcResource = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2035	UINT SrcSubresource = Subresource;
2036	D3D11_BOX SrcBox;
2037	SrcBox.left = pMap->box.x;
2038	SrcBox.top = pMap->box.y;
2039	SrcBox.front = pMap->box.z;
2040	SrcBox.right = pMap->box.x + pMap->box.w;
2041	SrcBox.bottom = pMap->box.y + pMap->box.h;
2042	SrcBox.back = pMap->box.z + pMap->box.d;
2043	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
2044	pSrcResource, SrcSubresource, &SrcBox);
2045	}
2046	}
2047	else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
2048	{
2049	UINT const Subresource = 0; /* Buffers have only one subresource. */
2050	pDevice->pImmediateContext->Unmap(pBackendSurface->u.Buffer.pBuffer, Subresource);
2051	}
2052	else
2053	{
2054	AssertFailed();
2055	rc = VERR_NOT_IMPLEMENTED;
2056	}
2057
2058	return rc;
2059	}
2060
2061
2062	static DECLCALLBACK(int) vmsvga3dScreenTargetBind(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, uint32_t sid)
2063	{
2064	int rc = VINF_SUCCESS;
2065
2066	PVMSVGA3DSURFACE pSurface;
2067	if (sid != SVGA_ID_INVALID)
2068	{
2069	/* Create the surface if does not yet exist. */
2070	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2071	AssertReturn(pState, VERR_INVALID_STATE);
2072
2073	rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
2074	AssertRCReturn(rc, rc);
2075
2076	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
2077	{
2078	/* Create the actual texture. */
2079	rc = vmsvga3dBackSurfaceCreateScreenTarget(pState, pSurface);
2080	AssertRCReturn(rc, rc);
2081	}
2082	}
2083	else
2084	pSurface = NULL;
2085
2086	/* Notify the HW accelerated screen if it is used. */
2087	VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
2088	if (!pHwScreen)
2089	return VINF_SUCCESS;
2090
2091	/* Same surface -> do nothing. */
2092	if (pHwScreen->sidScreenTarget == sid)
2093	return VINF_SUCCESS;
2094
2095	if (sid != SVGA_ID_INVALID)
2096	{
2097	AssertReturn( pSurface->pBackendSurface
2098	&& pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
2099
2100	HANDLE const hSharedSurface = pHwScreen->SharedHandle;
2101	rc = vmsvga3dDrvNotifyBindSurface(pThisCC, pScreen, hSharedSurface);
2102	}
2103
2104	if (RT_SUCCESS(rc))
2105	{
2106	pHwScreen->sidScreenTarget = sid;
2107	}
2108
2109	return rc;
2110	}
2111
2112
2113	static DECLCALLBACK(int) vmsvga3dScreenTargetUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT pScreen, SVGA3dRect const pRect)
2114	{
2115	VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
2116	AssertReturn(pHwScreen, VERR_NOT_SUPPORTED);
2117
2118	if (pHwScreen->sidScreenTarget == SVGA_ID_INVALID)
2119	return VINF_SUCCESS; /* No surface bound. */
2120
2121	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2122	AssertReturn(pState, VERR_INVALID_STATE);
2123
2124	PVMSVGA3DBACKEND pBackend = pState->pBackend;
2125	AssertReturn(pBackend, VERR_INVALID_STATE);
2126
2127	PVMSVGA3DSURFACE pSurface;
2128	int rc = vmsvga3dSurfaceFromSid(pState, pHwScreen->sidScreenTarget, &pSurface);
2129	AssertRCReturn(rc, rc);
2130
2131	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2132	AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
2133
2134	SVGA3dRect boundRect;
2135	boundRect.x = 0;
2136	boundRect.y = 0;
2137	boundRect.w = pSurface->paMipmapLevels[0].mipmapSize.width;
2138	boundRect.h = pSurface->paMipmapLevels[0].mipmapSize.height;
2139	SVGA3dRect clipRect = *pRect;
2140	vmsvgaR3Clip3dRect(&boundRect, &clipRect);
2141	ASSERT_GUEST_RETURN(clipRect.w && clipRect.h, VERR_INVALID_PARAMETER);
2142
2143	/* Copy the screen texture to the shared surface. */
2144	DWORD result = pHwScreen->pDXGIKeyedMutex->AcquireSync(0, 10000);
2145	if (result == WAIT_OBJECT_0)
2146	{
2147	ID3D11Query *pQuery = 0;
2148	D3D11_QUERY_DESC qd;
2149	RT_ZERO(qd);
2150	qd.Query = D3D11_QUERY_EVENT;
2151	HRESULT hr2 = pBackend->pDevice->CreateQuery(&qd, &pQuery);
2152	Assert(hr2 == S_OK); RT_NOREF(hr2);
2153
2154	pBackend->pImmediateContext->CopyResource(pHwScreen->pTexture, pBackendSurface->u.ScreenTarget.pTexture);
2155
2156	pBackend->pImmediateContext->Flush();
2157
2158	pBackend->pImmediateContext->End(pQuery);
2159
2160	BOOL queryData;
2161	while (pBackend->pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
2162	{
2163	RTThreadYield();
2164	}
2165	D3D_RELEASE(pQuery);
2166
2167	result = pHwScreen->pDXGIKeyedMutex->ReleaseSync(1);
2168	}
2169	else
2170	AssertFailed();
2171
2172	rc = vmsvga3dDrvNotifyUpdate(pThisCC, pScreen, pRect->x, pRect->y, pRect->w, pRect->h);
2173	return rc;
2174	}
2175
2176
2177	void vmsvga3dUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
2178	{
2179	RT_NOREF(pThisCC, idScreen, pOldViewport);
2180	/** @todo Scroll the screen content without requiring the guest to redraw. */
2181	}
2182
2183
2184	int vmsvga3dQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
2185	{
2186	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2187	AssertReturn(pState, VERR_INVALID_STATE);
2188
2189	int rc = VINF_SUCCESS;
2190
2191	*pu32Val = 0;
2192
2193	if (idx3dCaps > SVGA3D_DEVCAP_MAX)
2194	{
2195	LogRelMax(16, ("VMSVGA: unsupported SVGA3D_DEVCAP %d\n", idx3dCaps));
2196	return VERR_NOT_SUPPORTED;
2197	}
2198
2199	/* Most values are taken from:
2200	* https://docs.microsoft.com/en-us/windows/win32/direct3d11/overviews-direct3d-11-devices-downlevel-intro
2201	*
2202	* Shader values are from
2203	* https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-models
2204	*/
2205
2206	switch (idx3dCaps)
2207	{
2208	case SVGA3D_DEVCAP_3D:
2209	*pu32Val = 1;
2210	break;
2211
2212	case SVGA3D_DEVCAP_MAX_LIGHTS:
2213	pu32Val = SVGA3D_NUM_LIGHTS; / VGPU9. Not applicable to DX11. */
2214	break;
2215
2216	case SVGA3D_DEVCAP_MAX_TEXTURES:
2217	pu32Val = SVGA3D_NUM_TEXTURE_UNITS; / VGPU9. Not applicable to DX11. */
2218	break;
2219
2220	case SVGA3D_DEVCAP_MAX_CLIP_PLANES:
2221	*pu32Val = SVGA3D_NUM_CLIPPLANES;
2222	break;
2223
2224	case SVGA3D_DEVCAP_VERTEX_SHADER_VERSION:
2225	if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2226	*pu32Val = SVGA3DVSVERSION_40;
2227	else
2228	*pu32Val = SVGA3DVSVERSION_30;
2229	break;
2230
2231	case SVGA3D_DEVCAP_VERTEX_SHADER:
2232	*pu32Val = 1;
2233	break;
2234
2235	case SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION:
2236	if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2237	*pu32Val = SVGA3DPSVERSION_40;
2238	else
2239	*pu32Val = SVGA3DPSVERSION_30;
2240	break;
2241
2242	case SVGA3D_DEVCAP_FRAGMENT_SHADER:
2243	*pu32Val = 1;
2244	break;
2245
2246	case SVGA3D_DEVCAP_MAX_RENDER_TARGETS:
2247	if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2248	*pu32Val = 8;
2249	else
2250	*pu32Val = 4;
2251	break;
2252
2253	case SVGA3D_DEVCAP_S23E8_TEXTURES:
2254	case SVGA3D_DEVCAP_S10E5_TEXTURES:
2255	/* Must be obsolete by now; surface format caps specify the same thing. */
2256	break;
2257
2258	case SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND:
2259	/* Obsolete */
2260	break;
2261
2262	/*
2263	* 2. The BUFFER_FORMAT capabilities are deprecated, and they always
2264	* return TRUE. Even on physical hardware that does not support
2265	* these formats natively, the SVGA3D device will provide an emulation
2266	* which should be invisible to the guest OS.
2267	*/
2268	case SVGA3D_DEVCAP_D16_BUFFER_FORMAT:
2269	case SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT:
2270	case SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT:
2271	*pu32Val = 1;
2272	break;
2273
2274	case SVGA3D_DEVCAP_QUERY_TYPES:
2275	/* Obsolete */
2276	break;
2277
2278	case SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING:
2279	/* Obsolete */
2280	break;
2281
2282	case SVGA3D_DEVCAP_MAX_POINT_SIZE:
2283	AssertCompile(sizeof(uint32_t) == sizeof(float));
2284	(float )pu32Val = 256.0f; /* VGPU9. Not applicable to DX11. */
2285	break;
2286
2287	case SVGA3D_DEVCAP_MAX_SHADER_TEXTURES:
2288	/* Obsolete */
2289	break;
2290
2291	case SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH:
2292	case SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT:
2293	if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
2294	*pu32Val = 16384;
2295	else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2296	*pu32Val = 8192;
2297	else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
2298	*pu32Val = 4096;
2299	else
2300	*pu32Val = 2048;
2301	break;
2302
2303	case SVGA3D_DEVCAP_MAX_VOLUME_EXTENT:
2304	if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2305	*pu32Val = 2048;
2306	else
2307	*pu32Val = 256;
2308	break;
2309
2310	case SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT:
2311	if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
2312	*pu32Val = 16384;
2313	else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
2314	*pu32Val = 8192;
2315	else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2316	*pu32Val = 2048;
2317	else
2318	*pu32Val = 128;
2319	break;
2320
2321	case SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO:
2322	/* Obsolete */
2323	break;
2324
2325	case SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY:
2326	if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2327	*pu32Val = D3D11_REQ_MAXANISOTROPY;
2328	else
2329	*pu32Val = 2; // D3D_FL9_1_DEFAULT_MAX_ANISOTROPY;
2330	break;
2331
2332	case SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT:
2333	if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2334	*pu32Val = UINT32_MAX;
2335	else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2336	*pu32Val = 1048575; // D3D_FL9_2_IA_PRIMITIVE_MAX_COUNT;
2337	else
2338	*pu32Val = 65535; // D3D_FL9_1_IA_PRIMITIVE_MAX_COUNT;
2339	break;
2340
2341	case SVGA3D_DEVCAP_MAX_VERTEX_INDEX:
2342	if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2343	*pu32Val = UINT32_MAX;
2344	else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2345	*pu32Val = 1048575;
2346	else
2347	*pu32Val = 65534;
2348	break;
2349
2350	case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS:
2351	if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2352	*pu32Val = UINT32_MAX;
2353	else
2354	*pu32Val = 512;
2355	break;
2356
2357	case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS:
2358	if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2359	*pu32Val = UINT32_MAX;
2360	else
2361	*pu32Val = 512;
2362	break;
2363
2364	case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS:
2365	if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2366	*pu32Val = 4096;
2367	else
2368	*pu32Val = 32;
2369	break;
2370
2371	case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS:
2372	if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2373	*pu32Val = 4096;
2374	else
2375	*pu32Val = 32;
2376	break;
2377
2378	case SVGA3D_DEVCAP_TEXTURE_OPS:
2379	/* Obsolete */
2380	break;
2381
2382	case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8:
2383	case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8:
2384	case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10:
2385	case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5:
2386	case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5:
2387	case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4:
2388	case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5:
2389	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16:
2390	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8:
2391	case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8:
2392	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8:
2393	case SVGA3D_DEVCAP_SURFACEFMT_Z_D16:
2394	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8:
2395	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8:
2396	case SVGA3D_DEVCAP_SURFACEFMT_DXT1:
2397	case SVGA3D_DEVCAP_SURFACEFMT_DXT2:
2398	case SVGA3D_DEVCAP_SURFACEFMT_DXT3:
2399	case SVGA3D_DEVCAP_SURFACEFMT_DXT4:
2400	case SVGA3D_DEVCAP_SURFACEFMT_DXT5:
2401	case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8:
2402	case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10:
2403	case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8:
2404	case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8:
2405	case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8:
2406	case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5:
2407	case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8:
2408	case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5:
2409	case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8:
2410	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5:
2411	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8:
2412	case SVGA3D_DEVCAP_SURFACEFMT_V16U16:
2413	case SVGA3D_DEVCAP_SURFACEFMT_G16R16:
2414	case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16:
2415	case SVGA3D_DEVCAP_SURFACEFMT_UYVY:
2416	case SVGA3D_DEVCAP_SURFACEFMT_YUY2:
2417	case SVGA3D_DEVCAP_SURFACEFMT_NV12:
2418	case SVGA3D_DEVCAP_DEAD10: /* SVGA3D_DEVCAP_SURFACEFMT_AYUV */
2419	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16:
2420	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24:
2421	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT:
2422	case SVGA3D_DEVCAP_SURFACEFMT_ATI1:
2423	case SVGA3D_DEVCAP_SURFACEFMT_ATI2:
2424	case SVGA3D_DEVCAP_SURFACEFMT_YV12:
2425	{
2426	SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapSurfaceFmt2Format(idx3dCaps);
2427	rc = vmsvgaDXCheckFormatSupportPreDX(pState, enmFormat, pu32Val);
2428	break;
2429	}
2430
2431	case SVGA3D_DEVCAP_MISSING62:
2432	/* Unused */
2433	break;
2434
2435	case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES:
2436	/* Obsolete */
2437	break;
2438
2439	case SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS:
2440	if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2441	*pu32Val = 8;
2442	else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
2443	*pu32Val = 4; // D3D_FL9_3_SIMULTANEOUS_RENDER_TARGET_COUNT
2444	else
2445	*pu32Val = 1; // D3D_FL9_1_SIMULTANEOUS_RENDER_TARGET_COUNT
2446	break;
2447
2448	case SVGA3D_DEVCAP_DEAD4: /* SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES */
2449	case SVGA3D_DEVCAP_DEAD5: /* SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES */
2450	pu32Val = (1 << (2-1)) \| (1 << (4-1)) \| (1 << (8-1)); / 2x, 4x, 8x */
2451	break;
2452
2453	case SVGA3D_DEVCAP_DEAD7: /* SVGA3D_DEVCAP_ALPHATOCOVERAGE */
2454	/* Obsolete */
2455	break;
2456
2457	case SVGA3D_DEVCAP_DEAD6: /* SVGA3D_DEVCAP_SUPERSAMPLE */
2458	/* Obsolete */
2459	break;
2460
2461	case SVGA3D_DEVCAP_AUTOGENMIPMAPS:
2462	*pu32Val = 1;
2463	break;
2464
2465	case SVGA3D_DEVCAP_MAX_CONTEXT_IDS:
2466	*pu32Val = SVGA3D_MAX_CONTEXT_IDS;
2467	break;
2468
2469	case SVGA3D_DEVCAP_MAX_SURFACE_IDS:
2470	*pu32Val = SVGA3D_MAX_SURFACE_IDS;
2471	break;
2472
2473	case SVGA3D_DEVCAP_DEAD1:
2474	/* Obsolete */
2475	break;
2476
2477	case SVGA3D_DEVCAP_DEAD8: /* SVGA3D_DEVCAP_VIDEO_DECODE */
2478	/* Obsolete */
2479	break;
2480
2481	case SVGA3D_DEVCAP_DEAD9: /* SVGA3D_DEVCAP_VIDEO_PROCESS */
2482	/* Obsolete */
2483	break;
2484
2485	case SVGA3D_DEVCAP_LINE_AA:
2486	*pu32Val = 1;
2487	break;
2488
2489	case SVGA3D_DEVCAP_LINE_STIPPLE:
2490	pu32Val = 0; / DX11 does not seem to support this directly. */
2491	break;
2492
2493	case SVGA3D_DEVCAP_MAX_LINE_WIDTH:
2494	AssertCompile(sizeof(uint32_t) == sizeof(float));
2495	(float )pu32Val = 1.0f;
2496	break;
2497
2498	case SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH:
2499	AssertCompile(sizeof(uint32_t) == sizeof(float));
2500	(float )pu32Val = 1.0f;
2501	break;
2502
2503	case SVGA3D_DEVCAP_DEAD3: /* Old SVGA3D_DEVCAP_LOGICOPS */
2504	/* Deprecated. */
2505	AssertCompile(SVGA3D_DEVCAP_DEAD3 == 92); /* Newer SVGA headers redefine this. */
2506	break;
2507
2508	case SVGA3D_DEVCAP_TS_COLOR_KEY:
2509	pu32Val = 0; / DX11 does not seem to support this directly. */
2510	break;
2511
2512	case SVGA3D_DEVCAP_DEAD2:
2513	break;
2514
2515	case SVGA3D_DEVCAP_DXCONTEXT:
2516	*pu32Val = 1;
2517	break;
2518
2519	case SVGA3D_DEVCAP_DEAD11: /* SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE */
2520	*pu32Val = D3D11_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION;
2521	break;
2522
2523	case SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS:
2524	*pu32Val = D3D11_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT;
2525	break;
2526
2527	case SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS:
2528	*pu32Val = D3D11_COMMONSHADER_CONSTANT_BUFFER_HW_SLOT_COUNT;
2529	break;
2530
2531	case SVGA3D_DEVCAP_DX_PROVOKING_VERTEX:
2532	pu32Val = 0; / boolean */
2533	break;
2534
2535	case SVGA3D_DEVCAP_DXFMT_X8R8G8B8:
2536	case SVGA3D_DEVCAP_DXFMT_A8R8G8B8:
2537	case SVGA3D_DEVCAP_DXFMT_R5G6B5:
2538	case SVGA3D_DEVCAP_DXFMT_X1R5G5B5:
2539	case SVGA3D_DEVCAP_DXFMT_A1R5G5B5:
2540	case SVGA3D_DEVCAP_DXFMT_A4R4G4B4:
2541	case SVGA3D_DEVCAP_DXFMT_Z_D32:
2542	case SVGA3D_DEVCAP_DXFMT_Z_D16:
2543	case SVGA3D_DEVCAP_DXFMT_Z_D24S8:
2544	case SVGA3D_DEVCAP_DXFMT_Z_D15S1:
2545	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8:
2546	case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4:
2547	case SVGA3D_DEVCAP_DXFMT_LUMINANCE16:
2548	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8:
2549	case SVGA3D_DEVCAP_DXFMT_DXT1:
2550	case SVGA3D_DEVCAP_DXFMT_DXT2:
2551	case SVGA3D_DEVCAP_DXFMT_DXT3:
2552	case SVGA3D_DEVCAP_DXFMT_DXT4:
2553	case SVGA3D_DEVCAP_DXFMT_DXT5:
2554	case SVGA3D_DEVCAP_DXFMT_BUMPU8V8:
2555	case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5:
2556	case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8:
2557	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1:
2558	case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5:
2559	case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8:
2560	case SVGA3D_DEVCAP_DXFMT_A2R10G10B10:
2561	case SVGA3D_DEVCAP_DXFMT_V8U8:
2562	case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8:
2563	case SVGA3D_DEVCAP_DXFMT_CxV8U8:
2564	case SVGA3D_DEVCAP_DXFMT_X8L8V8U8:
2565	case SVGA3D_DEVCAP_DXFMT_A2W10V10U10:
2566	case SVGA3D_DEVCAP_DXFMT_ALPHA8:
2567	case SVGA3D_DEVCAP_DXFMT_R_S10E5:
2568	case SVGA3D_DEVCAP_DXFMT_R_S23E8:
2569	case SVGA3D_DEVCAP_DXFMT_RG_S10E5:
2570	case SVGA3D_DEVCAP_DXFMT_RG_S23E8:
2571	case SVGA3D_DEVCAP_DXFMT_BUFFER:
2572	case SVGA3D_DEVCAP_DXFMT_Z_D24X8:
2573	case SVGA3D_DEVCAP_DXFMT_V16U16:
2574	case SVGA3D_DEVCAP_DXFMT_G16R16:
2575	case SVGA3D_DEVCAP_DXFMT_A16B16G16R16:
2576	case SVGA3D_DEVCAP_DXFMT_UYVY:
2577	case SVGA3D_DEVCAP_DXFMT_YUY2:
2578	case SVGA3D_DEVCAP_DXFMT_NV12:
2579	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: /* SVGA3D_DEVCAP_DXFMT_AYUV */
2580	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS:
2581	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT:
2582	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT:
2583	case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS:
2584	case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT:
2585	case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT:
2586	case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT:
2587	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS:
2588	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT:
2589	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM:
2590	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT:
2591	case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS:
2592	case SVGA3D_DEVCAP_DXFMT_R32G32_UINT:
2593	case SVGA3D_DEVCAP_DXFMT_R32G32_SINT:
2594	case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS:
2595	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT:
2596	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24:
2597	case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT:
2598	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS:
2599	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT:
2600	case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT:
2601	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS:
2602	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM:
2603	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB:
2604	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT:
2605	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT:
2606	case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS:
2607	case SVGA3D_DEVCAP_DXFMT_R16G16_UINT:
2608	case SVGA3D_DEVCAP_DXFMT_R16G16_SINT:
2609	case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS:
2610	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT:
2611	case SVGA3D_DEVCAP_DXFMT_R32_UINT:
2612	case SVGA3D_DEVCAP_DXFMT_R32_SINT:
2613	case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS:
2614	case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT:
2615	case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8:
2616	case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT:
2617	case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS:
2618	case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM:
2619	case SVGA3D_DEVCAP_DXFMT_R8G8_UINT:
2620	case SVGA3D_DEVCAP_DXFMT_R8G8_SINT:
2621	case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS:
2622	case SVGA3D_DEVCAP_DXFMT_R16_UNORM:
2623	case SVGA3D_DEVCAP_DXFMT_R16_UINT:
2624	case SVGA3D_DEVCAP_DXFMT_R16_SNORM:
2625	case SVGA3D_DEVCAP_DXFMT_R16_SINT:
2626	case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS:
2627	case SVGA3D_DEVCAP_DXFMT_R8_UNORM:
2628	case SVGA3D_DEVCAP_DXFMT_R8_UINT:
2629	case SVGA3D_DEVCAP_DXFMT_R8_SNORM:
2630	case SVGA3D_DEVCAP_DXFMT_R8_SINT:
2631	case SVGA3D_DEVCAP_DXFMT_P8:
2632	case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP:
2633	case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM:
2634	case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM:
2635	case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS:
2636	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB:
2637	case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS:
2638	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB:
2639	case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS:
2640	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB:
2641	case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS:
2642	case SVGA3D_DEVCAP_DXFMT_ATI1:
2643	case SVGA3D_DEVCAP_DXFMT_BC4_SNORM:
2644	case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS:
2645	case SVGA3D_DEVCAP_DXFMT_ATI2:
2646	case SVGA3D_DEVCAP_DXFMT_BC5_SNORM:
2647	case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM:
2648	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS:
2649	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB:
2650	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS:
2651	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB:
2652	case SVGA3D_DEVCAP_DXFMT_Z_DF16:
2653	case SVGA3D_DEVCAP_DXFMT_Z_DF24:
2654	case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT:
2655	case SVGA3D_DEVCAP_DXFMT_YV12:
2656	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT:
2657	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT:
2658	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM:
2659	case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT:
2660	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM:
2661	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM:
2662	case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT:
2663	case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM:
2664	case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM:
2665	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT:
2666	case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM:
2667	case SVGA3D_DEVCAP_DXFMT_R16_FLOAT:
2668	case SVGA3D_DEVCAP_DXFMT_D16_UNORM:
2669	case SVGA3D_DEVCAP_DXFMT_A8_UNORM:
2670	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM:
2671	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM:
2672	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM:
2673	case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM:
2674	case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM:
2675	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM:
2676	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM:
2677	case SVGA3D_DEVCAP_DXFMT_BC4_UNORM:
2678	case SVGA3D_DEVCAP_DXFMT_BC5_UNORM:
2679	case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS:
2680	case SVGA3D_DEVCAP_DXFMT_BC6H_UF16:
2681	case SVGA3D_DEVCAP_DXFMT_BC6H_SF16:
2682	case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS:
2683	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM:
2684	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB:
2685	{
2686	SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapDxfmt2Format(idx3dCaps);
2687	rc = vmsvgaDXCheckFormatSupport(pState, enmFormat, pu32Val);
2688	break;
2689	}
2690
2691	case SVGA3D_DEVCAP_SM41:
2692	pu32Val = 0; / boolean */
2693	break;
2694
2695	case SVGA3D_DEVCAP_MULTISAMPLE_2X:
2696	pu32Val = 0; / boolean */
2697	break;
2698
2699	case SVGA3D_DEVCAP_MULTISAMPLE_4X:
2700	pu32Val = 0; / boolean */
2701	break;
2702
2703	case SVGA3D_DEVCAP_MS_FULL_QUALITY:
2704	pu32Val = 0; / boolean */
2705	break;
2706
2707	case SVGA3D_DEVCAP_LOGICOPS:
2708	AssertCompile(SVGA3D_DEVCAP_LOGICOPS == 248);
2709	pu32Val = 0; / boolean */
2710	break;
2711
2712	case SVGA3D_DEVCAP_LOGIC_BLENDOPS:
2713	pu32Val = 0; / boolean */
2714	break;
2715
2716	case SVGA3D_DEVCAP_RESERVED_1:
2717	break;
2718
2719	case SVGA3D_DEVCAP_RESERVED_2:
2720	break;
2721
2722	case SVGA3D_DEVCAP_SM5:
2723	pu32Val = 0; / boolean */
2724	break;
2725
2726	case SVGA3D_DEVCAP_MULTISAMPLE_8X:
2727	pu32Val = 0; / boolean */
2728	break;
2729
2730	case SVGA3D_DEVCAP_MAX:
2731	case SVGA3D_DEVCAP_INVALID:
2732	rc = VERR_NOT_SUPPORTED;
2733	break;
2734	}
2735
2736	return rc;
2737	}
2738
2739
2740	/* Handle resize */
2741	int vmsvga3dChangeMode(PVGASTATECC pThisCC)
2742	{
2743	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2744	AssertReturn(pState, VERR_INVALID_STATE);
2745
2746	return VINF_SUCCESS;
2747	}
2748
2749
2750	int vmsvga3dSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src,
2751	uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
2752	{
2753	RT_NOREF(dest, src, cCopyBoxes, pBox);
2754
2755	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2756	AssertReturn(pState, VERR_INVALID_STATE);
2757
2758	AssertFailed();
2759	return VERR_NOT_IMPLEMENTED;
2760	}
2761
2762
2763	/**
2764	* Create a new 3d context
2765	*
2766	* @returns VBox status code.
2767	* @param pThisCC The VGA/VMSVGA state for ring-3.
2768	* @param cid Context id
2769	*/
2770	int vmsvga3dContextDefine(PVGASTATECC pThisCC, uint32_t cid)
2771	{
2772	RT_NOREF(cid);
2773
2774	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2775	AssertReturn(pState, VERR_INVALID_STATE);
2776
2777	AssertFailed();
2778	return VERR_NOT_IMPLEMENTED;
2779	}
2780
2781
2782	/**
2783	* Destroy an existing 3d context
2784	*
2785	* @returns VBox status code.
2786	* @param pThisCC The VGA/VMSVGA state for ring-3.
2787	* @param cid Context id
2788	*/
2789	int vmsvga3dContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
2790	{
2791	RT_NOREF(cid);
2792
2793	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2794	AssertReturn(pState, VERR_INVALID_STATE);
2795
2796	AssertFailed();
2797	return VINF_SUCCESS;
2798	}
2799
2800
2801	int vmsvga3dSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
2802	{
2803	RT_NOREF(cid, type, matrix);
2804
2805	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2806	AssertReturn(pState, VERR_INVALID_STATE);
2807
2808	AssertFailed();
2809	return VINF_SUCCESS;
2810	}
2811
2812
2813	int vmsvga3dSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
2814	{
2815	RT_NOREF(cid, zRange);
2816
2817	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2818	AssertReturn(pState, VERR_INVALID_STATE);
2819
2820	AssertFailed();
2821	return VINF_SUCCESS;
2822	}
2823
2824
2825	int vmsvga3dSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
2826	{
2827	RT_NOREF(cid, cRenderStates, pRenderState);
2828
2829	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2830	AssertReturn(pState, VERR_INVALID_STATE);
2831
2832	AssertFailed();
2833	return VINF_SUCCESS;
2834	}
2835
2836
2837	int vmsvga3dSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
2838	{
2839	RT_NOREF(cid, type, target);
2840
2841	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2842	AssertReturn(pState, VERR_INVALID_STATE);
2843
2844	AssertFailed();
2845	return VINF_SUCCESS;
2846	}
2847
2848
2849	int vmsvga3dSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
2850	{
2851	RT_NOREF(cid, cTextureStates, pTextureState);
2852
2853	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2854	AssertReturn(pState, VERR_INVALID_STATE);
2855
2856	AssertFailed();
2857	return VINF_SUCCESS;
2858	}
2859
2860
2861	int vmsvga3dSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
2862	{
2863	RT_NOREF(cid, face, pMaterial);
2864
2865	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2866	AssertReturn(pState, VERR_INVALID_STATE);
2867
2868	AssertFailed();
2869	return VINF_SUCCESS;
2870	}
2871
2872
2873	int vmsvga3dSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
2874	{
2875	RT_NOREF(cid, index, pData);
2876
2877	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2878	AssertReturn(pState, VERR_INVALID_STATE);
2879
2880	AssertFailed();
2881	return VINF_SUCCESS;
2882	}
2883
2884
2885	int vmsvga3dSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
2886	{
2887	RT_NOREF(cid, index, enabled);
2888
2889	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2890	AssertReturn(pState, VERR_INVALID_STATE);
2891
2892	AssertFailed();
2893	return VINF_SUCCESS;
2894	}
2895
2896
2897	int vmsvga3dSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
2898	{
2899	RT_NOREF(cid, pRect);
2900
2901	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2902	AssertReturn(pState, VERR_INVALID_STATE);
2903
2904	AssertFailed();
2905	return VINF_SUCCESS;
2906	}
2907
2908
2909	int vmsvga3dSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
2910	{
2911	RT_NOREF(cid, index, plane);
2912
2913	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2914	AssertReturn(pState, VERR_INVALID_STATE);
2915
2916	AssertFailed();
2917	return VINF_SUCCESS;
2918	}
2919
2920
2921	int vmsvga3dCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth,
2922	uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
2923	{
2924	/* From SVGA3D_BeginClear comments:
2925	*
2926	* Clear is not affected by clipping, depth test, or other
2927	* render state which affects the fragment pipeline.
2928	*
2929	* Therefore this code must ignore the current scissor rect.
2930	*/
2931
2932	RT_NOREF(cid, clearFlag, color, depth, stencil, cRects, pRect);
2933
2934	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2935	AssertReturn(pState, VERR_INVALID_STATE);
2936
2937	AssertFailed();
2938	return VINF_SUCCESS;
2939	}
2940
2941
2942	int vmsvga3dDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl,
2943	uint32_t numRanges, SVGA3dPrimitiveRange *pRange,
2944	uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
2945	{
2946	RT_NOREF(cid, numVertexDecls, pVertexDecl, numRanges, pRange, cVertexDivisor, pVertexDivisor);
2947
2948	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2949	AssertReturn(pState, VERR_INVALID_STATE);
2950
2951	AssertFailed();
2952	return VINF_SUCCESS;
2953	}
2954
2955
2956	int vmsvga3dSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
2957	{
2958	RT_NOREF(cid, pRect);
2959
2960	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2961	AssertReturn(pState, VERR_INVALID_STATE);
2962
2963	AssertFailed();
2964	return VINF_SUCCESS;
2965	}
2966
2967
2968	int vmsvga3dGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
2969	{
2970	RT_NOREF(sid, filter);
2971
2972	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2973	AssertReturn(pState, VERR_INVALID_STATE);
2974
2975	AssertFailed();
2976	return VINF_SUCCESS;
2977	}
2978
2979
2980	int vmsvga3dShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type,
2981	uint32_t cbData, uint32_t *pShaderData)
2982	{
2983	RT_NOREF(cid, shid, type, cbData, pShaderData);
2984
2985	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2986	AssertReturn(pState, VERR_INVALID_STATE);
2987
2988	AssertFailed();
2989	return VINF_SUCCESS;
2990	}
2991
2992
2993	int vmsvga3dShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
2994	{
2995	RT_NOREF(cid, shid, type);
2996
2997	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2998	AssertReturn(pState, VERR_INVALID_STATE);
2999
3000	AssertFailed();
3001	return VINF_SUCCESS;
3002	}
3003
3004
3005	int vmsvga3dShaderSet(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
3006	{
3007	RT_NOREF(pContext, cid, type, shid);
3008
3009	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3010	AssertReturn(pState, VERR_INVALID_STATE);
3011
3012	AssertFailed();
3013	return VINF_SUCCESS;
3014	}
3015
3016
3017	int vmsvga3dShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type,
3018	SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
3019	{
3020	RT_NOREF(cid, reg, type, ctype, cRegisters, pValues);
3021
3022	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3023	AssertReturn(pState, VERR_INVALID_STATE);
3024
3025	AssertFailed();
3026	return VINF_SUCCESS;
3027	}
3028
3029
3030	/**
3031	* Destroy backend specific surface bits (part of SVGA_3D_CMD_SURFACE_DESTROY).
3032	*
3033	* @param pState The VMSVGA3d state.
3034	* @param pSurface The surface being destroyed.
3035	*/
3036	void vmsvga3dBackSurfaceDestroy(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface)
3037	{
3038	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3039	AssertReturnVoid(pBackend);
3040	AssertReturnVoid(pBackend->pImmediateContext);
3041
3042	/* The caller should not use the function for system memory surfaces. */
3043	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3044	if (!pBackendSurface)
3045	return;
3046	pSurface->pBackendSurface = NULL;
3047
3048	if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3049	{
3050	D3D_RELEASE(pBackendSurface->u.ScreenTarget.pStagingTexture);
3051	D3D_RELEASE(pBackendSurface->u.ScreenTarget.pDynamicTexture);
3052	D3D_RELEASE(pBackendSurface->u.ScreenTarget.pTexture);
3053	}
3054	else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
3055	{
3056	D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture);
3057	D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture);
3058	D3D_RELEASE(pBackendSurface->u.Texture.pTexture);
3059	}
3060	else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3061	{
3062	D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
3063	}
3064	else
3065	{
3066	AssertFailed();
3067	}
3068
3069	RTMemFree(pBackendSurface);
3070	}
3071
3072
3073	/**
3074	* Backend worker for implementing SVGA_3D_CMD_SURFACE_STRETCHBLT.
3075	*
3076	* @returns VBox status code.
3077	* @param pThis The VGA device instance.
3078	* @param pState The VMSVGA3d state.
3079	* @param pDstSurface The destination host surface.
3080	* @param uDstFace The destination face (valid).
3081	* @param uDstMipmap The destination mipmap level (valid).
3082	* @param pDstBox The destination box.
3083	* @param pSrcSurface The source host surface.
3084	* @param uSrcFace The destination face (valid).
3085	* @param uSrcMipmap The source mimap level (valid).
3086	* @param pSrcBox The source box.
3087	* @param enmMode The strecht blt mode .
3088	* @param pContext The VMSVGA3d context (already current for OGL).
3089	*/
3090	int vmsvga3dBackSurfaceStretchBlt(PVGASTATE pThis, PVMSVGA3DSTATE pState,
3091	PVMSVGA3DSURFACE pDstSurface, uint32_t uDstFace, uint32_t uDstMipmap, SVGA3dBox const *pDstBox,
3092	PVMSVGA3DSURFACE pSrcSurface, uint32_t uSrcFace, uint32_t uSrcMipmap, SVGA3dBox const *pSrcBox,
3093	SVGA3dStretchBltMode enmMode, PVMSVGA3DCONTEXT pContext)
3094	{
3095	RT_NOREF(pThis, pState, pDstSurface, uDstFace, uDstMipmap, pDstBox,
3096	pSrcSurface, uSrcFace, uSrcMipmap, pSrcBox, enmMode, pContext);
3097
3098	AssertFailed();
3099	return VINF_SUCCESS;
3100	}
3101
3102
3103	/**
3104	* Backend worker for implementing SVGA_3D_CMD_SURFACE_DMA that copies one box.
3105	*
3106	* @returns Failure status code or @a rc.
3107	* @param pThis The shared VGA/VMSVGA instance data.
3108	* @param pThisCC The VGA/VMSVGA state for ring-3.
3109	* @param pState The VMSVGA3d state.
3110	* @param pSurface The host surface.
3111	* @param pMipLevel Mipmap level. The caller knows it already.
3112	* @param uHostFace The host face (valid).
3113	* @param uHostMipmap The host mipmap level (valid).
3114	* @param GuestPtr The guest pointer.
3115	* @param cbGuestPitch The guest pitch.
3116	* @param transfer The transfer direction.
3117	* @param pBox The box to copy (clipped, valid, except for guest's srcx, srcy, srcz).
3118	* @param pContext The context (for OpenGL).
3119	* @param rc The current rc for all boxes.
3120	* @param iBox The current box number (for Direct 3D).
3121	*/
3122	int vmsvga3dBackSurfaceDMACopyBox(PVGASTATE pThis, PVGASTATECC pThisCC, PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface,
3123	PVMSVGA3DMIPMAPLEVEL pMipLevel, uint32_t uHostFace, uint32_t uHostMipmap,
3124	SVGAGuestPtr GuestPtr, uint32_t cbGuestPitch, SVGA3dTransferType transfer,
3125	SVGA3dCopyBox const *pBox, PVMSVGA3DCONTEXT pContext, int rc, int iBox)
3126	{
3127	RT_NOREF(pState, pMipLevel, pContext, iBox);
3128
3129	/* The called should not use the function for system memory surfaces. */
3130	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3131	AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
3132
3133	if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3134	{
3135	/** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
3136	AssertReturn(uHostFace == 0 && uHostMipmap == 0, VERR_INVALID_PARAMETER);
3137	AssertReturn(transfer == SVGA3D_WRITE_HOST_VRAM, VERR_NOT_IMPLEMENTED); /** @todo Implement */
3138
3139	uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
3140	uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
3141	Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
3142	Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
3143	uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3144	uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3145	AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
3146
3147	/* vmsvgaR3GmrTransfer verifies uGuestOffset.
3148	* srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
3149	* to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
3150	*/
3151	uint64_t const uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
3152	AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
3153
3154	SVGA3dSurfaceImageId image;
3155	image.sid = pSurface->id;
3156	image.face = uHostFace;
3157	image.mipmap = uHostMipmap;
3158
3159	SVGA3dBox box;
3160	box.x = pBox->x;
3161	box.y = pBox->y;
3162	box.z = 0;
3163	box.w = pBox->w;
3164	box.h = pBox->h;
3165	box.d = 1;
3166
3167	VMSVGA3D_MAPPED_SURFACE map;
3168	rc = vmsvga3dSurfaceMap(pThisCC, &image, &box, VMSVGA3D_SURFACE_MAP_WRITE_DISCARD, &map);
3169	if (RT_SUCCESS(rc))
3170	{
3171	/* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
3172	* and offset of the first scanline.
3173	*/
3174	uint32_t const cbLockedBuf = map.cbRowPitch * cBlocksY;
3175	uint8_t pu8LockedBuf = (uint8_t )map.pvData;
3176	uint32_t const offLockedBuf = 0;
3177
3178	rc = vmsvgaR3GmrTransfer(pThis,
3179	pThisCC,
3180	transfer,
3181	pu8LockedBuf,
3182	cbLockedBuf,
3183	offLockedBuf,
3184	map.cbRowPitch,
3185	GuestPtr,
3186	(uint32_t)uGuestOffset,
3187	cbGuestPitch,
3188	cBlocksX * pSurface->cbBlock,
3189	cBlocksY);
3190	AssertRC(rc);
3191
3192	// Log4(("first line:\n%.Rhxd\n", cBlocksX pSurface->cbBlock, LockedRect.pBits));
3193
3194	//vmsvga3dMapWriteBmpFile(&map, "Dynamic");
3195
3196	vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ true);
3197	}
3198	#if 0
3199	//ASMBreakpoint();
3200	rc = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
3201	if (RT_SUCCESS(rc))
3202	{
3203	vmsvga3dMapWriteBmpFile(&map, "Staging");
3204
3205	vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
3206	}
3207	#endif
3208	}
3209	else
3210	{
3211	AssertMsgFailed(("Unsupported surface type %d\n", pBackendSurface->enmResType));
3212	rc = VERR_NOT_IMPLEMENTED;
3213	}
3214
3215	return rc;
3216	}
3217
3218
3219	/**
3220	* Create D3D/OpenGL texture object for the specified surface.
3221	*
3222	* Surfaces are created when needed.
3223	*
3224	* @param pState The VMSVGA3d state.
3225	* @param pContext The context.
3226	* @param idAssociatedContext Probably the same as pContext->id.
3227	* @param pSurface The surface to create the texture for.
3228	*/
3229	int vmsvga3dBackCreateTexture(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext, uint32_t idAssociatedContext,
3230	PVMSVGA3DSURFACE pSurface)
3231
3232	{
3233	RT_NOREF(pState, pContext, idAssociatedContext, pSurface);
3234
3235	AssertFailed();
3236	return VINF_SUCCESS;
3237	}
3238
3239
3240	int vmsvga3dOcclusionQueryCreate(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
3241	{
3242	RT_NOREF(pState, pContext);
3243	AssertFailed();
3244	return VINF_SUCCESS;
3245	}
3246
3247
3248	int vmsvga3dOcclusionQueryBegin(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
3249	{
3250	RT_NOREF(pState, pContext);
3251	AssertFailed();
3252	return VINF_SUCCESS;
3253	}
3254
3255
3256	int vmsvga3dOcclusionQueryEnd(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
3257	{
3258	RT_NOREF(pState, pContext);
3259	AssertFailed();
3260	return VINF_SUCCESS;
3261	}
3262
3263
3264	int vmsvga3dOcclusionQueryGetData(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext, uint32_t *pu32Pixels)
3265	{
3266	RT_NOREF(pState, pContext);
3267	*pu32Pixels = 0;
3268	AssertFailed();
3269	return VINF_SUCCESS;
3270	}
3271
3272
3273	int vmsvga3dOcclusionQueryDelete(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
3274	{
3275	RT_NOREF(pState, pContext);
3276	AssertFailed();
3277	return VINF_SUCCESS;
3278	}
3279
3280
3281	/*
3282	* DX callbacks.
3283	*/
3284
3285	static DECLCALLBACK(int) vmsvga3dBackDXDefineContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3286	{
3287	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3288
3289	/* Allocate a backend specific context structure. */
3290	PVMSVGA3DBACKENDDXCONTEXT pBackendDXContext = (PVMSVGA3DBACKENDDXCONTEXT)RTMemAllocZ(sizeof(VMSVGA3DBACKENDDXCONTEXT));
3291	AssertPtrReturn(pBackendDXContext, VERR_NO_MEMORY);
3292	pDXContext->pBackendDXContext = pBackendDXContext;
3293
3294	int rc = dxDeviceCreate(pBackend, &pBackendDXContext->device);
3295	return rc;
3296	}
3297
3298
3299	static DECLCALLBACK(int) vmsvga3dBackDXDestroyContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3300	{
3301	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3302
3303	if (pDXContext->pBackendDXContext)
3304	{
3305	dxDeviceDestroy(pBackend, &pDXContext->pBackendDXContext->device);
3306
3307	RTMemFree(pDXContext->pBackendDXContext);
3308	pDXContext->pBackendDXContext = NULL;
3309	}
3310	return VINF_SUCCESS;
3311	}
3312
3313
3314	static DECLCALLBACK(int) vmsvga3dBackDXBindContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3315	{
3316	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3317	RT_NOREF(pBackend, pDXContext);
3318	return VINF_SUCCESS;
3319	}
3320
3321
3322	static DECLCALLBACK(int) vmsvga3dBackDXReadbackContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3323	{
3324	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3325
3326	RT_NOREF(pBackend, pDXContext);
3327	AssertFailed(); /** @todo Implement */
3328	return VERR_NOT_IMPLEMENTED;
3329	}
3330
3331
3332	static DECLCALLBACK(int) vmsvga3dBackDXInvalidateContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3333	{
3334	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3335
3336	RT_NOREF(pBackend, pDXContext);
3337	AssertFailed(); /** @todo Implement */
3338	return VERR_NOT_IMPLEMENTED;
3339	}
3340
3341
3342	static DECLCALLBACK(int) vmsvga3dBackDXSetSingleConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t slot, SVGA3dShaderType type, SVGA3dSurfaceId sid, uint32_t offsetInBytes, uint32_t sizeInBytes)
3343	{
3344	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3345	RT_NOREF(pBackend);
3346
3347	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3348	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3349
3350	PVMSVGA3DSURFACE pSurface;
3351	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
3352	AssertRCReturn(rc, rc);
3353
3354	uint32_t const cbSurface = pSurface->paMipmapLevels[0].cbSurface;
3355	ASSERT_GUEST_RETURN( offsetInBytes < cbSurface
3356	&& sizeInBytes <= cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
3357
3358	if (pSurface->pBackendSurface == NULL)
3359	{
3360	/* Create the resource. */
3361	rc = vmsvga3dBackSurfaceCreateConstantBuffer(pThisCC->svga.p3dState, pDXContext, pSurface);
3362	AssertRCReturn(rc, rc);
3363	}
3364
3365	if (pSurface->fDirty)
3366	{
3367	/* Get mobid for the surface and read from the MOB. */
3368	SVGA3dSurfaceImageId imageId;
3369	imageId.sid = sid;
3370	imageId.face = 0;
3371	imageId.mipmap = 0;
3372
3373	SVGA3dPoint ptSrc;
3374	ptSrc.x = offsetInBytes / pSurface->cbBlock;
3375	ptSrc.y = 0;
3376	ptSrc.z = 0;
3377
3378	SVGA3dBox boxDst;
3379	boxDst.x = 0;
3380	boxDst.y = 0;
3381	boxDst.z = 0;
3382	boxDst.w = sizeInBytes / pSurface->cbBlock;
3383	boxDst.h = 1;
3384	boxDst.d = 1;
3385
3386	rc = vmsvgaR3UpdateGBSurfaceEx(pThisCC, &imageId, &boxDst, &ptSrc);
3387	AssertRCReturn(rc, rc);
3388	}
3389
3390	dxConstantBufferSet(pDevice, slot, type, pSurface->pBackendSurface->u.Buffer.pBuffer);
3391
3392	uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
3393	SVGA3dConstantBufferBinding *pCBB = &pDXContext->svgaDXContext.shaderState[idxShaderState].constantBuffers[slot];
3394	pCBB->sid = sid;
3395	pCBB->offsetInBytes = offsetInBytes;
3396	pCBB->sizeInBytes = sizeInBytes;
3397	return VINF_SUCCESS;
3398	}
3399
3400
3401	static DECLCALLBACK(int) vmsvga3dBackDXSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startView, SVGA3dShaderType type, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
3402	{
3403	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3404	RT_NOREF(pBackend);
3405
3406	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3407	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3408
3409	uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
3410	ID3D11ShaderResourceView *papShaderResourceView[SVGA3D_DX_MAX_SRVIEWS];
3411	for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
3412	{
3413	SVGA3dShaderResourceViewId shaderResourceViewId = paShaderResourceViewId[i];
3414	if (shaderResourceViewId != SVGA3D_INVALID_ID)
3415	{
3416	ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->pBackendDXContext->cShaderResourceView, VERR_INVALID_PARAMETER);
3417	papShaderResourceView[i] = pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId];
3418	}
3419	else
3420	papShaderResourceView[i] = NULL;
3421
3422	pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[startView + i] = shaderResourceViewId;
3423	}
3424
3425	dxShaderResourceViewSet(pDevice, type, startView, cShaderResourceViewId, papShaderResourceView);
3426	return VINF_SUCCESS;
3427	}
3428
3429
3430	static DECLCALLBACK(int) vmsvga3dBackDXSetShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader)
3431	{
3432	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3433	RT_NOREF(pBackend);
3434
3435	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3436	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3437
3438	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
3439	uint32_t const idxShaderState = pDXShader->enmShaderType - SVGA3D_SHADERTYPE_MIN;
3440	pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId = pShader->id;
3441
3442	dxShaderSet(pDevice, pShader, pDXShader);
3443	return VINF_SUCCESS;
3444	}
3445
3446
3447	static DECLCALLBACK(int) vmsvga3dBackDXSetSamplers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startSampler, SVGA3dShaderType type, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
3448	{
3449	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3450	RT_NOREF(pBackend);
3451
3452	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3453	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3454
3455	uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
3456	ID3D11SamplerState *papSamplerState[SVGA3D_DX_MAX_SAMPLERS];
3457	for (uint32_t i = 0; i < cSamplerId; ++i)
3458	{
3459	SVGA3dSamplerId samplerId = paSamplerId[i];
3460	if (samplerId != SVGA3D_INVALID_ID)
3461	{
3462	ASSERT_GUEST_RETURN(samplerId < pDXContext->pBackendDXContext->cSamplerState, VERR_INVALID_PARAMETER);
3463	papSamplerState[i] = pDXContext->pBackendDXContext->papSamplerState[samplerId];
3464	}
3465	else
3466	papSamplerState[i] = NULL;
3467
3468	pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[startSampler + i] = samplerId;
3469	}
3470
3471	dxSamplerSet(pDevice, type, startSampler, cSamplerId, papSamplerState);
3472	return VINF_SUCCESS;
3473	}
3474
3475
3476	static DECLCALLBACK(int) vmsvga3dBackDXDraw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
3477	{
3478	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3479	RT_NOREF(pBackend);
3480
3481	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3482	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3483
3484	pDevice->pImmediateContext->Draw(vertexCount, startVertexLocation);
3485	return VINF_SUCCESS;
3486	}
3487
3488
3489	static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
3490	{
3491	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3492	RT_NOREF(pBackend);
3493
3494	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3495	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3496
3497	pDevice->pImmediateContext->DrawIndexed(indexCount, startIndexLocation, baseVertexLocation);
3498	return VINF_SUCCESS;
3499	}
3500
3501
3502	static DECLCALLBACK(int) vmsvga3dBackDXDrawInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3503	{
3504	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3505
3506	RT_NOREF(pBackend, pDXContext);
3507	AssertFailed(); /** @todo Implement */
3508	return VERR_NOT_IMPLEMENTED;
3509	}
3510
3511
3512	static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3513	{
3514	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3515
3516	RT_NOREF(pBackend, pDXContext);
3517	AssertFailed(); /** @todo Implement */
3518	return VERR_NOT_IMPLEMENTED;
3519	}
3520
3521
3522	static DECLCALLBACK(int) vmsvga3dBackDXDrawAuto(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3523	{
3524	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3525
3526	RT_NOREF(pBackend, pDXContext);
3527	AssertFailed(); /** @todo Implement */
3528	return VERR_NOT_IMPLEMENTED;
3529	}
3530
3531
3532	static DECLCALLBACK(int) vmsvga3dBackDXSetInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
3533	{
3534	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3535	RT_NOREF(pBackend);
3536
3537	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3538	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3539
3540	pDXContext->svgaDXContext.inputAssembly.layoutId = elementLayoutId;
3541
3542	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
3543	if (!pDXElementLayout->pElementLayout)
3544	{
3545	uint32_t const idxShaderState = SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN;
3546	uint32_t const shid = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
3547	AssertReturnStmt(shid < pDXContext->pBackendDXContext->cShader,
3548	LogRelMax(16, ("VMSVGA: DX shader is not set in DXSetInputLayout: shid = 0x%x\n", shid)),
3549	VERR_INVALID_STATE);
3550	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shid];
3551	AssertReturnStmt(pDXShader->pvDXBC,
3552	LogRelMax(16, ("VMSVGA: DX shader bytecode is not available in DXSetInputLayout: shid = %u\n", shid)),
3553	VERR_INVALID_STATE);
3554	HRESULT hr = pDevice->pDevice->CreateInputLayout(pDXElementLayout->aElementDesc,
3555	pDXElementLayout->cElementDesc,
3556	pDXShader->pvDXBC,
3557	pDXShader->cbDXBC,
3558	&pDXElementLayout->pElementLayout);
3559	AssertReturn(SUCCEEDED(hr), VERR_NO_MEMORY);
3560	}
3561
3562	pDevice->pImmediateContext->IASetInputLayout(pDXElementLayout->pElementLayout);
3563	return VINF_SUCCESS;
3564	}
3565
3566
3567	static DECLCALLBACK(int) vmsvga3dBackDXSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
3568	{
3569	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3570	RT_NOREF(pBackend);
3571
3572	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3573	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3574
3575	/* For each paVertexBuffer[i]:
3576	* If the vertex buffer object does not exist then create it.
3577	* If the surface has been updated by the guest then update the buffer object.
3578	* Use IASetVertexBuffers to set the buffers.
3579	*/
3580
3581	ID3D11Buffer *paResources[SVGA3D_DX_MAX_VERTEXBUFFERS];
3582	UINT paStride[SVGA3D_DX_MAX_VERTEXBUFFERS];
3583	UINT paOffset[SVGA3D_DX_MAX_VERTEXBUFFERS];
3584
3585	for (uint32_t i = 0; i < cVertexBuffer; ++i)
3586	{
3587	uint32_t const idxVertexBuffer = startBuffer + i;
3588
3589	/* Get corresponding resource. Create the buffer if does not yet exist. */
3590	if (paVertexBuffer[i].sid != SVGA_ID_INVALID)
3591	{
3592	PVMSVGA3DSURFACE pSurface;
3593	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paVertexBuffer[i].sid, &pSurface);
3594	AssertRCReturn(rc, rc);
3595
3596	if (pSurface->pBackendSurface == NULL)
3597	{
3598	/* Create the resource. */
3599	rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC->svga.p3dState, pDXContext, pSurface);
3600	AssertRCReturn(rc, rc);
3601	}
3602
3603	if (pSurface->fDirty)
3604	{
3605	/* Get mobid for the surface and read from the MOB. */
3606	SVGA3dSurfaceImageId imageId;
3607	imageId.sid = paVertexBuffer[i].sid;
3608	imageId.face = 0;
3609	imageId.mipmap = 0;
3610
3611	SVGA3dBox box;
3612	box.x = 0;
3613	box.y = 0;
3614	box.z = 0;
3615	box.w = pSurface->paMipmapLevels[0].mipmapSize.width;
3616	box.h = 1;
3617	box.d = 1;
3618
3619	rc = vmsvgaR3UpdateGBSurface(pThisCC, &imageId, &box);
3620	AssertRCReturn(rc, rc);
3621	}
3622
3623	paResources[idxVertexBuffer] = pSurface->pBackendSurface->u.Buffer.pBuffer;
3624	paStride[idxVertexBuffer] = paVertexBuffer[i].stride;
3625	paOffset[idxVertexBuffer] = paVertexBuffer[i].offset;
3626	}
3627	else
3628	{
3629	paResources[idxVertexBuffer] = NULL;
3630	paStride[idxVertexBuffer] = 0;
3631	paOffset[idxVertexBuffer] = 0;
3632	}
3633
3634	pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].bufferId = paVertexBuffer[i].sid;
3635	pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].stride = paVertexBuffer[i].stride;
3636	pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].offset = paVertexBuffer[i].offset;
3637	}
3638
3639	pDevice->pImmediateContext->IASetVertexBuffers(startBuffer, cVertexBuffer, paResources, paStride, paOffset);
3640
3641	return VINF_SUCCESS;
3642	}
3643
3644
3645	static DECLCALLBACK(int) vmsvga3dBackDXSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId sid, SVGA3dSurfaceFormat format, uint32_t offset)
3646	{
3647	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3648	RT_NOREF(pBackend);
3649
3650	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3651	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3652
3653	/* Get corresponding resource. Create the buffer if does not yet exist. */
3654	ID3D11Buffer *pResource;
3655	DXGI_FORMAT enmDxgiFormat;
3656
3657	if (sid != SVGA_ID_INVALID)
3658	{
3659	PVMSVGA3DSURFACE pSurface;
3660	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
3661	AssertRCReturn(rc, rc);
3662
3663	if (pSurface->pBackendSurface == NULL)
3664	{
3665	/* Create the resource. */
3666	rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC->svga.p3dState, pDXContext, pSurface);
3667	AssertRCReturn(rc, rc);
3668	}
3669
3670	if (pSurface->fDirty)
3671	{
3672	/* Get mobid for the surface and read from the MOB. */
3673	SVGA3dSurfaceImageId imageId;
3674	imageId.sid = sid;
3675	imageId.face = 0;
3676	imageId.mipmap = 0;
3677
3678	SVGA3dBox box;
3679	box.x = 0;
3680	box.y = 0;
3681	box.z = 0;
3682	box.w = pSurface->paMipmapLevels[0].mipmapSize.width;
3683	box.h = 1;
3684	box.d = 1;
3685
3686	rc = vmsvgaR3UpdateGBSurface(pThisCC, &imageId, &box);
3687	AssertRCReturn(rc, rc);
3688	}
3689
3690	pResource = pSurface->pBackendSurface->u.Buffer.pBuffer;
3691	enmDxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(format);
3692	AssertReturn(enmDxgiFormat == DXGI_FORMAT_R16_UINT \|\| enmDxgiFormat == DXGI_FORMAT_R32_UINT, VERR_INVALID_PARAMETER);
3693	}
3694	else
3695	{
3696	pResource = NULL;
3697	enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
3698	}
3699
3700	pDevice->pImmediateContext->IASetIndexBuffer(pResource, enmDxgiFormat, offset);
3701
3702	pDXContext->svgaDXContext.inputAssembly.indexBufferSid = sid;
3703	pDXContext->svgaDXContext.inputAssembly.indexBufferOffset = offset;
3704	pDXContext->svgaDXContext.inputAssembly.indexBufferFormat = format;
3705
3706	return VINF_SUCCESS;
3707	}
3708
3709	static D3D11_PRIMITIVE_TOPOLOGY dxTopology(SVGA3dPrimitiveType primitiveType)
3710	{
3711	static D3D11_PRIMITIVE_TOPOLOGY const aD3D11PrimitiveTopology[SVGA3D_PRIMITIVE_MAX] =
3712	{
3713	D3D11_PRIMITIVE_TOPOLOGY_UNDEFINED,
3714	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST,
3715	D3D11_PRIMITIVE_TOPOLOGY_POINTLIST,
3716	D3D11_PRIMITIVE_TOPOLOGY_LINELIST,
3717	D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP,
3718	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP,
3719	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP, /* SVGA3D_PRIMITIVE_TRIANGLEFAN: No FAN in D3D11 */
3720	D3D11_PRIMITIVE_TOPOLOGY_LINELIST_ADJ,
3721	D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP_ADJ,
3722	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST_ADJ,
3723	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP_ADJ,
3724	D3D11_PRIMITIVE_TOPOLOGY_1_CONTROL_POINT_PATCHLIST,
3725	D3D11_PRIMITIVE_TOPOLOGY_2_CONTROL_POINT_PATCHLIST,
3726	D3D11_PRIMITIVE_TOPOLOGY_3_CONTROL_POINT_PATCHLIST,
3727	D3D11_PRIMITIVE_TOPOLOGY_4_CONTROL_POINT_PATCHLIST,
3728	D3D11_PRIMITIVE_TOPOLOGY_5_CONTROL_POINT_PATCHLIST,
3729	D3D11_PRIMITIVE_TOPOLOGY_6_CONTROL_POINT_PATCHLIST,
3730	D3D11_PRIMITIVE_TOPOLOGY_7_CONTROL_POINT_PATCHLIST,
3731	D3D11_PRIMITIVE_TOPOLOGY_8_CONTROL_POINT_PATCHLIST,
3732	D3D11_PRIMITIVE_TOPOLOGY_9_CONTROL_POINT_PATCHLIST,
3733	D3D11_PRIMITIVE_TOPOLOGY_10_CONTROL_POINT_PATCHLIST,
3734	D3D11_PRIMITIVE_TOPOLOGY_11_CONTROL_POINT_PATCHLIST,
3735	D3D11_PRIMITIVE_TOPOLOGY_12_CONTROL_POINT_PATCHLIST,
3736	D3D11_PRIMITIVE_TOPOLOGY_13_CONTROL_POINT_PATCHLIST,
3737	D3D11_PRIMITIVE_TOPOLOGY_14_CONTROL_POINT_PATCHLIST,
3738	D3D11_PRIMITIVE_TOPOLOGY_15_CONTROL_POINT_PATCHLIST,
3739	D3D11_PRIMITIVE_TOPOLOGY_16_CONTROL_POINT_PATCHLIST,
3740	D3D11_PRIMITIVE_TOPOLOGY_17_CONTROL_POINT_PATCHLIST,
3741	D3D11_PRIMITIVE_TOPOLOGY_18_CONTROL_POINT_PATCHLIST,
3742	D3D11_PRIMITIVE_TOPOLOGY_19_CONTROL_POINT_PATCHLIST,
3743	D3D11_PRIMITIVE_TOPOLOGY_20_CONTROL_POINT_PATCHLIST,
3744	D3D11_PRIMITIVE_TOPOLOGY_21_CONTROL_POINT_PATCHLIST,
3745	D3D11_PRIMITIVE_TOPOLOGY_22_CONTROL_POINT_PATCHLIST,
3746	D3D11_PRIMITIVE_TOPOLOGY_23_CONTROL_POINT_PATCHLIST,
3747	D3D11_PRIMITIVE_TOPOLOGY_24_CONTROL_POINT_PATCHLIST,
3748	D3D11_PRIMITIVE_TOPOLOGY_25_CONTROL_POINT_PATCHLIST,
3749	D3D11_PRIMITIVE_TOPOLOGY_26_CONTROL_POINT_PATCHLIST,
3750	D3D11_PRIMITIVE_TOPOLOGY_27_CONTROL_POINT_PATCHLIST,
3751	D3D11_PRIMITIVE_TOPOLOGY_28_CONTROL_POINT_PATCHLIST,
3752	D3D11_PRIMITIVE_TOPOLOGY_29_CONTROL_POINT_PATCHLIST,
3753	D3D11_PRIMITIVE_TOPOLOGY_30_CONTROL_POINT_PATCHLIST,
3754	D3D11_PRIMITIVE_TOPOLOGY_31_CONTROL_POINT_PATCHLIST,
3755	D3D11_PRIMITIVE_TOPOLOGY_32_CONTROL_POINT_PATCHLIST,
3756	};
3757	return aD3D11PrimitiveTopology[primitiveType];
3758	}
3759
3760	static DECLCALLBACK(int) vmsvga3dBackDXSetTopology(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dPrimitiveType topology)
3761	{
3762	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3763	RT_NOREF(pBackend);
3764
3765	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3766	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3767
3768	D3D11_PRIMITIVE_TOPOLOGY enmTopology = dxTopology(topology);
3769	pDevice->pImmediateContext->IASetPrimitiveTopology(enmTopology);
3770	pDXContext->svgaDXContext.inputAssembly.topology = topology;
3771	return VINF_SUCCESS;
3772	}
3773
3774
3775	static DECLCALLBACK(int) vmsvga3dBackDXSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
3776	{
3777	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3778	RT_NOREF(pBackend);
3779
3780	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3781	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3782
3783	ID3D11RenderTargetView *papRenderTargetViews[SVGA3D_MAX_RENDER_TARGETS];
3784	for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
3785	{
3786	SVGA3dRenderTargetViewId renderTargetViewId = paRenderTargetViewId[i];
3787	if (renderTargetViewId != SVGA3D_INVALID_ID)
3788	{
3789	ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->pBackendDXContext->cRenderTargetView, VERR_INVALID_PARAMETER);
3790	papRenderTargetViews[i] = pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId];
3791	}
3792	else
3793	papRenderTargetViews[i] = NULL;
3794	}
3795
3796	ID3D11DepthStencilView *pDepthStencilView;
3797	if (depthStencilViewId != SVGA_ID_INVALID)
3798	pDepthStencilView = pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId];
3799	else
3800	pDepthStencilView = NULL;
3801
3802	pDevice->pImmediateContext->OMSetRenderTargets(cRenderTargetViewId, papRenderTargetViews, pDepthStencilView);
3803	return VINF_SUCCESS;
3804	}
3805
3806
3807	static DECLCALLBACK(int) vmsvga3dBackDXSetBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId, float const blendFactor[4], uint32_t sampleMask)
3808	{
3809	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3810	RT_NOREF(pBackend);
3811
3812	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3813	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3814
3815	ID3D11BlendState *pBlendState = pDXContext->pBackendDXContext->papBlendState[blendId];
3816	pDevice->pImmediateContext->OMSetBlendState(pBlendState, blendFactor, sampleMask);
3817
3818	pDXContext->svgaDXContext.renderState.blendStateId = blendId;
3819	memcpy(pDXContext->svgaDXContext.renderState.blendFactor, blendFactor, sizeof(blendFactor));
3820	pDXContext->svgaDXContext.renderState.sampleMask = sampleMask;
3821
3822	return VINF_SUCCESS;
3823	}
3824
3825
3826	static DECLCALLBACK(int) vmsvga3dBackDXSetDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, uint32_t stencilRef)
3827	{
3828	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3829	RT_NOREF(pBackend);
3830
3831	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3832	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3833
3834	ID3D11DepthStencilState *pDepthStencilState = pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId];
3835	pDevice->pImmediateContext->OMSetDepthStencilState(pDepthStencilState, stencilRef);
3836
3837	pDXContext->svgaDXContext.renderState.depthStencilStateId = depthStencilId;
3838	pDXContext->svgaDXContext.renderState.stencilRef = stencilRef;
3839
3840	return VINF_SUCCESS;
3841	}
3842
3843
3844	static DECLCALLBACK(int) vmsvga3dBackDXSetRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
3845	{
3846	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3847	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3848	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3849
3850	RT_NOREF(pBackend);
3851
3852	pDevice->pImmediateContext->RSSetState(pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
3853	return VINF_SUCCESS;
3854	}
3855
3856
3857	static DECLCALLBACK(int) vmsvga3dBackDXDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3858	{
3859	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3860
3861	RT_NOREF(pBackend, pDXContext);
3862	AssertFailed(); /** @todo Implement */
3863	return VERR_NOT_IMPLEMENTED;
3864	}
3865
3866
3867	static DECLCALLBACK(int) vmsvga3dBackDXDestroyQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3868	{
3869	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3870
3871	RT_NOREF(pBackend, pDXContext);
3872	AssertFailed(); /** @todo Implement */
3873	return VERR_NOT_IMPLEMENTED;
3874	}
3875
3876
3877	static DECLCALLBACK(int) vmsvga3dBackDXBindQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3878	{
3879	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3880
3881	RT_NOREF(pBackend, pDXContext);
3882	AssertFailed(); /** @todo Implement */
3883	return VERR_NOT_IMPLEMENTED;
3884	}
3885
3886
3887	static DECLCALLBACK(int) vmsvga3dBackDXSetQueryOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3888	{
3889	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3890
3891	RT_NOREF(pBackend, pDXContext);
3892	AssertFailed(); /** @todo Implement */
3893	return VERR_NOT_IMPLEMENTED;
3894	}
3895
3896
3897	static DECLCALLBACK(int) vmsvga3dBackDXBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3898	{
3899	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3900
3901	RT_NOREF(pBackend, pDXContext);
3902	AssertFailed(); /** @todo Implement */
3903	return VERR_NOT_IMPLEMENTED;
3904	}
3905
3906
3907	static DECLCALLBACK(int) vmsvga3dBackDXEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3908	{
3909	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3910
3911	RT_NOREF(pBackend, pDXContext);
3912	AssertFailed(); /** @todo Implement */
3913	return VERR_NOT_IMPLEMENTED;
3914	}
3915
3916
3917	static DECLCALLBACK(int) vmsvga3dBackDXReadbackQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3918	{
3919	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3920
3921	RT_NOREF(pBackend, pDXContext);
3922	AssertFailed(); /** @todo Implement */
3923	return VERR_NOT_IMPLEMENTED;
3924	}
3925
3926
3927	static DECLCALLBACK(int) vmsvga3dBackDXSetPredication(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3928	{
3929	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3930
3931	RT_NOREF(pBackend, pDXContext);
3932	AssertFailed(); /** @todo Implement */
3933	return VERR_NOT_IMPLEMENTED;
3934	}
3935
3936
3937	static DECLCALLBACK(int) vmsvga3dBackDXSetSOTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3938	{
3939	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3940
3941	RT_NOREF(pBackend, pDXContext);
3942	AssertFailed(); /** @todo Implement */
3943	return VERR_NOT_IMPLEMENTED;
3944	}
3945
3946
3947	static DECLCALLBACK(int) vmsvga3dBackDXSetViewports(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
3948	{
3949	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3950	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3951	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3952
3953	RT_NOREF(pBackend);
3954
3955	/* D3D11_VIEWPORT is identical to SVGA3dViewport. */
3956	D3D11_VIEWPORT pViewports = (D3D11_VIEWPORT )paViewport;
3957
3958	pDevice->pImmediateContext->RSSetViewports(cViewport, pViewports);
3959	return VINF_SUCCESS;
3960	}
3961
3962
3963	static DECLCALLBACK(int) vmsvga3dBackDXSetScissorRects(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cRect, SVGASignedRect const *paRect)
3964	{
3965	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3966	RT_NOREF(pBackend);
3967
3968	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3969	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3970
3971	/* D3D11_RECT is identical to SVGASignedRect. */
3972	D3D11_RECT pRects = (D3D11_RECT )paRect;
3973
3974	pDevice->pImmediateContext->RSSetScissorRects(cRect, pRects);
3975	return VINF_SUCCESS;
3976	}
3977
3978
3979	static DECLCALLBACK(int) vmsvga3dBackDXClearRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGA3dRGBAFloat const *pRGBA)
3980	{
3981	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3982	RT_NOREF(pBackend);
3983
3984	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3985	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3986
3987	ID3D11RenderTargetView *pRenderTargetView = pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId];
3988	AssertReturn(pRenderTargetView, VERR_INVALID_STATE);
3989	pDevice->pImmediateContext->ClearRenderTargetView(pRenderTargetView, pRGBA->value);
3990	return VINF_SUCCESS;
3991	}
3992
3993
3994	static DECLCALLBACK(int) vmsvga3dBackDXClearDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t flags, SVGA3dDepthStencilViewId depthStencilViewId, float depth, uint8_t stencil)
3995	{
3996	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3997	RT_NOREF(pBackend);
3998
3999	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4000	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4001
4002	ID3D11DepthStencilView *pDepthStencilView = pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId];
4003	AssertReturn(pDepthStencilView, VERR_INVALID_STATE);
4004	pDevice->pImmediateContext->ClearDepthStencilView(pDepthStencilView, flags, depth, stencil);
4005	return VINF_SUCCESS;
4006	}
4007
4008
4009	static DECLCALLBACK(int) vmsvga3dBackDXPredCopyRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dCopyBox const *pBox)
4010	{
4011	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4012	RT_NOREF(pBackend);
4013
4014	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4015	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4016
4017	PVMSVGA3DSURFACE pSrcSurface;
4018	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
4019	AssertRCReturn(rc, rc);
4020
4021	PVMSVGA3DSURFACE pDstSurface;
4022	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
4023	AssertRCReturn(rc, rc);
4024
4025	if (pSrcSurface->pBackendSurface == NULL)
4026	{
4027	/* Create the resource. */
4028	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC->svga.p3dState, pDXContext, pSrcSurface);
4029	AssertRCReturn(rc, rc);
4030	}
4031
4032	if (pDstSurface->pBackendSurface == NULL)
4033	{
4034	/* Create the resource. */
4035	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC->svga.p3dState, pDXContext, pDstSurface);
4036	AssertRCReturn(rc, rc);
4037	}
4038
4039	ID3D11Resource *pDstResource = pDstSurface->pBackendSurface->u.Texture.pTexture;
4040	UINT DstSubresource = dstSubResource;
4041	UINT DstX = pBox->x;
4042	UINT DstY = pBox->y;
4043	UINT DstZ = pBox->z;
4044
4045	ID3D11Resource *pSrcResource = pSrcSurface->pBackendSurface->u.Texture.pTexture;
4046	UINT SrcSubresource = srcSubResource;
4047	D3D11_BOX SrcBox;
4048	SrcBox.left = pBox->x;
4049	SrcBox.top = pBox->y;
4050	SrcBox.front = pBox->z;
4051	SrcBox.right = pBox->x + pBox->w;
4052	SrcBox.bottom = pBox->y + pBox->h;
4053	SrcBox.back = pBox->z + pBox->d;
4054	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4055	pSrcResource, SrcSubresource, &SrcBox);
4056	return VINF_SUCCESS;
4057	}
4058
4059
4060	static DECLCALLBACK(int) vmsvga3dBackDXPredCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4061	{
4062	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4063
4064	RT_NOREF(pBackend, pDXContext);
4065	AssertFailed(); /** @todo Implement */
4066	return VERR_NOT_IMPLEMENTED;
4067	}
4068
4069
4070	static DECLCALLBACK(int) vmsvga3dBackDXPresentBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4071	{
4072	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4073
4074	RT_NOREF(pBackend, pDXContext);
4075	AssertFailed(); /** @todo Implement */
4076	return VERR_NOT_IMPLEMENTED;
4077	}
4078
4079
4080	static DECLCALLBACK(int) vmsvga3dBackDXGenMips(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
4081	{
4082	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4083	RT_NOREF(pBackend);
4084
4085	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4086	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4087
4088	ID3D11ShaderResourceView *pShaderResourceView = pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId];
4089	AssertReturn(pShaderResourceView, VERR_INVALID_STATE);
4090	pDevice->pImmediateContext->GenerateMips(pShaderResourceView);
4091	return VINF_SUCCESS;
4092	}
4093
4094
4095	static DECLCALLBACK(int) vmsvga3dBackDXUpdateSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4096	{
4097	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4098
4099	RT_NOREF(pBackend, pDXContext);
4100	AssertFailed(); /** @todo Implement */
4101	return VERR_NOT_IMPLEMENTED;
4102	}
4103
4104
4105	static DECLCALLBACK(int) vmsvga3dBackDXReadbackSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4106	{
4107	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4108
4109	RT_NOREF(pBackend, pDXContext);
4110	AssertFailed(); /** @todo Implement */
4111	return VERR_NOT_IMPLEMENTED;
4112	}
4113
4114
4115	static DECLCALLBACK(int) vmsvga3dBackDXInvalidateSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4116	{
4117	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4118
4119	RT_NOREF(pBackend, pDXContext);
4120	AssertFailed(); /** @todo Implement */
4121	return VERR_NOT_IMPLEMENTED;
4122	}
4123
4124
4125	static DECLCALLBACK(int) vmsvga3dBackDXDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
4126	{
4127	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4128	RT_NOREF(pBackend);
4129
4130	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4131	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4132
4133	/* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
4134	PVMSVGA3DSURFACE pSurface;
4135	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
4136	AssertRCReturn(rc, rc);
4137
4138	if (pSurface->pBackendSurface == NULL)
4139	{
4140	/* Create the actual texture. */
4141	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC->svga.p3dState, pDXContext, pSurface);
4142	AssertRCReturn(rc, rc);
4143	}
4144
4145	HRESULT hr = dxShaderResourceViewCreate(pDevice, pEntry, pSurface->pBackendSurface, &pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId]);
4146	if (SUCCEEDED(hr))
4147	return VINF_SUCCESS;
4148	return VERR_INVALID_STATE;
4149	}
4150
4151
4152	static DECLCALLBACK(int) vmsvga3dBackDXDestroyShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
4153	{
4154	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4155	RT_NOREF(pBackend);
4156
4157	D3D_RELEASE(pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId]);
4158	return VINF_SUCCESS;
4159	}
4160
4161
4162	static DECLCALLBACK(int) vmsvga3dBackDXDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
4163	{
4164	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4165	RT_NOREF(pBackend);
4166
4167	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4168	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4169
4170	/* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
4171	PVMSVGA3DSURFACE pSurface;
4172	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
4173	AssertRCReturn(rc, rc);
4174
4175	if (pSurface->pBackendSurface == NULL)
4176	{
4177	/* Create the actual texture. */
4178	rc = vmsvga3dBackSurfaceCreateRenderTarget(pThisCC->svga.p3dState, pDXContext, pSurface);
4179	AssertRCReturn(rc, rc);
4180	}
4181
4182	HRESULT hr = dxRenderTargetViewCreate(pDevice, pEntry, pSurface->pBackendSurface, &pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId]);
4183	if (SUCCEEDED(hr))
4184	return VINF_SUCCESS;
4185	return VERR_INVALID_STATE;
4186	}
4187
4188
4189	static DECLCALLBACK(int) vmsvga3dBackDXDestroyRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId)
4190	{
4191	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4192	RT_NOREF(pBackend);
4193
4194	D3D_RELEASE(pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId]);
4195	return VINF_SUCCESS;
4196	}
4197
4198
4199	static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
4200	{
4201	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4202	RT_NOREF(pBackend);
4203
4204	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4205	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4206
4207	/* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
4208	PVMSVGA3DSURFACE pSurface;
4209	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
4210	AssertRCReturn(rc, rc);
4211
4212	if (pSurface->pBackendSurface == NULL)
4213	{
4214	/* Create the actual texture. */
4215	rc = vmsvga3dBackSurfaceCreateDepthStencilTexture(pThisCC->svga.p3dState, pDXContext, pSurface);
4216	AssertRCReturn(rc, rc);
4217	}
4218
4219	HRESULT hr = dxDepthStencilViewCreate(pDevice, pEntry, pSurface->pBackendSurface, &pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId]);
4220	if (SUCCEEDED(hr))
4221	return VINF_SUCCESS;
4222	return VERR_INVALID_STATE;
4223	}
4224
4225
4226	static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId)
4227	{
4228	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4229	RT_NOREF(pBackend);
4230
4231	D3D_RELEASE(pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId]);
4232	return VINF_SUCCESS;
4233	}
4234
4235
4236	static DECLCALLBACK(int) vmsvga3dBackDXDefineElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
4237	{
4238	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4239	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4240	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4241
4242	RT_NOREF(pBackend, elementLayoutId, pEntry);
4243
4244	/* Not much can be done here because ID3D11Device::CreateInputLayout requires
4245	* a pShaderBytecodeWithInputSignature which is not known at this moment.
4246	* InputLayout object will be created in SVGA_3D_CMD_DX_SET_INPUT_LAYOUT.
4247	*/
4248
4249	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[pEntry->elid];
4250	D3D_RELEASE(pDXElementLayout->pElementLayout);
4251
4252	/* Semantic name is not interpreted by D3D, therefore arbitrary names can be used
4253	* if they are consistent between the element layout and shader input signature.
4254	* "In general, data passed between pipeline stages is completely generic and is not uniquely
4255	* interpreted by the system; arbitrary semantics are allowed ..."
4256	*
4257	* However D3D runtime insists that "SemanticName string ("POSITIO1") cannot end with a number."
4258	*
4259	* System-Value semantics ("SV_*") between shaders require proper names of course.
4260	* But they are irrelevant for input attributes.
4261	*/
4262	pDXElementLayout->cElementDesc = pEntry->numDescs;
4263	for (uint32_t i = 0; i < pEntry->numDescs; ++i)
4264	{
4265	D3D11_INPUT_ELEMENT_DESC *pDst = &pDXElementLayout->aElementDesc[i];
4266	SVGA3dInputElementDesc const *pSrc = &pEntry->descs[i];
4267	pDst->SemanticName = "ATTRIB";
4268	pDst->SemanticIndex = i; /// @todo 'pSrc->inputRegister' is unused, maybe it should somehow.
4269	pDst->Format = vmsvgaDXSurfaceFormat2Dxgi(pSrc->format);
4270	AssertReturn(pDst->Format != DXGI_FORMAT_UNKNOWN, VERR_NOT_IMPLEMENTED);
4271	pDst->InputSlot = pSrc->inputSlot;
4272	pDst->AlignedByteOffset = pSrc->alignedByteOffset;
4273	pDst->InputSlotClass = (D3D11_INPUT_CLASSIFICATION)pSrc->inputSlotClass;
4274	pDst->InstanceDataStepRate = pSrc->instanceDataStepRate;
4275	}
4276
4277	return VINF_SUCCESS;
4278	}
4279
4280
4281	static DECLCALLBACK(int) vmsvga3dBackDXDestroyElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4282	{
4283	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4284
4285	RT_NOREF(pBackend, pDXContext);
4286	AssertFailed(); /** @todo Implement */
4287	return VERR_NOT_IMPLEMENTED;
4288	}
4289
4290
4291	static DECLCALLBACK(int) vmsvga3dBackDXDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
4292	SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
4293	{
4294	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4295	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4296	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4297
4298	RT_NOREF(pBackend);
4299
4300	HRESULT hr = dxBlendStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papBlendState[blendId]);
4301	if (SUCCEEDED(hr))
4302	return VINF_SUCCESS;
4303	return VERR_INVALID_STATE;
4304	}
4305
4306
4307	static DECLCALLBACK(int) vmsvga3dBackDXDestroyBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4308	{
4309	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4310
4311	RT_NOREF(pBackend, pDXContext);
4312	AssertFailed(); /** @todo Implement */
4313	return VERR_NOT_IMPLEMENTED;
4314	}
4315
4316
4317	static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry *pEntry)
4318	{
4319	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4320	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4321	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4322
4323	RT_NOREF(pBackend);
4324
4325	HRESULT hr = dxDepthStencilStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
4326	if (SUCCEEDED(hr))
4327	return VINF_SUCCESS;
4328	return VERR_INVALID_STATE;
4329	}
4330
4331
4332	static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4333	{
4334	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4335
4336	RT_NOREF(pBackend, pDXContext);
4337	AssertFailed(); /** @todo Implement */
4338	return VERR_NOT_IMPLEMENTED;
4339	}
4340
4341
4342	static DECLCALLBACK(int) vmsvga3dBackDXDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
4343	{
4344	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4345	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4346	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4347
4348	RT_NOREF(pBackend);
4349
4350	HRESULT hr = dxRasterizerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
4351	if (SUCCEEDED(hr))
4352	return VINF_SUCCESS;
4353	return VERR_INVALID_STATE;
4354	}
4355
4356
4357	static DECLCALLBACK(int) vmsvga3dBackDXDestroyRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4358	{
4359	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4360
4361	RT_NOREF(pBackend, pDXContext);
4362	AssertFailed(); /** @todo Implement */
4363	return VERR_NOT_IMPLEMENTED;
4364	}
4365
4366
4367	static DECLCALLBACK(int) vmsvga3dBackDXDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
4368	{
4369	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4370	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4371	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4372
4373	RT_NOREF(pBackend);
4374
4375	HRESULT hr = dxSamplerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papSamplerState[samplerId]);
4376	if (SUCCEEDED(hr))
4377	return VINF_SUCCESS;
4378	return VERR_INVALID_STATE;
4379	}
4380
4381
4382	static DECLCALLBACK(int) vmsvga3dBackDXDestroySamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4383	{
4384	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4385
4386	RT_NOREF(pBackend, pDXContext);
4387	AssertFailed(); /** @todo Implement */
4388	return VERR_NOT_IMPLEMENTED;
4389	}
4390
4391
4392	static DECLCALLBACK(int) vmsvga3dBackDXDefineShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader)
4393	{
4394	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4395
4396	RT_NOREF(pBackend);
4397
4398	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
4399	D3D_RELEASE(pDXShader->pShader);
4400	pDXShader->enmShaderType = pShader->type;
4401	pShader->u.pvBackendShader = pDXShader;
4402	return VINF_SUCCESS;
4403	}
4404
4405
4406	static DECLCALLBACK(int) vmsvga3dBackDXDestroyShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4407	{
4408	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4409
4410	RT_NOREF(pBackend, pDXContext);
4411	AssertFailed(); /** @todo Implement */
4412	return VERR_NOT_IMPLEMENTED;
4413	}
4414
4415
4416	static DECLCALLBACK(int) vmsvga3dBackDXBindShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader, void const *pvShaderBytecode)
4417	{
4418	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4419	DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4420	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4421
4422	RT_NOREF(pBackend);
4423
4424	int rc = VINF_SUCCESS;
4425
4426	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
4427	if (pDXShader->pvDXBC)
4428	{
4429	RTMemFree(pDXShader->pvDXBC);
4430	pDXShader->pvDXBC = NULL;
4431	pDXShader->cbDXBC = 0;
4432	}
4433
4434	if (pvShaderBytecode)
4435	{
4436	#ifdef LOG_ENABLED
4437	Log(("Shader: cid=%u shid=%u type=%d:\n", pDXContext->cid, pShader->id, pDXShader->enmShaderType));
4438	uint8_t pu8 = (uint8_t )pvShaderBytecode;
4439	for (uint32_t i = 0; i < pShader->cbData; ++i)
4440	{
4441	if ((i % 16) == 0)
4442	{
4443	if (i > 0)
4444	Log((",\n"));
4445
4446	Log((" %#04x", pu8[i]));
4447	}
4448	else
4449	{
4450	Log((", %#04x", pu8[i]));
4451	}
4452	}
4453	Log(("\n"));
4454	#endif
4455
4456	rc = DXShaderCreateDXBC(&pShader->shaderInfo, pvShaderBytecode, pShader->cbData, &pDXShader->pvDXBC, &pDXShader->cbDXBC);
4457	if (RT_SUCCESS(rc))
4458	{
4459	#ifdef LOG_ENABLED
4460	if (pBackend->pfnD3DDisassemble && LogIs6Enabled())
4461	{
4462	ID3D10Blob *pBlob = 0;
4463	HRESULT hr2 = pBackend->pfnD3DDisassemble(pDXShader->pvDXBC, pDXShader->cbDXBC, 0, NULL, &pBlob);
4464	if (SUCCEEDED(hr2) && pBlob && pBlob->GetBufferSize())
4465	{
4466	Log6(("Shader: cid=%u shid=%u type=%d:\n%s\n",
4467	pDXContext->cid, pShader->id, pDXShader->enmShaderType, pBlob->GetBufferPointer()));
4468	}
4469	else
4470	AssertFailed();
4471	D3D_RELEASE(pBlob);
4472	}
4473	#endif
4474
4475	HRESULT hr = dxShaderCreate(pDevice, pShader, pDXShader);
4476	if (FAILED(hr))
4477	rc = VERR_INVALID_STATE;
4478	}
4479	else
4480	rc = VERR_NO_MEMORY;
4481	}
4482
4483	return rc;
4484	}
4485
4486
4487	static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4488	{
4489	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4490
4491	RT_NOREF(pBackend, pDXContext);
4492	AssertFailed(); /** @todo Implement */
4493	return VERR_NOT_IMPLEMENTED;
4494	}
4495
4496
4497	static DECLCALLBACK(int) vmsvga3dBackDXDestroyStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4498	{
4499	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4500
4501	RT_NOREF(pBackend, pDXContext);
4502	AssertFailed(); /** @todo Implement */
4503	return VERR_NOT_IMPLEMENTED;
4504	}
4505
4506
4507	static DECLCALLBACK(int) vmsvga3dBackDXSetStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4508	{
4509	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4510
4511	RT_NOREF(pBackend, pDXContext);
4512	AssertFailed(); /** @todo Implement */
4513	return VERR_NOT_IMPLEMENTED;
4514	}
4515
4516	static DECLCALLBACK(int) vmsvga3dBackDXSetCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableType type, uint32_t cEntries)
4517	{
4518	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4519	VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
4520
4521	RT_NOREF(pBackend, pDXContext, type);
4522
4523	int rc = VINF_SUCCESS;
4524
4525	/* Allocate paBlendState for example. */
4526	switch (type)
4527	{
4528	case SVGA_COTABLE_RTVIEW:
4529	if (pBackendDXContext->papRenderTargetView)
4530	{
4531	DX_RELEASE_ARRAY(pBackendDXContext->cRenderTargetView, pBackendDXContext->papRenderTargetView);
4532	RTMemFree(pBackendDXContext->papRenderTargetView);
4533	pBackendDXContext->papRenderTargetView = NULL;
4534	pBackendDXContext->cRenderTargetView = 0;
4535	}
4536
4537	if (cEntries)
4538	{
4539	pBackendDXContext->papRenderTargetView = (ID3D11RenderTargetView *)RTMemAllocZ(cEntries sizeof(pBackendDXContext->papRenderTargetView[0]));
4540	AssertBreakStmt(pBackendDXContext->papRenderTargetView, rc = VERR_NO_MEMORY);
4541	pBackendDXContext->cRenderTargetView = cEntries;
4542	}
4543	break;
4544	case SVGA_COTABLE_DSVIEW:
4545	if (pBackendDXContext->papDepthStencilView)
4546	{
4547	DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilView, pBackendDXContext->papDepthStencilView);
4548	RTMemFree(pBackendDXContext->papDepthStencilView);
4549	pBackendDXContext->papDepthStencilView = NULL;
4550	pBackendDXContext->cDepthStencilView = 0;
4551	}
4552
4553	if (cEntries)
4554	{
4555	pBackendDXContext->papDepthStencilView = (ID3D11DepthStencilView *)RTMemAllocZ(cEntries sizeof(pBackendDXContext->papDepthStencilView[0]));
4556	AssertBreakStmt(pBackendDXContext->papDepthStencilView, rc = VERR_NO_MEMORY);
4557	pBackendDXContext->cDepthStencilView = cEntries;
4558	}
4559	break;
4560	case SVGA_COTABLE_SRVIEW:
4561	if (pBackendDXContext->papShaderResourceView)
4562	{
4563	DX_RELEASE_ARRAY(pBackendDXContext->cShaderResourceView, pBackendDXContext->papShaderResourceView);
4564	RTMemFree(pBackendDXContext->papShaderResourceView);
4565	pBackendDXContext->papShaderResourceView = NULL;
4566	pBackendDXContext->cShaderResourceView = 0;
4567	}
4568
4569	if (cEntries)
4570	{
4571	pBackendDXContext->papShaderResourceView = (ID3D11ShaderResourceView *)RTMemAllocZ(cEntries sizeof(pBackendDXContext->papShaderResourceView[0]));
4572	AssertBreakStmt(pBackendDXContext->papShaderResourceView, rc = VERR_NO_MEMORY);
4573	pBackendDXContext->cShaderResourceView = cEntries;
4574	}
4575	break;
4576	case SVGA_COTABLE_ELEMENTLAYOUT:
4577	if (pBackendDXContext->paElementLayout)
4578	{
4579	for (uint32_t i = 0; i < pBackendDXContext->cElementLayout; ++i)
4580	D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
4581	RTMemFree(pBackendDXContext->paElementLayout);
4582	pBackendDXContext->paElementLayout = NULL;
4583	pBackendDXContext->cElementLayout = 0;
4584	}
4585
4586	if (cEntries)
4587	{
4588	pBackendDXContext->paElementLayout = (DXELEMENTLAYOUT )RTMemAllocZ(cEntries sizeof(pBackendDXContext->paElementLayout[0]));
4589	AssertBreakStmt(pBackendDXContext->paElementLayout, rc = VERR_NO_MEMORY);
4590	pBackendDXContext->cElementLayout = cEntries;
4591	}
4592	break;
4593	case SVGA_COTABLE_BLENDSTATE:
4594	if (pBackendDXContext->papBlendState)
4595	{
4596	DX_RELEASE_ARRAY(pBackendDXContext->cBlendState, pBackendDXContext->papBlendState);
4597	RTMemFree(pBackendDXContext->papBlendState);
4598	pBackendDXContext->papBlendState = NULL;
4599	pBackendDXContext->cBlendState = 0;
4600	}
4601
4602	if (cEntries)
4603	{
4604	pBackendDXContext->papBlendState = (ID3D11BlendState *)RTMemAllocZ(cEntries sizeof(pBackendDXContext->papBlendState[0]));
4605	AssertBreakStmt(pBackendDXContext->papBlendState, rc = VERR_NO_MEMORY);
4606	pBackendDXContext->cBlendState = cEntries;
4607	}
4608	break;
4609	case SVGA_COTABLE_DEPTHSTENCIL:
4610	if (pBackendDXContext->papDepthStencilState)
4611	{
4612	DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilState, pBackendDXContext->papDepthStencilState);
4613	RTMemFree(pBackendDXContext->papDepthStencilState);
4614	pBackendDXContext->papDepthStencilState = NULL;
4615	pBackendDXContext->cDepthStencilState = 0;
4616	}
4617
4618	if (cEntries)
4619	{
4620	pBackendDXContext->papDepthStencilState = (ID3D11DepthStencilState *)RTMemAllocZ(cEntries sizeof(pBackendDXContext->papDepthStencilState[0]));
4621	AssertBreakStmt(pBackendDXContext->papDepthStencilState, rc = VERR_NO_MEMORY);
4622	pBackendDXContext->cDepthStencilState = cEntries;
4623	}
4624	break;
4625	case SVGA_COTABLE_RASTERIZERSTATE:
4626	if (pBackendDXContext->papRasterizerState)
4627	{
4628	DX_RELEASE_ARRAY(pBackendDXContext->cRasterizerState, pBackendDXContext->papRasterizerState);
4629	RTMemFree(pBackendDXContext->papRasterizerState);
4630	pBackendDXContext->papRasterizerState = NULL;
4631	pBackendDXContext->cRasterizerState = 0;
4632	}
4633
4634	if (cEntries)
4635	{
4636	pBackendDXContext->papRasterizerState = (ID3D11RasterizerState *)RTMemAllocZ(cEntries sizeof(pBackendDXContext->papRasterizerState[0]));
4637	AssertBreakStmt(pBackendDXContext->papRasterizerState, rc = VERR_NO_MEMORY);
4638	pBackendDXContext->cRasterizerState = cEntries;
4639	}
4640	break;
4641	case SVGA_COTABLE_SAMPLER:
4642	if (pBackendDXContext->papSamplerState)
4643	{
4644	DX_RELEASE_ARRAY(pBackendDXContext->cSamplerState, pBackendDXContext->papSamplerState);
4645	RTMemFree(pBackendDXContext->papSamplerState);
4646	pBackendDXContext->papSamplerState = NULL;
4647	pBackendDXContext->cSamplerState = 0;
4648	}
4649
4650	if (cEntries)
4651	{
4652	pBackendDXContext->papSamplerState = (ID3D11SamplerState *)RTMemAllocZ(cEntries sizeof(pBackendDXContext->papSamplerState[0]));
4653	AssertBreakStmt(pBackendDXContext->papSamplerState, rc = VERR_NO_MEMORY);
4654	pBackendDXContext->cSamplerState = cEntries;
4655	}
4656	break;
4657	case SVGA_COTABLE_STREAMOUTPUT:
4658	//AssertFailed(); /** @todo Implement */
4659	break;
4660	case SVGA_COTABLE_DXQUERY:
4661	if (pBackendDXContext->papQuery)
4662	{
4663	DX_RELEASE_ARRAY(pBackendDXContext->cQuery, pBackendDXContext->papQuery);
4664	RTMemFree(pBackendDXContext->papQuery);
4665	pBackendDXContext->papQuery = NULL;
4666	pBackendDXContext->cQuery = 0;
4667	}
4668
4669	if (cEntries)
4670	{
4671	pBackendDXContext->papQuery = (ID3D11Query *)RTMemAllocZ(cEntries sizeof(pBackendDXContext->papQuery[0]));
4672	AssertBreakStmt(pBackendDXContext->papQuery, rc = VERR_NO_MEMORY);
4673	pBackendDXContext->cQuery = cEntries;
4674	}
4675	break;
4676	case SVGA_COTABLE_DXSHADER:
4677	if (pBackendDXContext->paShader)
4678	{
4679	for (uint32_t i = 0; i < pBackendDXContext->cShader; ++i)
4680	D3D_RELEASE(pBackendDXContext->paShader[i].pShader);
4681	RTMemFree(pBackendDXContext->paShader);
4682	pBackendDXContext->paShader = NULL;
4683	pBackendDXContext->cShader = 0;
4684	}
4685
4686	if (cEntries)
4687	{
4688	pBackendDXContext->paShader = (DXSHADER )RTMemAllocZ(cEntries sizeof(pBackendDXContext->paShader[0]));
4689	AssertBreakStmt(pBackendDXContext->paShader, rc = VERR_NO_MEMORY);
4690	pBackendDXContext->cShader = cEntries;
4691	}
4692	break;
4693	case SVGA_COTABLE_UAVIEW:
4694	AssertFailed(); /** @todo Implement */
4695	break;
4696	case SVGA_COTABLE_MAX: break; /* Compiler warning */
4697	}
4698	return rc;
4699	}
4700
4701
4702	static DECLCALLBACK(int) vmsvga3dBackDXReadbackCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4703	{
4704	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4705
4706	RT_NOREF(pBackend, pDXContext);
4707	AssertFailed(); /** @todo Implement */
4708	return VERR_NOT_IMPLEMENTED;
4709	}
4710
4711
4712	static DECLCALLBACK(int) vmsvga3dBackDXBufferCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4713	{
4714	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4715
4716	RT_NOREF(pBackend, pDXContext);
4717	AssertFailed(); /** @todo Implement */
4718	return VERR_NOT_IMPLEMENTED;
4719	}
4720
4721
4722	static DECLCALLBACK(int) vmsvga3dBackDXTransferFromBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4723	{
4724	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4725
4726	RT_NOREF(pBackend, pDXContext);
4727	AssertFailed(); /** @todo Implement */
4728	return VERR_NOT_IMPLEMENTED;
4729	}
4730
4731
4732	static DECLCALLBACK(int) vmsvga3dBackDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4733	{
4734	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4735
4736	RT_NOREF(pBackend, pDXContext);
4737	AssertFailed(); /** @todo Implement */
4738	return VERR_NOT_IMPLEMENTED;
4739	}
4740
4741
4742	static DECLCALLBACK(int) vmsvga3dBackDXMoveQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4743	{
4744	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4745
4746	RT_NOREF(pBackend, pDXContext);
4747	AssertFailed(); /** @todo Implement */
4748	return VERR_NOT_IMPLEMENTED;
4749	}
4750
4751
4752	static DECLCALLBACK(int) vmsvga3dBackDXBindAllQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4753	{
4754	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4755
4756	RT_NOREF(pBackend, pDXContext);
4757	AssertFailed(); /** @todo Implement */
4758	return VERR_NOT_IMPLEMENTED;
4759	}
4760
4761
4762	static DECLCALLBACK(int) vmsvga3dBackDXReadbackAllQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4763	{
4764	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4765
4766	RT_NOREF(pBackend, pDXContext);
4767	AssertFailed(); /** @todo Implement */
4768	return VERR_NOT_IMPLEMENTED;
4769	}
4770
4771
4772	static DECLCALLBACK(int) vmsvga3dBackDXPredTransferFromBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4773	{
4774	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4775
4776	RT_NOREF(pBackend, pDXContext);
4777	AssertFailed(); /** @todo Implement */
4778	return VERR_NOT_IMPLEMENTED;
4779	}
4780
4781
4782	static DECLCALLBACK(int) vmsvga3dBackDXMobFence64(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4783	{
4784	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4785
4786	RT_NOREF(pBackend, pDXContext);
4787	AssertFailed(); /** @todo Implement */
4788	return VERR_NOT_IMPLEMENTED;
4789	}
4790
4791
4792	static DECLCALLBACK(int) vmsvga3dBackDXBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4793	{
4794	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4795
4796	RT_NOREF(pBackend, pDXContext);
4797	AssertFailed(); /** @todo Implement */
4798	return VERR_NOT_IMPLEMENTED;
4799	}
4800
4801
4802	static DECLCALLBACK(int) vmsvga3dBackDXHint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4803	{
4804	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4805
4806	RT_NOREF(pBackend, pDXContext);
4807	AssertFailed(); /** @todo Implement */
4808	return VERR_NOT_IMPLEMENTED;
4809	}
4810
4811
4812	static DECLCALLBACK(int) vmsvga3dBackDXBufferUpdate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4813	{
4814	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4815
4816	RT_NOREF(pBackend, pDXContext);
4817	AssertFailed(); /** @todo Implement */
4818	return VERR_NOT_IMPLEMENTED;
4819	}
4820
4821
4822	static DECLCALLBACK(int) vmsvga3dBackDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4823	{
4824	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4825
4826	RT_NOREF(pBackend, pDXContext);
4827	AssertFailed(); /** @todo Implement */
4828	return VERR_NOT_IMPLEMENTED;
4829	}
4830
4831
4832	static DECLCALLBACK(int) vmsvga3dBackDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4833	{
4834	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4835
4836	RT_NOREF(pBackend, pDXContext);
4837	AssertFailed(); /** @todo Implement */
4838	return VERR_NOT_IMPLEMENTED;
4839	}
4840
4841
4842	static DECLCALLBACK(int) vmsvga3dBackDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4843	{
4844	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4845
4846	RT_NOREF(pBackend, pDXContext);
4847	AssertFailed(); /** @todo Implement */
4848	return VERR_NOT_IMPLEMENTED;
4849	}
4850
4851
4852	static DECLCALLBACK(int) vmsvga3dBackDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4853	{
4854	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4855
4856	RT_NOREF(pBackend, pDXContext);
4857	AssertFailed(); /** @todo Implement */
4858	return VERR_NOT_IMPLEMENTED;
4859	}
4860
4861
4862	static DECLCALLBACK(int) vmsvga3dBackDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4863	{
4864	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4865
4866	RT_NOREF(pBackend, pDXContext);
4867	AssertFailed(); /** @todo Implement */
4868	return VERR_NOT_IMPLEMENTED;
4869	}
4870
4871
4872	static DECLCALLBACK(int) vmsvga3dBackDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4873	{
4874	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4875
4876	RT_NOREF(pBackend, pDXContext);
4877	AssertFailed(); /** @todo Implement */
4878	return VERR_NOT_IMPLEMENTED;
4879	}
4880
4881
4882	static DECLCALLBACK(int) vmsvga3dBackDXCondBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4883	{
4884	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4885
4886	RT_NOREF(pBackend, pDXContext);
4887	AssertFailed(); /** @todo Implement */
4888	return VERR_NOT_IMPLEMENTED;
4889	}
4890
4891
4892	static DECLCALLBACK(int) vmsvga3dBackScreenCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4893	{
4894	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4895
4896	RT_NOREF(pBackend, pDXContext);
4897	AssertFailed(); /** @todo Implement */
4898	return VERR_NOT_IMPLEMENTED;
4899	}
4900
4901
4902	static DECLCALLBACK(int) vmsvga3dBackGrowOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4903	{
4904	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4905
4906	RT_NOREF(pBackend, pDXContext);
4907	AssertFailed(); /** @todo Implement */
4908	return VERR_NOT_IMPLEMENTED;
4909	}
4910
4911
4912	static DECLCALLBACK(int) vmsvga3dBackDXGrowCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4913	{
4914	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4915
4916	RT_NOREF(pBackend, pDXContext);
4917	AssertFailed(); /** @todo Implement */
4918	return VERR_NOT_IMPLEMENTED;
4919	}
4920
4921
4922	static DECLCALLBACK(int) vmsvga3dBackIntraSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4923	{
4924	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4925
4926	RT_NOREF(pBackend, pDXContext);
4927	AssertFailed(); /** @todo Implement */
4928	return VERR_NOT_IMPLEMENTED;
4929	}
4930
4931
4932	static DECLCALLBACK(int) vmsvga3dBackDefineGBSurface_v3(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4933	{
4934	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4935
4936	RT_NOREF(pBackend, pDXContext);
4937	AssertFailed(); /** @todo Implement */
4938	return VERR_NOT_IMPLEMENTED;
4939	}
4940
4941
4942	static DECLCALLBACK(int) vmsvga3dBackDXResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4943	{
4944	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4945
4946	RT_NOREF(pBackend, pDXContext);
4947	AssertFailed(); /** @todo Implement */
4948	return VERR_NOT_IMPLEMENTED;
4949	}
4950
4951
4952	static DECLCALLBACK(int) vmsvga3dBackDXPredResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4953	{
4954	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4955
4956	RT_NOREF(pBackend, pDXContext);
4957	AssertFailed(); /** @todo Implement */
4958	return VERR_NOT_IMPLEMENTED;
4959	}
4960
4961
4962	static DECLCALLBACK(int) vmsvga3dBackDXPredConvertRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4963	{
4964	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4965
4966	RT_NOREF(pBackend, pDXContext);
4967	AssertFailed(); /** @todo Implement */
4968	return VERR_NOT_IMPLEMENTED;
4969	}
4970
4971
4972	static DECLCALLBACK(int) vmsvga3dBackDXPredConvert(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4973	{
4974	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4975
4976	RT_NOREF(pBackend, pDXContext);
4977	AssertFailed(); /** @todo Implement */
4978	return VERR_NOT_IMPLEMENTED;
4979	}
4980
4981
4982	static DECLCALLBACK(int) vmsvga3dBackWholeSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4983	{
4984	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4985
4986	RT_NOREF(pBackend, pDXContext);
4987	AssertFailed(); /** @todo Implement */
4988	return VERR_NOT_IMPLEMENTED;
4989	}
4990
4991
4992	static DECLCALLBACK(int) vmsvga3dBackDXDefineUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4993	{
4994	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4995
4996	RT_NOREF(pBackend, pDXContext);
4997	AssertFailed(); /** @todo Implement */
4998	return VERR_NOT_IMPLEMENTED;
4999	}
5000
5001
5002	static DECLCALLBACK(int) vmsvga3dBackDXDestroyUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5003	{
5004	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5005
5006	RT_NOREF(pBackend, pDXContext);
5007	AssertFailed(); /** @todo Implement */
5008	return VERR_NOT_IMPLEMENTED;
5009	}
5010
5011
5012	static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewUint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5013	{
5014	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5015
5016	RT_NOREF(pBackend, pDXContext);
5017	AssertFailed(); /** @todo Implement */
5018	return VERR_NOT_IMPLEMENTED;
5019	}
5020
5021
5022	static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewFloat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5023	{
5024	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5025
5026	RT_NOREF(pBackend, pDXContext);
5027	AssertFailed(); /** @todo Implement */
5028	return VERR_NOT_IMPLEMENTED;
5029	}
5030
5031
5032	static DECLCALLBACK(int) vmsvga3dBackDXCopyStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5033	{
5034	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5035
5036	RT_NOREF(pBackend, pDXContext);
5037	AssertFailed(); /** @todo Implement */
5038	return VERR_NOT_IMPLEMENTED;
5039	}
5040
5041
5042	static DECLCALLBACK(int) vmsvga3dBackDXSetUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5043	{
5044	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5045
5046	RT_NOREF(pBackend, pDXContext);
5047	AssertFailed(); /** @todo Implement */
5048	return VERR_NOT_IMPLEMENTED;
5049	}
5050
5051
5052	static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5053	{
5054	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5055
5056	RT_NOREF(pBackend, pDXContext);
5057	AssertFailed(); /** @todo Implement */
5058	return VERR_NOT_IMPLEMENTED;
5059	}
5060
5061
5062	static DECLCALLBACK(int) vmsvga3dBackDXDrawInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5063	{
5064	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5065
5066	RT_NOREF(pBackend, pDXContext);
5067	AssertFailed(); /** @todo Implement */
5068	return VERR_NOT_IMPLEMENTED;
5069	}
5070
5071
5072	static DECLCALLBACK(int) vmsvga3dBackDXDispatch(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5073	{
5074	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5075
5076	RT_NOREF(pBackend, pDXContext);
5077	AssertFailed(); /** @todo Implement */
5078	return VERR_NOT_IMPLEMENTED;
5079	}
5080
5081
5082	static DECLCALLBACK(int) vmsvga3dBackDXDispatchIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5083	{
5084	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5085
5086	RT_NOREF(pBackend, pDXContext);
5087	AssertFailed(); /** @todo Implement */
5088	return VERR_NOT_IMPLEMENTED;
5089	}
5090
5091
5092	static DECLCALLBACK(int) vmsvga3dBackWriteZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5093	{
5094	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5095
5096	RT_NOREF(pBackend, pDXContext);
5097	AssertFailed(); /** @todo Implement */
5098	return VERR_NOT_IMPLEMENTED;
5099	}
5100
5101
5102	static DECLCALLBACK(int) vmsvga3dBackHintZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5103	{
5104	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5105
5106	RT_NOREF(pBackend, pDXContext);
5107	AssertFailed(); /** @todo Implement */
5108	return VERR_NOT_IMPLEMENTED;
5109	}
5110
5111
5112	static DECLCALLBACK(int) vmsvga3dBackDXTransferToBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5113	{
5114	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5115
5116	RT_NOREF(pBackend, pDXContext);
5117	AssertFailed(); /** @todo Implement */
5118	return VERR_NOT_IMPLEMENTED;
5119	}
5120
5121
5122	static DECLCALLBACK(int) vmsvga3dBackDXSetStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5123	{
5124	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5125
5126	RT_NOREF(pBackend, pDXContext);
5127	AssertFailed(); /** @todo Implement */
5128	return VERR_NOT_IMPLEMENTED;
5129	}
5130
5131
5132	static DECLCALLBACK(int) vmsvga3dBackLogicOpsBitBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5133	{
5134	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5135
5136	RT_NOREF(pBackend, pDXContext);
5137	AssertFailed(); /** @todo Implement */
5138	return VERR_NOT_IMPLEMENTED;
5139	}
5140
5141
5142	static DECLCALLBACK(int) vmsvga3dBackLogicOpsTransBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5143	{
5144	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5145
5146	RT_NOREF(pBackend, pDXContext);
5147	AssertFailed(); /** @todo Implement */
5148	return VERR_NOT_IMPLEMENTED;
5149	}
5150
5151
5152	static DECLCALLBACK(int) vmsvga3dBackLogicOpsStretchBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5153	{
5154	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5155
5156	RT_NOREF(pBackend, pDXContext);
5157	AssertFailed(); /** @todo Implement */
5158	return VERR_NOT_IMPLEMENTED;
5159	}
5160
5161
5162	static DECLCALLBACK(int) vmsvga3dBackLogicOpsColorFill(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5163	{
5164	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5165
5166	RT_NOREF(pBackend, pDXContext);
5167	AssertFailed(); /** @todo Implement */
5168	return VERR_NOT_IMPLEMENTED;
5169	}
5170
5171
5172	static DECLCALLBACK(int) vmsvga3dBackLogicOpsAlphaBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5173	{
5174	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5175
5176	RT_NOREF(pBackend, pDXContext);
5177	AssertFailed(); /** @todo Implement */
5178	return VERR_NOT_IMPLEMENTED;
5179	}
5180
5181
5182	static DECLCALLBACK(int) vmsvga3dBackLogicOpsClearTypeBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5183	{
5184	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5185
5186	RT_NOREF(pBackend, pDXContext);
5187	AssertFailed(); /** @todo Implement */
5188	return VERR_NOT_IMPLEMENTED;
5189	}
5190
5191
5192	static DECLCALLBACK(int) vmsvga3dBackDefineGBSurface_v4(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5193	{
5194	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5195
5196	RT_NOREF(pBackend, pDXContext);
5197	AssertFailed(); /** @todo Implement */
5198	return VERR_NOT_IMPLEMENTED;
5199	}
5200
5201
5202	static DECLCALLBACK(int) vmsvga3dBackDXSetCSUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5203	{
5204	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5205
5206	RT_NOREF(pBackend, pDXContext);
5207	AssertFailed(); /** @todo Implement */
5208	return VERR_NOT_IMPLEMENTED;
5209	}
5210
5211
5212	static DECLCALLBACK(int) vmsvga3dBackDXSetMinLOD(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5213	{
5214	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5215
5216	RT_NOREF(pBackend, pDXContext);
5217	AssertFailed(); /** @todo Implement */
5218	return VERR_NOT_IMPLEMENTED;
5219	}
5220
5221
5222	static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5223	{
5224	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5225
5226	RT_NOREF(pBackend, pDXContext);
5227	AssertFailed(); /** @todo Implement */
5228	return VERR_NOT_IMPLEMENTED;
5229	}
5230
5231
5232	static DECLCALLBACK(int) vmsvga3dBackDXSetShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5233	{
5234	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5235
5236	RT_NOREF(pBackend, pDXContext);
5237	AssertFailed(); /** @todo Implement */
5238	return VERR_NOT_IMPLEMENTED;
5239	}
5240
5241
5242	static DECLCALLBACK(int) vmsvga3dBackDXBindStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5243	{
5244	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5245
5246	RT_NOREF(pBackend, pDXContext);
5247	AssertFailed(); /** @todo Implement */
5248	return VERR_NOT_IMPLEMENTED;
5249	}
5250
5251
5252	static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5253	{
5254	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5255
5256	RT_NOREF(pBackend, pDXContext);
5257	AssertFailed(); /** @todo Implement */
5258	return VERR_NOT_IMPLEMENTED;
5259	}
5260
5261
5262	static DECLCALLBACK(int) vmsvga3dBackDXBindShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5263	{
5264	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5265
5266	RT_NOREF(pBackend, pDXContext);
5267	AssertFailed(); /** @todo Implement */
5268	return VERR_NOT_IMPLEMENTED;
5269	}
5270
5271
5272	int vmsvga3dQueryInterface(PVGASTATECC pThisCC, char const pszInterfaceName, void pvInterfaceFuncs, size_t cbInterfaceFuncs)
5273	{
5274	PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
5275	AssertReturn(p3dState, VERR_NOT_SUPPORTED);
5276
5277	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5278	AssertReturn(pBackend, VERR_NOT_SUPPORTED);
5279
5280	if (pvInterfaceFuncs)
5281	RT_BZERO(pvInterfaceFuncs, cbInterfaceFuncs);
5282
5283	int rc = VINF_SUCCESS;
5284	if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_DX) == 0)
5285	{
5286	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSDX))
5287	{
5288	if (pvInterfaceFuncs)
5289	{
5290	VMSVGA3DBACKENDFUNCSDX p = (VMSVGA3DBACKENDFUNCSDX )pvInterfaceFuncs;
5291	p->pfnDXDefineContext = vmsvga3dBackDXDefineContext;
5292	p->pfnDXDestroyContext = vmsvga3dBackDXDestroyContext;
5293	p->pfnDXBindContext = vmsvga3dBackDXBindContext;
5294	p->pfnDXReadbackContext = vmsvga3dBackDXReadbackContext;
5295	p->pfnDXInvalidateContext = vmsvga3dBackDXInvalidateContext;
5296	p->pfnDXSetSingleConstantBuffer = vmsvga3dBackDXSetSingleConstantBuffer;
5297	p->pfnDXSetShaderResources = vmsvga3dBackDXSetShaderResources;
5298	p->pfnDXSetShader = vmsvga3dBackDXSetShader;
5299	p->pfnDXSetSamplers = vmsvga3dBackDXSetSamplers;
5300	p->pfnDXDraw = vmsvga3dBackDXDraw;
5301	p->pfnDXDrawIndexed = vmsvga3dBackDXDrawIndexed;
5302	p->pfnDXDrawInstanced = vmsvga3dBackDXDrawInstanced;
5303	p->pfnDXDrawIndexedInstanced = vmsvga3dBackDXDrawIndexedInstanced;
5304	p->pfnDXDrawAuto = vmsvga3dBackDXDrawAuto;
5305	p->pfnDXSetInputLayout = vmsvga3dBackDXSetInputLayout;
5306	p->pfnDXSetVertexBuffers = vmsvga3dBackDXSetVertexBuffers;
5307	p->pfnDXSetIndexBuffer = vmsvga3dBackDXSetIndexBuffer;
5308	p->pfnDXSetTopology = vmsvga3dBackDXSetTopology;
5309	p->pfnDXSetRenderTargets = vmsvga3dBackDXSetRenderTargets;
5310	p->pfnDXSetBlendState = vmsvga3dBackDXSetBlendState;
5311	p->pfnDXSetDepthStencilState = vmsvga3dBackDXSetDepthStencilState;
5312	p->pfnDXSetRasterizerState = vmsvga3dBackDXSetRasterizerState;
5313	p->pfnDXDefineQuery = vmsvga3dBackDXDefineQuery;
5314	p->pfnDXDestroyQuery = vmsvga3dBackDXDestroyQuery;
5315	p->pfnDXBindQuery = vmsvga3dBackDXBindQuery;
5316	p->pfnDXSetQueryOffset = vmsvga3dBackDXSetQueryOffset;
5317	p->pfnDXBeginQuery = vmsvga3dBackDXBeginQuery;
5318	p->pfnDXEndQuery = vmsvga3dBackDXEndQuery;
5319	p->pfnDXReadbackQuery = vmsvga3dBackDXReadbackQuery;
5320	p->pfnDXSetPredication = vmsvga3dBackDXSetPredication;
5321	p->pfnDXSetSOTargets = vmsvga3dBackDXSetSOTargets;
5322	p->pfnDXSetViewports = vmsvga3dBackDXSetViewports;
5323	p->pfnDXSetScissorRects = vmsvga3dBackDXSetScissorRects;
5324	p->pfnDXClearRenderTargetView = vmsvga3dBackDXClearRenderTargetView;
5325	p->pfnDXClearDepthStencilView = vmsvga3dBackDXClearDepthStencilView;
5326	p->pfnDXPredCopyRegion = vmsvga3dBackDXPredCopyRegion;
5327	p->pfnDXPredCopy = vmsvga3dBackDXPredCopy;
5328	p->pfnDXPresentBlt = vmsvga3dBackDXPresentBlt;
5329	p->pfnDXGenMips = vmsvga3dBackDXGenMips;
5330	p->pfnDXUpdateSubResource = vmsvga3dBackDXUpdateSubResource;
5331	p->pfnDXReadbackSubResource = vmsvga3dBackDXReadbackSubResource;
5332	p->pfnDXInvalidateSubResource = vmsvga3dBackDXInvalidateSubResource;
5333	p->pfnDXDefineShaderResourceView = vmsvga3dBackDXDefineShaderResourceView;
5334	p->pfnDXDestroyShaderResourceView = vmsvga3dBackDXDestroyShaderResourceView;
5335	p->pfnDXDefineRenderTargetView = vmsvga3dBackDXDefineRenderTargetView;
5336	p->pfnDXDestroyRenderTargetView = vmsvga3dBackDXDestroyRenderTargetView;
5337	p->pfnDXDefineDepthStencilView = vmsvga3dBackDXDefineDepthStencilView;
5338	p->pfnDXDestroyDepthStencilView = vmsvga3dBackDXDestroyDepthStencilView;
5339	p->pfnDXDefineElementLayout = vmsvga3dBackDXDefineElementLayout;
5340	p->pfnDXDestroyElementLayout = vmsvga3dBackDXDestroyElementLayout;
5341	p->pfnDXDefineBlendState = vmsvga3dBackDXDefineBlendState;
5342	p->pfnDXDestroyBlendState = vmsvga3dBackDXDestroyBlendState;
5343	p->pfnDXDefineDepthStencilState = vmsvga3dBackDXDefineDepthStencilState;
5344	p->pfnDXDestroyDepthStencilState = vmsvga3dBackDXDestroyDepthStencilState;
5345	p->pfnDXDefineRasterizerState = vmsvga3dBackDXDefineRasterizerState;
5346	p->pfnDXDestroyRasterizerState = vmsvga3dBackDXDestroyRasterizerState;
5347	p->pfnDXDefineSamplerState = vmsvga3dBackDXDefineSamplerState;
5348	p->pfnDXDestroySamplerState = vmsvga3dBackDXDestroySamplerState;
5349	p->pfnDXDefineShader = vmsvga3dBackDXDefineShader;
5350	p->pfnDXDestroyShader = vmsvga3dBackDXDestroyShader;
5351	p->pfnDXBindShader = vmsvga3dBackDXBindShader;
5352	p->pfnDXDefineStreamOutput = vmsvga3dBackDXDefineStreamOutput;
5353	p->pfnDXDestroyStreamOutput = vmsvga3dBackDXDestroyStreamOutput;
5354	p->pfnDXSetStreamOutput = vmsvga3dBackDXSetStreamOutput;
5355	p->pfnDXSetCOTable = vmsvga3dBackDXSetCOTable;
5356	p->pfnDXReadbackCOTable = vmsvga3dBackDXReadbackCOTable;
5357	p->pfnDXBufferCopy = vmsvga3dBackDXBufferCopy;
5358	p->pfnDXTransferFromBuffer = vmsvga3dBackDXTransferFromBuffer;
5359	p->pfnDXSurfaceCopyAndReadback = vmsvga3dBackDXSurfaceCopyAndReadback;
5360	p->pfnDXMoveQuery = vmsvga3dBackDXMoveQuery;
5361	p->pfnDXBindAllQuery = vmsvga3dBackDXBindAllQuery;
5362	p->pfnDXReadbackAllQuery = vmsvga3dBackDXReadbackAllQuery;
5363	p->pfnDXPredTransferFromBuffer = vmsvga3dBackDXPredTransferFromBuffer;
5364	p->pfnDXMobFence64 = vmsvga3dBackDXMobFence64;
5365	p->pfnDXBindAllShader = vmsvga3dBackDXBindAllShader;
5366	p->pfnDXHint = vmsvga3dBackDXHint;
5367	p->pfnDXBufferUpdate = vmsvga3dBackDXBufferUpdate;
5368	p->pfnDXSetVSConstantBufferOffset = vmsvga3dBackDXSetVSConstantBufferOffset;
5369	p->pfnDXSetPSConstantBufferOffset = vmsvga3dBackDXSetPSConstantBufferOffset;
5370	p->pfnDXSetGSConstantBufferOffset = vmsvga3dBackDXSetGSConstantBufferOffset;
5371	p->pfnDXSetHSConstantBufferOffset = vmsvga3dBackDXSetHSConstantBufferOffset;
5372	p->pfnDXSetDSConstantBufferOffset = vmsvga3dBackDXSetDSConstantBufferOffset;
5373	p->pfnDXSetCSConstantBufferOffset = vmsvga3dBackDXSetCSConstantBufferOffset;
5374	p->pfnDXCondBindAllShader = vmsvga3dBackDXCondBindAllShader;
5375	p->pfnScreenCopy = vmsvga3dBackScreenCopy;
5376	p->pfnGrowOTable = vmsvga3dBackGrowOTable;
5377	p->pfnDXGrowCOTable = vmsvga3dBackDXGrowCOTable;
5378	p->pfnIntraSurfaceCopy = vmsvga3dBackIntraSurfaceCopy;
5379	p->pfnDefineGBSurface_v3 = vmsvga3dBackDefineGBSurface_v3;
5380	p->pfnDXResolveCopy = vmsvga3dBackDXResolveCopy;
5381	p->pfnDXPredResolveCopy = vmsvga3dBackDXPredResolveCopy;
5382	p->pfnDXPredConvertRegion = vmsvga3dBackDXPredConvertRegion;
5383	p->pfnDXPredConvert = vmsvga3dBackDXPredConvert;
5384	p->pfnWholeSurfaceCopy = vmsvga3dBackWholeSurfaceCopy;
5385	p->pfnDXDefineUAView = vmsvga3dBackDXDefineUAView;
5386	p->pfnDXDestroyUAView = vmsvga3dBackDXDestroyUAView;
5387	p->pfnDXClearUAViewUint = vmsvga3dBackDXClearUAViewUint;
5388	p->pfnDXClearUAViewFloat = vmsvga3dBackDXClearUAViewFloat;
5389	p->pfnDXCopyStructureCount = vmsvga3dBackDXCopyStructureCount;
5390	p->pfnDXSetUAViews = vmsvga3dBackDXSetUAViews;
5391	p->pfnDXDrawIndexedInstancedIndirect = vmsvga3dBackDXDrawIndexedInstancedIndirect;
5392	p->pfnDXDrawInstancedIndirect = vmsvga3dBackDXDrawInstancedIndirect;
5393	p->pfnDXDispatch = vmsvga3dBackDXDispatch;
5394	p->pfnDXDispatchIndirect = vmsvga3dBackDXDispatchIndirect;
5395	p->pfnWriteZeroSurface = vmsvga3dBackWriteZeroSurface;
5396	p->pfnHintZeroSurface = vmsvga3dBackHintZeroSurface;
5397	p->pfnDXTransferToBuffer = vmsvga3dBackDXTransferToBuffer;
5398	p->pfnDXSetStructureCount = vmsvga3dBackDXSetStructureCount;
5399	p->pfnLogicOpsBitBlt = vmsvga3dBackLogicOpsBitBlt;
5400	p->pfnLogicOpsTransBlt = vmsvga3dBackLogicOpsTransBlt;
5401	p->pfnLogicOpsStretchBlt = vmsvga3dBackLogicOpsStretchBlt;
5402	p->pfnLogicOpsColorFill = vmsvga3dBackLogicOpsColorFill;
5403	p->pfnLogicOpsAlphaBlend = vmsvga3dBackLogicOpsAlphaBlend;
5404	p->pfnLogicOpsClearTypeBlend = vmsvga3dBackLogicOpsClearTypeBlend;
5405	p->pfnDefineGBSurface_v4 = vmsvga3dBackDefineGBSurface_v4;
5406	p->pfnDXSetCSUAViews = vmsvga3dBackDXSetCSUAViews;
5407	p->pfnDXSetMinLOD = vmsvga3dBackDXSetMinLOD;
5408	p->pfnDXDefineStreamOutputWithMob = vmsvga3dBackDXDefineStreamOutputWithMob;
5409	p->pfnDXSetShaderIface = vmsvga3dBackDXSetShaderIface;
5410	p->pfnDXBindStreamOutput = vmsvga3dBackDXBindStreamOutput;
5411	p->pfnSurfaceStretchBltNonMSToMS = vmsvga3dBackSurfaceStretchBltNonMSToMS;
5412	p->pfnDXBindShaderIface = vmsvga3dBackDXBindShaderIface;
5413	}
5414	}
5415	else
5416	{
5417	AssertFailed();
5418	rc = VERR_INVALID_PARAMETER;
5419	}
5420	}
5421	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_MAP) == 0)
5422	{
5423	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSMAP))
5424	{
5425	if (pvInterfaceFuncs)
5426	{
5427	VMSVGA3DBACKENDFUNCSMAP p = (VMSVGA3DBACKENDFUNCSMAP )pvInterfaceFuncs;
5428	p->pfnSurfaceMap = vmsvga3dSurfaceMap;
5429	p->pfnSurfaceUnmap = vmsvga3dSurfaceUnmap;
5430	}
5431	}
5432	else
5433	{
5434	AssertFailed();
5435	rc = VERR_INVALID_PARAMETER;
5436	}
5437	}
5438	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_GBO) == 0)
5439	{
5440	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSGBO))
5441	{
5442	if (pvInterfaceFuncs)
5443	{
5444	VMSVGA3DBACKENDFUNCSGBO p = (VMSVGA3DBACKENDFUNCSGBO )pvInterfaceFuncs;
5445	p->pfnScreenTargetBind = vmsvga3dScreenTargetBind;
5446	p->pfnScreenTargetUpdate = vmsvga3dScreenTargetUpdate;
5447	}
5448	}
5449	else
5450	{
5451	AssertFailed();
5452	rc = VERR_INVALID_PARAMETER;
5453	}
5454	}
5455	else
5456	rc = VERR_NOT_IMPLEMENTED;
5457	return rc;
5458	}

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-win-dx.cpp@ 88830

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