VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx.cpp@ 94106

最後變更 在這個檔案從94106是 94106,由 vboxsync 提交於 3 年 前

Devices/Graphics: more for single device mode: bugref:9830

  • 屬性 svn:eol-style 設為 native
  • 屬性 svn:keywords 設為 Author Date Id Revision
檔案大小: 118.5 KB
 
1/* $Id: DevVGA-SVGA3d-dx.cpp 94106 2022-03-07 10:45:58Z vboxsync $ */
2/** @file
3 * DevSVGA3d - VMWare SVGA device, 3D parts - Common code for DX backend interface.
4 */
5
6/*
7 * Copyright (C) 2020-2022 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.alldomusa.eu.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <iprt/errcore.h>
25#include <VBox/log.h>
26#include <VBox/vmm/pdmdev.h>
27
28#include <iprt/assert.h>
29#include <iprt/mem.h>
30
31#include <VBoxVideo.h> /* required by DevVGA.h */
32
33/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
34#include "DevVGA.h"
35
36#include "DevVGA-SVGA.h"
37#include "DevVGA-SVGA3d.h"
38#include "DevVGA-SVGA3d-internal.h"
39#include "DevVGA-SVGA-internal.h"
40
41
42/*
43 *
44 * 3D backend entry points. These functions are used from vmsvga3dDXSwitchContext and command handlers.
45 *
46 */
47
48static int dxSetShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
49 SVGA3dShaderType shaderType, SVGA3dShaderId shaderId)
50{
51 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
52
53 PVMSVGA3DSHADER pShader;
54 if (shaderId != SVGA_ID_INVALID)
55 {
56 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
57 ASSERT_GUEST_RETURN(pEntry->type == shaderType, VERR_INVALID_PARAMETER);
58 RT_UNTRUSTED_VALIDATED_FENCE();
59
60 pShader = &pDXContext->paShader[shaderId];
61 }
62 else
63 pShader = NULL;
64
65 return pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, shaderType, pShader);
66}
67
68
69/*
70 *
71 * Command handlers.
72 *
73 */
74
75int vmsvga3dDXUnbindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
76{
77 int rc;
78 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
79 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
80 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
81 AssertReturn(p3dState, VERR_INVALID_STATE);
82
83 PVMSVGA3DDXCONTEXT pDXContext;
84 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
85 AssertRCReturn(rc, rc);
86
87 /* Copy the host structure back to the guest memory. */
88 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
89
90 return rc;
91}
92
93
94int vmsvga3dDXSwitchContext(PVGASTATECC pThisCC, uint32_t cid)
95{
96 int rc;
97 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
98 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSwitchContext, VERR_INVALID_STATE);
99 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
100 AssertReturn(p3dState, VERR_INVALID_STATE);
101
102 PVMSVGA3DDXCONTEXT pDXContext;
103 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
104 AssertRCReturn(rc, rc);
105
106 /* Notify the host backend that context is about to be switched. */
107 rc = pSvgaR3State->pFuncsDX->pfnDXSwitchContext(pThisCC, pDXContext);
108 if (rc == VINF_NOT_IMPLEMENTED || RT_FAILURE(rc))
109 return rc;
110
111 /** @todo Keep track of changes in the pipeline and apply only modified state. */
112 #define DX_STATE_VS 0x00000001
113 #define DX_STATE_PS 0x00000002
114 #define DX_STATE_SAMPLERS 0x00000004
115 #define DX_STATE_INPUTLAYOUT 0x00000008
116 #define DX_STATE_TOPOLOGY 0x00000010
117 #define DX_STATE_VERTEXBUFFER 0x00000020
118 #define DX_STATE_INDEXBUFFER 0x00000040
119 #define DX_STATE_BLENDSTATE 0x00000080
120 #define DX_STATE_DEPTHSTENCILSTATE 0x00000100
121 #define DX_STATE_SOTARGETS 0x00000200
122 #define DX_STATE_VIEWPORTS 0x00000400
123 #define DX_STATE_SCISSORRECTS 0x00000800
124 uint32_t u32TrackedState = 0
125 | DX_STATE_VS
126 | DX_STATE_PS
127 | DX_STATE_SAMPLERS
128 | DX_STATE_INPUTLAYOUT
129 | DX_STATE_TOPOLOGY
130 | DX_STATE_VERTEXBUFFER
131 | DX_STATE_INDEXBUFFER
132 | DX_STATE_BLENDSTATE
133 | DX_STATE_DEPTHSTENCILSTATE
134 | DX_STATE_SOTARGETS
135 | DX_STATE_VIEWPORTS
136 | DX_STATE_SCISSORRECTS
137 ;
138
139 if (u32TrackedState & DX_STATE_VS)
140 {
141 u32TrackedState &= ~DX_STATE_VS;
142
143 SVGA3dShaderType const shaderType = SVGA3D_SHADERTYPE_VS;
144
145 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
146 SVGA3dShaderId shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
147
148 rc = dxSetShader(pThisCC, pDXContext, shaderType, shaderId);
149 AssertRC(rc);
150 }
151
152 if (u32TrackedState & DX_STATE_PS)
153 {
154 u32TrackedState &= ~DX_STATE_PS;
155
156 SVGA3dShaderType const shaderType = SVGA3D_SHADERTYPE_PS;
157
158 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
159 SVGA3dShaderId shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
160
161 rc = dxSetShader(pThisCC, pDXContext, shaderType, shaderId);
162 AssertRC(rc);
163 }
164
165 if (u32TrackedState & DX_STATE_SAMPLERS)
166 {
167 u32TrackedState &= ~DX_STATE_SAMPLERS;
168
169 for (int i = SVGA3D_SHADERTYPE_MIN; i < SVGA3D_SHADERTYPE_DX10_MAX; ++i) /** @todo SVGA3D_SHADERTYPE_MAX */
170 {
171 SVGA3dShaderType const shaderType = (SVGA3dShaderType)i;
172 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
173
174 uint32_t startSampler = 0;
175 uint32_t cSamplerId = SVGA3D_DX_MAX_SAMPLERS;
176 SVGA3dSamplerId *paSamplerId = &pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[0];
177
178 rc = pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC, pDXContext, startSampler, shaderType, cSamplerId, paSamplerId);
179 AssertRC(rc);
180 }
181 }
182
183
184 if (u32TrackedState & DX_STATE_INPUTLAYOUT)
185 {
186 u32TrackedState &= ~DX_STATE_INPUTLAYOUT;
187
188 SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
189
190 rc = pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC, pDXContext, elementLayoutId);
191 AssertRC(rc);
192 }
193
194
195 if (u32TrackedState & DX_STATE_TOPOLOGY)
196 {
197 u32TrackedState &= ~DX_STATE_TOPOLOGY;
198
199 SVGA3dPrimitiveType const topology = (SVGA3dPrimitiveType)pDXContext->svgaDXContext.inputAssembly.topology;
200
201 if (topology != SVGA3D_PRIMITIVE_INVALID)
202 rc = pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC, pDXContext, topology);
203 AssertRC(rc);
204 }
205
206
207 if (u32TrackedState & DX_STATE_VERTEXBUFFER)
208 {
209 u32TrackedState &= ~DX_STATE_VERTEXBUFFER;
210
211 /** @todo Track which vertex buffers were modified and update only the corresponding slots.
212 * 32 bits mask is enough.
213 */
214 uint32_t startBuffer = 0;
215 uint32_t cVertexBuffer = SVGA3D_DX_MAX_VERTEXBUFFERS;
216 SVGA3dVertexBuffer aVertexBuffer[SVGA3D_DX_MAX_VERTEXBUFFERS];
217 for (uint32_t i = 0; i < SVGA3D_DX_MAX_VERTEXBUFFERS; ++i)
218 {
219 aVertexBuffer[i].sid = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].bufferId;
220 aVertexBuffer[i].stride = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].stride;
221 aVertexBuffer[i].offset = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].offset;
222 }
223
224 rc = pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC, pDXContext, startBuffer, cVertexBuffer, aVertexBuffer);
225 AssertRC(rc);
226 }
227
228
229 if (u32TrackedState & DX_STATE_INDEXBUFFER)
230 {
231 u32TrackedState &= ~DX_STATE_INDEXBUFFER;
232
233 SVGA3dSurfaceId const sid = pDXContext->svgaDXContext.inputAssembly.indexBufferSid;
234 SVGA3dSurfaceFormat const format = (SVGA3dSurfaceFormat)pDXContext->svgaDXContext.inputAssembly.indexBufferFormat;
235 uint32_t const offset = pDXContext->svgaDXContext.inputAssembly.indexBufferOffset;
236
237 rc = pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC, pDXContext, sid, format, offset);
238 AssertRC(rc);
239 }
240
241
242 if (u32TrackedState & DX_STATE_BLENDSTATE)
243 {
244 u32TrackedState &= ~DX_STATE_BLENDSTATE;
245
246 SVGA3dBlendStateId const blendId = pDXContext->svgaDXContext.renderState.blendStateId;
247 /* SVGADXContextMobFormat uses uint32_t array to store the blend factors, however they are in fact 32 bit floats. */
248 float const *paBlendFactor = (float *)&pDXContext->svgaDXContext.renderState.blendFactor[0];
249 uint32_t const sampleMask = pDXContext->svgaDXContext.renderState.sampleMask;
250
251 rc = pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC, pDXContext, blendId, paBlendFactor, sampleMask);
252 AssertRC(rc);
253 }
254
255
256 if (u32TrackedState & DX_STATE_DEPTHSTENCILSTATE)
257 {
258 u32TrackedState &= ~DX_STATE_DEPTHSTENCILSTATE;
259
260 SVGA3dDepthStencilStateId const depthStencilId = pDXContext->svgaDXContext.renderState.depthStencilStateId;
261 uint32_t const stencilRef = pDXContext->svgaDXContext.renderState.stencilRef;
262
263 rc = pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC, pDXContext, depthStencilId, stencilRef);
264 AssertRC(rc);
265 }
266
267
268 if (u32TrackedState & DX_STATE_SOTARGETS)
269 {
270 u32TrackedState &= ~DX_STATE_SOTARGETS;
271
272 uint32_t cSoTarget = SVGA3D_DX_MAX_SOTARGETS;
273 SVGA3dSoTarget aSoTarget[SVGA3D_DX_MAX_SOTARGETS];
274 for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
275 {
276 aSoTarget[i].sid = pDXContext->svgaDXContext.streamOut.targets[i];
277 /** @todo Offset is not stored in svgaDXContext. Should it be stored elsewhere by the host? */
278 aSoTarget[i].offset = 0;
279 aSoTarget[i].sizeInBytes = 0;
280 }
281
282 rc = pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC, pDXContext, cSoTarget, aSoTarget);
283 AssertRC(rc);
284 }
285
286
287 if (u32TrackedState & DX_STATE_VIEWPORTS)
288 {
289 u32TrackedState &= ~DX_STATE_VIEWPORTS;
290
291 uint32_t const cViewport = pDXContext->svgaDXContext.numViewports;
292 SVGA3dViewport const *paViewport = &pDXContext->svgaDXContext.viewports[0];
293
294 rc = pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC, pDXContext, cViewport, paViewport);
295 AssertRC(rc);
296 }
297
298
299 if (u32TrackedState & DX_STATE_SCISSORRECTS)
300 {
301 u32TrackedState &= ~DX_STATE_SCISSORRECTS;
302
303 uint32_t const cRect = pDXContext->svgaDXContext.numScissorRects;
304 SVGASignedRect const *paRect = &pDXContext->svgaDXContext.scissorRects[0];
305
306 rc = pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC, pDXContext, cRect, paRect);
307 AssertRC(rc);
308 }
309
310 Assert(u32TrackedState == 0);
311
312 return rc;
313}
314
315
316/**
317 * Create a new 3D DX context.
318 *
319 * @returns VBox status code.
320 * @param pThisCC The VGA/VMSVGA state for ring-3.
321 * @param cid Context id to be created.
322 */
323int vmsvga3dDXDefineContext(PVGASTATECC pThisCC, uint32_t cid)
324{
325 int rc;
326 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
327 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineContext, VERR_INVALID_STATE);
328 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
329 AssertReturn(p3dState, VERR_INVALID_STATE);
330
331 PVMSVGA3DDXCONTEXT pDXContext;
332
333 LogFunc(("cid %d\n", cid));
334
335 AssertReturn(cid < SVGA3D_MAX_CONTEXT_IDS, VERR_INVALID_PARAMETER);
336
337 if (cid >= p3dState->cDXContexts)
338 {
339 /* Grow the array. */
340 uint32_t cNew = RT_ALIGN(cid + 15, 16);
341 void *pvNew = RTMemRealloc(p3dState->papDXContexts, sizeof(p3dState->papDXContexts[0]) * cNew);
342 AssertReturn(pvNew, VERR_NO_MEMORY);
343 p3dState->papDXContexts = (PVMSVGA3DDXCONTEXT *)pvNew;
344 while (p3dState->cDXContexts < cNew)
345 {
346 pDXContext = (PVMSVGA3DDXCONTEXT)RTMemAllocZ(sizeof(*pDXContext));
347 AssertReturn(pDXContext, VERR_NO_MEMORY);
348 pDXContext->cid = SVGA3D_INVALID_ID;
349 p3dState->papDXContexts[p3dState->cDXContexts++] = pDXContext;
350 }
351 }
352 /* If one already exists with this id, then destroy it now. */
353 if (p3dState->papDXContexts[cid]->cid != SVGA3D_INVALID_ID)
354 vmsvga3dDXDestroyContext(pThisCC, cid);
355
356 pDXContext = p3dState->papDXContexts[cid];
357 memset(pDXContext, 0, sizeof(*pDXContext));
358
359 /* 0xFFFFFFFF (SVGA_ID_INVALID) is a better initial value than 0 for most of svgaDXContext fields. */
360 memset(&pDXContext->svgaDXContext, 0xFF, sizeof(pDXContext->svgaDXContext));
361 pDXContext->svgaDXContext.inputAssembly.topology = SVGA3D_PRIMITIVE_INVALID;
362 pDXContext->svgaDXContext.numViewports = 0;
363 pDXContext->svgaDXContext.numScissorRects = 0;
364 pDXContext->cid = cid;
365
366 /* Init the backend specific data. */
367 rc = pSvgaR3State->pFuncsDX->pfnDXDefineContext(pThisCC, pDXContext);
368
369 /* Cleanup on failure. */
370 if (RT_FAILURE(rc))
371 vmsvga3dDXDestroyContext(pThisCC, cid);
372
373 return rc;
374}
375
376
377int vmsvga3dDXDestroyContext(PVGASTATECC pThisCC, uint32_t cid)
378{
379 int rc;
380 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
381 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyContext, VERR_INVALID_STATE);
382 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
383 AssertReturn(p3dState, VERR_INVALID_STATE);
384
385 PVMSVGA3DDXCONTEXT pDXContext;
386 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
387 AssertRCReturn(rc, rc);
388
389 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyContext(pThisCC, pDXContext);
390 return rc;
391}
392
393
394int vmsvga3dDXBindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
395{
396 int rc;
397 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
398 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
399 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
400 AssertReturn(p3dState, VERR_INVALID_STATE);
401
402 PVMSVGA3DDXCONTEXT pDXContext;
403 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
404 AssertRCReturn(rc, rc);
405
406 if (pSvgaDXContext)
407 memcpy(&pDXContext->svgaDXContext, pSvgaDXContext, sizeof(*pSvgaDXContext));
408
409 rc = pSvgaR3State->pFuncsDX->pfnDXBindContext(pThisCC, pDXContext);
410 return rc;
411}
412
413
414int vmsvga3dDXReadbackContext(PVGASTATECC pThisCC, uint32_t idDXContext, SVGADXContextMobFormat *pSvgaDXContext)
415{
416 int rc;
417 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
418 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackContext, VERR_INVALID_STATE);
419 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
420 AssertReturn(p3dState, VERR_INVALID_STATE);
421
422 PVMSVGA3DDXCONTEXT pDXContext;
423 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
424 AssertRCReturn(rc, rc);
425
426 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackContext(pThisCC, pDXContext);
427 if (RT_SUCCESS(rc))
428 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
429 return rc;
430}
431
432
433int vmsvga3dDXInvalidateContext(PVGASTATECC pThisCC, uint32_t idDXContext)
434{
435 int rc;
436 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
437 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXInvalidateContext, VERR_INVALID_STATE);
438 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
439 AssertReturn(p3dState, VERR_INVALID_STATE);
440
441 PVMSVGA3DDXCONTEXT pDXContext;
442 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
443 AssertRCReturn(rc, rc);
444
445 rc = pSvgaR3State->pFuncsDX->pfnDXInvalidateContext(pThisCC, pDXContext);
446 return rc;
447}
448
449
450int vmsvga3dDXSetSingleConstantBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSingleConstantBuffer const *pCmd)
451{
452 int rc;
453 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
454 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer, VERR_INVALID_STATE);
455 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
456 AssertReturn(p3dState, VERR_INVALID_STATE);
457
458 PVMSVGA3DDXCONTEXT pDXContext;
459 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
460 AssertRCReturn(rc, rc);
461
462 ASSERT_GUEST_RETURN(pCmd->slot < SVGA3D_DX_MAX_CONSTBUFFERS, VERR_INVALID_PARAMETER);
463 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
464 RT_UNTRUSTED_VALIDATED_FENCE();
465
466 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
467 SVGA3dConstantBufferBinding *pCBB = &pDXContext->svgaDXContext.shaderState[idxShaderState].constantBuffers[pCmd->slot];
468 pCBB->sid = pCmd->sid;
469 pCBB->offsetInBytes = pCmd->offsetInBytes;
470 pCBB->sizeInBytes = pCmd->sizeInBytes;
471
472 rc = pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC, pDXContext, pCmd->slot, pCmd->type, pCmd->sid, pCmd->offsetInBytes, pCmd->sizeInBytes);
473 return rc;
474}
475
476
477int vmsvga3dDXSetShaderResources(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShaderResources const *pCmd, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
478{
479 int rc;
480 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
481 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderResources, VERR_INVALID_STATE);
482 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
483 AssertReturn(p3dState, VERR_INVALID_STATE);
484
485 PVMSVGA3DDXCONTEXT pDXContext;
486 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
487 AssertRCReturn(rc, rc);
488
489 ASSERT_GUEST_RETURN(pCmd->startView < SVGA3D_DX_MAX_SRVIEWS, VERR_INVALID_PARAMETER);
490 ASSERT_GUEST_RETURN(cShaderResourceViewId <= SVGA3D_DX_MAX_SRVIEWS - pCmd->startView, VERR_INVALID_PARAMETER);
491 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
492 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
493 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
494 ASSERT_GUEST_RETURN( paShaderResourceViewId[i] < pDXContext->cot.cSRView
495 || paShaderResourceViewId[i] == SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
496 RT_UNTRUSTED_VALIDATED_FENCE();
497
498 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
499 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
500 {
501 SVGA3dShaderResourceViewId const shaderResourceViewId = paShaderResourceViewId[i];
502 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[pCmd->startView + i] = shaderResourceViewId;
503 }
504
505 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderResources(pThisCC, pDXContext, pCmd->startView, pCmd->type, cShaderResourceViewId, paShaderResourceViewId);
506 return rc;
507}
508
509
510int vmsvga3dDXSetShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShader const *pCmd)
511{
512 int rc;
513 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
514 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShader, VERR_INVALID_STATE);
515 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
516 AssertReturn(p3dState, VERR_INVALID_STATE);
517
518 PVMSVGA3DDXCONTEXT pDXContext;
519 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
520 AssertRCReturn(rc, rc);
521
522 ASSERT_GUEST_RETURN( pCmd->shaderId < pDXContext->cot.cShader
523 || pCmd->shaderId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
524 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
525 RT_UNTRUSTED_VALIDATED_FENCE();
526
527 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
528 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId = pCmd->shaderId;
529
530 rc = dxSetShader(pThisCC, pDXContext, pCmd->type, pCmd->shaderId);
531 return rc;
532}
533
534
535int vmsvga3dDXSetSamplers(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSamplers const *pCmd, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
536{
537 int rc;
538 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
539 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSamplers, VERR_INVALID_STATE);
540 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
541 AssertReturn(p3dState, VERR_INVALID_STATE);
542
543 PVMSVGA3DDXCONTEXT pDXContext;
544 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
545 AssertRCReturn(rc, rc);
546
547 ASSERT_GUEST_RETURN(pCmd->startSampler < SVGA3D_DX_MAX_SAMPLERS, VERR_INVALID_PARAMETER);
548 ASSERT_GUEST_RETURN(cSamplerId <= SVGA3D_DX_MAX_SAMPLERS - pCmd->startSampler, VERR_INVALID_PARAMETER);
549 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
550 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
551 RT_UNTRUSTED_VALIDATED_FENCE();
552
553 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
554 for (uint32_t i = 0; i < cSamplerId; ++i)
555 {
556 SVGA3dSamplerId const samplerId = paSamplerId[i];
557 ASSERT_GUEST_RETURN( samplerId < pDXContext->cot.cSampler
558 || samplerId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
559 pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[pCmd->startSampler + i] = samplerId;
560 }
561 RT_UNTRUSTED_VALIDATED_FENCE();
562
563 rc = pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC, pDXContext, pCmd->startSampler, pCmd->type, cSamplerId, paSamplerId);
564 return rc;
565}
566
567
568int vmsvga3dDXDraw(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDraw const *pCmd)
569{
570 int rc;
571 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
572 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDraw, VERR_INVALID_STATE);
573 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
574 AssertReturn(p3dState, VERR_INVALID_STATE);
575
576 PVMSVGA3DDXCONTEXT pDXContext;
577 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
578 AssertRCReturn(rc, rc);
579
580 rc = pSvgaR3State->pFuncsDX->pfnDXDraw(pThisCC, pDXContext, pCmd->vertexCount, pCmd->startVertexLocation);
581#ifdef DUMP_BITMAPS
582 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[0]];
583 SVGA3dSurfaceImageId image;
584 image.sid = pRTViewEntry->sid;
585 image.face = 0;
586 image.mipmap = 0;
587 VMSVGA3D_MAPPED_SURFACE map;
588 int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
589 if (RT_SUCCESS(rc2))
590 {
591 vmsvga3dMapWriteBmpFile(&map, "rt-");
592 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
593 }
594#endif
595 return rc;
596}
597
598
599int vmsvga3dDXDrawIndexed(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexed const *pCmd)
600{
601 int rc;
602 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
603 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexed, VERR_INVALID_STATE);
604 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
605 AssertReturn(p3dState, VERR_INVALID_STATE);
606
607 PVMSVGA3DDXCONTEXT pDXContext;
608 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
609 AssertRCReturn(rc, rc);
610
611 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexed(pThisCC, pDXContext, pCmd->indexCount, pCmd->startIndexLocation, pCmd->baseVertexLocation);
612#ifdef DUMP_BITMAPS
613 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[0]];
614 SVGA3dSurfaceImageId image;
615 image.sid = pRTViewEntry->sid;
616 image.face = 0;
617 image.mipmap = 0;
618 VMSVGA3D_MAPPED_SURFACE map;
619 int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
620 if (RT_SUCCESS(rc2))
621 {
622 vmsvga3dMapWriteBmpFile(&map, "rt-");
623 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
624 }
625#endif
626 return rc;
627}
628
629
630int vmsvga3dDXDrawInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawInstanced const *pCmd)
631{
632 int rc;
633 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
634 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstanced, VERR_INVALID_STATE);
635 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
636 AssertReturn(p3dState, VERR_INVALID_STATE);
637
638 PVMSVGA3DDXCONTEXT pDXContext;
639 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
640 AssertRCReturn(rc, rc);
641
642 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstanced(pThisCC, pDXContext,
643 pCmd->vertexCountPerInstance, pCmd->instanceCount, pCmd->startVertexLocation, pCmd->startInstanceLocation);
644#ifdef DUMP_BITMAPS
645 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[0]];
646 SVGA3dSurfaceImageId image;
647 image.sid = pRTViewEntry->sid;
648 image.face = 0;
649 image.mipmap = 0;
650 VMSVGA3D_MAPPED_SURFACE map;
651 int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
652 if (RT_SUCCESS(rc2))
653 {
654 vmsvga3dMapWriteBmpFile(&map, "rt-");
655 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
656 }
657#endif
658 return rc;
659}
660
661
662int vmsvga3dDXDrawIndexedInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexedInstanced const *pCmd)
663{
664 int rc;
665 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
666 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced, VERR_INVALID_STATE);
667 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
668 AssertReturn(p3dState, VERR_INVALID_STATE);
669
670 PVMSVGA3DDXCONTEXT pDXContext;
671 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
672 AssertRCReturn(rc, rc);
673
674 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced(pThisCC, pDXContext,
675 pCmd->indexCountPerInstance, pCmd->instanceCount, pCmd->startIndexLocation, pCmd->baseVertexLocation, pCmd->startInstanceLocation);
676#ifdef DUMP_BITMAPS
677 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[0]];
678 SVGA3dSurfaceImageId image;
679 image.sid = pRTViewEntry->sid;
680 image.face = 0;
681 image.mipmap = 0;
682 VMSVGA3D_MAPPED_SURFACE map;
683 int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
684 if (RT_SUCCESS(rc2))
685 {
686 vmsvga3dMapWriteBmpFile(&map, "rt-");
687 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
688 }
689#endif
690 return rc;
691}
692
693
694int vmsvga3dDXDrawAuto(PVGASTATECC pThisCC, uint32_t idDXContext)
695{
696 int rc;
697 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
698 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawAuto, VERR_INVALID_STATE);
699 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
700 AssertReturn(p3dState, VERR_INVALID_STATE);
701
702 PVMSVGA3DDXCONTEXT pDXContext;
703 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
704 AssertRCReturn(rc, rc);
705
706 rc = pSvgaR3State->pFuncsDX->pfnDXDrawAuto(pThisCC, pDXContext);
707#ifdef DUMP_BITMAPS
708 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[0]];
709 SVGA3dSurfaceImageId image;
710 image.sid = pRTViewEntry->sid;
711 image.face = 0;
712 image.mipmap = 0;
713 VMSVGA3D_MAPPED_SURFACE map;
714 int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
715 if (RT_SUCCESS(rc2))
716 {
717 vmsvga3dMapWriteBmpFile(&map, "rt-");
718 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
719 }
720#endif
721 return rc;
722}
723
724
725int vmsvga3dDXSetInputLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId)
726{
727 int rc;
728 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
729 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetInputLayout, VERR_INVALID_STATE);
730 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
731 AssertReturn(p3dState, VERR_INVALID_STATE);
732
733 PVMSVGA3DDXCONTEXT pDXContext;
734 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
735 AssertRCReturn(rc, rc);
736
737 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
738 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
739 RT_UNTRUSTED_VALIDATED_FENCE();
740
741 pDXContext->svgaDXContext.inputAssembly.layoutId = elementLayoutId;
742
743 rc = pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC, pDXContext, elementLayoutId);
744 return rc;
745}
746
747
748int vmsvga3dDXSetVertexBuffers(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
749{
750 int rc;
751 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
752 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers, VERR_INVALID_STATE);
753 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
754 AssertReturn(p3dState, VERR_INVALID_STATE);
755
756 PVMSVGA3DDXCONTEXT pDXContext;
757 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
758 AssertRCReturn(rc, rc);
759
760 ASSERT_GUEST_RETURN(startBuffer < SVGA3D_DX_MAX_VERTEXBUFFERS, VERR_INVALID_PARAMETER);
761 ASSERT_GUEST_RETURN(cVertexBuffer <= SVGA3D_DX_MAX_VERTEXBUFFERS - startBuffer, VERR_INVALID_PARAMETER);
762 RT_UNTRUSTED_VALIDATED_FENCE();
763
764 for (uint32_t i = 0; i < cVertexBuffer; ++i)
765 {
766 uint32_t const idxVertexBuffer = startBuffer + i;
767
768 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].bufferId = paVertexBuffer[i].sid;
769 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].stride = paVertexBuffer[i].stride;
770 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].offset = paVertexBuffer[i].offset;
771 }
772
773 rc = pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC, pDXContext, startBuffer, cVertexBuffer, paVertexBuffer);
774 return rc;
775}
776
777
778int vmsvga3dDXSetIndexBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetIndexBuffer const *pCmd)
779{
780 int rc;
781 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
782 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer, VERR_INVALID_STATE);
783 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
784 AssertReturn(p3dState, VERR_INVALID_STATE);
785
786 PVMSVGA3DDXCONTEXT pDXContext;
787 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
788 AssertRCReturn(rc, rc);
789
790 pDXContext->svgaDXContext.inputAssembly.indexBufferSid = pCmd->sid;
791 pDXContext->svgaDXContext.inputAssembly.indexBufferOffset = pCmd->offset;
792 pDXContext->svgaDXContext.inputAssembly.indexBufferFormat = pCmd->format;
793
794 rc = pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC, pDXContext, pCmd->sid, pCmd->format, pCmd->offset);
795 return rc;
796}
797
798
799int vmsvga3dDXSetTopology(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dPrimitiveType topology)
800{
801 int rc;
802 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
803 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetTopology, VERR_INVALID_STATE);
804 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
805 AssertReturn(p3dState, VERR_INVALID_STATE);
806
807 PVMSVGA3DDXCONTEXT pDXContext;
808 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
809 AssertRCReturn(rc, rc);
810
811 ASSERT_GUEST_RETURN(topology >= SVGA3D_PRIMITIVE_MIN && topology < SVGA3D_PRIMITIVE_MAX, VERR_INVALID_PARAMETER);
812
813 pDXContext->svgaDXContext.inputAssembly.topology = topology;
814
815 rc = pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC, pDXContext, topology);
816 return rc;
817}
818
819
820int vmsvga3dDXSetRenderTargets(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
821{
822 int rc;
823 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
824 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets, VERR_INVALID_STATE);
825 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
826 AssertReturn(p3dState, VERR_INVALID_STATE);
827
828 PVMSVGA3DDXCONTEXT pDXContext;
829 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
830 AssertRCReturn(rc, rc);
831
832 ASSERT_GUEST_RETURN( depthStencilViewId < pDXContext->cot.cDSView
833 || depthStencilViewId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
834 ASSERT_GUEST_RETURN(cRenderTargetViewId < SVGA3D_MAX_RENDER_TARGETS, VERR_INVALID_PARAMETER);
835 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
836 ASSERT_GUEST_RETURN( paRenderTargetViewId[i] < pDXContext->cot.cRTView
837 || paRenderTargetViewId[i] == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
838 RT_UNTRUSTED_VALIDATED_FENCE();
839
840 pDXContext->svgaDXContext.renderState.depthStencilViewId = depthStencilViewId;
841 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
842 pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = paRenderTargetViewId[i];
843
844 rc = pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets(pThisCC, pDXContext, depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
845 return rc;
846}
847
848
849int vmsvga3dDXSetBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetBlendState const *pCmd)
850{
851 int rc;
852 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
853 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetBlendState, VERR_INVALID_STATE);
854 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
855 AssertReturn(p3dState, VERR_INVALID_STATE);
856
857 PVMSVGA3DDXCONTEXT pDXContext;
858 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
859 AssertRCReturn(rc, rc);
860
861 SVGA3dBlendStateId const blendId = pCmd->blendId;
862
863 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
864 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
865 RT_UNTRUSTED_VALIDATED_FENCE();
866
867 pDXContext->svgaDXContext.renderState.blendStateId = blendId;
868 /* SVGADXContextMobFormat uses uint32_t array to store the blend factors, however they are in fact 32 bit floats. */
869 memcpy(pDXContext->svgaDXContext.renderState.blendFactor, pCmd->blendFactor, sizeof(pDXContext->svgaDXContext.renderState.blendFactor));
870 pDXContext->svgaDXContext.renderState.sampleMask = pCmd->sampleMask;
871
872 rc = pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC, pDXContext, blendId, pCmd->blendFactor, pCmd->sampleMask);
873 return rc;
874}
875
876
877int vmsvga3dDXSetDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetDepthStencilState const *pCmd)
878{
879 int rc;
880 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
881 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState, VERR_INVALID_STATE);
882 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
883 AssertReturn(p3dState, VERR_INVALID_STATE);
884
885 PVMSVGA3DDXCONTEXT pDXContext;
886 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
887 AssertRCReturn(rc, rc);
888
889 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
890
891 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
892 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
893 RT_UNTRUSTED_VALIDATED_FENCE();
894
895 pDXContext->svgaDXContext.renderState.depthStencilStateId = depthStencilId;
896 pDXContext->svgaDXContext.renderState.stencilRef = pCmd->stencilRef;
897
898 rc = pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC, pDXContext, depthStencilId, pCmd->stencilRef);
899 return rc;
900}
901
902
903int vmsvga3dDXSetRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dRasterizerStateId rasterizerId)
904{
905 int rc;
906 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
907 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState, VERR_INVALID_STATE);
908 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
909 AssertReturn(p3dState, VERR_INVALID_STATE);
910
911 PVMSVGA3DDXCONTEXT pDXContext;
912 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
913 AssertRCReturn(rc, rc);
914
915 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
916 RT_UNTRUSTED_VALIDATED_FENCE();
917
918 rc = pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState(pThisCC, pDXContext, rasterizerId);
919 return rc;
920}
921
922
923int vmsvga3dDXDefineQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
924{
925 int rc;
926 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
927 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineQuery, VERR_INVALID_STATE);
928 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
929 AssertReturn(p3dState, VERR_INVALID_STATE);
930
931 PVMSVGA3DDXCONTEXT pDXContext;
932 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
933 AssertRCReturn(rc, rc);
934
935 rc = pSvgaR3State->pFuncsDX->pfnDXDefineQuery(pThisCC, pDXContext);
936 return rc;
937}
938
939
940int vmsvga3dDXDestroyQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
941{
942 int rc;
943 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
944 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyQuery, VERR_INVALID_STATE);
945 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
946 AssertReturn(p3dState, VERR_INVALID_STATE);
947
948 PVMSVGA3DDXCONTEXT pDXContext;
949 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
950 AssertRCReturn(rc, rc);
951
952 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyQuery(pThisCC, pDXContext);
953 return rc;
954}
955
956
957int vmsvga3dDXBindQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
958{
959 int rc;
960 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
961 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindQuery, VERR_INVALID_STATE);
962 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
963 AssertReturn(p3dState, VERR_INVALID_STATE);
964
965 PVMSVGA3DDXCONTEXT pDXContext;
966 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
967 AssertRCReturn(rc, rc);
968
969 rc = pSvgaR3State->pFuncsDX->pfnDXBindQuery(pThisCC, pDXContext);
970 return rc;
971}
972
973
974int vmsvga3dDXSetQueryOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
975{
976 int rc;
977 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
978 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetQueryOffset, VERR_INVALID_STATE);
979 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
980 AssertReturn(p3dState, VERR_INVALID_STATE);
981
982 PVMSVGA3DDXCONTEXT pDXContext;
983 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
984 AssertRCReturn(rc, rc);
985
986 rc = pSvgaR3State->pFuncsDX->pfnDXSetQueryOffset(pThisCC, pDXContext);
987 return rc;
988}
989
990
991int vmsvga3dDXBeginQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
992{
993 int rc;
994 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
995 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBeginQuery, VERR_INVALID_STATE);
996 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
997 AssertReturn(p3dState, VERR_INVALID_STATE);
998
999 PVMSVGA3DDXCONTEXT pDXContext;
1000 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1001 AssertRCReturn(rc, rc);
1002
1003 rc = pSvgaR3State->pFuncsDX->pfnDXBeginQuery(pThisCC, pDXContext);
1004 return rc;
1005}
1006
1007
1008int vmsvga3dDXEndQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
1009{
1010 int rc;
1011 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1012 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXEndQuery, VERR_INVALID_STATE);
1013 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1014 AssertReturn(p3dState, VERR_INVALID_STATE);
1015
1016 PVMSVGA3DDXCONTEXT pDXContext;
1017 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1018 AssertRCReturn(rc, rc);
1019
1020 rc = pSvgaR3State->pFuncsDX->pfnDXEndQuery(pThisCC, pDXContext);
1021 return rc;
1022}
1023
1024
1025int vmsvga3dDXReadbackQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
1026{
1027 int rc;
1028 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1029 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackQuery, VERR_INVALID_STATE);
1030 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1031 AssertReturn(p3dState, VERR_INVALID_STATE);
1032
1033 PVMSVGA3DDXCONTEXT pDXContext;
1034 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1035 AssertRCReturn(rc, rc);
1036
1037 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackQuery(pThisCC, pDXContext);
1038 return rc;
1039}
1040
1041
1042int vmsvga3dDXSetPredication(PVGASTATECC pThisCC, uint32_t idDXContext)
1043{
1044 int rc;
1045 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1046 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPredication, VERR_INVALID_STATE);
1047 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1048 AssertReturn(p3dState, VERR_INVALID_STATE);
1049
1050 PVMSVGA3DDXCONTEXT pDXContext;
1051 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1052 AssertRCReturn(rc, rc);
1053
1054 rc = pSvgaR3State->pFuncsDX->pfnDXSetPredication(pThisCC, pDXContext);
1055 return rc;
1056}
1057
1058
1059int vmsvga3dDXSetSOTargets(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cSoTarget, SVGA3dSoTarget const *paSoTarget)
1060{
1061 int rc;
1062 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1063 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSOTargets, VERR_INVALID_STATE);
1064 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1065 AssertReturn(p3dState, VERR_INVALID_STATE);
1066
1067 PVMSVGA3DDXCONTEXT pDXContext;
1068 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1069 AssertRCReturn(rc, rc);
1070
1071 ASSERT_GUEST_RETURN(cSoTarget < SVGA3D_DX_MAX_SOTARGETS, VERR_INVALID_PARAMETER);
1072 RT_UNTRUSTED_VALIDATED_FENCE();
1073
1074 /** @todo Offset is not stored in svgaDXContext. Should it be stored elsewhere? */
1075 for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
1076 pDXContext->svgaDXContext.streamOut.targets[i] = i < cSoTarget ? paSoTarget[i].sid : SVGA3D_INVALID_ID;
1077
1078 rc = pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC, pDXContext, cSoTarget, paSoTarget);
1079 return rc;
1080}
1081
1082
1083int vmsvga3dDXSetViewports(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
1084{
1085 int rc;
1086 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1087 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetViewports, VERR_INVALID_STATE);
1088 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1089 AssertReturn(p3dState, VERR_INVALID_STATE);
1090
1091 PVMSVGA3DDXCONTEXT pDXContext;
1092 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1093 AssertRCReturn(rc, rc);
1094
1095 ASSERT_GUEST_RETURN(cViewport < SVGA3D_DX_MAX_VIEWPORTS, VERR_INVALID_PARAMETER);
1096 RT_UNTRUSTED_VALIDATED_FENCE();
1097
1098 pDXContext->svgaDXContext.numViewports = (uint8_t)cViewport;
1099 for (uint32_t i = 0; i < cViewport; ++i)
1100 pDXContext->svgaDXContext.viewports[i] = paViewport[i];
1101
1102 rc = pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC, pDXContext, cViewport, paViewport);
1103 return rc;
1104}
1105
1106
1107int vmsvga3dDXSetScissorRects(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cRect, SVGASignedRect const *paRect)
1108{
1109 int rc;
1110 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1111 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetScissorRects, VERR_INVALID_STATE);
1112 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1113 AssertReturn(p3dState, VERR_INVALID_STATE);
1114
1115 PVMSVGA3DDXCONTEXT pDXContext;
1116 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1117 AssertRCReturn(rc, rc);
1118
1119 ASSERT_GUEST_RETURN(cRect < SVGA3D_DX_MAX_SCISSORRECTS, VERR_INVALID_PARAMETER);
1120 RT_UNTRUSTED_VALIDATED_FENCE();
1121
1122 pDXContext->svgaDXContext.numScissorRects = (uint8_t)cRect;
1123 for (uint32_t i = 0; i < cRect; ++i)
1124 pDXContext->svgaDXContext.scissorRects[i] = paRect[i];
1125
1126 rc = pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC, pDXContext, cRect, paRect);
1127 return rc;
1128}
1129
1130
1131int vmsvga3dDXClearRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearRenderTargetView const *pCmd)
1132{
1133 int rc;
1134 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1135 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView, VERR_INVALID_STATE);
1136 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1137 AssertReturn(p3dState, VERR_INVALID_STATE);
1138
1139 PVMSVGA3DDXCONTEXT pDXContext;
1140 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1141 AssertRCReturn(rc, rc);
1142
1143 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1144
1145 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1146 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1147 RT_UNTRUSTED_VALIDATED_FENCE();
1148
1149 rc = pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView(pThisCC, pDXContext, renderTargetViewId, &pCmd->rgba);
1150 return rc;
1151}
1152
1153
1154int vmsvga3dDXClearDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearDepthStencilView const *pCmd)
1155{
1156 int rc;
1157 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1158 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView, VERR_INVALID_STATE);
1159 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1160 AssertReturn(p3dState, VERR_INVALID_STATE);
1161
1162 PVMSVGA3DDXCONTEXT pDXContext;
1163 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1164 AssertRCReturn(rc, rc);
1165
1166 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1167
1168 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1169 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1170 RT_UNTRUSTED_VALIDATED_FENCE();
1171
1172 rc = pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView(pThisCC, pDXContext, pCmd->flags, depthStencilViewId, pCmd->depth, (uint8_t)pCmd->stencil);
1173 return rc;
1174}
1175
1176
1177int vmsvga3dDXPredCopyRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredCopyRegion const *pCmd)
1178{
1179 int rc;
1180 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1181 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion, VERR_INVALID_STATE);
1182 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1183 AssertReturn(p3dState, VERR_INVALID_STATE);
1184
1185 PVMSVGA3DDXCONTEXT pDXContext;
1186 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1187 AssertRCReturn(rc, rc);
1188
1189 /** @todo Memcpy if both resources do not have the hardware resource. */
1190
1191 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion(pThisCC, pDXContext, pCmd->dstSid, pCmd->dstSubResource, pCmd->srcSid, pCmd->srcSubResource, &pCmd->box);
1192 return rc;
1193}
1194
1195
1196int vmsvga3dDXPredCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
1197{
1198 int rc;
1199 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1200 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopy, VERR_INVALID_STATE);
1201 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1202 AssertReturn(p3dState, VERR_INVALID_STATE);
1203
1204 PVMSVGA3DDXCONTEXT pDXContext;
1205 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1206 AssertRCReturn(rc, rc);
1207
1208 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopy(pThisCC, pDXContext);
1209 return rc;
1210}
1211
1212
1213int vmsvga3dDXPresentBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
1214{
1215 int rc;
1216 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1217 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPresentBlt, VERR_INVALID_STATE);
1218 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1219 AssertReturn(p3dState, VERR_INVALID_STATE);
1220
1221 PVMSVGA3DDXCONTEXT pDXContext;
1222 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1223 AssertRCReturn(rc, rc);
1224
1225 rc = pSvgaR3State->pFuncsDX->pfnDXPresentBlt(pThisCC, pDXContext);
1226 return rc;
1227}
1228
1229
1230int vmsvga3dDXGenMips(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXGenMips const *pCmd)
1231{
1232 int rc;
1233 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1234 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGenMips, VERR_INVALID_STATE);
1235 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1236 AssertReturn(p3dState, VERR_INVALID_STATE);
1237
1238 PVMSVGA3DDXCONTEXT pDXContext;
1239 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1240 AssertRCReturn(rc, rc);
1241
1242 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1243
1244 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1245 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1246 RT_UNTRUSTED_VALIDATED_FENCE();
1247
1248 rc = pSvgaR3State->pFuncsDX->pfnDXGenMips(pThisCC, pDXContext, shaderResourceViewId);
1249 return rc;
1250}
1251
1252
1253int vmsvga3dDXDefineShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShaderResourceView const *pCmd)
1254{
1255 int rc;
1256 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1257 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView, VERR_INVALID_STATE);
1258 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1259 AssertReturn(p3dState, VERR_INVALID_STATE);
1260
1261 PVMSVGA3DDXCONTEXT pDXContext;
1262 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1263 AssertRCReturn(rc, rc);
1264
1265 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1266
1267 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1268 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1269 RT_UNTRUSTED_VALIDATED_FENCE();
1270
1271 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
1272 pEntry->sid = pCmd->sid;
1273 pEntry->format = pCmd->format;
1274 pEntry->resourceDimension = pCmd->resourceDimension;
1275 pEntry->desc = pCmd->desc;
1276
1277 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pEntry);
1278 return rc;
1279}
1280
1281
1282int vmsvga3dDXDestroyShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShaderResourceView const *pCmd)
1283{
1284 int rc;
1285 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1286 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView, VERR_INVALID_STATE);
1287 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1288 AssertReturn(p3dState, VERR_INVALID_STATE);
1289
1290 PVMSVGA3DDXCONTEXT pDXContext;
1291 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1292 AssertRCReturn(rc, rc);
1293
1294 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1295
1296 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1297 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1298 RT_UNTRUSTED_VALIDATED_FENCE();
1299
1300 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
1301 RT_ZERO(*pEntry);
1302
1303 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView(pThisCC, pDXContext, shaderResourceViewId);
1304 return rc;
1305}
1306
1307
1308int vmsvga3dDXDefineRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRenderTargetView const *pCmd)
1309{
1310 int rc;
1311 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1312 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView, VERR_INVALID_STATE);
1313 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1314 AssertReturn(p3dState, VERR_INVALID_STATE);
1315
1316 PVMSVGA3DDXCONTEXT pDXContext;
1317 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1318 AssertRCReturn(rc, rc);
1319
1320 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1321
1322 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1323 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1324 RT_UNTRUSTED_VALIDATED_FENCE();
1325
1326 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1327 pEntry->sid = pCmd->sid;
1328 pEntry->format = pCmd->format;
1329 pEntry->resourceDimension = pCmd->resourceDimension;
1330 pEntry->desc = pCmd->desc;
1331
1332 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
1333 return rc;
1334}
1335
1336
1337int vmsvga3dDXDestroyRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRenderTargetView const *pCmd)
1338{
1339 int rc;
1340 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1341 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView, VERR_INVALID_STATE);
1342 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1343 AssertReturn(p3dState, VERR_INVALID_STATE);
1344
1345 PVMSVGA3DDXCONTEXT pDXContext;
1346 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1347 AssertRCReturn(rc, rc);
1348
1349 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1350
1351 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1352 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1353 RT_UNTRUSTED_VALIDATED_FENCE();
1354
1355 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1356 RT_ZERO(*pEntry);
1357
1358 for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
1359 {
1360 if (pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] == renderTargetViewId)
1361 pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = SVGA_ID_INVALID;
1362 }
1363
1364 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView(pThisCC, pDXContext, renderTargetViewId);
1365 return rc;
1366}
1367
1368
1369int vmsvga3dDXDefineDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilView_v2 const *pCmd)
1370{
1371 int rc;
1372 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1373 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView, VERR_INVALID_STATE);
1374 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1375 AssertReturn(p3dState, VERR_INVALID_STATE);
1376
1377 PVMSVGA3DDXCONTEXT pDXContext;
1378 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1379 AssertRCReturn(rc, rc);
1380
1381 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1382
1383 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1384 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1385 RT_UNTRUSTED_VALIDATED_FENCE();
1386
1387 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1388 pEntry->sid = pCmd->sid;
1389 pEntry->format = pCmd->format;
1390 pEntry->resourceDimension = pCmd->resourceDimension;
1391 pEntry->mipSlice = pCmd->mipSlice;
1392 pEntry->firstArraySlice = pCmd->firstArraySlice;
1393 pEntry->arraySize = pCmd->arraySize;
1394 pEntry->flags = pCmd->flags;
1395
1396 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView(pThisCC, pDXContext, depthStencilViewId, pEntry);
1397 return rc;
1398}
1399
1400
1401int vmsvga3dDXDestroyDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilView const *pCmd)
1402{
1403 int rc;
1404 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1405 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView, VERR_INVALID_STATE);
1406 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1407 AssertReturn(p3dState, VERR_INVALID_STATE);
1408
1409 PVMSVGA3DDXCONTEXT pDXContext;
1410 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1411 AssertRCReturn(rc, rc);
1412
1413 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1414
1415 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1416 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1417 RT_UNTRUSTED_VALIDATED_FENCE();
1418
1419 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1420 RT_ZERO(*pEntry);
1421
1422 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView(pThisCC, pDXContext, depthStencilViewId);
1423 return rc;
1424}
1425
1426
1427int vmsvga3dDXDefineElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId, uint32_t cDesc, SVGA3dInputElementDesc const *paDesc)
1428{
1429 int rc;
1430 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1431 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout, VERR_INVALID_STATE);
1432 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1433 AssertReturn(p3dState, VERR_INVALID_STATE);
1434
1435 PVMSVGA3DDXCONTEXT pDXContext;
1436 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1437 AssertRCReturn(rc, rc);
1438
1439 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
1440 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
1441 RT_UNTRUSTED_VALIDATED_FENCE();
1442
1443 SVGACOTableDXElementLayoutEntry *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
1444 pEntry->elid = elementLayoutId;
1445 pEntry->numDescs = RT_MIN(cDesc, RT_ELEMENTS(pEntry->descs));
1446 memcpy(pEntry->descs, paDesc, pEntry->numDescs * sizeof(pEntry->descs[0]));
1447
1448#ifdef LOG_ENABLED
1449 Log6(("Element layout %d: slot off fmt class step reg\n", pEntry->elid));
1450 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
1451 {
1452 Log6((" [%u]: %u 0x%02X %d %u %u %u\n",
1453 i,
1454 pEntry->descs[i].inputSlot,
1455 pEntry->descs[i].alignedByteOffset,
1456 pEntry->descs[i].format,
1457 pEntry->descs[i].inputSlotClass,
1458 pEntry->descs[i].instanceDataStepRate,
1459 pEntry->descs[i].inputRegister
1460 ));
1461 }
1462#endif
1463
1464 rc = pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout(pThisCC, pDXContext, elementLayoutId, pEntry);
1465 return rc;
1466}
1467
1468
1469int vmsvga3dDXDestroyElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext)
1470{
1471 int rc;
1472 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1473 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout, VERR_INVALID_STATE);
1474 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1475 AssertReturn(p3dState, VERR_INVALID_STATE);
1476
1477 PVMSVGA3DDXCONTEXT pDXContext;
1478 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1479 AssertRCReturn(rc, rc);
1480
1481 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout(pThisCC, pDXContext);
1482 return rc;
1483}
1484
1485
1486int vmsvga3dDXDefineBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineBlendState const *pCmd)
1487{
1488 int rc;
1489 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1490 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineBlendState, VERR_INVALID_STATE);
1491 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1492 AssertReturn(p3dState, VERR_INVALID_STATE);
1493
1494 PVMSVGA3DDXCONTEXT pDXContext;
1495 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1496 AssertRCReturn(rc, rc);
1497
1498 const SVGA3dBlendStateId blendId = pCmd->blendId;
1499
1500 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
1501 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
1502 RT_UNTRUSTED_VALIDATED_FENCE();
1503
1504 SVGACOTableDXBlendStateEntry *pEntry = &pDXContext->cot.paBlendState[blendId];
1505 pEntry->alphaToCoverageEnable = pCmd->alphaToCoverageEnable;
1506 pEntry->independentBlendEnable = pCmd->independentBlendEnable;
1507 memcpy(pEntry->perRT, pCmd->perRT, sizeof(pEntry->perRT));
1508
1509 rc = pSvgaR3State->pFuncsDX->pfnDXDefineBlendState(pThisCC, pDXContext, blendId, pEntry);
1510 return rc;
1511}
1512
1513
1514int vmsvga3dDXDestroyBlendState(PVGASTATECC pThisCC, uint32_t idDXContext)
1515{
1516 int rc;
1517 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1518 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState, VERR_INVALID_STATE);
1519 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1520 AssertReturn(p3dState, VERR_INVALID_STATE);
1521
1522 PVMSVGA3DDXCONTEXT pDXContext;
1523 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1524 AssertRCReturn(rc, rc);
1525
1526 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState(pThisCC, pDXContext);
1527 return rc;
1528}
1529
1530
1531int vmsvga3dDXDefineDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilState const *pCmd)
1532{
1533 int rc;
1534 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1535 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState, VERR_INVALID_STATE);
1536 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1537 AssertReturn(p3dState, VERR_INVALID_STATE);
1538
1539 PVMSVGA3DDXCONTEXT pDXContext;
1540 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1541 AssertRCReturn(rc, rc);
1542
1543 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
1544
1545 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
1546 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
1547 RT_UNTRUSTED_VALIDATED_FENCE();
1548
1549 SVGACOTableDXDepthStencilEntry *pEntry = &pDXContext->cot.paDepthStencil[depthStencilId];
1550 pEntry->depthEnable = pCmd->depthEnable;
1551 pEntry->depthWriteMask = pCmd->depthWriteMask;
1552 pEntry->depthFunc = pCmd->depthFunc;
1553 pEntry->stencilEnable = pCmd->stencilEnable;
1554 pEntry->frontEnable = pCmd->frontEnable;
1555 pEntry->backEnable = pCmd->backEnable;
1556 pEntry->stencilReadMask = pCmd->stencilReadMask;
1557 pEntry->stencilWriteMask = pCmd->stencilWriteMask;
1558
1559 pEntry->frontStencilFailOp = pCmd->frontStencilFailOp;
1560 pEntry->frontStencilDepthFailOp = pCmd->frontStencilDepthFailOp;
1561 pEntry->frontStencilPassOp = pCmd->frontStencilPassOp;
1562 pEntry->frontStencilFunc = pCmd->frontStencilFunc;
1563
1564 pEntry->backStencilFailOp = pCmd->backStencilFailOp;
1565 pEntry->backStencilDepthFailOp = pCmd->backStencilDepthFailOp;
1566 pEntry->backStencilPassOp = pCmd->backStencilPassOp;
1567 pEntry->backStencilFunc = pCmd->backStencilFunc;
1568
1569 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState(pThisCC, pDXContext, depthStencilId, pEntry);
1570 return rc;
1571}
1572
1573
1574int vmsvga3dDXDestroyDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext)
1575{
1576 int rc;
1577 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1578 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState, VERR_INVALID_STATE);
1579 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1580 AssertReturn(p3dState, VERR_INVALID_STATE);
1581
1582 PVMSVGA3DDXCONTEXT pDXContext;
1583 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1584 AssertRCReturn(rc, rc);
1585
1586 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState(pThisCC, pDXContext);
1587 return rc;
1588}
1589
1590
1591int vmsvga3dDXDefineRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRasterizerState const *pCmd)
1592{
1593 int rc;
1594 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1595 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState, VERR_INVALID_STATE);
1596 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1597 AssertReturn(p3dState, VERR_INVALID_STATE);
1598
1599 PVMSVGA3DDXCONTEXT pDXContext;
1600 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1601 AssertRCReturn(rc, rc);
1602
1603 SVGA3dRasterizerStateId const rasterizerId = pCmd->rasterizerId;
1604
1605 ASSERT_GUEST_RETURN(pDXContext->cot.paRasterizerState, VERR_INVALID_STATE);
1606 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
1607 RT_UNTRUSTED_VALIDATED_FENCE();
1608
1609 SVGACOTableDXRasterizerStateEntry *pEntry = &pDXContext->cot.paRasterizerState[rasterizerId];
1610 pEntry->fillMode = pCmd->fillMode;
1611 pEntry->cullMode = pCmd->cullMode;
1612 pEntry->frontCounterClockwise = pCmd->frontCounterClockwise;
1613 pEntry->provokingVertexLast = pCmd->provokingVertexLast;
1614 pEntry->depthBias = pCmd->depthBias;
1615 pEntry->depthBiasClamp = pCmd->depthBiasClamp;
1616 pEntry->slopeScaledDepthBias = pCmd->slopeScaledDepthBias;
1617 pEntry->depthClipEnable = pCmd->depthClipEnable;
1618 pEntry->scissorEnable = pCmd->scissorEnable;
1619 pEntry->multisampleEnable = pCmd->multisampleEnable;
1620 pEntry->antialiasedLineEnable = pCmd->antialiasedLineEnable;
1621 pEntry->lineWidth = pCmd->lineWidth;
1622 pEntry->lineStippleEnable = pCmd->lineStippleEnable;
1623 pEntry->lineStippleFactor = pCmd->lineStippleFactor;
1624 pEntry->lineStipplePattern = pCmd->lineStipplePattern;
1625 pEntry->forcedSampleCount = 0; /** @todo Not in pCmd. */
1626 RT_ZERO(pEntry->mustBeZero);
1627
1628 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState(pThisCC, pDXContext, rasterizerId, pEntry);
1629 return rc;
1630}
1631
1632
1633int vmsvga3dDXDestroyRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext)
1634{
1635 int rc;
1636 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1637 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState, VERR_INVALID_STATE);
1638 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1639 AssertReturn(p3dState, VERR_INVALID_STATE);
1640
1641 PVMSVGA3DDXCONTEXT pDXContext;
1642 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1643 AssertRCReturn(rc, rc);
1644
1645 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState(pThisCC, pDXContext);
1646 return rc;
1647}
1648
1649
1650int vmsvga3dDXDefineSamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineSamplerState const *pCmd)
1651{
1652 int rc;
1653 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1654 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState, VERR_INVALID_STATE);
1655 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1656 AssertReturn(p3dState, VERR_INVALID_STATE);
1657
1658 PVMSVGA3DDXCONTEXT pDXContext;
1659 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1660 AssertRCReturn(rc, rc);
1661
1662 SVGA3dSamplerId const samplerId = pCmd->samplerId;
1663
1664 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
1665 ASSERT_GUEST_RETURN(samplerId < pDXContext->cot.cSampler, VERR_INVALID_PARAMETER);
1666 RT_UNTRUSTED_VALIDATED_FENCE();
1667
1668 SVGACOTableDXSamplerEntry *pEntry = &pDXContext->cot.paSampler[samplerId];
1669 pEntry->filter = pCmd->filter;
1670 pEntry->addressU = pCmd->addressU;
1671 pEntry->addressV = pCmd->addressV;
1672 pEntry->addressW = pCmd->addressW;
1673 pEntry->mipLODBias = pCmd->mipLODBias;
1674 pEntry->maxAnisotropy = pCmd->maxAnisotropy;
1675 pEntry->comparisonFunc = pCmd->comparisonFunc;
1676 pEntry->borderColor = pCmd->borderColor;
1677 pEntry->minLOD = pCmd->minLOD;
1678 pEntry->maxLOD = pCmd->maxLOD;
1679
1680 rc = pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState(pThisCC, pDXContext, samplerId, pEntry);
1681 return rc;
1682}
1683
1684
1685int vmsvga3dDXDestroySamplerState(PVGASTATECC pThisCC, uint32_t idDXContext)
1686{
1687 int rc;
1688 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1689 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState, VERR_INVALID_STATE);
1690 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1691 AssertReturn(p3dState, VERR_INVALID_STATE);
1692
1693 PVMSVGA3DDXCONTEXT pDXContext;
1694 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1695 AssertRCReturn(rc, rc);
1696
1697 rc = pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState(pThisCC, pDXContext);
1698 return rc;
1699}
1700
1701
1702int vmsvga3dDXDefineShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShader const *pCmd)
1703{
1704 int rc;
1705 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1706 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShader, VERR_INVALID_STATE);
1707 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1708 AssertReturn(p3dState, VERR_INVALID_STATE);
1709
1710 PVMSVGA3DDXCONTEXT pDXContext;
1711 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1712 AssertRCReturn(rc, rc);
1713
1714 AssertReturn(pDXContext->paShader, VERR_INVALID_STATE);
1715
1716 SVGA3dShaderId const shaderId = pCmd->shaderId;
1717
1718 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1719 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1720 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
1721 ASSERT_GUEST_RETURN(pCmd->sizeInBytes >= 8, VERR_INVALID_PARAMETER); /* Version Token + Length Token. */
1722 RT_UNTRUSTED_VALIDATED_FENCE();
1723
1724 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1725 pEntry->type = pCmd->type;
1726 pEntry->sizeInBytes = pCmd->sizeInBytes;
1727 pEntry->offsetInBytes = 0;
1728 pEntry->mobid = SVGA_ID_INVALID;
1729
1730 PVMSVGA3DSHADER pShader = &pDXContext->paShader[shaderId];
1731 if (pShader->id != SVGA_ID_INVALID)
1732 {
1733 /* Cleanup the current shader. */
1734 pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext, shaderId);
1735 RTMemFree(pShader->pShaderProgram);
1736 }
1737
1738 pShader->id = shaderId;
1739 pShader->cid = idDXContext;
1740 pShader->type = pEntry->type;
1741 pShader->cbData = pEntry->sizeInBytes;
1742 pShader->pShaderProgram = NULL;
1743 pShader->u.pvBackendShader = NULL;
1744
1745 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShader(pThisCC, pDXContext, shaderId, pEntry);
1746 return rc;
1747}
1748
1749
1750int vmsvga3dDXDestroyShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShader const *pCmd)
1751{
1752 int rc;
1753 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1754 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShader, VERR_INVALID_STATE);
1755 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1756 AssertReturn(p3dState, VERR_INVALID_STATE);
1757
1758 PVMSVGA3DDXCONTEXT pDXContext;
1759 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1760 AssertRCReturn(rc, rc);
1761
1762 AssertReturn(pDXContext->paShader, VERR_INVALID_STATE);
1763
1764 SVGA3dShaderId const shaderId = pCmd->shaderId;
1765
1766 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1767 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1768 RT_UNTRUSTED_VALIDATED_FENCE();
1769
1770 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext, shaderId);
1771
1772 /* Cleanup COTable entries.*/
1773 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1774 pEntry->type = SVGA3D_SHADERTYPE_INVALID;
1775 pEntry->sizeInBytes = 0;
1776 pEntry->offsetInBytes = 0;
1777 pEntry->mobid = SVGA_ID_INVALID;
1778
1779 /** @todo Destroy shaders on context and backend deletion. */
1780 PVMSVGA3DSHADER pShader = &pDXContext->paShader[shaderId];
1781 DXShaderFree(&pShader->shaderInfo);
1782 pShader->id = SVGA_ID_INVALID;
1783 pShader->cid = SVGA_ID_INVALID;
1784 pShader->type = SVGA3D_SHADERTYPE_INVALID;
1785 pShader->cbData = 0;
1786 RTMemFree(pShader->pShaderProgram);
1787 pShader->pShaderProgram = NULL;
1788 pShader->u.pvBackendShader = NULL;
1789
1790 return rc;
1791}
1792
1793
1794static int dxBindShader(PVMSVGA3DSHADER pShader, PVMSVGAMOB pMob, SVGACOTableDXShaderEntry const *pEntry, void const *pvShaderBytecode)
1795{
1796 /* How many bytes the MOB can hold. */
1797 uint32_t const cbMob = vmsvgaR3MobSize(pMob) - pEntry->offsetInBytes;
1798 ASSERT_GUEST_RETURN(cbMob >= pEntry->sizeInBytes, VERR_INVALID_PARAMETER);
1799 AssertReturn(pEntry->sizeInBytes >= 8, VERR_INTERNAL_ERROR); /* Host ensures this in DefineShader. */
1800
1801 int rc = DXShaderParse(pvShaderBytecode, pEntry->sizeInBytes, &pShader->shaderInfo);
1802 if (RT_SUCCESS(rc))
1803 {
1804 /* Get the length of the shader bytecode. */
1805 uint32_t const *pau32Token = (uint32_t *)pvShaderBytecode; /* Tokens */
1806 uint32_t const cToken = pau32Token[1]; /* Length of the shader in tokens. */
1807 ASSERT_GUEST_RETURN(cToken <= pEntry->sizeInBytes / 4, VERR_INVALID_PARAMETER);
1808
1809 pShader->cbData = cToken * 4;
1810
1811 /* Check if the MOB contains SVGA3dDXSignatureHeader and signature entries.
1812 * If they are not there (Linux guest driver does not provide them), then it is fine
1813 * and the signatures generated by DXShaderParse will be used.
1814 */
1815 uint32_t const cbSignaturesMax = cbMob - pShader->cbData; /* How many bytes for signatures are available. */
1816 if (cbSignaturesMax > sizeof(SVGA3dDXSignatureHeader))
1817 {
1818 SVGA3dDXSignatureHeader const *pSignatureHeader = (SVGA3dDXSignatureHeader *)((uint8_t *)pvShaderBytecode + pShader->cbData);
1819 if (pSignatureHeader->headerVersion == SVGADX_SIGNATURE_HEADER_VERSION_0)
1820 {
1821 DEBUG_BREAKPOINT_TEST();
1822 ASSERT_GUEST_RETURN( pSignatureHeader->numInputSignatures <= RT_ELEMENTS(pShader->shaderInfo.aInputSignature)
1823 && pSignatureHeader->numOutputSignatures <= RT_ELEMENTS(pShader->shaderInfo.aOutputSignature)
1824 && pSignatureHeader->numPatchConstantSignatures <= RT_ELEMENTS(pShader->shaderInfo.aPatchConstantSignature),
1825 VERR_INVALID_PARAMETER);
1826
1827 uint32_t const cSignature = pSignatureHeader->numInputSignatures
1828 + pSignatureHeader->numOutputSignatures
1829 + pSignatureHeader->numPatchConstantSignatures;
1830 ASSERT_GUEST_RETURN( cbSignaturesMax - sizeof(SVGA3dDXSignatureHeader)
1831 > cSignature * sizeof(sizeof(SVGA3dDXSignatureEntry)), VERR_INVALID_PARAMETER);
1832
1833 /* Copy to DXShaderInfo. */
1834 uint8_t const *pu8Signatures = (uint8_t *)&pSignatureHeader[1];
1835 pShader->shaderInfo.cInputSignature = pSignatureHeader->numInputSignatures;
1836 memcpy(pShader->shaderInfo.aInputSignature, pu8Signatures, pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry));
1837
1838 pu8Signatures += pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry);
1839 pShader->shaderInfo.cOutputSignature = pSignatureHeader->numOutputSignatures;
1840 memcpy(pShader->shaderInfo.aOutputSignature, pu8Signatures, pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry));
1841
1842 pu8Signatures += pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry);
1843 pShader->shaderInfo.cPatchConstantSignature = pSignatureHeader->numPatchConstantSignatures;
1844 memcpy(pShader->shaderInfo.aPatchConstantSignature, pu8Signatures, pSignatureHeader->numPatchConstantSignatures * sizeof(SVGA3dDXSignatureEntry));
1845 }
1846 }
1847 }
1848
1849 return rc;
1850}
1851
1852
1853int vmsvga3dDXBindShader(PVGASTATECC pThisCC, SVGA3dCmdDXBindShader const *pCmd, PVMSVGAMOB pMob)
1854{
1855 int rc;
1856 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1857 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShader, VERR_INVALID_STATE);
1858 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1859 AssertReturn(p3dState, VERR_INVALID_STATE);
1860
1861 PVMSVGA3DDXCONTEXT pDXContext;
1862 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
1863 AssertRCReturn(rc, rc);
1864
1865 ASSERT_GUEST_RETURN(pCmd->shid < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1866 RT_UNTRUSTED_VALIDATED_FENCE();
1867
1868 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[pCmd->shid];
1869 //pEntry->type;
1870 //pEntry->sizeInBytes;
1871 pEntry->offsetInBytes = pCmd->offsetInBytes;
1872 pEntry->mobid = vmsvgaR3MobId(pMob);
1873
1874 if (pMob)
1875 {
1876 /* Bind a mob to the shader. */
1877
1878 /* Create a memory pointer for the MOB, which is accessible by host. */
1879 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, vmsvgaR3MobSize(pMob));
1880 if (RT_SUCCESS(rc))
1881 {
1882 /* Get pointer to the shader bytecode. This will also verify the offset. */
1883 void const *pvShaderBytecode = vmsvgaR3MobBackingStorePtr(pMob, pEntry->offsetInBytes);
1884 ASSERT_GUEST_RETURN(pvShaderBytecode, VERR_INVALID_PARAMETER);
1885
1886 PVMSVGA3DSHADER pShader = &pDXContext->paShader[pCmd->shid];
1887 Assert( pShader->id == pCmd->shid
1888 && pShader->type == pEntry->type); /* The host ensures this. */
1889
1890 /* Get the shader and optional signatures from the MOB. */
1891 rc = dxBindShader(pShader, pMob, pEntry, pvShaderBytecode);
1892 if (RT_SUCCESS(rc))
1893 rc = pSvgaR3State->pFuncsDX->pfnDXBindShader(pThisCC, pDXContext, pShader, pvShaderBytecode);
1894
1895 if (RT_FAILURE(rc))
1896 {
1897 /** @todo Any cleanup? */
1898 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1899 }
1900 }
1901 }
1902 else
1903 {
1904 /* Unbind. */
1905 /** @todo Nothing to do here but release the MOB? */
1906 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1907 }
1908
1909 return rc;
1910}
1911
1912
1913int vmsvga3dDXDefineStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineStreamOutput const *pCmd)
1914{
1915 int rc;
1916 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1917 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput, VERR_INVALID_STATE);
1918 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1919 AssertReturn(p3dState, VERR_INVALID_STATE);
1920
1921 PVMSVGA3DDXCONTEXT pDXContext;
1922 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1923 AssertRCReturn(rc, rc);
1924
1925 SVGA3dStreamOutputId const soid = pCmd->soid;
1926
1927 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
1928 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
1929 ASSERT_GUEST_RETURN(pCmd->numOutputStreamEntries < SVGA3D_MAX_DX10_STREAMOUT_DECLS, VERR_INVALID_PARAMETER);
1930 RT_UNTRUSTED_VALIDATED_FENCE();
1931
1932 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
1933 pEntry->numOutputStreamEntries = pCmd->numOutputStreamEntries;
1934 memcpy(pEntry->decl, pCmd->decl, sizeof(pEntry->decl));
1935 memcpy(pEntry->streamOutputStrideInBytes, pCmd->streamOutputStrideInBytes, sizeof(pEntry->streamOutputStrideInBytes));
1936 pEntry->rasterizedStream = 0; // Apparently invalid in this command: pCmd->rasterizedStream;
1937 pEntry->numOutputStreamStrides = 0;
1938 pEntry->mobid = SVGA_ID_INVALID;
1939 pEntry->offsetInBytes = 0;
1940 pEntry->usesMob = 0;
1941 pEntry->pad0 = 0;
1942 pEntry->pad1 = 0;
1943 RT_ZERO(pEntry->pad2);
1944
1945 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput(pThisCC, pDXContext, soid, pEntry);
1946 return rc;
1947}
1948
1949
1950int vmsvga3dDXDestroyStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyStreamOutput const *pCmd)
1951{
1952 int rc;
1953 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1954 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput, VERR_INVALID_STATE);
1955 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1956 AssertReturn(p3dState, VERR_INVALID_STATE);
1957
1958 PVMSVGA3DDXCONTEXT pDXContext;
1959 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1960 AssertRCReturn(rc, rc);
1961
1962 SVGA3dStreamOutputId const soid = pCmd->soid;
1963
1964 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
1965 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
1966 RT_UNTRUSTED_VALIDATED_FENCE();
1967
1968 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput(pThisCC, pDXContext, soid);
1969
1970 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
1971 RT_ZERO(*pEntry);
1972 pEntry->mobid = SVGA_ID_INVALID;
1973
1974 return rc;
1975}
1976
1977
1978int vmsvga3dDXSetStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetStreamOutput const *pCmd)
1979{
1980 int rc;
1981 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1982 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput, VERR_INVALID_STATE);
1983 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1984 AssertReturn(p3dState, VERR_INVALID_STATE);
1985
1986 PVMSVGA3DDXCONTEXT pDXContext;
1987 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1988 AssertRCReturn(rc, rc);
1989
1990 SVGA3dStreamOutputId const soid = pCmd->soid;
1991
1992 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
1993 ASSERT_GUEST_RETURN( soid == SVGA_ID_INVALID
1994 || soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
1995 RT_UNTRUSTED_VALIDATED_FENCE();
1996
1997 pDXContext->svgaDXContext.streamOut.soid = soid;
1998
1999 rc = pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput(pThisCC, pDXContext, soid);
2000 return rc;
2001}
2002
2003
2004int vmsvga3dDXSetCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXSetCOTable const *pCmd, PVMSVGAMOB pMob)
2005{
2006 int rc;
2007 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2008 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCOTable, VERR_INVALID_STATE);
2009 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2010 AssertReturn(p3dState, VERR_INVALID_STATE);
2011
2012 PVMSVGA3DDXCONTEXT pDXContext;
2013 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2014 AssertRCReturn(rc, rc);
2015 RT_UNTRUSTED_VALIDATED_FENCE();
2016
2017 ASSERT_GUEST_RETURN(pCmd->type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
2018 RT_UNTRUSTED_VALIDATED_FENCE();
2019
2020 uint32_t validSizeInBytes;
2021 uint32_t cbCOT;
2022 if (pMob)
2023 {
2024 /* Bind a mob to the COTable. */
2025 validSizeInBytes = pCmd->validSizeInBytes;
2026 cbCOT = vmsvgaR3MobSize(pMob);
2027
2028 ASSERT_GUEST_RETURN(validSizeInBytes <= cbCOT, VERR_INVALID_PARAMETER);
2029 RT_UNTRUSTED_VALIDATED_FENCE();
2030
2031 /* Create a memory pointer, which is accessible by host. */
2032 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, validSizeInBytes);
2033 }
2034 else
2035 {
2036 /* Unbind. */
2037 validSizeInBytes = 0;
2038 cbCOT = 0;
2039 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pDXContext->aCOTMobs[pCmd->type]);
2040 }
2041
2042 uint32_t cEntries = 0;
2043 uint32_t cValidEntries = 0;
2044 if (RT_SUCCESS(rc))
2045 {
2046 static uint32_t const s_acbEntry[SVGA_COTABLE_MAX] =
2047 {
2048 sizeof(SVGACOTableDXRTViewEntry),
2049 sizeof(SVGACOTableDXDSViewEntry),
2050 sizeof(SVGACOTableDXSRViewEntry),
2051 sizeof(SVGACOTableDXElementLayoutEntry),
2052 sizeof(SVGACOTableDXBlendStateEntry),
2053 sizeof(SVGACOTableDXDepthStencilEntry),
2054 sizeof(SVGACOTableDXRasterizerStateEntry),
2055 sizeof(SVGACOTableDXSamplerEntry),
2056 sizeof(SVGACOTableDXStreamOutputEntry),
2057 sizeof(SVGACOTableDXQueryEntry),
2058 sizeof(SVGACOTableDXShaderEntry),
2059 sizeof(SVGACOTableDXUAViewEntry),
2060 };
2061
2062 cEntries = cbCOT / s_acbEntry[pCmd->type];
2063 cValidEntries = validSizeInBytes / s_acbEntry[pCmd->type];
2064 }
2065
2066 if (RT_SUCCESS(rc))
2067 {
2068 pDXContext->aCOTMobs[pCmd->type] = pMob;
2069
2070 void *pvCOT = vmsvgaR3MobBackingStorePtr(pMob, 0);
2071 switch (pCmd->type)
2072 {
2073 case SVGA_COTABLE_RTVIEW:
2074 pDXContext->cot.paRTView = (SVGACOTableDXRTViewEntry *)pvCOT;
2075 pDXContext->cot.cRTView = cEntries;
2076 break;
2077 case SVGA_COTABLE_DSVIEW:
2078 pDXContext->cot.paDSView = (SVGACOTableDXDSViewEntry *)pvCOT;
2079 pDXContext->cot.cDSView = cEntries;
2080 break;
2081 case SVGA_COTABLE_SRVIEW:
2082 pDXContext->cot.paSRView = (SVGACOTableDXSRViewEntry *)pvCOT;
2083 pDXContext->cot.cSRView = cEntries;
2084 break;
2085 case SVGA_COTABLE_ELEMENTLAYOUT:
2086 pDXContext->cot.paElementLayout = (SVGACOTableDXElementLayoutEntry *)pvCOT;
2087 pDXContext->cot.cElementLayout = cEntries;
2088 break;
2089 case SVGA_COTABLE_BLENDSTATE:
2090 pDXContext->cot.paBlendState = (SVGACOTableDXBlendStateEntry *)pvCOT;
2091 pDXContext->cot.cBlendState = cEntries;
2092 break;
2093 case SVGA_COTABLE_DEPTHSTENCIL:
2094 pDXContext->cot.paDepthStencil = (SVGACOTableDXDepthStencilEntry *)pvCOT;
2095 pDXContext->cot.cDepthStencil = cEntries;
2096 break;
2097 case SVGA_COTABLE_RASTERIZERSTATE:
2098 pDXContext->cot.paRasterizerState = (SVGACOTableDXRasterizerStateEntry *)pvCOT;
2099 pDXContext->cot.cRasterizerState = cEntries;
2100 break;
2101 case SVGA_COTABLE_SAMPLER:
2102 pDXContext->cot.paSampler = (SVGACOTableDXSamplerEntry *)pvCOT;
2103 pDXContext->cot.cSampler = cEntries;
2104 break;
2105 case SVGA_COTABLE_STREAMOUTPUT:
2106 pDXContext->cot.paStreamOutput = (SVGACOTableDXStreamOutputEntry *)pvCOT;
2107 pDXContext->cot.cStreamOutput = cEntries;
2108 break;
2109 case SVGA_COTABLE_DXQUERY:
2110 pDXContext->cot.paQuery = (SVGACOTableDXQueryEntry *)pvCOT;
2111 pDXContext->cot.cQuery = cEntries;
2112 break;
2113 case SVGA_COTABLE_DXSHADER:
2114 pDXContext->cot.paShader = (SVGACOTableDXShaderEntry *)pvCOT;
2115 pDXContext->cot.cShader = cEntries;
2116
2117 /* Create host array for information about shaders. */
2118 RTMemFree(pDXContext->paShader);
2119 pDXContext->paShader = NULL;
2120
2121 if (pDXContext->cot.cShader)
2122 {
2123 pDXContext->paShader = (PVMSVGA3DSHADER)RTMemAllocZ(pDXContext->cot.cShader * sizeof(VMSVGA3DSHADER));
2124 AssertReturn(pDXContext->paShader, VERR_NO_MEMORY);
2125 for (uint32_t i = 0; i < pDXContext->cot.cShader; ++i)
2126 pDXContext->paShader[i].id = SVGA_ID_INVALID;
2127 }
2128 break;
2129 case SVGA_COTABLE_UAVIEW:
2130 pDXContext->cot.paUAView = (SVGACOTableDXUAViewEntry *)pvCOT;
2131 pDXContext->cot.cUAView = cEntries;
2132 break;
2133 case SVGA_COTABLE_MAX: break; /* Compiler warning */
2134 }
2135 }
2136 else
2137 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
2138
2139 /* Notify the backend. */
2140 if (RT_SUCCESS(rc))
2141 rc = pSvgaR3State->pFuncsDX->pfnDXSetCOTable(pThisCC, pDXContext, pCmd->type, cValidEntries);
2142
2143 return rc;
2144}
2145
2146
2147int vmsvga3dDXReadbackCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackCOTable const *pCmd)
2148{
2149 int rc;
2150 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2151 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
2152 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2153 AssertReturn(p3dState, VERR_INVALID_STATE);
2154
2155 PVMSVGA3DDXCONTEXT pDXContext;
2156 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2157 AssertRCReturn(rc, rc);
2158 RT_UNTRUSTED_VALIDATED_FENCE();
2159
2160 ASSERT_GUEST_RETURN(pCmd->type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
2161 RT_UNTRUSTED_VALIDATED_FENCE();
2162
2163 PVMSVGAMOB pMob = pDXContext->aCOTMobs[pCmd->type];
2164 rc = vmsvgaR3MobBackingStoreWriteToGuest(pSvgaR3State, pMob);
2165 return rc;
2166}
2167
2168
2169int vmsvga3dDXBufferCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2170{
2171 int rc;
2172 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2173 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferCopy, VERR_INVALID_STATE);
2174 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2175 AssertReturn(p3dState, VERR_INVALID_STATE);
2176
2177 PVMSVGA3DDXCONTEXT pDXContext;
2178 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2179 AssertRCReturn(rc, rc);
2180
2181 rc = pSvgaR3State->pFuncsDX->pfnDXBufferCopy(pThisCC, pDXContext);
2182 return rc;
2183}
2184
2185
2186int vmsvga3dDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, uint32_t idDXContext)
2187{
2188 int rc;
2189 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2190 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback, VERR_INVALID_STATE);
2191 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2192 AssertReturn(p3dState, VERR_INVALID_STATE);
2193
2194 PVMSVGA3DDXCONTEXT pDXContext;
2195 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2196 AssertRCReturn(rc, rc);
2197
2198 rc = pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback(pThisCC, pDXContext);
2199 return rc;
2200}
2201
2202
2203int vmsvga3dDXMoveQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
2204{
2205 int rc;
2206 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2207 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMoveQuery, VERR_INVALID_STATE);
2208 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2209 AssertReturn(p3dState, VERR_INVALID_STATE);
2210
2211 PVMSVGA3DDXCONTEXT pDXContext;
2212 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2213 AssertRCReturn(rc, rc);
2214
2215 rc = pSvgaR3State->pFuncsDX->pfnDXMoveQuery(pThisCC, pDXContext);
2216 return rc;
2217}
2218
2219
2220int vmsvga3dDXBindAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
2221{
2222 int rc;
2223 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2224 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindAllQuery, VERR_INVALID_STATE);
2225 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2226 AssertReturn(p3dState, VERR_INVALID_STATE);
2227
2228 PVMSVGA3DDXCONTEXT pDXContext;
2229 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2230 AssertRCReturn(rc, rc);
2231
2232 rc = pSvgaR3State->pFuncsDX->pfnDXBindAllQuery(pThisCC, pDXContext);
2233 return rc;
2234}
2235
2236
2237int vmsvga3dDXReadbackAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
2238{
2239 int rc;
2240 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2241 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackAllQuery, VERR_INVALID_STATE);
2242 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2243 AssertReturn(p3dState, VERR_INVALID_STATE);
2244
2245 PVMSVGA3DDXCONTEXT pDXContext;
2246 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2247 AssertRCReturn(rc, rc);
2248
2249 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackAllQuery(pThisCC, pDXContext);
2250 return rc;
2251}
2252
2253
2254int vmsvga3dDXMobFence64(PVGASTATECC pThisCC, uint32_t idDXContext)
2255{
2256 int rc;
2257 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2258 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMobFence64, VERR_INVALID_STATE);
2259 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2260 AssertReturn(p3dState, VERR_INVALID_STATE);
2261
2262 PVMSVGA3DDXCONTEXT pDXContext;
2263 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2264 AssertRCReturn(rc, rc);
2265
2266 rc = pSvgaR3State->pFuncsDX->pfnDXMobFence64(pThisCC, pDXContext);
2267 return rc;
2268}
2269
2270
2271int vmsvga3dDXBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
2272{
2273 int rc;
2274 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2275 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindAllShader, VERR_INVALID_STATE);
2276 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2277 AssertReturn(p3dState, VERR_INVALID_STATE);
2278
2279 PVMSVGA3DDXCONTEXT pDXContext;
2280 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2281 AssertRCReturn(rc, rc);
2282
2283 rc = pSvgaR3State->pFuncsDX->pfnDXBindAllShader(pThisCC, pDXContext);
2284 return rc;
2285}
2286
2287
2288int vmsvga3dDXHint(PVGASTATECC pThisCC, uint32_t idDXContext)
2289{
2290 int rc;
2291 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2292 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXHint, VERR_INVALID_STATE);
2293 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2294 AssertReturn(p3dState, VERR_INVALID_STATE);
2295
2296 PVMSVGA3DDXCONTEXT pDXContext;
2297 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2298 AssertRCReturn(rc, rc);
2299
2300 rc = pSvgaR3State->pFuncsDX->pfnDXHint(pThisCC, pDXContext);
2301 return rc;
2302}
2303
2304
2305int vmsvga3dDXBufferUpdate(PVGASTATECC pThisCC, uint32_t idDXContext)
2306{
2307 int rc;
2308 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2309 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferUpdate, VERR_INVALID_STATE);
2310 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2311 AssertReturn(p3dState, VERR_INVALID_STATE);
2312
2313 PVMSVGA3DDXCONTEXT pDXContext;
2314 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2315 AssertRCReturn(rc, rc);
2316
2317 rc = pSvgaR3State->pFuncsDX->pfnDXBufferUpdate(pThisCC, pDXContext);
2318 return rc;
2319}
2320
2321
2322int vmsvga3dDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2323{
2324 int rc;
2325 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2326 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset, VERR_INVALID_STATE);
2327 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2328 AssertReturn(p3dState, VERR_INVALID_STATE);
2329
2330 PVMSVGA3DDXCONTEXT pDXContext;
2331 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2332 AssertRCReturn(rc, rc);
2333
2334 rc = pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset(pThisCC, pDXContext);
2335 return rc;
2336}
2337
2338
2339int vmsvga3dDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2340{
2341 int rc;
2342 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2343 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset, VERR_INVALID_STATE);
2344 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2345 AssertReturn(p3dState, VERR_INVALID_STATE);
2346
2347 PVMSVGA3DDXCONTEXT pDXContext;
2348 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2349 AssertRCReturn(rc, rc);
2350
2351 rc = pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset(pThisCC, pDXContext);
2352 return rc;
2353}
2354
2355
2356int vmsvga3dDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2357{
2358 int rc;
2359 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2360 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset, VERR_INVALID_STATE);
2361 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2362 AssertReturn(p3dState, VERR_INVALID_STATE);
2363
2364 PVMSVGA3DDXCONTEXT pDXContext;
2365 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2366 AssertRCReturn(rc, rc);
2367
2368 rc = pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset(pThisCC, pDXContext);
2369 return rc;
2370}
2371
2372
2373int vmsvga3dDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2374{
2375 int rc;
2376 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2377 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset, VERR_INVALID_STATE);
2378 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2379 AssertReturn(p3dState, VERR_INVALID_STATE);
2380
2381 PVMSVGA3DDXCONTEXT pDXContext;
2382 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2383 AssertRCReturn(rc, rc);
2384
2385 rc = pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset(pThisCC, pDXContext);
2386 return rc;
2387}
2388
2389
2390int vmsvga3dDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2391{
2392 int rc;
2393 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2394 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset, VERR_INVALID_STATE);
2395 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2396 AssertReturn(p3dState, VERR_INVALID_STATE);
2397
2398 PVMSVGA3DDXCONTEXT pDXContext;
2399 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2400 AssertRCReturn(rc, rc);
2401
2402 rc = pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset(pThisCC, pDXContext);
2403 return rc;
2404}
2405
2406
2407int vmsvga3dDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2408{
2409 int rc;
2410 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2411 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset, VERR_INVALID_STATE);
2412 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2413 AssertReturn(p3dState, VERR_INVALID_STATE);
2414
2415 PVMSVGA3DDXCONTEXT pDXContext;
2416 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2417 AssertRCReturn(rc, rc);
2418
2419 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset(pThisCC, pDXContext);
2420 return rc;
2421}
2422
2423
2424int vmsvga3dDXCondBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
2425{
2426 int rc;
2427 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2428 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader, VERR_INVALID_STATE);
2429 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2430 AssertReturn(p3dState, VERR_INVALID_STATE);
2431
2432 PVMSVGA3DDXCONTEXT pDXContext;
2433 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2434 AssertRCReturn(rc, rc);
2435
2436 rc = pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader(pThisCC, pDXContext);
2437 return rc;
2438}
2439
2440
2441int vmsvga3dScreenCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2442{
2443 int rc;
2444 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2445 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnScreenCopy, VERR_INVALID_STATE);
2446 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2447 AssertReturn(p3dState, VERR_INVALID_STATE);
2448
2449 PVMSVGA3DDXCONTEXT pDXContext;
2450 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2451 AssertRCReturn(rc, rc);
2452
2453 rc = pSvgaR3State->pFuncsDX->pfnScreenCopy(pThisCC, pDXContext);
2454 return rc;
2455}
2456
2457
2458int vmsvga3dGrowOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
2459{
2460 int rc;
2461 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2462 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnGrowOTable, VERR_INVALID_STATE);
2463 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2464 AssertReturn(p3dState, VERR_INVALID_STATE);
2465
2466 PVMSVGA3DDXCONTEXT pDXContext;
2467 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2468 AssertRCReturn(rc, rc);
2469
2470 rc = pSvgaR3State->pFuncsDX->pfnGrowOTable(pThisCC, pDXContext);
2471 return rc;
2472}
2473
2474
2475int vmsvga3dDXGrowCOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
2476{
2477 int rc;
2478 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2479 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGrowCOTable, VERR_INVALID_STATE);
2480 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2481 AssertReturn(p3dState, VERR_INVALID_STATE);
2482
2483 PVMSVGA3DDXCONTEXT pDXContext;
2484 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2485 AssertRCReturn(rc, rc);
2486
2487 rc = pSvgaR3State->pFuncsDX->pfnDXGrowCOTable(pThisCC, pDXContext);
2488 return rc;
2489}
2490
2491
2492int vmsvga3dIntraSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2493{
2494 int rc;
2495 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2496 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy, VERR_INVALID_STATE);
2497 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2498 AssertReturn(p3dState, VERR_INVALID_STATE);
2499
2500 PVMSVGA3DDXCONTEXT pDXContext;
2501 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2502 AssertRCReturn(rc, rc);
2503
2504 rc = pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy(pThisCC, pDXContext);
2505 return rc;
2506}
2507
2508
2509int vmsvga3dDefineGBSurface_v3(PVGASTATECC pThisCC, uint32_t idDXContext)
2510{
2511 int rc;
2512 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2513 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3, VERR_INVALID_STATE);
2514 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2515 AssertReturn(p3dState, VERR_INVALID_STATE);
2516
2517 PVMSVGA3DDXCONTEXT pDXContext;
2518 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2519 AssertRCReturn(rc, rc);
2520
2521 rc = pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3(pThisCC, pDXContext);
2522 return rc;
2523}
2524
2525
2526int vmsvga3dDXResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2527{
2528 int rc;
2529 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2530 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXResolveCopy, VERR_INVALID_STATE);
2531 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2532 AssertReturn(p3dState, VERR_INVALID_STATE);
2533
2534 PVMSVGA3DDXCONTEXT pDXContext;
2535 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2536 AssertRCReturn(rc, rc);
2537
2538 rc = pSvgaR3State->pFuncsDX->pfnDXResolveCopy(pThisCC, pDXContext);
2539 return rc;
2540}
2541
2542
2543int vmsvga3dDXPredResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2544{
2545 int rc;
2546 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2547 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy, VERR_INVALID_STATE);
2548 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2549 AssertReturn(p3dState, VERR_INVALID_STATE);
2550
2551 PVMSVGA3DDXCONTEXT pDXContext;
2552 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2553 AssertRCReturn(rc, rc);
2554
2555 rc = pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy(pThisCC, pDXContext);
2556 return rc;
2557}
2558
2559
2560int vmsvga3dDXPredConvertRegion(PVGASTATECC pThisCC, uint32_t idDXContext)
2561{
2562 int rc;
2563 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2564 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion, VERR_INVALID_STATE);
2565 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2566 AssertReturn(p3dState, VERR_INVALID_STATE);
2567
2568 PVMSVGA3DDXCONTEXT pDXContext;
2569 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2570 AssertRCReturn(rc, rc);
2571
2572 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion(pThisCC, pDXContext);
2573 return rc;
2574}
2575
2576
2577int vmsvga3dDXPredConvert(PVGASTATECC pThisCC, uint32_t idDXContext)
2578{
2579 int rc;
2580 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2581 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvert, VERR_INVALID_STATE);
2582 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2583 AssertReturn(p3dState, VERR_INVALID_STATE);
2584
2585 PVMSVGA3DDXCONTEXT pDXContext;
2586 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2587 AssertRCReturn(rc, rc);
2588
2589 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvert(pThisCC, pDXContext);
2590 return rc;
2591}
2592
2593
2594int vmsvga3dWholeSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2595{
2596 int rc;
2597 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2598 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy, VERR_INVALID_STATE);
2599 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2600 AssertReturn(p3dState, VERR_INVALID_STATE);
2601
2602 PVMSVGA3DDXCONTEXT pDXContext;
2603 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2604 AssertRCReturn(rc, rc);
2605
2606 rc = pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy(pThisCC, pDXContext);
2607 return rc;
2608}
2609
2610
2611int vmsvga3dDXDefineUAView(PVGASTATECC pThisCC, uint32_t idDXContext)
2612{
2613 int rc;
2614 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2615 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineUAView, VERR_INVALID_STATE);
2616 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2617 AssertReturn(p3dState, VERR_INVALID_STATE);
2618
2619 PVMSVGA3DDXCONTEXT pDXContext;
2620 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2621 AssertRCReturn(rc, rc);
2622
2623 rc = pSvgaR3State->pFuncsDX->pfnDXDefineUAView(pThisCC, pDXContext);
2624 return rc;
2625}
2626
2627
2628int vmsvga3dDXDestroyUAView(PVGASTATECC pThisCC, uint32_t idDXContext)
2629{
2630 int rc;
2631 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2632 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyUAView, VERR_INVALID_STATE);
2633 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2634 AssertReturn(p3dState, VERR_INVALID_STATE);
2635
2636 PVMSVGA3DDXCONTEXT pDXContext;
2637 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2638 AssertRCReturn(rc, rc);
2639
2640 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyUAView(pThisCC, pDXContext);
2641 return rc;
2642}
2643
2644
2645int vmsvga3dDXClearUAViewUint(PVGASTATECC pThisCC, uint32_t idDXContext)
2646{
2647 int rc;
2648 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2649 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint, VERR_INVALID_STATE);
2650 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2651 AssertReturn(p3dState, VERR_INVALID_STATE);
2652
2653 PVMSVGA3DDXCONTEXT pDXContext;
2654 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2655 AssertRCReturn(rc, rc);
2656
2657 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint(pThisCC, pDXContext);
2658 return rc;
2659}
2660
2661
2662int vmsvga3dDXClearUAViewFloat(PVGASTATECC pThisCC, uint32_t idDXContext)
2663{
2664 int rc;
2665 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2666 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat, VERR_INVALID_STATE);
2667 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2668 AssertReturn(p3dState, VERR_INVALID_STATE);
2669
2670 PVMSVGA3DDXCONTEXT pDXContext;
2671 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2672 AssertRCReturn(rc, rc);
2673
2674 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat(pThisCC, pDXContext);
2675 return rc;
2676}
2677
2678
2679int vmsvga3dDXCopyStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext)
2680{
2681 int rc;
2682 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2683 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount, VERR_INVALID_STATE);
2684 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2685 AssertReturn(p3dState, VERR_INVALID_STATE);
2686
2687 PVMSVGA3DDXCONTEXT pDXContext;
2688 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2689 AssertRCReturn(rc, rc);
2690
2691 rc = pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount(pThisCC, pDXContext);
2692 return rc;
2693}
2694
2695
2696int vmsvga3dDXSetUAViews(PVGASTATECC pThisCC, uint32_t idDXContext)
2697{
2698 int rc;
2699 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2700 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetUAViews, VERR_INVALID_STATE);
2701 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2702 AssertReturn(p3dState, VERR_INVALID_STATE);
2703
2704 PVMSVGA3DDXCONTEXT pDXContext;
2705 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2706 AssertRCReturn(rc, rc);
2707
2708 rc = pSvgaR3State->pFuncsDX->pfnDXSetUAViews(pThisCC, pDXContext);
2709 return rc;
2710}
2711
2712
2713int vmsvga3dDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2714{
2715 int rc;
2716 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2717 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect, VERR_INVALID_STATE);
2718 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2719 AssertReturn(p3dState, VERR_INVALID_STATE);
2720
2721 PVMSVGA3DDXCONTEXT pDXContext;
2722 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2723 AssertRCReturn(rc, rc);
2724
2725 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect(pThisCC, pDXContext);
2726 return rc;
2727}
2728
2729
2730int vmsvga3dDXDrawInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2731{
2732 int rc;
2733 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2734 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect, VERR_INVALID_STATE);
2735 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2736 AssertReturn(p3dState, VERR_INVALID_STATE);
2737
2738 PVMSVGA3DDXCONTEXT pDXContext;
2739 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2740 AssertRCReturn(rc, rc);
2741
2742 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect(pThisCC, pDXContext);
2743 return rc;
2744}
2745
2746
2747int vmsvga3dDXDispatch(PVGASTATECC pThisCC, uint32_t idDXContext)
2748{
2749 int rc;
2750 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2751 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatch, VERR_INVALID_STATE);
2752 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2753 AssertReturn(p3dState, VERR_INVALID_STATE);
2754
2755 PVMSVGA3DDXCONTEXT pDXContext;
2756 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2757 AssertRCReturn(rc, rc);
2758
2759 rc = pSvgaR3State->pFuncsDX->pfnDXDispatch(pThisCC, pDXContext);
2760 return rc;
2761}
2762
2763
2764int vmsvga3dDXDispatchIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2765{
2766 int rc;
2767 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2768 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect, VERR_INVALID_STATE);
2769 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2770 AssertReturn(p3dState, VERR_INVALID_STATE);
2771
2772 PVMSVGA3DDXCONTEXT pDXContext;
2773 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2774 AssertRCReturn(rc, rc);
2775
2776 rc = pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect(pThisCC, pDXContext);
2777 return rc;
2778}
2779
2780
2781int vmsvga3dWriteZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
2782{
2783 int rc;
2784 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2785 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWriteZeroSurface, VERR_INVALID_STATE);
2786 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2787 AssertReturn(p3dState, VERR_INVALID_STATE);
2788
2789 PVMSVGA3DDXCONTEXT pDXContext;
2790 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2791 AssertRCReturn(rc, rc);
2792
2793 rc = pSvgaR3State->pFuncsDX->pfnWriteZeroSurface(pThisCC, pDXContext);
2794 return rc;
2795}
2796
2797
2798int vmsvga3dHintZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
2799{
2800 int rc;
2801 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2802 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnHintZeroSurface, VERR_INVALID_STATE);
2803 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2804 AssertReturn(p3dState, VERR_INVALID_STATE);
2805
2806 PVMSVGA3DDXCONTEXT pDXContext;
2807 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2808 AssertRCReturn(rc, rc);
2809
2810 rc = pSvgaR3State->pFuncsDX->pfnHintZeroSurface(pThisCC, pDXContext);
2811 return rc;
2812}
2813
2814
2815int vmsvga3dDXTransferToBuffer(PVGASTATECC pThisCC, uint32_t idDXContext)
2816{
2817 int rc;
2818 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2819 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer, VERR_INVALID_STATE);
2820 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2821 AssertReturn(p3dState, VERR_INVALID_STATE);
2822
2823 PVMSVGA3DDXCONTEXT pDXContext;
2824 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2825 AssertRCReturn(rc, rc);
2826
2827 rc = pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer(pThisCC, pDXContext);
2828 return rc;
2829}
2830
2831
2832int vmsvga3dDXSetStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext)
2833{
2834 int rc;
2835 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2836 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStructureCount, VERR_INVALID_STATE);
2837 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2838 AssertReturn(p3dState, VERR_INVALID_STATE);
2839
2840 PVMSVGA3DDXCONTEXT pDXContext;
2841 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2842 AssertRCReturn(rc, rc);
2843
2844 rc = pSvgaR3State->pFuncsDX->pfnDXSetStructureCount(pThisCC, pDXContext);
2845 return rc;
2846}
2847
2848
2849int vmsvga3dLogicOpsBitBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2850{
2851 int rc;
2852 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2853 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt, VERR_INVALID_STATE);
2854 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2855 AssertReturn(p3dState, VERR_INVALID_STATE);
2856
2857 PVMSVGA3DDXCONTEXT pDXContext;
2858 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2859 AssertRCReturn(rc, rc);
2860
2861 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt(pThisCC, pDXContext);
2862 return rc;
2863}
2864
2865
2866int vmsvga3dLogicOpsTransBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2867{
2868 int rc;
2869 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2870 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt, VERR_INVALID_STATE);
2871 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2872 AssertReturn(p3dState, VERR_INVALID_STATE);
2873
2874 PVMSVGA3DDXCONTEXT pDXContext;
2875 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2876 AssertRCReturn(rc, rc);
2877
2878 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt(pThisCC, pDXContext);
2879 return rc;
2880}
2881
2882
2883int vmsvga3dLogicOpsStretchBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2884{
2885 int rc;
2886 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2887 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt, VERR_INVALID_STATE);
2888 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2889 AssertReturn(p3dState, VERR_INVALID_STATE);
2890
2891 PVMSVGA3DDXCONTEXT pDXContext;
2892 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2893 AssertRCReturn(rc, rc);
2894
2895 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt(pThisCC, pDXContext);
2896 return rc;
2897}
2898
2899
2900int vmsvga3dLogicOpsColorFill(PVGASTATECC pThisCC, uint32_t idDXContext)
2901{
2902 int rc;
2903 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2904 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill, VERR_INVALID_STATE);
2905 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2906 AssertReturn(p3dState, VERR_INVALID_STATE);
2907
2908 PVMSVGA3DDXCONTEXT pDXContext;
2909 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2910 AssertRCReturn(rc, rc);
2911
2912 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill(pThisCC, pDXContext);
2913 return rc;
2914}
2915
2916
2917int vmsvga3dLogicOpsAlphaBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
2918{
2919 int rc;
2920 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2921 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend, VERR_INVALID_STATE);
2922 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2923 AssertReturn(p3dState, VERR_INVALID_STATE);
2924
2925 PVMSVGA3DDXCONTEXT pDXContext;
2926 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2927 AssertRCReturn(rc, rc);
2928
2929 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend(pThisCC, pDXContext);
2930 return rc;
2931}
2932
2933
2934int vmsvga3dLogicOpsClearTypeBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
2935{
2936 int rc;
2937 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2938 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend, VERR_INVALID_STATE);
2939 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2940 AssertReturn(p3dState, VERR_INVALID_STATE);
2941
2942 PVMSVGA3DDXCONTEXT pDXContext;
2943 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2944 AssertRCReturn(rc, rc);
2945
2946 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend(pThisCC, pDXContext);
2947 return rc;
2948}
2949
2950
2951int vmsvga3dDefineGBSurface_v4(PVGASTATECC pThisCC, uint32_t idDXContext)
2952{
2953 int rc;
2954 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2955 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4, VERR_INVALID_STATE);
2956 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2957 AssertReturn(p3dState, VERR_INVALID_STATE);
2958
2959 PVMSVGA3DDXCONTEXT pDXContext;
2960 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2961 AssertRCReturn(rc, rc);
2962
2963 rc = pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4(pThisCC, pDXContext);
2964 return rc;
2965}
2966
2967
2968int vmsvga3dDXSetCSUAViews(PVGASTATECC pThisCC, uint32_t idDXContext)
2969{
2970 int rc;
2971 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2972 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews, VERR_INVALID_STATE);
2973 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2974 AssertReturn(p3dState, VERR_INVALID_STATE);
2975
2976 PVMSVGA3DDXCONTEXT pDXContext;
2977 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2978 AssertRCReturn(rc, rc);
2979
2980 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews(pThisCC, pDXContext);
2981 return rc;
2982}
2983
2984
2985int vmsvga3dDXSetMinLOD(PVGASTATECC pThisCC, uint32_t idDXContext)
2986{
2987 int rc;
2988 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2989 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetMinLOD, VERR_INVALID_STATE);
2990 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2991 AssertReturn(p3dState, VERR_INVALID_STATE);
2992
2993 PVMSVGA3DDXCONTEXT pDXContext;
2994 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2995 AssertRCReturn(rc, rc);
2996
2997 rc = pSvgaR3State->pFuncsDX->pfnDXSetMinLOD(pThisCC, pDXContext);
2998 return rc;
2999}
3000
3001
3002int vmsvga3dDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, uint32_t idDXContext)
3003{
3004 int rc;
3005 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3006 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob, VERR_INVALID_STATE);
3007 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3008 AssertReturn(p3dState, VERR_INVALID_STATE);
3009
3010 PVMSVGA3DDXCONTEXT pDXContext;
3011 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3012 AssertRCReturn(rc, rc);
3013
3014 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob(pThisCC, pDXContext);
3015 return rc;
3016}
3017
3018
3019int vmsvga3dDXSetShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
3020{
3021 int rc;
3022 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3023 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderIface, VERR_INVALID_STATE);
3024 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3025 AssertReturn(p3dState, VERR_INVALID_STATE);
3026
3027 PVMSVGA3DDXCONTEXT pDXContext;
3028 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3029 AssertRCReturn(rc, rc);
3030
3031 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderIface(pThisCC, pDXContext);
3032 return rc;
3033}
3034
3035
3036int vmsvga3dDXBindStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext)
3037{
3038 int rc;
3039 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3040 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput, VERR_INVALID_STATE);
3041 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3042 AssertReturn(p3dState, VERR_INVALID_STATE);
3043
3044 PVMSVGA3DDXCONTEXT pDXContext;
3045 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3046 AssertRCReturn(rc, rc);
3047
3048 rc = pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput(pThisCC, pDXContext);
3049 return rc;
3050}
3051
3052
3053int vmsvga3dSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, uint32_t idDXContext)
3054{
3055 int rc;
3056 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3057 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS, VERR_INVALID_STATE);
3058 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3059 AssertReturn(p3dState, VERR_INVALID_STATE);
3060
3061 PVMSVGA3DDXCONTEXT pDXContext;
3062 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3063 AssertRCReturn(rc, rc);
3064
3065 rc = pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS(pThisCC, pDXContext);
3066 return rc;
3067}
3068
3069
3070int vmsvga3dDXBindShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
3071{
3072 int rc;
3073 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3074 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShaderIface, VERR_INVALID_STATE);
3075 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3076 AssertReturn(p3dState, VERR_INVALID_STATE);
3077
3078 PVMSVGA3DDXCONTEXT pDXContext;
3079 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3080 AssertRCReturn(rc, rc);
3081
3082 rc = pSvgaR3State->pFuncsDX->pfnDXBindShaderIface(pThisCC, pDXContext);
3083 return rc;
3084}
3085
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