VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h@ 88803

最後變更 在這個檔案從88803是 88787,由 vboxsync 提交於 4 年 前

Devices/Graphics: a few DX commands. bugref:9830
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1/* $Id: DevVGA-SVGA.h 88787 2021-04-29 15:51:13Z vboxsync $ */
2/** @file
3 * VMware SVGA device
4 */
5/*
6 * Copyright (C) 2013-2020 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.alldomusa.eu.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 */
16
17#ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
18#define VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
19#ifndef RT_WITHOUT_PRAGMA_ONCE
20# pragma once
21#endif
22
23#ifndef VBOX_WITH_VMSVGA
24# error "VBOX_WITH_VMSVGA is not defined"
25#endif
26
27#define VMSVGA_USE_EMT_HALT_CODE
28
29#include <VBox/pci.h>
30#include <VBox/vmm/pdmifs.h>
31#include <VBox/vmm/pdmthread.h>
32#include <VBox/vmm/stam.h>
33#ifdef VMSVGA_USE_EMT_HALT_CODE
34# include <VBox/vmm/vmapi.h>
35# include <VBox/vmm/vmcpuset.h>
36#endif
37
38#include <iprt/avl.h>
39#include <iprt/list.h>
40
41
42/*
43 * PCI device IDs.
44 */
45#ifndef PCI_VENDOR_ID_VMWARE
46# define PCI_VENDOR_ID_VMWARE 0x15AD
47#endif
48#ifndef PCI_DEVICE_ID_VMWARE_SVGA2
49# define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405
50#endif
51
52/* For "svga_overlay.h" */
53#ifndef TRUE
54# define TRUE 1
55#endif
56#ifndef FALSE
57# define FALSE 0
58#endif
59
60/* GCC complains that 'ISO C++ prohibits anonymous structs' when "-Wpedantic" is enabled. */
61#if RT_GNUC_PREREQ(4, 6)
62# pragma GCC diagnostic push
63# pragma GCC diagnostic ignored "-Wpedantic"
64#endif
65/* VMSVGA headers. */
66#pragma pack(1) /* VMSVGA structures are '__packed'. */
67#include <svga3d_caps.h>
68#include <svga3d_reg.h>
69#include <svga3d_shaderdefs.h>
70#include <svga_escape.h>
71#include <svga_overlay.h>
72#pragma pack()
73#if RT_GNUC_PREREQ(4, 6)
74# pragma GCC diagnostic pop
75#endif
76
77/* Deprecated commands. They are not included in the VMSVGA headers anymore. */
78#define SVGA_CMD_RECT_FILL 2
79#define SVGA_CMD_DISPLAY_CURSOR 20
80#define SVGA_CMD_MOVE_CURSOR 21
81
82/*
83 * SVGA_CMD_RECT_FILL --
84 *
85 * Fill a rectangular area in the the GFB, and copy the result
86 * to any screens which intersect it.
87 *
88 * Deprecated?
89 *
90 * Availability:
91 * SVGA_CAP_RECT_FILL
92 */
93
94typedef
95struct {
96 uint32_t pixel;
97 uint32_t destX;
98 uint32_t destY;
99 uint32_t width;
100 uint32_t height;
101} SVGAFifoCmdRectFill;
102
103/*
104 * SVGA_CMD_DISPLAY_CURSOR --
105 *
106 * Turn the cursor on or off.
107 *
108 * Deprecated.
109 *
110 * Availability:
111 * SVGA_CAP_CURSOR?
112 */
113
114typedef
115struct {
116 uint32_t id; // Reserved, must be zero.
117 uint32_t state; // 0=off
118} SVGAFifoCmdDisplayCursor;
119
120/*
121 * SVGA_CMD_MOVE_CURSOR --
122 *
123 * Set the cursor position.
124 *
125 * Deprecated.
126 *
127 * Availability:
128 * SVGA_CAP_CURSOR?
129 */
130
131typedef
132struct {
133 SVGASignedPoint pos;
134} SVGAFifoCmdMoveCursor;
135
136
137/** Default FIFO size. */
138#define VMSVGA_FIFO_SIZE _2M
139/** The old FIFO size. */
140#define VMSVGA_FIFO_SIZE_OLD _128K
141
142/** Default scratch region size. */
143#define VMSVGA_SCRATCH_SIZE 0x100
144/** Surface memory available to the guest. */
145#define VMSVGA_SURFACE_SIZE (512*1024*1024)
146/** Maximum GMR pages. */
147#define VMSVGA_MAX_GMR_PAGES 0x100000
148/** Maximum nr of GMR ids. */
149#define VMSVGA_MAX_GMR_IDS _8K
150/** Maximum number of GMR descriptors. */
151#define VMSVGA_MAX_GMR_DESC_LOOP_COUNT VMSVGA_MAX_GMR_PAGES
152
153#define VMSVGA_VAL_UNINITIALIZED (unsigned)-1
154
155/** For validating X and width values.
156 * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
157#define VMSVGA_MAX_X _1M
158/** For validating Y and height values.
159 * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
160#define VMSVGA_MAX_Y _1M
161
162/* u32ActionFlags */
163#define VMSVGA_ACTION_CHANGEMODE_BIT 0
164#define VMSVGA_ACTION_CHANGEMODE RT_BIT(VMSVGA_ACTION_CHANGEMODE_BIT)
165
166
167#ifdef DEBUG
168/* Enable to log FIFO register accesses. */
169//# define DEBUG_FIFO_ACCESS
170/* Enable to log GMR page accesses. */
171//# define DEBUG_GMR_ACCESS
172#endif
173
174#define VMSVGA_FIFO_EXTCMD_NONE 0
175#define VMSVGA_FIFO_EXTCMD_TERMINATE 1
176#define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
177#define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
178#define VMSVGA_FIFO_EXTCMD_RESET 4
179#define VMSVGA_FIFO_EXTCMD_UPDATE_SURFACE_HEAP_BUFFERS 5
180#define VMSVGA_FIFO_EXTCMD_POWEROFF 6
181
182/** Size of the region to backup when switching into svga mode. */
183#define VMSVGA_VGA_FB_BACKUP_SIZE _512K
184
185/** @def VMSVGA_WITH_VGA_FB_BACKUP
186 * Enables correct VGA MMIO read/write handling when VMSVGA is enabled. It
187 * is SLOW and probably not entirely right, but it helps with getting 3dmark
188 * output and other stuff. */
189#define VMSVGA_WITH_VGA_FB_BACKUP 1
190
191/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
192 * defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3) */
193#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
194# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3 1
195#else
196# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
197#endif
198
199/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
200 * defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3) */
201#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
202# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ 1
203#else
204# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
205#endif
206
207
208typedef struct
209{
210 PSSMHANDLE pSSM;
211 uint32_t uVersion;
212 uint32_t uPass;
213} VMSVGA_STATE_LOAD;
214typedef VMSVGA_STATE_LOAD *PVMSVGA_STATE_LOAD;
215
216/** Host screen viewport.
217 * (4th quadrant with negated Y values - usual Windows and X11 world view.) */
218typedef struct VMSVGAVIEWPORT
219{
220 uint32_t x; /**< x coordinate (left). */
221 uint32_t y; /**< y coordinate (top). */
222 uint32_t cx; /**< width. */
223 uint32_t cy; /**< height. */
224 /** Right side coordinate (exclusive). Same as x + cx. */
225 uint32_t xRight;
226 /** First quadrant low y coordinate.
227 * Same as y + cy - 1 in window coordinates. */
228 uint32_t yLowWC;
229 /** First quadrant high y coordinate (exclusive) - yLowWC + cy.
230 * Same as y - 1 in window coordinates. */
231 uint32_t yHighWC;
232 /** Alignment padding. */
233 uint32_t uAlignment;
234} VMSVGAVIEWPORT;
235
236#ifdef VBOX_WITH_VMSVGA3D
237typedef struct VMSVGAHWSCREEN *PVMSVGAHWSCREEN;
238#endif
239
240/**
241 * Screen object state.
242 */
243typedef struct VMSVGASCREENOBJECT
244{
245 /** SVGA_SCREEN_* flags. */
246 uint32_t fuScreen;
247 /** The screen object id. */
248 uint32_t idScreen;
249 /** The screen dimensions. */
250 int32_t xOrigin;
251 int32_t yOrigin;
252 uint32_t cWidth;
253 uint32_t cHeight;
254 /** Offset of the screen buffer in the guest VRAM. */
255 uint32_t offVRAM;
256 /** Scanline pitch. */
257 uint32_t cbPitch;
258 /** Bits per pixel. */
259 uint32_t cBpp;
260 /** The physical DPI that the guest expects for this screen. Zero, if the guest is not DPI aware. */
261 uint32_t cDpi;
262 bool fDefined;
263 bool fModified;
264 void *pvScreenBitmap;
265#ifdef VBOX_WITH_VMSVGA3D
266 /** Pointer to the HW accelerated (3D) screen data. */
267 R3PTRTYPE(PVMSVGAHWSCREEN) pHwScreen;
268#endif
269} VMSVGASCREENOBJECT;
270
271/** Pointer to the private VMSVGA ring-3 state structure.
272 * @todo Still not entirely satisfired with the type name, but better than
273 * the previous lower/upper case only distinction. */
274typedef struct VMSVGAR3STATE *PVMSVGAR3STATE;
275/** Pointer to the private (implementation specific) VMSVGA3d state. */
276typedef struct VMSVGA3DSTATE *PVMSVGA3DSTATE;
277
278
279/**
280 * The VMSVGA device state.
281 *
282 * This instantatiated as VGASTATE::svga.
283 */
284typedef struct VMSVGAState
285{
286 /** Guest physical address of the FIFO memory range. */
287 RTGCPHYS GCPhysFIFO;
288 /** Size in bytes of the FIFO memory range.
289 * This may be smaller than cbFIFOConfig after restoring an old VM state. */
290 uint32_t cbFIFO;
291 /** The configured FIFO size. */
292 uint32_t cbFIFOConfig;
293 /** SVGA id. */
294 uint32_t u32SVGAId;
295 /** SVGA extensions enabled or not. */
296 uint32_t fEnabled;
297 /** SVGA memory area configured status. */
298 uint32_t fConfigured;
299 /** Device is busy handling FIFO requests (VMSVGA_BUSY_F_FIFO,
300 * VMSVGA_BUSY_F_EMT_FORCE). */
301 uint32_t volatile fBusy;
302#define VMSVGA_BUSY_F_FIFO RT_BIT_32(0) /**< The normal true/false busy FIFO bit. */
303#define VMSVGA_BUSY_F_EMT_FORCE RT_BIT_32(1) /**< Bit preventing race status flickering when EMT kicks the FIFO thread. */
304 /** Traces (dirty page detection) enabled or not. */
305 uint32_t fTraces;
306 /** Guest OS identifier. */
307 uint32_t u32GuestId;
308 /** Scratch region size (VMSVGAState::au32ScratchRegion). */
309 uint32_t cScratchRegion;
310 /** Irq status. */
311 uint32_t u32IrqStatus;
312 /** Irq mask. */
313 uint32_t u32IrqMask;
314 /** Pitch lock. */
315 uint32_t u32PitchLock;
316 /** Current GMR id. (SVGA_REG_GMR_ID) */
317 uint32_t u32CurrentGMRId;
318 /** SVGA device capabilities. */
319 uint32_t u32DeviceCaps;
320 uint32_t Padding0; /* Used to be I/O port base address. */
321 /** Port io index register. */
322 uint32_t u32IndexReg;
323 /** FIFO request semaphore. */
324 SUPSEMEVENT hFIFORequestSem;
325 /** The last seen SVGA_FIFO_CURSOR_COUNT value.
326 * Used by the FIFO thread and its watchdog. */
327 uint32_t uLastCursorUpdateCount;
328 /** Indicates that the FIFO thread is sleeping and might need waking up. */
329 bool volatile fFIFOThreadSleeping;
330 /** The legacy GFB mode registers. If used, they correspond to screen 0. */
331 /** True when the guest modifies the GFB mode registers. */
332 bool fGFBRegisters;
333 /** SVGA 3D overlay enabled or not. */
334 bool f3DOverlayEnabled;
335 /** Indicates that the guest behaves incorrectly. */
336 bool volatile fBadGuest;
337 bool afPadding[4];
338 uint32_t uWidth;
339 uint32_t uHeight;
340 uint32_t uBpp;
341 uint32_t cbScanline;
342 uint32_t uHostBpp;
343 /** Maximum width supported. */
344 uint32_t u32MaxWidth;
345 /** Maximum height supported. */
346 uint32_t u32MaxHeight;
347 /** Viewport rectangle, i.e. what's currently visible of the target host
348 * window. This is usually (0,0)(uWidth,uHeight), but if the window is
349 * shrunk and scrolling applied, both the origin and size may differ. */
350 VMSVGAVIEWPORT viewport;
351 /** Action flags */
352 uint32_t u32ActionFlags;
353 /** SVGA 3d extensions enabled or not. */
354 bool f3DEnabled;
355 /** VRAM page monitoring enabled or not. */
356 bool fVRAMTracking;
357 /** External command to be executed in the FIFO thread. */
358 uint8_t volatile u8FIFOExtCommand;
359 /** Set by vmsvgaR3RunExtCmdOnFifoThread when it temporarily resumes the FIFO
360 * thread and does not want it do anything but the command. */
361 bool volatile fFifoExtCommandWakeup;
362#ifdef DEBUG_GMR_ACCESS
363 /** GMR debug access handler type handle. */
364 PGMPHYSHANDLERTYPE hGmrAccessHandlerType;
365#endif
366#if defined(VMSVGA_USE_FIFO_ACCESS_HANDLER) || defined(DEBUG_FIFO_ACCESS)
367 /** FIFO debug access handler type handle. */
368 PGMPHYSHANDLERTYPE hFifoAccessHandlerType;
369#elif defined(DEBUG_GMR_ACCESS)
370 uint32_t uPadding1;
371#endif
372 /** Number of GMRs (VMSVGA_MAX_GMR_IDS, count of elements in VMSVGAR3STATE::paGMR array). */
373 uint32_t cGMR;
374 uint32_t uScreenOffset; /* Used only for loading older saved states. */
375
376 /** Legacy cursor state. */
377 uint32_t uCursorX;
378 uint32_t uCursorY;
379 uint32_t uCursorID;
380 uint32_t uCursorOn;
381
382 /** Scratch array.
383 * Putting this at the end since it's big it probably not . */
384 uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
385
386 /** Array of SVGA3D_DEVCAP values, which are accessed via SVGA_REG_DEV_CAP. */
387 uint32_t au32DevCaps[SVGA3D_DEVCAP_MAX];
388 /** Index written to the SVGA_REG_DEV_CAP register. */
389 uint32_t u32DevCapIndex;
390 /** Low 32 bit of a command buffer address written to the SVGA_REG_COMMAND_LOW register. */
391 uint32_t u32RegCommandLow;
392 /** High 32 bit of a command buffer address written to the SVGA_REG_COMMAND_HIGH register. */
393 uint32_t u32RegCommandHigh;
394
395 STAMCOUNTER StatRegBitsPerPixelWr;
396 STAMCOUNTER StatRegBusyWr;
397 STAMCOUNTER StatRegCursorXWr;
398 STAMCOUNTER StatRegCursorYWr;
399 STAMCOUNTER StatRegCursorIdWr;
400 STAMCOUNTER StatRegCursorOnWr;
401 STAMCOUNTER StatRegDepthWr;
402 STAMCOUNTER StatRegDisplayHeightWr;
403 STAMCOUNTER StatRegDisplayIdWr;
404 STAMCOUNTER StatRegDisplayIsPrimaryWr;
405 STAMCOUNTER StatRegDisplayPositionXWr;
406 STAMCOUNTER StatRegDisplayPositionYWr;
407 STAMCOUNTER StatRegDisplayWidthWr;
408 STAMCOUNTER StatRegEnableWr;
409 STAMCOUNTER StatRegGmrIdWr;
410 STAMCOUNTER StatRegGuestIdWr;
411 STAMCOUNTER StatRegHeightWr;
412 STAMCOUNTER StatRegIdWr;
413 STAMCOUNTER StatRegIrqMaskWr;
414 STAMCOUNTER StatRegNumDisplaysWr;
415 STAMCOUNTER StatRegNumGuestDisplaysWr;
416 STAMCOUNTER StatRegPaletteWr;
417 STAMCOUNTER StatRegPitchLockWr;
418 STAMCOUNTER StatRegPseudoColorWr;
419 STAMCOUNTER StatRegReadOnlyWr;
420 STAMCOUNTER StatRegScratchWr;
421 STAMCOUNTER StatRegSyncWr;
422 STAMCOUNTER StatRegTopWr;
423 STAMCOUNTER StatRegTracesWr;
424 STAMCOUNTER StatRegUnknownWr;
425 STAMCOUNTER StatRegWidthWr;
426 STAMCOUNTER StatRegCommandLowWr;
427 STAMCOUNTER StatRegCommandHighWr;
428 STAMCOUNTER StatRegDevCapWr;
429 STAMCOUNTER StatRegCmdPrependLowWr;
430 STAMCOUNTER StatRegCmdPrependHighWr;
431
432 STAMCOUNTER StatRegBitsPerPixelRd;
433 STAMCOUNTER StatRegBlueMaskRd;
434 STAMCOUNTER StatRegBusyRd;
435 STAMCOUNTER StatRegBytesPerLineRd;
436 STAMCOUNTER StatRegCapabilitesRd;
437 STAMCOUNTER StatRegConfigDoneRd;
438 STAMCOUNTER StatRegCursorXRd;
439 STAMCOUNTER StatRegCursorYRd;
440 STAMCOUNTER StatRegCursorIdRd;
441 STAMCOUNTER StatRegCursorOnRd;
442 STAMCOUNTER StatRegDepthRd;
443 STAMCOUNTER StatRegDisplayHeightRd;
444 STAMCOUNTER StatRegDisplayIdRd;
445 STAMCOUNTER StatRegDisplayIsPrimaryRd;
446 STAMCOUNTER StatRegDisplayPositionXRd;
447 STAMCOUNTER StatRegDisplayPositionYRd;
448 STAMCOUNTER StatRegDisplayWidthRd;
449 STAMCOUNTER StatRegEnableRd;
450 STAMCOUNTER StatRegFbOffsetRd;
451 STAMCOUNTER StatRegFbSizeRd;
452 STAMCOUNTER StatRegFbStartRd;
453 STAMCOUNTER StatRegGmrIdRd;
454 STAMCOUNTER StatRegGmrMaxDescriptorLengthRd;
455 STAMCOUNTER StatRegGmrMaxIdsRd;
456 STAMCOUNTER StatRegGmrsMaxPagesRd;
457 STAMCOUNTER StatRegGreenMaskRd;
458 STAMCOUNTER StatRegGuestIdRd;
459 STAMCOUNTER StatRegHeightRd;
460 STAMCOUNTER StatRegHostBitsPerPixelRd;
461 STAMCOUNTER StatRegIdRd;
462 STAMCOUNTER StatRegIrqMaskRd;
463 STAMCOUNTER StatRegMaxHeightRd;
464 STAMCOUNTER StatRegMaxWidthRd;
465 STAMCOUNTER StatRegMemorySizeRd;
466 STAMCOUNTER StatRegMemRegsRd;
467 STAMCOUNTER StatRegMemSizeRd;
468 STAMCOUNTER StatRegMemStartRd;
469 STAMCOUNTER StatRegNumDisplaysRd;
470 STAMCOUNTER StatRegNumGuestDisplaysRd;
471 STAMCOUNTER StatRegPaletteRd;
472 STAMCOUNTER StatRegPitchLockRd;
473 STAMCOUNTER StatRegPsuedoColorRd;
474 STAMCOUNTER StatRegRedMaskRd;
475 STAMCOUNTER StatRegScratchRd;
476 STAMCOUNTER StatRegScratchSizeRd;
477 STAMCOUNTER StatRegSyncRd;
478 STAMCOUNTER StatRegTopRd;
479 STAMCOUNTER StatRegTracesRd;
480 STAMCOUNTER StatRegUnknownRd;
481 STAMCOUNTER StatRegVramSizeRd;
482 STAMCOUNTER StatRegWidthRd;
483 STAMCOUNTER StatRegWriteOnlyRd;
484 STAMCOUNTER StatRegCommandLowRd;
485 STAMCOUNTER StatRegCommandHighRd;
486 STAMCOUNTER StatRegMaxPrimBBMemRd;
487 STAMCOUNTER StatRegGBMemSizeRd;
488 STAMCOUNTER StatRegDevCapRd;
489 STAMCOUNTER StatRegCmdPrependLowRd;
490 STAMCOUNTER StatRegCmdPrependHighRd;
491 STAMCOUNTER StatRegScrnTgtMaxWidthRd;
492 STAMCOUNTER StatRegScrnTgtMaxHeightRd;
493 STAMCOUNTER StatRegMobMaxSizeRd;
494} VMSVGAState, VMSVGASTATE;
495
496
497/**
498 * The VMSVGA device state for ring-3
499 *
500 * This instantatiated as VGASTATER3::svga.
501 */
502typedef struct VMSVGASTATER3
503{
504 /** The R3 FIFO pointer. */
505 R3PTRTYPE(uint32_t *) pau32FIFO;
506 /** R3 Opaque pointer to svga state. */
507 R3PTRTYPE(PVMSVGAR3STATE) pSvgaR3State;
508 /** R3 Opaque pointer to 3d state. */
509 R3PTRTYPE(PVMSVGA3DSTATE) p3dState;
510 /** The separate VGA frame buffer in svga mode.
511 * Unlike the the boch-based VGA device implementation, VMSVGA seems to have a
512 * separate frame buffer for VGA and allows concurrent use of both. The SVGA
513 * SDK is making use of this to do VGA text output while testing other things in
514 * SVGA mode, displaying the result by switching back to VGA text mode. So,
515 * when entering SVGA mode we copy the first part of the frame buffer here and
516 * direct VGA accesses here instead. It is copied back when leaving SVGA mode. */
517 R3PTRTYPE(uint8_t *) pbVgaFrameBufferR3;
518 /** R3 Opaque pointer to an external fifo cmd parameter. */
519 R3PTRTYPE(void * volatile) pvFIFOExtCmdParam;
520
521 /** FIFO external command semaphore. */
522 R3PTRTYPE(RTSEMEVENT) hFIFOExtCmdSem;
523 /** FIFO IO Thread. */
524 R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
525} VMSVGASTATER3;
526
527
528/**
529 * The VMSVGA device state for ring-0
530 *
531 * This instantatiated as VGASTATER0::svga.
532 */
533typedef struct VMSVGASTATER0
534{
535 /** The R0 FIFO pointer.
536 * @note This only points to the _first_ _page_ of the FIFO! */
537 R0PTRTYPE(uint32_t *) pau32FIFO;
538} VMSVGASTATER0;
539
540
541typedef struct VGAState *PVGASTATE;
542typedef struct VGASTATER3 *PVGASTATER3;
543typedef struct VGASTATER0 *PVGASTATER0;
544typedef struct VGASTATERC *PVGASTATERC;
545typedef CTX_SUFF(PVGASTATE) PVGASTATECC;
546
547DECLCALLBACK(int) vmsvgaR3PciIORegionFifoMapUnmap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
548 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
549DECLCALLBACK(VBOXSTRICTRC) vmsvgaIORead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb);
550DECLCALLBACK(VBOXSTRICTRC) vmsvgaIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb);
551
552DECLCALLBACK(void) vmsvgaR3PortSetViewport(PPDMIDISPLAYPORT pInterface, uint32_t uScreenId,
553 uint32_t x, uint32_t y, uint32_t cx, uint32_t cy);
554DECLCALLBACK(void) vmsvgaR3PortReportMonitorPositions(PPDMIDISPLAYPORT pInterface, uint32_t cPositions, PCRTPOINT paPositions);
555
556int vmsvgaR3Init(PPDMDEVINS pDevIns);
557int vmsvgaR3Reset(PPDMDEVINS pDevIns);
558int vmsvgaR3Destruct(PPDMDEVINS pDevIns);
559int vmsvgaR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
560int vmsvgaR3LoadDone(PPDMDEVINS pDevIns);
561int vmsvgaR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
562DECLCALLBACK(void) vmsvgaR3PowerOn(PPDMDEVINS pDevIns);
563DECLCALLBACK(void) vmsvgaR3PowerOff(PPDMDEVINS pDevIns);
564void vmsvgaR3FifoWatchdogTimer(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
565
566#ifdef IN_RING3
567VMSVGASCREENOBJECT *vmsvgaR3GetScreenObject(PVGASTATECC pThisCC, uint32_t idScreen);
568int vmsvgaR3UpdateScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, int x, int y, int w, int h);
569#endif
570
571int vmsvgaR3GmrTransfer(PVGASTATE pThis, PVGASTATECC pThisCC, const SVGA3dTransferType enmTransferType,
572 uint8_t *pbHstBuf, uint32_t cbHstBuf, uint32_t offHst, int32_t cbHstPitch,
573 SVGAGuestPtr gstPtr, uint32_t offGst, int32_t cbGstPitch,
574 uint32_t cbWidth, uint32_t cHeight);
575
576void vmsvgaR3ClipCopyBox(const SVGA3dSize *pSizeSrc, const SVGA3dSize *pSizeDest, SVGA3dCopyBox *pBox);
577void vmsvgaR3ClipBox(const SVGA3dSize *pSize, SVGA3dBox *pBox);
578void vmsvgaR3ClipRect(SVGASignedRect const *pBound, SVGASignedRect *pRect);
579void vmsvgaR3Clip3dRect(SVGA3dRect const *pBound, SVGA3dRect RT_UNTRUSTED_GUEST *pRect);
580
581/*
582 * GBO (Guest Backed Object).
583 * A GBO is a list of the guest pages. GBOs are used for VMSVGA MOBs (Memory OBjects)
584 * and Object Tables which the guest shares with the host.
585 *
586 * A GBO is similar to a GMR. Nevertheless I'll create a new code for GBOs in order
587 * to avoid tweaking and possibly breaking existing code. Moreover it will be probably possible to
588 * map the guest pages into the host R3 memory and access them directly.
589 */
590
591/* GBO descriptor. */
592typedef struct VMSVGAGBODESCRIPTOR
593{
594 RTGCPHYS GCPhys;
595 uint64_t cPages;
596} VMSVGAGBODESCRIPTOR, *PVMSVGAGBODESCRIPTOR;
597typedef VMSVGAGBODESCRIPTOR const *PCVMSVGAGBODESCRIPTOR;
598
599/* GBO.
600 */
601typedef struct VMSVGAGBO
602{
603 uint32_t fGboFlags;
604 uint32_t cTotalPages;
605 uint32_t cbTotal;
606 uint32_t cDescriptors;
607 PVMSVGAGBODESCRIPTOR paDescriptors;
608 void *pvHost; /* Pointer to cbTotal bytes on the host if VMSVGAGBO_F_HOST_BACKED is set. */
609} VMSVGAGBO, *PVMSVGAGBO;
610typedef VMSVGAGBO const *PCVMSVGAGBO;
611
612#define VMSVGAGBO_F_WRITE_PROTECTED 0x1
613#define VMSVGAGBO_F_HOST_BACKED 0x2
614
615#define VMSVGA_IS_GBO_CREATED(a_Gbo) ((a_Gbo)->paDescriptors != NULL)
616
617/* MOB is also a GBO.
618 */
619typedef struct VMSVGAMOB
620{
621 AVLU32NODECORE Core; /* Key is the mobid. */
622 RTLISTNODE nodeLRU;
623 VMSVGAGBO Gbo;
624} VMSVGAMOB, *PVMSVGAMOB;
625typedef VMSVGAMOB const *PCVMSVGAMOB;
626
627int vmsvgaR3MobBackingStoreCreate(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob, uint32_t cbValid);
628void vmsvgaR3MobBackingStoreDelete(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob);
629void *vmsvgaR3MobBackingStoreGet(PVMSVGAMOB pMob, uint32_t off);
630
631DECLINLINE(uint32_t) vmsvgaR3MobSize(PVMSVGAMOB pMob)
632{
633 if (pMob)
634 return pMob->Gbo.cbTotal;
635 return 0;
636}
637
638DECLINLINE(uint32_t) vmsvgaR3MobId(PVMSVGAMOB pMob)
639{
640 if (pMob)
641 return pMob->Core.Key;
642 return SVGA_ID_INVALID;
643}
644
645#ifdef VBOX_WITH_VMSVGA3D
646int vmsvgaR3UpdateGBSurface(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImageId, SVGA3dBox const *pBox);
647int vmsvgaR3UpdateGBSurfaceEx(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImageId, SVGA3dBox const *pBoxDst, SVGA3dPoint const *pPtSrc);
648#endif
649
650#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h */
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