1 | /** @file
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2 | Definitions for CPU S3 data.
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3 |
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4 | Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved.<BR>
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5 | SPDX-License-Identifier: BSD-2-Clause-Patent
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6 |
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7 | **/
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8 |
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9 | #ifndef _ACPI_CPU_DATA_H_
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10 | #define _ACPI_CPU_DATA_H_
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11 |
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12 | //
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13 | // This macro definition is used to fix incompatibility issue caused by
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14 | // ACPI_CPU_DATA structure update. It will be removed after all the platform
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15 | // code uses new ACPI_CPU_DATA structure.
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16 | //
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17 | #define ACPI_CPU_DATA_STRUCTURE_UPDATE
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18 |
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19 | //
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20 | // Register types in register table
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21 | //
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22 | typedef enum {
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23 | Msr,
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24 | ControlRegister,
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25 | MemoryMapped,
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26 | CacheControl,
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27 |
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28 | //
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29 | // Semaphore type used to control the execute sequence of the Msr.
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30 | // It will be insert between two Msr which has execute dependence.
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31 | //
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32 | Semaphore,
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33 | InvalidReg
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34 | } REGISTER_TYPE;
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35 |
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36 | //
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37 | // Describe the dependency type for different features.
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38 | // The value set to CPU_REGISTER_TABLE_ENTRY.Value when the REGISTER_TYPE is Semaphore.
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39 | //
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40 | typedef enum {
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41 | NoneDepType,
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42 | ThreadDepType,
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43 | CoreDepType,
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44 | PackageDepType,
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45 | InvalidDepType
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46 | } CPU_FEATURE_DEPENDENCE_TYPE;
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47 |
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48 | //
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49 | // CPU information.
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50 | //
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51 | typedef struct {
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52 | //
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53 | // Record the package count in this CPU.
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54 | //
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55 | UINT32 PackageCount;
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56 | //
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57 | // Record the max core count in this CPU.
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58 | // Different packages may have different core count, this value
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59 | // save the max core count in all the packages.
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60 | //
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61 | UINT32 MaxCoreCount;
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62 | //
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63 | // Record the max thread count in this CPU.
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64 | // Different cores may have different thread count, this value
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65 | // save the max thread count in all the cores.
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66 | //
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67 | UINT32 MaxThreadCount;
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68 | //
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69 | // This field points to an array.
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70 | // This array saves thread count (type UINT32) of each package.
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71 | // The array has PackageCount elements.
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72 | //
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73 | // If the platform does not support MSR setting at S3 resume, and
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74 | // therefore it doesn't need the dependency semaphores, it should set
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75 | // this field to 0.
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76 | //
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77 | EFI_PHYSICAL_ADDRESS ThreadCountPerPackage;
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78 | //
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79 | // This field points to an array.
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80 | // This array saves thread count (type UINT8) of each core.
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81 | // The array has PackageCount * MaxCoreCount elements.
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82 | //
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83 | // If the platform does not support MSR setting at S3 resume, and
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84 | // therefore it doesn't need the dependency semaphores, it should set
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85 | // this field to 0.
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86 | //
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87 | EFI_PHYSICAL_ADDRESS ThreadCountPerCore;
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88 | } CPU_STATUS_INFORMATION;
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89 |
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90 | //
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91 | // Element of register table entry
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92 | //
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93 | typedef struct {
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94 | REGISTER_TYPE RegisterType; // offset 0 - 3
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95 | UINT32 Index; // offset 4 - 7
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96 | UINT8 ValidBitStart; // offset 8
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97 | UINT8 ValidBitLength; // offset 9
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98 | BOOLEAN TestThenWrite; // offset 10
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99 | UINT8 Reserved1; // offset 11
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100 | UINT32 HighIndex; // offset 12-15, only valid for MemoryMapped
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101 | UINT64 Value; // offset 16-23
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102 | } CPU_REGISTER_TABLE_ENTRY;
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103 |
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104 | //
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105 | // Register table definition, including current table length,
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106 | // allocated size of this table, and pointer to the list of table entries.
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107 | //
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108 | typedef struct {
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109 | //
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110 | // The number of valid entries in the RegisterTableEntry buffer
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111 | //
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112 | UINT32 TableLength;
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113 | UINT32 NumberBeforeReset;
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114 | //
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115 | // The size, in bytes, of the RegisterTableEntry buffer
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116 | //
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117 | UINT32 AllocatedSize;
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118 | //
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119 | // The initial APIC ID of the CPU this register table applies to
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120 | //
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121 | UINT32 InitialApicId;
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122 | //
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123 | // Physical address of CPU_REGISTER_TABLE_ENTRY structures.
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124 | //
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125 | EFI_PHYSICAL_ADDRESS RegisterTableEntry;
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126 | } CPU_REGISTER_TABLE;
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127 |
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128 | //
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129 | // Data structure that is used for CPU feature initialization during ACPI S3
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130 | // resume.
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131 | //
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132 | typedef struct {
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133 | //
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134 | // Physical address of an array of CPU_REGISTER_TABLE structures, with
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135 | // NumberOfCpus entries. If a register table is not required, then the
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136 | // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.
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137 | // If TableLength is > 0, then elements of RegisterTableEntry are used to
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138 | // initialize the CPU that matches InitialApicId, during an ACPI S3 resume,
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139 | // before SMBASE relocation is performed.
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140 | // If a register table is not required for any one of the CPUs, then
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141 | // PreSmmInitRegisterTable may be set to 0.
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142 | //
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143 | EFI_PHYSICAL_ADDRESS PreSmmInitRegisterTable;
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144 | //
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145 | // Physical address of an array of CPU_REGISTER_TABLE structures, with
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146 | // NumberOfCpus entries. If a register table is not required, then the
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147 | // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.
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148 | // If TableLength is > 0, then elements of RegisterTableEntry are used to
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149 | // initialize the CPU that matches InitialApicId, during an ACPI S3 resume,
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150 | // after SMBASE relocation is performed.
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151 | // If a register table is not required for any one of the CPUs, then
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152 | // RegisterTable may be set to 0.
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153 | //
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154 | EFI_PHYSICAL_ADDRESS RegisterTable;
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155 | //
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156 | // CPU information which is required when set the register table.
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157 | //
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158 | CPU_STATUS_INFORMATION CpuStatus;
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159 | //
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160 | // Location info for each AP.
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161 | // It points to an array which saves all APs location info.
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162 | // The array count is the AP count in this CPU.
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163 | //
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164 | // If the platform does not support MSR setting at S3 resume, and
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165 | // therefore it doesn't need the dependency semaphores, it should set
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166 | // this field to 0.
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167 | //
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168 | EFI_PHYSICAL_ADDRESS ApLocation;
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169 | } CPU_FEATURE_INIT_DATA;
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170 |
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171 | //
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172 | // Data structure that is required for ACPI S3 resume. The PCD
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173 | // PcdCpuS3DataAddress must be set to the physical address where this structure
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174 | // is allocated
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175 | //
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176 | typedef struct {
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177 | //
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178 | // Physical address of 4KB buffer allocated below 1MB from memory of type
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179 | // EfiReservedMemoryType. The buffer is not required to be initialized, but
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180 | // it is recommended that the buffer be zero-filled. This buffer is used to
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181 | // wake APs during an ACPI S3 resume.
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182 | //
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183 | EFI_PHYSICAL_ADDRESS StartupVector;
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184 | //
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185 | // Physical address of structure of type IA32_DESCRIPTOR. The
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186 | // IA32_DESCRIPTOR structure provides the base address and length of a GDT
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187 | // The GDT must be filled in with the GDT contents that are
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188 | // used during an ACPI S3 resume. This is typically the contents of the GDT
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189 | // used by the boot processor when the platform is booted.
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190 | //
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191 | EFI_PHYSICAL_ADDRESS GdtrProfile;
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192 | //
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193 | // Physical address of structure of type IA32_DESCRIPTOR. The
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194 | // IA32_DESCRIPTOR structure provides the base address and length of an IDT.
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195 | // The IDT must be filled in with the IDT contents that are
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196 | // used during an ACPI S3 resume. This is typically the contents of the IDT
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197 | // used by the boot processor when the platform is booted.
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198 | //
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199 | EFI_PHYSICAL_ADDRESS IdtrProfile;
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200 | //
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201 | // Physical address of a buffer that is used as stacks during ACPI S3 resume.
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202 | // The total size of this buffer, in bytes, is NumberOfCpus * StackSize. This
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203 | // structure must be allocated from memory of type EfiACPIMemoryNVS.
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204 | //
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205 | EFI_PHYSICAL_ADDRESS StackAddress;
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206 | //
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207 | // The size, in bytes, of the stack provided to each CPU during ACPI S3 resume.
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208 | //
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209 | UINT32 StackSize;
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210 | //
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211 | // The number of CPUs. If a platform does not support hot plug CPUs, then
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212 | // this is the number of CPUs detected when the platform is booted, regardless
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213 | // of being enabled or disabled. If a platform does support hot plug CPUs,
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214 | // then this is the maximum number of CPUs that the platform supports.
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215 | //
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216 | UINT32 NumberOfCpus;
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217 | //
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218 | // Physical address of structure of type MTRR_SETTINGS that contains a copy
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219 | // of the MTRR settings that are compatible with the MTRR settings used by
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220 | // the boot processor when the platform was booted. These MTRR settings are
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221 | // used during an ACPI S3 resume.
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222 | //
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223 | EFI_PHYSICAL_ADDRESS MtrrTable;
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224 | //
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225 | // Physical address of a buffer that contains the machine check handler that
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226 | // is used during an ACPI S3 Resume. In order for this machine check
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227 | // handler to be active on an AP during an ACPI S3 resume, the machine check
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228 | // vector in the IDT provided by IdtrProfile must be initialized to transfer
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229 | // control to this physical address.
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230 | //
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231 | EFI_PHYSICAL_ADDRESS ApMachineCheckHandlerBase;
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232 | //
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233 | // The size, in bytes, of the machine check handler that is used during an
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234 | // ACPI S3 Resume. If this field is 0, then a machine check handler is not
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235 | // provided.
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236 | //
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237 | UINT32 ApMachineCheckHandlerSize;
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238 | //
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239 | // Data structure that is used for CPU feature initialization during ACPI S3
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240 | // resume.
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241 | //
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242 | CPU_FEATURE_INIT_DATA CpuFeatureInitData;
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243 | } ACPI_CPU_DATA;
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244 |
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245 | #endif
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