| 1 | ## @file
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| 2 | # Definitions of Flash definition file on RiscVVirt RISC-V platform
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| 3 | #
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| 4 | # Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
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| 5 | # Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.<BR>
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| 6 | #
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| 7 | # SPDX-License-Identifier: BSD-2-Clause-Patent
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| 8 | #
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| 9 | ##
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| 10 | [Defines]
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| 11 | DEFINE BLOCK_SIZE = 0x1000
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| 12 |
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| 13 | DEFINE PFLASH0_BASE = 0x20000000
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| 14 | DEFINE PFLASH1_BASE = 0x22000000
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| 15 |
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| 16 | DEFINE CODE_BASE_ADDRESS = $(PFLASH0_BASE)
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| 17 | DEFINE CODE_SIZE = 0x00800000
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| 18 | DEFINE CODE_BLOCKS = 0x800
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| 19 |
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| 20 | DEFINE VARS_BASE_ADDRESS = $(PFLASH1_BASE)
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| 21 | DEFINE VARS_SIZE = 0x000C0000
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| 22 | DEFINE VARS_BLOCK_SIZE = 0x40000
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| 23 | DEFINE VARS_BLOCKS = 0x3
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| 24 |
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| 25 | #
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| 26 | # EFI Variable memory region.
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| 27 | # The total size of EFI Variable FD must include
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| 28 | # all of sub regions of EFI Variable
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| 29 | #
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| 30 | DEFINE VARS_OFFSET = 0x00000000
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| 31 | DEFINE VARS_LIVE_SIZE = 0x00040000
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| 32 | DEFINE VARS_FTW_WORKING_OFFSET = $(VARS_OFFSET) + $(VARS_LIVE_SIZE)
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| 33 | DEFINE VARS_FTW_WORKING_SIZE = 0x00040000
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| 34 | DEFINE VARS_FTW_SPARE_OFFSET = $(VARS_FTW_WORKING_OFFSET) + $(VARS_FTW_WORKING_SIZE)
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| 35 | DEFINE VARS_FTW_SPARE_SIZE = 0x00040000
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| 36 |
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| 37 | SET gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency = 10000000
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| 38 | SET gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase = 0x83FF0000
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| 39 | SET gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize = 0x00010000
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