1 | /** @file
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2 |
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3 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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4 | Copyright (c) 2011 - 2021, ARM Limited. All rights reserved.
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5 |
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6 | SPDX-License-Identifier: BSD-2-Clause-Patent
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7 |
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8 | **/
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9 | #include <Base.h>
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10 | #include <Library/ArmLib.h>
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11 | #include <Library/DebugLib.h>
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12 | #include <Library/PcdLib.h>
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13 |
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14 | STATIC
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15 | VOID
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16 | CacheRangeOperation (
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17 | IN VOID *Start,
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18 | IN UINTN Length,
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19 | IN LINE_OPERATION LineOperation,
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20 | IN UINTN LineLength
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21 | )
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22 | {
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23 | UINTN ArmCacheLineAlignmentMask;
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24 | // Align address (rounding down)
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25 | UINTN AlignedAddress;
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26 | UINTN EndAddress;
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27 |
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28 | ArmCacheLineAlignmentMask = LineLength - 1;
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29 | AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);
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30 | EndAddress = (UINTN)Start + Length;
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31 |
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32 | // Perform the line operation on an address in each cache line
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33 | while (AlignedAddress < EndAddress) {
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34 | LineOperation (AlignedAddress);
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35 | AlignedAddress += LineLength;
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36 | }
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37 |
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38 | ArmDataSynchronizationBarrier ();
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39 | }
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40 |
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41 | VOID
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42 | EFIAPI
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43 | InvalidateInstructionCache (
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44 | VOID
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45 | )
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46 | {
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47 | ASSERT (FALSE);
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48 | }
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49 |
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50 | VOID
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51 | EFIAPI
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52 | InvalidateDataCache (
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53 | VOID
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54 | )
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55 | {
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56 | ASSERT (FALSE);
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57 | }
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58 |
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59 | VOID *
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60 | EFIAPI
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61 | InvalidateInstructionCacheRange (
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62 | IN VOID *Address,
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63 | IN UINTN Length
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64 | )
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65 | {
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66 | CacheRangeOperation (
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67 | Address,
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68 | Length,
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69 | ArmCleanDataCacheEntryToPoUByMVA,
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70 | ArmDataCacheLineLength ()
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71 | );
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72 | CacheRangeOperation (
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73 | Address,
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74 | Length,
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75 | ArmInvalidateInstructionCacheEntryToPoUByMVA,
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76 | ArmInstructionCacheLineLength ()
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77 | );
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78 |
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79 | ArmInstructionSynchronizationBarrier ();
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80 |
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81 | return Address;
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82 | }
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83 |
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84 | VOID
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85 | EFIAPI
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86 | WriteBackInvalidateDataCache (
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87 | VOID
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88 | )
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89 | {
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90 | ASSERT (FALSE);
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91 | }
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92 |
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93 | VOID *
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94 | EFIAPI
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95 | WriteBackInvalidateDataCacheRange (
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96 | IN VOID *Address,
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97 | IN UINTN Length
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98 | )
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99 | {
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100 | CacheRangeOperation (
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101 | Address,
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102 | Length,
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103 | ArmCleanInvalidateDataCacheEntryByMVA,
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104 | ArmDataCacheLineLength ()
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105 | );
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106 | return Address;
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107 | }
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108 |
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109 | VOID
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110 | EFIAPI
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111 | WriteBackDataCache (
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112 | VOID
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113 | )
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114 | {
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115 | ASSERT (FALSE);
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116 | }
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117 |
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118 | VOID *
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119 | EFIAPI
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120 | WriteBackDataCacheRange (
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121 | IN VOID *Address,
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122 | IN UINTN Length
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123 | )
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124 | {
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125 | CacheRangeOperation (
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126 | Address,
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127 | Length,
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128 | ArmCleanDataCacheEntryByMVA,
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129 | ArmDataCacheLineLength ()
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130 | );
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131 | return Address;
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132 | }
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133 |
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134 | VOID *
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135 | EFIAPI
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136 | InvalidateDataCacheRange (
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137 | IN VOID *Address,
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138 | IN UINTN Length
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139 | )
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140 | {
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141 | CacheRangeOperation (
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142 | Address,
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143 | Length,
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144 | ArmInvalidateDataCacheEntryByMVA,
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145 | ArmDataCacheLineLength ()
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146 | );
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147 | return Address;
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148 | }
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