VirtualBox

source: vbox/trunk/src/VBox/Devices/Bus/MsiCommon.cpp@ 33360

最後變更 在這個檔案從33360是 33314,由 vboxsync 提交於 14 年 前

PCI, PDM: MSI-X support (absolutely untested)
  • 屬性 svn:eol-style 設為 native
  • 屬性 svn:keywords 設為 Author Date Id Revision
檔案大小: 9.5 KB
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1/* $Id: MsiCommon.cpp 33314 2010-10-21 15:51:17Z vboxsync $ */
2/** @file
3 * MSI support routines
4 */
5
6/*
7 * Copyright (C) 2010 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.alldomusa.eu.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17#define LOG_GROUP LOG_GROUP_DEV_PCI
18/* Hack to get PCIDEVICEINT declare at the right point - include "PCIInternal.h". */
19#define PCI_INCLUDE_PRIVATE
20#include <VBox/pci.h>
21#include <VBox/msi.h>
22#include <VBox/pdmdev.h>
23#include <VBox/log.h>
24
25#include "MsiCommon.h"
26
27DECLINLINE(uint16_t) msiGetMessageControl(PPCIDEVICE pDev)
28{
29 return PCIDevGetWord(pDev, pDev->Int.s.u8MsiCapOffset + VBOX_MSI_CAP_MESSAGE_CONTROL);
30}
31
32DECLINLINE(bool) msiIs64Bit(PPCIDEVICE pDev)
33{
34 return (msiGetMessageControl(pDev) & VBOX_PCI_MSI_FLAGS_64BIT) != 0;
35}
36
37DECLINLINE(uint32_t*) msiGetMaskBits(PPCIDEVICE pDev)
38{
39 uint8_t iOff = msiIs64Bit(pDev) ? VBOX_MSI_CAP_MASK_BITS_64 : VBOX_MSI_CAP_MASK_BITS_32;
40 iOff += pDev->Int.s.u8MsiCapOffset;
41 return (uint32_t*)(pDev->config + iOff);
42}
43
44DECLINLINE(uint32_t*) msiGetPendingBits(PPCIDEVICE pDev)
45{
46 uint8_t iOff = msiIs64Bit(pDev) ? VBOX_MSI_CAP_PENDING_BITS_64 : VBOX_MSI_CAP_PENDING_BITS_32;
47 iOff += pDev->Int.s.u8MsiCapOffset;
48 return (uint32_t*)(pDev->config + iOff);
49}
50
51DECLINLINE(bool) msiIsEnabled(PPCIDEVICE pDev)
52{
53 return (msiGetMessageControl(pDev) & VBOX_PCI_MSI_FLAGS_ENABLE) != 0;
54}
55
56DECLINLINE(bool) msiIsMME(PPCIDEVICE pDev)
57{
58 return (msiGetMessageControl(pDev) & VBOX_PCI_MSI_FLAGS_QSIZE) != 0;
59}
60
61DECLINLINE(RTGCPHYS) msiGetMsiAddress(PPCIDEVICE pDev)
62{
63 if (msiIs64Bit(pDev))
64 {
65 uint32_t lo = PCIDevGetDWord(pDev, pDev->Int.s.u8MsiCapOffset + VBOX_MSI_CAP_MESSAGE_ADDRESS_LO);
66 uint32_t hi = PCIDevGetDWord(pDev, pDev->Int.s.u8MsiCapOffset + VBOX_MSI_CAP_MESSAGE_ADDRESS_HI);
67 return RT_MAKE_U64(lo, hi);
68 }
69 else
70 {
71 return PCIDevGetDWord(pDev, pDev->Int.s.u8MsiCapOffset + VBOX_MSI_CAP_MESSAGE_ADDRESS_32);
72 }
73}
74
75DECLINLINE(uint32_t) msiGetMsiData(PPCIDEVICE pDev, int32_t iVector)
76{
77 int16_t iOff = msiIs64Bit(pDev) ? VBOX_MSI_CAP_MESSAGE_DATA_64 : VBOX_MSI_CAP_MESSAGE_DATA_32;
78 uint16_t lo = PCIDevGetWord(pDev, pDev->Int.s.u8MsiCapOffset + iOff);
79
80 /// @todo: vector encoding into lower bits of message data, for Multiple Message Enable
81 Assert(!msiIsMME(pDev));
82
83 return RT_MAKE_U32(lo, 0);
84}
85
86DECLINLINE(bool) msiBitJustCleared(uint32_t uOldValue,
87 uint32_t uNewValue,
88 uint32_t uMask)
89{
90 return (!!(uOldValue & uMask) && !(uNewValue & uMask));
91}
92
93DECLINLINE(bool) msiBitJustSet(uint32_t uOldValue,
94 uint32_t uNewValue,
95 uint32_t uMask)
96{
97 return (!(uOldValue & uMask) && !!(uNewValue & uMask));
98}
99
100
101void MsiPciConfigWrite(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, uint32_t u32Address, uint32_t val, unsigned len)
102{
103 int32_t iOff = u32Address - pDev->Int.s.u8MsiCapOffset;
104 Assert(iOff >= 0 && (PCIIsMsiCapable(pDev) && iOff < pDev->Int.s.u8MsiCapSize));
105
106 Log2(("MsiPciConfigWrite: %d <- %x (%d)\n", iOff, val, len));
107
108 uint32_t uAddr = u32Address;
109 bool f64Bit = msiIs64Bit(pDev);
110
111 for (uint32_t i = 0; i < len; i++)
112 {
113 uint32_t reg = i + iOff;
114 uint8_t u8Val = (uint8_t)val;
115 switch (reg)
116 {
117 case 0: /* Capability ID, ro */
118 case 1: /* Next pointer, ro */
119 break;
120 case VBOX_MSI_CAP_MESSAGE_CONTROL:
121 /* don't change read-only bits: 1-3,7 */
122 u8Val &= UINT8_C(~0x8e);
123 pDev->config[uAddr] = u8Val | (pDev->config[uAddr] & UINT8_C(0x8e));
124 break;
125 case VBOX_MSI_CAP_MESSAGE_CONTROL + 1:
126 /* don't change read-only bit 8, and reserved 9-15 */
127 break;
128 default:
129 if (pDev->config[uAddr] != u8Val)
130 {
131 int32_t maskUpdated = -1;
132
133 /* If we're enabling masked vector, and have pending messages
134 for this vector, we have to send this message now */
135 if ( !f64Bit
136 && (reg >= VBOX_MSI_CAP_MASK_BITS_32)
137 && (reg < VBOX_MSI_CAP_MASK_BITS_32 + 4)
138 )
139 {
140 maskUpdated = reg - VBOX_MSI_CAP_MASK_BITS_32;
141 }
142 if ( f64Bit
143 && (reg >= VBOX_MSI_CAP_MASK_BITS_64)
144 && (reg < VBOX_MSI_CAP_MASK_BITS_64 + 4)
145 )
146 {
147 maskUpdated = reg - VBOX_MSI_CAP_MASK_BITS_64;
148 }
149
150 if (maskUpdated != -1 && msiIsEnabled(pDev))
151 {
152 uint32_t* puPending = msiGetPendingBits(pDev);
153 for (int iBitNum = 0; iBitNum < 8; iBitNum++)
154 {
155 int32_t iBit = 1 << iBitNum;
156 uint32_t uVector = maskUpdated*8 + iBitNum;
157
158 if (msiBitJustCleared(pDev->config[uAddr], u8Val, iBit))
159 {
160 Log(("msi: mask updated bit %d@%x (%d)\n", iBitNum, uAddr, maskUpdated));
161
162 /* To ensure that we're no longer masked */
163 pDev->config[uAddr] &= ~iBit;
164 if ((*puPending & (1 << uVector)) != 0)
165 {
166 Log(("msi: notify earlier masked pending vector: %d\n", uVector));
167 MsiNotify(pDevIns, pPciHlp, pDev, uVector, PDM_IRQ_LEVEL_HIGH);
168 }
169 }
170 if (msiBitJustSet(pDev->config[uAddr], u8Val, iBit))
171 {
172 Log(("msi: mask vector: %d\n", uVector));
173 }
174 }
175 }
176
177 pDev->config[uAddr] = u8Val;
178 }
179 }
180 uAddr++;
181 val >>= 8;
182 }
183}
184
185uint32_t MsiPciConfigRead (PPDMDEVINS pDevIns, PPCIDEVICE pDev, uint32_t u32Address, unsigned len)
186{
187 int32_t iOff = u32Address - pDev->Int.s.u8MsiCapOffset;
188
189 Assert(iOff >= 0 && (PCIIsMsiCapable(pDev) && iOff < pDev->Int.s.u8MsiCapSize));
190 uint32_t rv = 0;
191
192 switch (len)
193 {
194 case 1:
195 rv = PCIDevGetByte(pDev, u32Address);
196 break;
197 case 2:
198 rv = PCIDevGetWord(pDev, u32Address);
199 break;
200 case 4:
201 rv = PCIDevGetDWord(pDev, u32Address);
202 break;
203 default:
204 Assert(false);
205 }
206
207 Log2(("MsiPciConfigRead: %d (%d) -> %x\n", iOff, len, rv));
208
209 return rv;
210}
211
212
213int MsiInit(PPCIDEVICE pDev, PPDMMSIREG pMsiReg)
214{
215 if (pMsiReg->cMsiVectors == 0)
216 return VINF_SUCCESS;
217
218 uint16_t cVectors = pMsiReg->cMsiVectors;
219 uint8_t iCapOffset = pMsiReg->iMsiCapOffset;
220 uint8_t iNextOffset = pMsiReg->iMsiNextOffset;
221 uint16_t iFlags = pMsiReg->iMsiFlags;
222
223 if (cVectors != 1)
224 /* We cannot handle multiple vectors yet */
225 return VERR_TOO_MUCH_DATA;
226
227 if (cVectors > VBOX_MSI_MAX_ENTRIES)
228 return VERR_TOO_MUCH_DATA;
229
230 Assert(iCapOffset != 0 && iCapOffset < 0xff && iNextOffset < 0xff);
231
232 bool f64bit = (iFlags & VBOX_PCI_MSI_FLAGS_64BIT) != 0;
233 /* We always support per-vector masking */
234 iFlags |= VBOX_PCI_MSI_FLAGS_MASKBIT;
235
236 pDev->Int.s.u8MsiCapOffset = iCapOffset;
237 pDev->Int.s.u8MsiCapSize = f64bit ? VBOX_MSI_CAP_SIZE_64 : VBOX_MSI_CAP_SIZE_32;
238
239 PCIDevSetByte(pDev, iCapOffset + 0, VBOX_PCI_CAP_ID_MSI);
240 PCIDevSetByte(pDev, iCapOffset + 1, iNextOffset); /* next */
241 PCIDevSetWord(pDev, iCapOffset + VBOX_MSI_CAP_MESSAGE_CONTROL, iFlags);
242
243 *msiGetMaskBits(pDev) = 0;
244 *msiGetPendingBits(pDev) = 0;
245
246 PCISetMsiCapable(pDev);
247
248 return VINF_SUCCESS;
249}
250
251
252bool MsiIsEnabled(PPCIDEVICE pDev)
253{
254 return PCIIsMsiCapable(pDev) && msiIsEnabled(pDev);
255}
256
257void MsiNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel)
258{
259 AssertMsg(msiIsEnabled(pDev), ("Must be enabled to use that"));
260
261 uint32_t uMask = *msiGetMaskBits(pDev);
262 uint32_t* puPending = msiGetPendingBits(pDev);
263
264 LogFlow(("MsiNotify: %d pending=%x mask=%x\n", iVector, *puPending, uMask));
265
266 /* We only trigger MSI on level up */
267 if ((iLevel & PDM_IRQ_LEVEL_HIGH) == 0)
268 {
269 /* @todo: maybe clear pending interrupts on level down? */
270#if 0
271 *puPending &= ~(1<<iVector);
272 LogFlow(("msi: clear pending %d, now %x\n", iVector, *puPending));
273#endif
274 return;
275 }
276
277 if ((uMask & (1<<iVector)) != 0)
278 {
279 *puPending |= (1<<iVector);
280 LogFlow(("msi: %d is masked, mark pending, now %x\n", iVector, *puPending));
281 return;
282 }
283
284 RTGCPHYS GCAddr = msiGetMsiAddress(pDev);
285 uint32_t u32Value = msiGetMsiData(pDev, iVector);
286
287 *puPending &= ~(1<<iVector);
288
289 Assert(pPciHlp->pfnIoApicSendMsi != NULL);
290 pPciHlp->pfnIoApicSendMsi(pDevIns, GCAddr, u32Value);
291}
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