VirtualBox

source: vbox/trunk/src/VBox/Devices/Audio/DevIchHdaCodec.cpp@ 62605

最後變更 在這個檔案從62605是 62585,由 vboxsync 提交於 9 年 前

Audio: Cleanup: Renamed VBOX_WITH_[OSS|ALSA|PULSE] -> VBOX_WITH_AUDIO_[OSS|ALSA|PULSE].
  • 屬性 svn:eol-style 設為 native
  • 屬性 svn:keywords 設為 Author Date Id Revision
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1/* $Id: DevIchHdaCodec.cpp 62585 2016-07-27 11:51:17Z vboxsync $ */
2/** @file
3 * DevIchHdaCodec - VBox ICH Intel HD Audio Codec.
4 *
5 * Implemented against "Intel I/O Controller Hub 6 (ICH6) High Definition
6 * Audio / AC '97 - Programmer's Reference Manual (PRM)", document number
7 * 302349-003.
8 */
9
10/*
11 * Copyright (C) 2006-2016 Oracle Corporation
12 *
13 * This file is part of VirtualBox Open Source Edition (OSE), as
14 * available from http://www.alldomusa.eu.org. This file is free software;
15 * you can redistribute it and/or modify it under the terms of the GNU
16 * General Public License (GPL) as published by the Free Software
17 * Foundation, in version 2 as it comes in the "COPYING" file of the
18 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
19 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
20 */
21
22
23/*********************************************************************************************************************************
24* Header Files *
25*********************************************************************************************************************************/
26#define LOG_GROUP LOG_GROUP_DEV_HDA_CODEC
27#include <VBox/vmm/pdmdev.h>
28#include <VBox/vmm/pdmaudioifs.h>
29#include <iprt/assert.h>
30#include <iprt/uuid.h>
31#include <iprt/string.h>
32#include <iprt/mem.h>
33#include <iprt/asm.h>
34#include <iprt/cpp/utils.h>
35
36#include "VBoxDD.h"
37#include "DrvAudio.h"
38#include "DevIchHdaCodec.h"
39#include "DevIchHdaCommon.h"
40#include "AudioMixer.h"
41
42
43/*********************************************************************************************************************************
44* Defined Constants And Macros *
45*********************************************************************************************************************************/
46/* PRM 5.3.1 */
47/** Codec address mask. */
48#define CODEC_CAD_MASK 0xF0000000
49/** Codec address shift. */
50#define CODEC_CAD_SHIFT 28
51#define CODEC_DIRECT_MASK RT_BIT(27)
52/** Node ID mask. */
53#define CODEC_NID_MASK 0x07F00000
54/** Node ID shift. */
55#define CODEC_NID_SHIFT 20
56#define CODEC_VERBDATA_MASK 0x000FFFFF
57#define CODEC_VERB_4BIT_CMD 0x000FFFF0
58#define CODEC_VERB_4BIT_DATA 0x0000000F
59#define CODEC_VERB_8BIT_CMD 0x000FFF00
60#define CODEC_VERB_8BIT_DATA 0x000000FF
61#define CODEC_VERB_16BIT_CMD 0x000F0000
62#define CODEC_VERB_16BIT_DATA 0x0000FFFF
63
64#define CODEC_CAD(cmd) (((cmd) & CODEC_CAD_MASK) >> CODEC_CAD_SHIFT)
65#define CODEC_DIRECT(cmd) ((cmd) & CODEC_DIRECT_MASK)
66#define CODEC_NID(cmd) ((((cmd) & CODEC_NID_MASK)) >> CODEC_NID_SHIFT)
67#define CODEC_VERBDATA(cmd) ((cmd) & CODEC_VERBDATA_MASK)
68#define CODEC_VERB_CMD(cmd, mask, x) (((cmd) & (mask)) >> (x))
69#define CODEC_VERB_CMD4(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_4BIT_CMD, 4))
70#define CODEC_VERB_CMD8(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_8BIT_CMD, 8))
71#define CODEC_VERB_CMD16(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_16BIT_CMD, 16))
72#define CODEC_VERB_PAYLOAD4(cmd) ((cmd) & CODEC_VERB_4BIT_DATA)
73#define CODEC_VERB_PAYLOAD8(cmd) ((cmd) & CODEC_VERB_8BIT_DATA)
74#define CODEC_VERB_PAYLOAD16(cmd) ((cmd) & CODEC_VERB_16BIT_DATA)
75
76#define CODEC_VERB_GET_AMP_DIRECTION RT_BIT(15)
77#define CODEC_VERB_GET_AMP_SIDE RT_BIT(13)
78#define CODEC_VERB_GET_AMP_INDEX 0x7
79
80/* HDA spec 7.3.3.7 NoteA */
81#define CODEC_GET_AMP_DIRECTION(cmd) (((cmd) & CODEC_VERB_GET_AMP_DIRECTION) >> 15)
82#define CODEC_GET_AMP_SIDE(cmd) (((cmd) & CODEC_VERB_GET_AMP_SIDE) >> 13)
83#define CODEC_GET_AMP_INDEX(cmd) (CODEC_GET_AMP_DIRECTION(cmd) ? 0 : ((cmd) & CODEC_VERB_GET_AMP_INDEX))
84
85/* HDA spec 7.3.3.7 NoteC */
86#define CODEC_VERB_SET_AMP_OUT_DIRECTION RT_BIT(15)
87#define CODEC_VERB_SET_AMP_IN_DIRECTION RT_BIT(14)
88#define CODEC_VERB_SET_AMP_LEFT_SIDE RT_BIT(13)
89#define CODEC_VERB_SET_AMP_RIGHT_SIDE RT_BIT(12)
90#define CODEC_VERB_SET_AMP_INDEX (0x7 << 8)
91#define CODEC_VERB_SET_AMP_MUTE RT_BIT(7)
92/** Note: 7-bit value [6:0]. */
93#define CODEC_VERB_SET_AMP_GAIN 0x7F
94
95#define CODEC_SET_AMP_IS_OUT_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_OUT_DIRECTION) != 0)
96#define CODEC_SET_AMP_IS_IN_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_IN_DIRECTION) != 0)
97#define CODEC_SET_AMP_IS_LEFT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_LEFT_SIDE) != 0)
98#define CODEC_SET_AMP_IS_RIGHT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_RIGHT_SIDE) != 0)
99#define CODEC_SET_AMP_INDEX(cmd) (((cmd) & CODEC_VERB_SET_AMP_INDEX) >> 7)
100#define CODEC_SET_AMP_MUTE(cmd) ((cmd) & CODEC_VERB_SET_AMP_MUTE)
101#define CODEC_SET_AMP_GAIN(cmd) ((cmd) & CODEC_VERB_SET_AMP_GAIN)
102
103/* HDA spec 7.3.3.1 defines layout of configuration registers/verbs (0xF00) */
104/* VendorID (7.3.4.1) */
105#define CODEC_MAKE_F00_00(vendorID, deviceID) (((vendorID) << 16) | (deviceID))
106#define CODEC_F00_00_VENDORID(f00_00) (((f00_00) >> 16) & 0xFFFF)
107#define CODEC_F00_00_DEVICEID(f00_00) ((f00_00) & 0xFFFF)
108
109/** RevisionID (7.3.4.2). */
110#define CODEC_MAKE_F00_02(majRev, minRev, venFix, venProg, stepFix, stepProg) \
111 ( (((majRev) & 0xF) << 20) \
112 | (((minRev) & 0xF) << 16) \
113 | (((venFix) & 0xF) << 12) \
114 | (((venProg) & 0xF) << 8) \
115 | (((stepFix) & 0xF) << 4) \
116 | ((stepProg) & 0xF))
117
118/** Subordinate node count (7.3.4.3). */
119#define CODEC_MAKE_F00_04(startNodeNumber, totalNodeNumber) ((((startNodeNumber) & 0xFF) << 16)|((totalNodeNumber) & 0xFF))
120#define CODEC_F00_04_TO_START_NODE_NUMBER(f00_04) (((f00_04) >> 16) & 0xFF)
121#define CODEC_F00_04_TO_NODE_COUNT(f00_04) ((f00_04) & 0xFF)
122/*
123 * Function Group Type (7.3.4.4)
124 * 0 & [0x3-0x7f] are reserved types
125 * [0x80 - 0xff] are vendor defined function groups
126 */
127#define CODEC_MAKE_F00_05(UnSol, NodeType) (((UnSol) << 8)|(NodeType))
128#define CODEC_F00_05_UNSOL RT_BIT(8)
129#define CODEC_F00_05_AFG (0x1)
130#define CODEC_F00_05_MFG (0x2)
131#define CODEC_F00_05_IS_UNSOL(f00_05) RT_BOOL((f00_05) & RT_BIT(8))
132#define CODEC_F00_05_GROUP(f00_05) ((f00_05) & 0xff)
133/* Audio Function Group capabilities (7.3.4.5). */
134#define CODEC_MAKE_F00_08(BeepGen, InputDelay, OutputDelay) ((((BeepGen) & 0x1) << 16)| (((InputDelay) & 0xF) << 8) | ((OutputDelay) & 0xF))
135#define CODEC_F00_08_BEEP_GEN(f00_08) ((f00_08) & RT_BIT(16)
136
137/* Converter Stream, Channel (7.3.3.11). */
138#define CODEC_F00_06_GET_STREAM_ID(cmd) (((cmd) >> 4) & 0x0F)
139#define CODEC_F00_06_GET_CHANNEL_ID(cmd) (((cmd) & 0x0F))
140
141/* Widget Capabilities (7.3.4.6). */
142#define CODEC_MAKE_F00_09(type, delay, chan_ext) \
143 ( (((type) & 0xF) << 20) \
144 | (((delay) & 0xF) << 16) \
145 | (((chan_ext) & 0xF) << 13))
146/* note: types 0x8-0xe are reserved */
147#define CODEC_F00_09_TYPE_AUDIO_OUTPUT (0x0)
148#define CODEC_F00_09_TYPE_AUDIO_INPUT (0x1)
149#define CODEC_F00_09_TYPE_AUDIO_MIXER (0x2)
150#define CODEC_F00_09_TYPE_AUDIO_SELECTOR (0x3)
151#define CODEC_F00_09_TYPE_PIN_COMPLEX (0x4)
152#define CODEC_F00_09_TYPE_POWER_WIDGET (0x5)
153#define CODEC_F00_09_TYPE_VOLUME_KNOB (0x6)
154#define CODEC_F00_09_TYPE_BEEP_GEN (0x7)
155#define CODEC_F00_09_TYPE_VENDOR_DEFINED (0xF)
156
157#define CODEC_F00_09_CAP_CP RT_BIT(12)
158#define CODEC_F00_09_CAP_L_R_SWAP RT_BIT(11)
159#define CODEC_F00_09_CAP_POWER_CTRL RT_BIT(10)
160#define CODEC_F00_09_CAP_DIGITAL RT_BIT(9)
161#define CODEC_F00_09_CAP_CONNECTION_LIST RT_BIT(8)
162#define CODEC_F00_09_CAP_UNSOL RT_BIT(7)
163#define CODEC_F00_09_CAP_PROC_WIDGET RT_BIT(6)
164#define CODEC_F00_09_CAP_STRIPE RT_BIT(5)
165#define CODEC_F00_09_CAP_FMT_OVERRIDE RT_BIT(4)
166#define CODEC_F00_09_CAP_AMP_FMT_OVERRIDE RT_BIT(3)
167#define CODEC_F00_09_CAP_OUT_AMP_PRESENT RT_BIT(2)
168#define CODEC_F00_09_CAP_IN_AMP_PRESENT RT_BIT(1)
169#define CODEC_F00_09_CAP_STEREO RT_BIT(0)
170
171#define CODEC_F00_09_TYPE(f00_09) (((f00_09) >> 20) & 0xF)
172
173#define CODEC_F00_09_IS_CAP_CP(f00_09) RT_BOOL((f00_09) & RT_BIT(12))
174#define CODEC_F00_09_IS_CAP_L_R_SWAP(f00_09) RT_BOOL((f00_09) & RT_BIT(11))
175#define CODEC_F00_09_IS_CAP_POWER_CTRL(f00_09) RT_BOOL((f00_09) & RT_BIT(10))
176#define CODEC_F00_09_IS_CAP_DIGITAL(f00_09) RT_BOOL((f00_09) & RT_BIT(9))
177#define CODEC_F00_09_IS_CAP_CONNECTION_LIST(f00_09) RT_BOOL((f00_09) & RT_BIT(8))
178#define CODEC_F00_09_IS_CAP_UNSOL(f00_09) RT_BOOL((f00_09) & RT_BIT(7))
179#define CODEC_F00_09_IS_CAP_PROC_WIDGET(f00_09) RT_BOOL((f00_09) & RT_BIT(6))
180#define CODEC_F00_09_IS_CAP_STRIPE(f00_09) RT_BOOL((f00_09) & RT_BIT(5))
181#define CODEC_F00_09_IS_CAP_FMT_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(4))
182#define CODEC_F00_09_IS_CAP_AMP_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(3))
183#define CODEC_F00_09_IS_CAP_OUT_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(2))
184#define CODEC_F00_09_IS_CAP_IN_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(1))
185#define CODEC_F00_09_IS_CAP_LSB(f00_09) RT_BOOL((f00_09) & RT_BIT(0))
186
187/* Supported PCM size, rates (7.3.4.7) */
188#define CODEC_F00_0A_32_BIT RT_BIT(19)
189#define CODEC_F00_0A_24_BIT RT_BIT(18)
190#define CODEC_F00_0A_16_BIT RT_BIT(17)
191#define CODEC_F00_0A_8_BIT RT_BIT(16)
192
193#define CODEC_F00_0A_48KHZ_MULT_8X RT_BIT(11)
194#define CODEC_F00_0A_48KHZ_MULT_4X RT_BIT(10)
195#define CODEC_F00_0A_44_1KHZ_MULT_4X RT_BIT(9)
196#define CODEC_F00_0A_48KHZ_MULT_2X RT_BIT(8)
197#define CODEC_F00_0A_44_1KHZ_MULT_2X RT_BIT(7)
198#define CODEC_F00_0A_48KHZ RT_BIT(6)
199#define CODEC_F00_0A_44_1KHZ RT_BIT(5)
200/* 2/3 * 48kHz */
201#define CODEC_F00_0A_48KHZ_2_3X RT_BIT(4)
202/* 1/2 * 44.1kHz */
203#define CODEC_F00_0A_44_1KHZ_1_2X RT_BIT(3)
204/* 1/3 * 48kHz */
205#define CODEC_F00_0A_48KHZ_1_3X RT_BIT(2)
206/* 1/4 * 44.1kHz */
207#define CODEC_F00_0A_44_1KHZ_1_4X RT_BIT(1)
208/* 1/6 * 48kHz */
209#define CODEC_F00_0A_48KHZ_1_6X RT_BIT(0)
210
211/* Supported streams formats (7.3.4.8) */
212#define CODEC_F00_0B_AC3 RT_BIT(2)
213#define CODEC_F00_0B_FLOAT32 RT_BIT(1)
214#define CODEC_F00_0B_PCM RT_BIT(0)
215
216/* Pin Capabilities (7.3.4.9)*/
217#define CODEC_MAKE_F00_0C(vref_ctrl) (((vref_ctrl) & 0xFF) << 8)
218#define CODEC_F00_0C_CAP_HBR RT_BIT(27)
219#define CODEC_F00_0C_CAP_DP RT_BIT(24)
220#define CODEC_F00_0C_CAP_EAPD RT_BIT(16)
221#define CODEC_F00_0C_CAP_HDMI RT_BIT(7)
222#define CODEC_F00_0C_CAP_BALANCED_IO RT_BIT(6)
223#define CODEC_F00_0C_CAP_INPUT RT_BIT(5)
224#define CODEC_F00_0C_CAP_OUTPUT RT_BIT(4)
225#define CODEC_F00_0C_CAP_HEADPHONE_AMP RT_BIT(3)
226#define CODEC_F00_0C_CAP_PRESENCE_DETECT RT_BIT(2)
227#define CODEC_F00_0C_CAP_TRIGGER_REQUIRED RT_BIT(1)
228#define CODEC_F00_0C_CAP_IMPENDANCE_SENSE RT_BIT(0)
229
230#define CODEC_F00_0C_IS_CAP_HBR(f00_0c) ((f00_0c) & RT_BIT(27))
231#define CODEC_F00_0C_IS_CAP_DP(f00_0c) ((f00_0c) & RT_BIT(24))
232#define CODEC_F00_0C_IS_CAP_EAPD(f00_0c) ((f00_0c) & RT_BIT(16))
233#define CODEC_F00_0C_IS_CAP_HDMI(f00_0c) ((f00_0c) & RT_BIT(7))
234#define CODEC_F00_0C_IS_CAP_BALANCED_IO(f00_0c) ((f00_0c) & RT_BIT(6))
235#define CODEC_F00_0C_IS_CAP_INPUT(f00_0c) ((f00_0c) & RT_BIT(5))
236#define CODEC_F00_0C_IS_CAP_OUTPUT(f00_0c) ((f00_0c) & RT_BIT(4))
237#define CODEC_F00_0C_IS_CAP_HP(f00_0c) ((f00_0c) & RT_BIT(3))
238#define CODEC_F00_0C_IS_CAP_PRESENCE_DETECT(f00_0c) ((f00_0c) & RT_BIT(2))
239#define CODEC_F00_0C_IS_CAP_TRIGGER_REQUIRED(f00_0c) ((f00_0c) & RT_BIT(1))
240#define CODEC_F00_0C_IS_CAP_IMPENDANCE_SENSE(f00_0c) ((f00_0c) & RT_BIT(0))
241
242/* Input Amplifier capabilities (7.3.4.10). */
243#define CODEC_MAKE_F00_0D(mute_cap, step_size, num_steps, offset) \
244 ( (((mute_cap) & 0x1) << 31) \
245 | (((step_size) & 0xFF) << 16) \
246 | (((num_steps) & 0xFF) << 8) \
247 | ((offset) & 0xFF))
248
249#define CODEC_F00_0D_CAP_MUTE RT_BIT(7)
250
251#define CODEC_F00_0D_IS_CAP_MUTE(f00_0d) ( ( f00_0d) & RT_BIT(31))
252#define CODEC_F00_0D_STEP_SIZE(f00_0d) ((( f00_0d) & (0x7F << 16)) >> 16)
253#define CODEC_F00_0D_NUM_STEPS(f00_0d) ((((f00_0d) & (0x7F << 8)) >> 8) + 1)
254#define CODEC_F00_0D_OFFSET(f00_0d) ( (f00_0d) & 0x7F)
255
256/** Indicates that the amplifier can be muted. */
257#define CODEC_AMP_CAP_MUTE 0x1
258/** The amplifier's maximum number of steps. We want
259 * a ~90dB dynamic range, so 64 steps with 1.25dB each
260 * should do the trick.
261 *
262 * As we want to map our range to [0..128] values we can avoid
263 * multiplication and simply doing a shift later.
264 *
265 * Produces -96dB to +0dB.
266 * "0" indicates a step of 0.25dB, "127" indicates a step of 32dB.
267 */
268#define CODEC_AMP_NUM_STEPS 0x7F
269/** The initial gain offset (and when doing a node reset). */
270#define CODEC_AMP_OFF_INITIAL 0x7F
271/** The amplifier's gain step size. */
272#define CODEC_AMP_STEP_SIZE 0x2
273
274/* Output Amplifier capabilities (7.3.4.10) */
275#define CODEC_MAKE_F00_12 CODEC_MAKE_F00_0D
276
277#define CODEC_F00_12_IS_CAP_MUTE(f00_12) CODEC_F00_0D_IS_CAP_MUTE(f00_12)
278#define CODEC_F00_12_STEP_SIZE(f00_12) CODEC_F00_0D_STEP_SIZE(f00_12)
279#define CODEC_F00_12_NUM_STEPS(f00_12) CODEC_F00_0D_NUM_STEPS(f00_12)
280#define CODEC_F00_12_OFFSET(f00_12) CODEC_F00_0D_OFFSET(f00_12)
281
282/* Connection list lenght (7.3.4.11). */
283#define CODEC_MAKE_F00_0E(long_form, length) \
284 ( (((long_form) & 0x1) << 7) \
285 | ((length) & 0x7F))
286/* Indicates short-form NIDs. */
287#define CODEC_F00_0E_LIST_NID_SHORT 0
288/* Indicates long-form NIDs. */
289#define CODEC_F00_0E_LIST_NID_LONG 1
290#define CODEC_F00_0E_IS_LONG(f00_0e) RT_BOOL((f00_0e) & RT_BIT(7))
291#define CODEC_F00_0E_COUNT(f00_0e) ((f00_0e) & 0x7F)
292/* Supported Power States (7.3.4.12) */
293#define CODEC_F00_0F_EPSS RT_BIT(31)
294#define CODEC_F00_0F_CLKSTOP RT_BIT(30)
295#define CODEC_F00_0F_S3D3 RT_BIT(29)
296#define CODEC_F00_0F_D3COLD RT_BIT(4)
297#define CODEC_F00_0F_D3 RT_BIT(3)
298#define CODEC_F00_0F_D2 RT_BIT(2)
299#define CODEC_F00_0F_D1 RT_BIT(1)
300#define CODEC_F00_0F_D0 RT_BIT(0)
301
302/* Processing capabilities 7.3.4.13 */
303#define CODEC_MAKE_F00_10(num, benign) ((((num) & 0xFF) << 8) | ((benign) & 0x1))
304#define CODEC_F00_10_NUM(f00_10) (((f00_10) & (0xFF << 8)) >> 8)
305#define CODEC_F00_10_BENING(f00_10) ((f00_10) & 0x1)
306
307/* GPIO count (7.3.4.14). */
308#define CODEC_MAKE_F00_11(wake, unsol, numgpi, numgpo, numgpio) \
309 ( (((wake) & 0x1) << 31) \
310 | (((unsol) & 0x1) << 30) \
311 | (((numgpi) & 0xFF) << 16) \
312 | (((numgpo) & 0xFF) << 8) \
313 | ((numgpio) & 0xFF))
314
315/* Processing States (7.3.3.4). */
316#define CODEC_F03_OFF (0)
317#define CODEC_F03_ON RT_BIT(0)
318#define CODEC_F03_BENING RT_BIT(1)
319/* Power States (7.3.3.10). */
320#define CODEC_MAKE_F05(reset, stopok, error, act, set) \
321 ( (((reset) & 0x1) << 10) \
322 | (((stopok) & 0x1) << 9) \
323 | (((error) & 0x1) << 8) \
324 | (((act) & 0xF) << 4) \
325 | ((set) & 0xF))
326#define CODEC_F05_D3COLD (4)
327#define CODEC_F05_D3 (3)
328#define CODEC_F05_D2 (2)
329#define CODEC_F05_D1 (1)
330#define CODEC_F05_D0 (0)
331
332#define CODEC_F05_IS_RESET(value) (((value) & RT_BIT(10)) != 0)
333#define CODEC_F05_IS_STOPOK(value) (((value) & RT_BIT(9)) != 0)
334#define CODEC_F05_IS_ERROR(value) (((value) & RT_BIT(8)) != 0)
335#define CODEC_F05_ACT(value) (((value) & 0xF0) >> 4)
336#define CODEC_F05_SET(value) (((value) & 0xF))
337
338#define CODEC_F05_GE(p0, p1) ((p0) <= (p1))
339#define CODEC_F05_LE(p0, p1) ((p0) >= (p1))
340
341/* Converter Stream, Channel (7.3.3.11). */
342#define CODEC_MAKE_F06(stream, channel) \
343 ( (((stream) & 0xF) << 4) \
344 | ((channel) & 0xF))
345#define CODEC_F06_STREAM(value) ((value) & 0xF0)
346#define CODEC_F06_CHANNEL(value) ((value) & 0xF)
347
348/* Pin Widged Control (7.3.3.13). */
349#define CODEC_F07_VREF_HIZ (0)
350#define CODEC_F07_VREF_50 (0x1)
351#define CODEC_F07_VREF_GROUND (0x2)
352#define CODEC_F07_VREF_80 (0x4)
353#define CODEC_F07_VREF_100 (0x5)
354#define CODEC_F07_IN_ENABLE RT_BIT(5)
355#define CODEC_F07_OUT_ENABLE RT_BIT(6)
356#define CODEC_F07_OUT_H_ENABLE RT_BIT(7)
357
358/* Volume Knob Control (7.3.3.29). */
359#define CODEC_F0F_IS_DIRECT RT_BIT(7)
360#define CODEC_F0F_VOLUME (0x7F)
361
362/* Unsolicited enabled (7.3.3.14). */
363#define CODEC_MAKE_F08(enable, tag) ((((enable) & 1) << 7) | ((tag) & 0x3F))
364
365/* Converter formats (7.3.3.8) and (3.7.1). */
366/* This is the same format as SDnFMT. */
367#define CODEC_MAKE_A HDA_SDFMT_MAKE
368
369#define CODEC_A_TYPE HDA_SDFMT_TYPE
370#define CODEC_A_TYPE_PCM HDA_SDFMT_TYPE_PCM
371#define CODEC_A_TYPE_NON_PCM HDA_SDFMT_TYPE_NON_PCM
372
373#define CODEC_A_BASE HDA_SDFMT_BASE
374#define CODEC_A_BASE_48KHZ HDA_SDFMT_BASE_48KHZ
375#define CODEC_A_BASE_44KHZ HDA_SDFMT_BASE_44KHZ
376
377/* Pin Sense (7.3.3.15). */
378#define CODEC_MAKE_F09_ANALOG(fPresent, impedance) \
379( (((fPresent) & 0x1) << 31) \
380 | (((impedance) & 0x7FFFFFFF)))
381#define CODEC_F09_ANALOG_NA 0x7FFFFFFF
382#define CODEC_MAKE_F09_DIGITAL(fPresent, fELDValid) \
383( (((fPresent) & 0x1) << 31) \
384 | (((fELDValid) & 0x1) << 30))
385
386#define CODEC_MAKE_F0C(lrswap, eapd, btl) ((((lrswap) & 1) << 2) | (((eapd) & 1) << 1) | ((btl) & 1))
387#define CODEC_FOC_IS_LRSWAP(f0c) RT_BOOL((f0c) & RT_BIT(2))
388#define CODEC_FOC_IS_EAPD(f0c) RT_BOOL((f0c) & RT_BIT(1))
389#define CODEC_FOC_IS_BTL(f0c) RT_BOOL((f0c) & RT_BIT(0))
390/* HDA spec 7.3.3.31 defines layout of configuration registers/verbs (0xF1C) */
391/* Configuration's port connection */
392#define CODEC_F1C_PORT_MASK (0x3)
393#define CODEC_F1C_PORT_SHIFT (30)
394
395#define CODEC_F1C_PORT_COMPLEX (0x0)
396#define CODEC_F1C_PORT_NO_PHYS (0x1)
397#define CODEC_F1C_PORT_FIXED (0x2)
398#define CODEC_F1C_BOTH (0x3)
399
400/* Configuration default: connection */
401#define CODEC_F1C_PORT_MASK (0x3)
402#define CODEC_F1C_PORT_SHIFT (30)
403
404/* Connected to a jack (1/8", ATAPI, ...). */
405#define CODEC_F1C_PORT_COMPLEX (0x0)
406/* No physical connection. */
407#define CODEC_F1C_PORT_NO_PHYS (0x1)
408/* Fixed function device (integrated speaker, integrated mic, ...). */
409#define CODEC_F1C_PORT_FIXED (0x2)
410/* Both, a jack and an internal device are attached. */
411#define CODEC_F1C_BOTH (0x3)
412
413/* Configuration default: Location */
414#define CODEC_F1C_LOCATION_MASK (0x3F)
415#define CODEC_F1C_LOCATION_SHIFT (24)
416
417/* [4:5] bits of location region means chassis attachment */
418#define CODEC_F1C_LOCATION_PRIMARY_CHASSIS (0)
419#define CODEC_F1C_LOCATION_INTERNAL RT_BIT(4)
420#define CODEC_F1C_LOCATION_SECONDRARY_CHASSIS RT_BIT(5)
421#define CODEC_F1C_LOCATION_OTHER RT_BIT(5)
422
423/* [0:3] bits of location region means geometry location attachment */
424#define CODEC_F1C_LOCATION_NA (0)
425#define CODEC_F1C_LOCATION_REAR (0x1)
426#define CODEC_F1C_LOCATION_FRONT (0x2)
427#define CODEC_F1C_LOCATION_LEFT (0x3)
428#define CODEC_F1C_LOCATION_RIGTH (0x4)
429#define CODEC_F1C_LOCATION_TOP (0x5)
430#define CODEC_F1C_LOCATION_BOTTOM (0x6)
431#define CODEC_F1C_LOCATION_SPECIAL_0 (0x7)
432#define CODEC_F1C_LOCATION_SPECIAL_1 (0x8)
433#define CODEC_F1C_LOCATION_SPECIAL_2 (0x9)
434
435/* Configuration default: Device type */
436#define CODEC_F1C_DEVICE_MASK (0xF)
437#define CODEC_F1C_DEVICE_SHIFT (20)
438#define CODEC_F1C_DEVICE_LINE_OUT (0)
439#define CODEC_F1C_DEVICE_SPEAKER (0x1)
440#define CODEC_F1C_DEVICE_HP (0x2)
441#define CODEC_F1C_DEVICE_CD (0x3)
442#define CODEC_F1C_DEVICE_SPDIF_OUT (0x4)
443#define CODEC_F1C_DEVICE_DIGITAL_OTHER_OUT (0x5)
444#define CODEC_F1C_DEVICE_MODEM_LINE_SIDE (0x6)
445#define CODEC_F1C_DEVICE_MODEM_HANDSET_SIDE (0x7)
446#define CODEC_F1C_DEVICE_LINE_IN (0x8)
447#define CODEC_F1C_DEVICE_AUX (0x9)
448#define CODEC_F1C_DEVICE_MIC (0xA)
449#define CODEC_F1C_DEVICE_PHONE (0xB)
450#define CODEC_F1C_DEVICE_SPDIF_IN (0xC)
451#define CODEC_F1C_DEVICE_RESERVED (0xE)
452#define CODEC_F1C_DEVICE_OTHER (0xF)
453
454/* Configuration default: Connection type */
455#define CODEC_F1C_CONNECTION_TYPE_MASK (0xF)
456#define CODEC_F1C_CONNECTION_TYPE_SHIFT (16)
457
458#define CODEC_F1C_CONNECTION_TYPE_UNKNOWN (0)
459#define CODEC_F1C_CONNECTION_TYPE_1_8INCHES (0x1)
460#define CODEC_F1C_CONNECTION_TYPE_1_4INCHES (0x2)
461#define CODEC_F1C_CONNECTION_TYPE_ATAPI (0x3)
462#define CODEC_F1C_CONNECTION_TYPE_RCA (0x4)
463#define CODEC_F1C_CONNECTION_TYPE_OPTICAL (0x5)
464#define CODEC_F1C_CONNECTION_TYPE_OTHER_DIGITAL (0x6)
465#define CODEC_F1C_CONNECTION_TYPE_ANALOG (0x7)
466#define CODEC_F1C_CONNECTION_TYPE_DIN (0x8)
467#define CODEC_F1C_CONNECTION_TYPE_XLR (0x9)
468#define CODEC_F1C_CONNECTION_TYPE_RJ_11 (0xA)
469#define CODEC_F1C_CONNECTION_TYPE_COMBO (0xB)
470#define CODEC_F1C_CONNECTION_TYPE_OTHER (0xF)
471
472/* Configuration's color */
473#define CODEC_F1C_COLOR_MASK (0xF)
474#define CODEC_F1C_COLOR_SHIFT (12)
475#define CODEC_F1C_COLOR_UNKNOWN (0)
476#define CODEC_F1C_COLOR_BLACK (0x1)
477#define CODEC_F1C_COLOR_GREY (0x2)
478#define CODEC_F1C_COLOR_BLUE (0x3)
479#define CODEC_F1C_COLOR_GREEN (0x4)
480#define CODEC_F1C_COLOR_RED (0x5)
481#define CODEC_F1C_COLOR_ORANGE (0x6)
482#define CODEC_F1C_COLOR_YELLOW (0x7)
483#define CODEC_F1C_COLOR_PURPLE (0x8)
484#define CODEC_F1C_COLOR_PINK (0x9)
485#define CODEC_F1C_COLOR_RESERVED_0 (0xA)
486#define CODEC_F1C_COLOR_RESERVED_1 (0xB)
487#define CODEC_F1C_COLOR_RESERVED_2 (0xC)
488#define CODEC_F1C_COLOR_RESERVED_3 (0xD)
489#define CODEC_F1C_COLOR_WHITE (0xE)
490#define CODEC_F1C_COLOR_OTHER (0xF)
491
492/* Configuration's misc */
493#define CODEC_F1C_MISC_MASK (0xF)
494#define CODEC_F1C_MISC_SHIFT (8)
495#define CODEC_F1C_MISC_NONE 0
496#define CODEC_F1C_MISC_JACK_NO_PRESENCE_DETECT RT_BIT(0)
497#define CODEC_F1C_MISC_RESERVED_0 RT_BIT(1)
498#define CODEC_F1C_MISC_RESERVED_1 RT_BIT(2)
499#define CODEC_F1C_MISC_RESERVED_2 RT_BIT(3)
500
501/* Configuration default: Association */
502#define CODEC_F1C_ASSOCIATION_MASK (0xF)
503#define CODEC_F1C_ASSOCIATION_SHIFT (4)
504
505/** Reserved; don't use. */
506#define CODEC_F1C_ASSOCIATION_INVALID 0x0
507#define CODEC_F1C_ASSOCIATION_GROUP_0 0x1
508#define CODEC_F1C_ASSOCIATION_GROUP_1 0x2
509#define CODEC_F1C_ASSOCIATION_GROUP_2 0x3
510#define CODEC_F1C_ASSOCIATION_GROUP_3 0x4
511#define CODEC_F1C_ASSOCIATION_GROUP_4 0x5
512#define CODEC_F1C_ASSOCIATION_GROUP_5 0x6
513#define CODEC_F1C_ASSOCIATION_GROUP_6 0x7
514#define CODEC_F1C_ASSOCIATION_GROUP_7 0x8
515#define CODEC_F1C_ASSOCIATION_GROUP_15 0xF
516
517/* Configuration default: Association Sequence. */
518#define CODEC_F1C_SEQ_MASK (0xF)
519#define CODEC_F1C_SEQ_SHIFT (0)
520
521/* Implementation identification (7.3.3.30). */
522#define CODEC_MAKE_F20(bmid, bsku, aid) \
523 ( (((bmid) & 0xFFFF) << 16) \
524 | (((bsku) & 0xFF) << 8) \
525 | (((aid) & 0xFF)) \
526 )
527
528/* Macro definition helping in filling the configuration registers. */
529#define CODEC_MAKE_F1C(port_connectivity, location, device, connection_type, color, misc, association, sequence) \
530 ( (((port_connectivity) & 0xF) << CODEC_F1C_PORT_SHIFT) \
531 | (((location) & 0xF) << CODEC_F1C_LOCATION_SHIFT) \
532 | (((device) & 0xF) << CODEC_F1C_DEVICE_SHIFT) \
533 | (((connection_type) & 0xF) << CODEC_F1C_CONNECTION_TYPE_SHIFT) \
534 | (((color) & 0xF) << CODEC_F1C_COLOR_SHIFT) \
535 | (((misc) & 0xF) << CODEC_F1C_MISC_SHIFT) \
536 | (((association) & 0xF) << CODEC_F1C_ASSOCIATION_SHIFT) \
537 | (((sequence) & 0xF)))
538
539
540/*********************************************************************************************************************************
541* Structures and Typedefs *
542*********************************************************************************************************************************/
543/** The F00 parameter length (in dwords). */
544#define CODECNODE_F00_PARAM_LENGTH 20
545/** The F02 parameter length (in dwords). */
546#define CODECNODE_F02_PARAM_LENGTH 16
547
548/**
549 * Common (or core) codec node structure.
550 */
551typedef struct CODECCOMMONNODE
552{
553 /** The node's ID. */
554 uint8_t uID;
555 /** The node's name. */
556 char const *pszName;
557 /** The SDn ID this node is assigned to.
558 * 0 means not assigned, 1 is SDn0. */
559 uint8_t uSD;
560 /** The SDn's channel to use.
561 * Only valid if a valid SDn ID is set. */
562 uint8_t uChannel;
563 /* PRM 5.3.6 */
564 uint32_t au32F00_param[CODECNODE_F00_PARAM_LENGTH];
565 uint32_t au32F02_param[CODECNODE_F02_PARAM_LENGTH];
566} CODECCOMMONNODE;
567typedef CODECCOMMONNODE *PCODECCOMMONNODE;
568AssertCompile(CODECNODE_F00_PARAM_LENGTH == 20); /* saved state */
569AssertCompile(CODECNODE_F02_PARAM_LENGTH == 16); /* saved state */
570
571/**
572 * Compile time assertion on the expected node size.
573 */
574#define AssertNodeSize(a_Node, a_cParams) \
575 AssertCompile((a_cParams) <= (60 + 6)); /* the max size - saved state */ \
576 AssertCompile( sizeof(a_Node) - sizeof(CODECCOMMONNODE) \
577 == (((a_cParams) * sizeof(uint32_t) + sizeof(void *) - 1) & ~(sizeof(void *) - 1)) )
578
579typedef struct ROOTCODECNODE
580{
581 CODECCOMMONNODE node;
582} ROOTCODECNODE, *PROOTCODECNODE;
583AssertNodeSize(ROOTCODECNODE, 0);
584
585#define AMPLIFIER_SIZE 60
586typedef uint32_t AMPLIFIER[AMPLIFIER_SIZE];
587#define AMPLIFIER_IN 0
588#define AMPLIFIER_OUT 1
589#define AMPLIFIER_LEFT 1
590#define AMPLIFIER_RIGHT 0
591#define AMPLIFIER_REGISTER(amp, inout, side, index) ((amp)[30*(inout) + 15*(side) + (index)])
592typedef struct DACNODE
593{
594 CODECCOMMONNODE node;
595 uint32_t u32F0d_param;
596 uint32_t u32F04_param;
597 uint32_t u32F05_param;
598 uint32_t u32F06_param;
599 uint32_t u32F0c_param;
600
601 uint32_t u32A_param;
602 AMPLIFIER B_params;
603
604} DACNODE, *PDACNODE;
605AssertNodeSize(DACNODE, 6 + 60);
606
607typedef struct ADCNODE
608{
609 CODECCOMMONNODE node;
610 uint32_t u32F01_param;
611 uint32_t u32F03_param;
612 uint32_t u32F05_param;
613 uint32_t u32F06_param;
614 uint32_t u32F09_param;
615
616 uint32_t u32A_param;
617 AMPLIFIER B_params;
618} ADCNODE, *PADCNODE;
619AssertNodeSize(DACNODE, 6 + 60);
620
621typedef struct SPDIFOUTNODE
622{
623 CODECCOMMONNODE node;
624 uint32_t u32F05_param;
625 uint32_t u32F06_param;
626 uint32_t u32F09_param;
627 uint32_t u32F0d_param;
628
629 uint32_t u32A_param;
630 AMPLIFIER B_params;
631} SPDIFOUTNODE, *PSPDIFOUTNODE;
632AssertNodeSize(SPDIFOUTNODE, 5 + 60);
633
634typedef struct SPDIFINNODE
635{
636 CODECCOMMONNODE node;
637 uint32_t u32F05_param;
638 uint32_t u32F06_param;
639 uint32_t u32F09_param;
640 uint32_t u32F0d_param;
641
642 uint32_t u32A_param;
643 AMPLIFIER B_params;
644} SPDIFINNODE, *PSPDIFINNODE;
645AssertNodeSize(SPDIFINNODE, 5 + 60);
646
647typedef struct AFGCODECNODE
648{
649 CODECCOMMONNODE node;
650 uint32_t u32F05_param;
651 uint32_t u32F08_param;
652 uint32_t u32F17_param;
653 uint32_t u32F20_param;
654} AFGCODECNODE, *PAFGCODECNODE;
655AssertNodeSize(AFGCODECNODE, 4);
656
657typedef struct PORTNODE
658{
659 CODECCOMMONNODE node;
660 uint32_t u32F01_param;
661 uint32_t u32F07_param;
662 uint32_t u32F08_param;
663 uint32_t u32F09_param;
664 uint32_t u32F1c_param;
665 AMPLIFIER B_params;
666} PORTNODE, *PPORTNODE;
667AssertNodeSize(PORTNODE, 5 + 60);
668
669typedef struct DIGOUTNODE
670{
671 CODECCOMMONNODE node;
672 uint32_t u32F01_param;
673 uint32_t u32F05_param;
674 uint32_t u32F07_param;
675 uint32_t u32F08_param;
676 uint32_t u32F09_param;
677 uint32_t u32F1c_param;
678} DIGOUTNODE, *PDIGOUTNODE;
679AssertNodeSize(DIGOUTNODE, 6);
680
681typedef struct DIGINNODE
682{
683 CODECCOMMONNODE node;
684 uint32_t u32F05_param;
685 uint32_t u32F07_param;
686 uint32_t u32F08_param;
687 uint32_t u32F09_param;
688 uint32_t u32F0c_param;
689 uint32_t u32F1c_param;
690 uint32_t u32F1e_param;
691} DIGINNODE, *PDIGINNODE;
692AssertNodeSize(DIGINNODE, 7);
693
694typedef struct ADCMUXNODE
695{
696 CODECCOMMONNODE node;
697 uint32_t u32F01_param;
698
699 uint32_t u32A_param;
700 AMPLIFIER B_params;
701} ADCMUXNODE, *PADCMUXNODE;
702AssertNodeSize(ADCMUXNODE, 2 + 60);
703
704typedef struct PCBEEPNODE
705{
706 CODECCOMMONNODE node;
707 uint32_t u32F07_param;
708 uint32_t u32F0a_param;
709
710 uint32_t u32A_param;
711 AMPLIFIER B_params;
712 uint32_t u32F1c_param;
713} PCBEEPNODE, *PPCBEEPNODE;
714AssertNodeSize(PCBEEPNODE, 3 + 60 + 1);
715
716typedef struct CDNODE
717{
718 CODECCOMMONNODE node;
719 uint32_t u32F07_param;
720 uint32_t u32F1c_param;
721} CDNODE, *PCDNODE;
722AssertNodeSize(CDNODE, 2);
723
724typedef struct VOLUMEKNOBNODE
725{
726 CODECCOMMONNODE node;
727 uint32_t u32F08_param;
728 uint32_t u32F0f_param;
729} VOLUMEKNOBNODE, *PVOLUMEKNOBNODE;
730AssertNodeSize(VOLUMEKNOBNODE, 2);
731
732typedef struct ADCVOLNODE
733{
734 CODECCOMMONNODE node;
735 uint32_t u32F0c_param;
736 uint32_t u32F01_param;
737 uint32_t u32A_params;
738 AMPLIFIER B_params;
739} ADCVOLNODE, *PADCVOLNODE;
740AssertNodeSize(ADCVOLNODE, 3 + 60);
741
742typedef struct RESNODE
743{
744 CODECCOMMONNODE node;
745 uint32_t u32F05_param;
746 uint32_t u32F06_param;
747 uint32_t u32F07_param;
748 uint32_t u32F1c_param;
749
750 uint32_t u32A_param;
751} RESNODE, *PRESNODE;
752AssertNodeSize(RESNODE, 5);
753
754/**
755 * Used for the saved state.
756 */
757typedef struct CODECSAVEDSTATENODE
758{
759 CODECCOMMONNODE Core;
760 uint32_t au32Params[60 + 6];
761} CODECSAVEDSTATENODE;
762AssertNodeSize(CODECSAVEDSTATENODE, 60 + 6);
763
764typedef union CODECNODE
765{
766 CODECCOMMONNODE node;
767 ROOTCODECNODE root;
768 AFGCODECNODE afg;
769 DACNODE dac;
770 ADCNODE adc;
771 SPDIFOUTNODE spdifout;
772 SPDIFINNODE spdifin;
773 PORTNODE port;
774 DIGOUTNODE digout;
775 DIGINNODE digin;
776 ADCMUXNODE adcmux;
777 PCBEEPNODE pcbeep;
778 CDNODE cdnode;
779 VOLUMEKNOBNODE volumeKnob;
780 ADCVOLNODE adcvol;
781 RESNODE reserved;
782 CODECSAVEDSTATENODE SavedState;
783} CODECNODE, *PCODECNODE;
784AssertNodeSize(CODECNODE, 60 + 6);
785
786
787/*********************************************************************************************************************************
788* Global Variables *
789*********************************************************************************************************************************/
790/* STAC9220 - Nodes IDs / names. */
791#define STAC9220_NID_ROOT 0x0 /* Root node */
792#define STAC9220_NID_AFG 0x1 /* Audio Configuration Group */
793#define STAC9220_NID_DAC0 0x2 /* Out */
794#define STAC9220_NID_DAC1 0x3 /* Out */
795#define STAC9220_NID_DAC2 0x4 /* Out */
796#define STAC9220_NID_DAC3 0x5 /* Out */
797#define STAC9220_NID_ADC0 0x6 /* In */
798#define STAC9220_NID_ADC1 0x7 /* In */
799#define STAC9220_NID_SPDIF_OUT 0x8 /* Out */
800#define STAC9220_NID_SPDIF_IN 0x9 /* In */
801/** Also known as PIN_A. */
802#define STAC9220_NID_PIN_HEADPHONE0 0xA /* In, Out */
803#define STAC9220_NID_PIN_B 0xB /* In, Out */
804#define STAC9220_NID_PIN_C 0xC /* In, Out */
805/** Also known as PIN D. */
806#define STAC9220_NID_PIN_HEADPHONE1 0xD /* In, Out */
807#define STAC9220_NID_PIN_E 0xE /* In */
808#define STAC9220_NID_PIN_F 0xF /* In, Out */
809/** Also known as DIGOUT0. */
810#define STAC9220_NID_PIN_SPDIF_OUT 0x10 /* Out */
811/** Also known as DIGIN. */
812#define STAC9220_NID_PIN_SPDIF_IN 0x11 /* In */
813#define STAC9220_NID_ADC0_MUX 0x12 /* In */
814#define STAC9220_NID_ADC1_MUX 0x13 /* In */
815#define STAC9220_NID_PCBEEP 0x14 /* Out */
816#define STAC9220_NID_PIN_CD 0x15 /* In */
817#define STAC9220_NID_VOL_KNOB 0x16
818#define STAC9220_NID_AMP_ADC0 0x17 /* In */
819#define STAC9220_NID_AMP_ADC1 0x18 /* In */
820/* Only for STAC9221. */
821#define STAC9221_NID_ADAT_OUT 0x19 /* Out */
822#define STAC9221_NID_I2S_OUT 0x1A /* Out */
823#define STAC9221_NID_PIN_I2S_OUT 0x1B /* Out */
824
825/** Number of total nodes emulated. */
826#define STAC9221_NUM_NODES 0x1C
827
828/* STAC9220 - Referenced through STAC9220WIDGET in the constructor below. */
829static uint8_t const g_abStac9220Ports[] = { STAC9220_NID_PIN_HEADPHONE0, STAC9220_NID_PIN_B, STAC9220_NID_PIN_C, STAC9220_NID_PIN_HEADPHONE1, STAC9220_NID_PIN_E, STAC9220_NID_PIN_F, 0 };
830static uint8_t const g_abStac9220Dacs[] = { STAC9220_NID_DAC0, STAC9220_NID_DAC1, STAC9220_NID_DAC2, STAC9220_NID_DAC3, 0 };
831static uint8_t const g_abStac9220Adcs[] = { STAC9220_NID_ADC0, STAC9220_NID_ADC1, 0 };
832static uint8_t const g_abStac9220SpdifOuts[] = { STAC9220_NID_SPDIF_OUT, 0 };
833static uint8_t const g_abStac9220SpdifIns[] = { STAC9220_NID_SPDIF_IN, 0 };
834static uint8_t const g_abStac9220DigOutPins[] = { STAC9220_NID_PIN_SPDIF_OUT, 0 };
835static uint8_t const g_abStac9220DigInPins[] = { STAC9220_NID_PIN_SPDIF_IN, 0 };
836static uint8_t const g_abStac9220AdcVols[] = { STAC9220_NID_AMP_ADC0, STAC9220_NID_AMP_ADC1, 0 };
837static uint8_t const g_abStac9220AdcMuxs[] = { STAC9220_NID_ADC0_MUX, STAC9220_NID_ADC1_MUX, 0 };
838static uint8_t const g_abStac9220Pcbeeps[] = { STAC9220_NID_PCBEEP, 0 };
839static uint8_t const g_abStac9220Cds[] = { STAC9220_NID_PIN_CD, 0 };
840static uint8_t const g_abStac9220VolKnobs[] = { STAC9220_NID_VOL_KNOB, 0 };
841/* STAC 9221. */
842/** @todo Is STAC9220_NID_SPDIF_IN really correct for reserved nodes? */
843static uint8_t const g_abStac9220Reserveds[] = { STAC9220_NID_SPDIF_IN, STAC9221_NID_ADAT_OUT, STAC9221_NID_I2S_OUT, STAC9221_NID_PIN_I2S_OUT, 0 };
844
845/** SSM description of a CODECNODE. */
846static SSMFIELD const g_aCodecNodeFields[] =
847{
848 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.uID),
849 SSMFIELD_ENTRY_PAD_HC_AUTO(3, 3),
850 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.au32F00_param),
851 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.au32F02_param),
852 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, au32Params),
853 SSMFIELD_ENTRY_TERM()
854};
855
856/** Backward compatibility with v1 of the CODECNODE. */
857static SSMFIELD const g_aCodecNodeFieldsV1[] =
858{
859 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.uID),
860 SSMFIELD_ENTRY_PAD_HC_AUTO(3, 7),
861 SSMFIELD_ENTRY_OLD_HCPTR(Core.name),
862 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.au32F00_param),
863 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, Core.au32F02_param),
864 SSMFIELD_ENTRY( CODECSAVEDSTATENODE, au32Params),
865 SSMFIELD_ENTRY_TERM()
866};
867
868
869
870
871static DECLCALLBACK(void) stac9220DbgNodes(PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs)
872{
873 for (int i = 1; i < pThis->cTotalNodes; i++)
874 {
875 PCODECNODE pNode = &pThis->paNodes[i];
876 AMPLIFIER *pAmp = &pNode->dac.B_params;
877
878 uint8_t lVol = AMPLIFIER_REGISTER(*pAmp, AMPLIFIER_OUT, AMPLIFIER_LEFT, 0) & 0x7f;
879 uint8_t rVol = AMPLIFIER_REGISTER(*pAmp, AMPLIFIER_OUT, AMPLIFIER_RIGHT, 0) & 0x7f;
880
881 pHlp->pfnPrintf(pHlp, "0x%x: lVol=%RU8, rVol=%RU8\n", i, lVol, rVol);
882 }
883}
884
885
886static DECLCALLBACK(int) stac9220ResetNode(PHDACODEC pThis, uint8_t uNID, PCODECNODE pNode)
887{
888 LogFlowFunc(("NID=0x%x (%RU8)\n", uNID, uNID));
889
890 if ( !pThis->fInReset
891 && ( uNID != STAC9220_NID_ROOT
892 && uNID != STAC9220_NID_AFG)
893 )
894 {
895 RT_ZERO(pNode->node);
896 }
897
898 /* Set common parameters across all nodes. */
899 pNode->node.uID = uNID;
900 pNode->node.uSD = 0;
901
902 switch (uNID)
903 {
904 /* Root node. */
905 case STAC9220_NID_ROOT:
906 {
907 /* Set the revision ID. */
908 pNode->root.node.au32F00_param[0x02] = CODEC_MAKE_F00_02(0x1, 0x0, 0x3, 0x4, 0x0, 0x1);
909 break;
910 }
911
912 /*
913 * AFG (Audio Function Group).
914 */
915 case STAC9220_NID_AFG:
916 {
917 pNode->afg.node.au32F00_param[0x08] = CODEC_MAKE_F00_08(1, 0xd, 0xd);
918 /* We set the AFG's PCM capabitilies fixed to 44.1kHz, 16-bit signed. */
919 pNode->afg.node.au32F00_param[0x0A] = CODEC_F00_0A_44_1KHZ | CODEC_F00_0A_16_BIT;
920 pNode->afg.node.au32F00_param[0x0B] = CODEC_F00_0B_PCM;
921 pNode->afg.node.au32F00_param[0x0C] = CODEC_MAKE_F00_0C(0x17)
922 | CODEC_F00_0C_CAP_BALANCED_IO
923 | CODEC_F00_0C_CAP_INPUT
924 | CODEC_F00_0C_CAP_OUTPUT
925 | CODEC_F00_0C_CAP_PRESENCE_DETECT
926 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED
927 | CODEC_F00_0C_CAP_IMPENDANCE_SENSE;
928
929 /* Default input amplifier capabilities. */
930 pNode->node.au32F00_param[0x0D] = CODEC_MAKE_F00_0D(CODEC_AMP_CAP_MUTE,
931 CODEC_AMP_STEP_SIZE,
932 CODEC_AMP_NUM_STEPS,
933 CODEC_AMP_OFF_INITIAL);
934 /* Default output amplifier capabilities. */
935 pNode->node.au32F00_param[0x12] = CODEC_MAKE_F00_12(CODEC_AMP_CAP_MUTE,
936 CODEC_AMP_STEP_SIZE,
937 CODEC_AMP_NUM_STEPS,
938 CODEC_AMP_OFF_INITIAL);
939
940 pNode->afg.node.au32F00_param[0x11] = CODEC_MAKE_F00_11(1, 1, 0, 0, 4);
941 pNode->afg.node.au32F00_param[0x0F] = CODEC_F00_0F_D3
942 | CODEC_F00_0F_D2
943 | CODEC_F00_0F_D1
944 | CODEC_F00_0F_D0;
945
946 pNode->afg.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D2, CODEC_F05_D2); /* PS-Act: D2, PS->Set D2. */
947 pNode->afg.u32F08_param = 0;
948 pNode->afg.u32F17_param = 0;
949 break;
950 }
951
952 /*
953 * DACs.
954 */
955 case STAC9220_NID_DAC0: /* DAC0: Headphones 0 + 1 */
956 case STAC9220_NID_DAC1: /* DAC1: PIN C */
957 case STAC9220_NID_DAC2: /* DAC2: PIN B */
958 case STAC9220_NID_DAC3: /* DAC3: PIN F */
959 {
960 pNode->dac.u32A_param = CODEC_MAKE_A(HDA_SDFMT_TYPE_PCM, HDA_SDFMT_BASE_44KHZ,
961 HDA_SDFMT_MULT_1X, HDA_SDFMT_DIV_1X, HDA_SDFMT_16_BIT,
962 HDA_SDFMT_CHAN_STEREO);
963
964 /* 7.3.4.6: Audio widget capabilities. */
965 pNode->dac.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_OUTPUT, 13, 0)
966 | CODEC_F00_09_CAP_L_R_SWAP
967 | CODEC_F00_09_CAP_POWER_CTRL
968 | CODEC_F00_09_CAP_OUT_AMP_PRESENT
969 | CODEC_F00_09_CAP_STEREO;
970
971 /* Connection list; must be 0 if the only connection for the widget is
972 * to the High Definition Audio Link. */
973 pNode->dac.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 0 /* Entries */);
974
975 pNode->dac.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D3, CODEC_F05_D3);
976
977 RT_ZERO(pNode->dac.B_params);
978 AMPLIFIER_REGISTER(pNode->dac.B_params, AMPLIFIER_OUT, AMPLIFIER_LEFT, 0) = 0x7F | RT_BIT(7);
979 AMPLIFIER_REGISTER(pNode->dac.B_params, AMPLIFIER_OUT, AMPLIFIER_RIGHT, 0) = 0x7F | RT_BIT(7);
980 break;
981 }
982
983 /*
984 * ADCs.
985 */
986 case STAC9220_NID_ADC0: /* Analog input. */
987 {
988 pNode->node.au32F02_param[0] = STAC9220_NID_AMP_ADC0;
989 goto adc_init;
990 }
991
992 case STAC9220_NID_ADC1: /* Analog input (CD). */
993 {
994 pNode->node.au32F02_param[0] = STAC9220_NID_AMP_ADC1;
995
996 /* Fall through is intentional. */
997 adc_init:
998
999 pNode->adc.u32A_param = CODEC_MAKE_A(HDA_SDFMT_TYPE_PCM, HDA_SDFMT_BASE_44KHZ,
1000 HDA_SDFMT_MULT_1X, HDA_SDFMT_DIV_1X, HDA_SDFMT_16_BIT,
1001 HDA_SDFMT_CHAN_STEREO);
1002
1003 pNode->adc.u32F03_param = RT_BIT(0);
1004 pNode->adc.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D3, CODEC_F05_D3); /* PS-Act: D3 Set: D3 */
1005
1006 pNode->adc.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_INPUT, 0xD, 0)
1007 | CODEC_F00_09_CAP_POWER_CTRL
1008 | CODEC_F00_09_CAP_CONNECTION_LIST
1009 | CODEC_F00_09_CAP_PROC_WIDGET
1010 | CODEC_F00_09_CAP_STEREO;
1011 /* Connection list entries. */
1012 pNode->adc.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 1 /* Entries */);
1013 break;
1014 }
1015
1016 /*
1017 * SP/DIF In/Out.
1018 */
1019 case STAC9220_NID_SPDIF_OUT:
1020 {
1021 pNode->spdifout.u32A_param = CODEC_MAKE_A(HDA_SDFMT_TYPE_PCM, HDA_SDFMT_BASE_44KHZ,
1022 HDA_SDFMT_MULT_1X, HDA_SDFMT_DIV_1X, HDA_SDFMT_16_BIT,
1023 HDA_SDFMT_CHAN_STEREO);
1024 pNode->spdifout.u32F06_param = 0;
1025 pNode->spdifout.u32F0d_param = 0;
1026
1027 pNode->spdifout.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_OUTPUT, 4, 0)
1028 | CODEC_F00_09_CAP_DIGITAL
1029 | CODEC_F00_09_CAP_FMT_OVERRIDE
1030 | CODEC_F00_09_CAP_STEREO;
1031
1032 /* Use a fixed format from AFG. */
1033 pNode->spdifout.node.au32F00_param[0xA] = pThis->paNodes[STAC9220_NID_AFG].node.au32F00_param[0xA];
1034 pNode->spdifout.node.au32F00_param[0xB] = CODEC_F00_0B_PCM;
1035 break;
1036 }
1037
1038 case STAC9220_NID_SPDIF_IN:
1039 {
1040 pNode->spdifin.u32A_param = CODEC_MAKE_A(HDA_SDFMT_TYPE_PCM, HDA_SDFMT_BASE_44KHZ,
1041 HDA_SDFMT_MULT_1X, HDA_SDFMT_DIV_1X, HDA_SDFMT_16_BIT,
1042 HDA_SDFMT_CHAN_STEREO);
1043
1044 pNode->spdifin.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_INPUT, 4, 0)
1045 | CODEC_F00_09_CAP_DIGITAL
1046 | CODEC_F00_09_CAP_CONNECTION_LIST
1047 | CODEC_F00_09_CAP_FMT_OVERRIDE
1048 | CODEC_F00_09_CAP_STEREO;
1049
1050 /* Use a fixed format from AFG. */
1051 pNode->spdifin.node.au32F00_param[0xA] = pThis->paNodes[STAC9220_NID_AFG].node.au32F00_param[0xA];
1052 pNode->spdifin.node.au32F00_param[0xB] = CODEC_F00_0B_PCM;
1053
1054 /* Connection list entries. */
1055 pNode->spdifin.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 1 /* Entries */);
1056 pNode->spdifin.node.au32F02_param[0] = 0x11;
1057 break;
1058 }
1059
1060 /*
1061 * PINs / Ports.
1062 */
1063 case STAC9220_NID_PIN_HEADPHONE0: /* Port A: Headphone in/out (front). */
1064 {
1065 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(0 /*fPresent*/, CODEC_F09_ANALOG_NA);
1066
1067 pNode->port.node.au32F00_param[0xC] = CODEC_MAKE_F00_0C(0x17)
1068 | CODEC_F00_0C_CAP_INPUT
1069 | CODEC_F00_0C_CAP_OUTPUT
1070 | CODEC_F00_0C_CAP_HEADPHONE_AMP
1071 | CODEC_F00_0C_CAP_PRESENCE_DETECT
1072 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED;
1073
1074 /* Connection list entry 0: Goes to DAC0. */
1075 pNode->port.node.au32F02_param[0] = STAC9220_NID_DAC0;
1076
1077 if (!pThis->fInReset)
1078 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1079 CODEC_F1C_LOCATION_FRONT,
1080 CODEC_F1C_DEVICE_HP,
1081 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1082 CODEC_F1C_COLOR_GREEN,
1083 CODEC_F1C_MISC_NONE,
1084 CODEC_F1C_ASSOCIATION_GROUP_1, 0x0 /* Seq */);
1085 goto port_init;
1086 }
1087
1088 case STAC9220_NID_PIN_B: /* Port B: Rear CLFE (Center / Subwoofer). */
1089 {
1090 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(1 /*fPresent*/, CODEC_F09_ANALOG_NA);
1091
1092 pNode->port.node.au32F00_param[0xC] = CODEC_MAKE_F00_0C(0x17)
1093 | CODEC_F00_0C_CAP_INPUT
1094 | CODEC_F00_0C_CAP_OUTPUT
1095 | CODEC_F00_0C_CAP_PRESENCE_DETECT
1096 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED;
1097
1098 /* Connection list entry 0: Goes to DAC2. */
1099 pNode->port.node.au32F02_param[0] = STAC9220_NID_DAC2;
1100
1101 if (!pThis->fInReset)
1102 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1103 CODEC_F1C_LOCATION_REAR,
1104 CODEC_F1C_DEVICE_SPEAKER,
1105 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1106 CODEC_F1C_COLOR_BLACK,
1107 CODEC_F1C_MISC_NONE,
1108 CODEC_F1C_ASSOCIATION_GROUP_0, 0x1 /* Seq */);
1109 goto port_init;
1110 }
1111
1112 case STAC9220_NID_PIN_C: /* Rear Speaker. */
1113 {
1114 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(1 /*fPresent*/, CODEC_F09_ANALOG_NA);
1115
1116 pNode->port.node.au32F00_param[0xC] = CODEC_MAKE_F00_0C(0x17)
1117 | CODEC_F00_0C_CAP_INPUT
1118 | CODEC_F00_0C_CAP_OUTPUT
1119 | CODEC_F00_0C_CAP_PRESENCE_DETECT
1120 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED;
1121
1122 /* Connection list entry 0: Goes to DAC1. */
1123 pNode->port.node.au32F02_param[0x0] = STAC9220_NID_DAC1;
1124
1125 if (!pThis->fInReset)
1126 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1127 CODEC_F1C_LOCATION_REAR,
1128 CODEC_F1C_DEVICE_SPEAKER,
1129 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1130 CODEC_F1C_COLOR_GREEN,
1131 CODEC_F1C_MISC_NONE,
1132 CODEC_F1C_ASSOCIATION_GROUP_0, 0x0 /* Seq */);
1133 goto port_init;
1134 }
1135
1136 case STAC9220_NID_PIN_HEADPHONE1: /* Also known as PIN_D. */
1137 {
1138 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(1 /*fPresent*/, CODEC_F09_ANALOG_NA);
1139
1140 pNode->port.node.au32F00_param[0xC] = CODEC_MAKE_F00_0C(0x17)
1141 | CODEC_F00_0C_CAP_INPUT
1142 | CODEC_F00_0C_CAP_OUTPUT
1143 | CODEC_F00_0C_CAP_HEADPHONE_AMP
1144 | CODEC_F00_0C_CAP_PRESENCE_DETECT
1145 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED;
1146
1147 /* Connection list entry 0: Goes to DAC1. */
1148 pNode->port.node.au32F02_param[0x0] = STAC9220_NID_DAC0;
1149
1150 if (!pThis->fInReset)
1151 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1152 CODEC_F1C_LOCATION_FRONT,
1153 CODEC_F1C_DEVICE_MIC,
1154 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1155 CODEC_F1C_COLOR_PINK,
1156 CODEC_F1C_MISC_NONE,
1157 CODEC_F1C_ASSOCIATION_GROUP_4, 0x0 /* Seq */);
1158 /* Fall through is intentional. */
1159
1160 port_init:
1161
1162 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE
1163 | CODEC_F07_OUT_ENABLE;
1164 pNode->port.u32F08_param = 0;
1165
1166 pNode->port.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0, 0)
1167 | CODEC_F00_09_CAP_CONNECTION_LIST
1168 | CODEC_F00_09_CAP_UNSOL
1169 | CODEC_F00_09_CAP_STEREO;
1170 /* Connection list entries. */
1171 pNode->port.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 1 /* Entries */);
1172 break;
1173 }
1174
1175 case STAC9220_NID_PIN_E:
1176 {
1177 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE;
1178 pNode->port.u32F08_param = 0;
1179 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(true /* fPresent */, CODEC_F09_ANALOG_NA);
1180
1181 pNode->port.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0, 0)
1182 | CODEC_F00_09_CAP_UNSOL
1183 | CODEC_F00_09_CAP_STEREO;
1184
1185 pNode->port.node.au32F00_param[0xC] = CODEC_F00_0C_CAP_INPUT
1186 | CODEC_F00_0C_CAP_PRESENCE_DETECT;
1187
1188 if (!pThis->fInReset)
1189 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1190 CODEC_F1C_LOCATION_REAR,
1191 CODEC_F1C_DEVICE_LINE_IN,
1192 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1193 CODEC_F1C_COLOR_BLUE,
1194 CODEC_F1C_MISC_NONE,
1195 CODEC_F1C_ASSOCIATION_GROUP_4, 0x1 /* Seq */);
1196 break;
1197 }
1198
1199 case STAC9220_NID_PIN_F:
1200 {
1201 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE | CODEC_F07_OUT_ENABLE;
1202 pNode->port.u32F08_param = 0;
1203 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(true /* fPresent */, CODEC_F09_ANALOG_NA);
1204
1205 pNode->port.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0, 0)
1206 | CODEC_F00_09_CAP_CONNECTION_LIST
1207 | CODEC_F00_09_CAP_UNSOL
1208 | CODEC_F00_09_CAP_OUT_AMP_PRESENT
1209 | CODEC_F00_09_CAP_STEREO;
1210
1211 pNode->port.node.au32F00_param[0xC] = CODEC_F00_0C_CAP_INPUT
1212 | CODEC_F00_0C_CAP_OUTPUT;
1213
1214 /* Connection list entry 0: Goes to DAC3. */
1215 pNode->port.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 1 /* Entries */);
1216 pNode->port.node.au32F02_param[0x0] = STAC9220_NID_DAC3;
1217
1218 if (!pThis->fInReset)
1219 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1220 CODEC_F1C_LOCATION_INTERNAL,
1221 CODEC_F1C_DEVICE_SPEAKER,
1222 CODEC_F1C_CONNECTION_TYPE_1_8INCHES,
1223 CODEC_F1C_COLOR_ORANGE,
1224 CODEC_F1C_MISC_NONE,
1225 CODEC_F1C_ASSOCIATION_GROUP_0, 0x2 /* Seq */);
1226 break;
1227 }
1228
1229 case STAC9220_NID_PIN_SPDIF_OUT: /* Rear SPDIF Out. */
1230 {
1231 pNode->digout.u32F07_param = CODEC_F07_OUT_ENABLE;
1232 pNode->digout.u32F09_param = 0;
1233
1234 pNode->digout.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0, 0)
1235 | CODEC_F00_09_CAP_DIGITAL
1236 | CODEC_F00_09_CAP_CONNECTION_LIST
1237 | CODEC_F00_09_CAP_STEREO;
1238 pNode->digout.node.au32F00_param[0xC] = CODEC_F00_0C_CAP_OUTPUT
1239 | CODEC_F00_0C_CAP_PRESENCE_DETECT;
1240
1241 /* Connection list entries. */
1242 pNode->digout.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 3 /* Entries */);
1243 pNode->digout.node.au32F02_param[0x0] = RT_MAKE_U32_FROM_U8(STAC9220_NID_SPDIF_OUT,
1244 STAC9220_NID_AMP_ADC0, STAC9221_NID_ADAT_OUT, 0);
1245 if (!pThis->fInReset)
1246 pNode->digout.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1247 CODEC_F1C_LOCATION_REAR,
1248 CODEC_F1C_DEVICE_SPDIF_OUT,
1249 CODEC_F1C_CONNECTION_TYPE_DIN,
1250 CODEC_F1C_COLOR_BLACK,
1251 CODEC_F1C_MISC_NONE,
1252 CODEC_F1C_ASSOCIATION_GROUP_2, 0x0 /* Seq */);
1253 break;
1254 }
1255
1256 case STAC9220_NID_PIN_SPDIF_IN:
1257 {
1258 pNode->digin.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D3, CODEC_F05_D3); /* PS-Act: D3 -> D3 */
1259 pNode->digin.u32F07_param = CODEC_F07_IN_ENABLE;
1260 pNode->digin.u32F08_param = 0;
1261 pNode->digin.u32F09_param = CODEC_MAKE_F09_DIGITAL(0, 0);
1262 pNode->digin.u32F0c_param = 0;
1263
1264 pNode->digin.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 3, 0)
1265 | CODEC_F00_09_CAP_POWER_CTRL
1266 | CODEC_F00_09_CAP_DIGITAL
1267 | CODEC_F00_09_CAP_UNSOL
1268 | CODEC_F00_09_CAP_STEREO;
1269
1270 pNode->digin.node.au32F00_param[0xC] = CODEC_F00_0C_CAP_EAPD
1271 | CODEC_F00_0C_CAP_INPUT
1272 | CODEC_F00_0C_CAP_PRESENCE_DETECT;
1273 if (!pThis->fInReset)
1274 pNode->digin.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX,
1275 CODEC_F1C_LOCATION_REAR,
1276 CODEC_F1C_DEVICE_SPDIF_IN,
1277 CODEC_F1C_CONNECTION_TYPE_OTHER_DIGITAL,
1278 CODEC_F1C_COLOR_BLACK,
1279 CODEC_F1C_MISC_NONE,
1280 CODEC_F1C_ASSOCIATION_GROUP_5, 0x0 /* Seq */);
1281 break;
1282 }
1283
1284 case STAC9220_NID_ADC0_MUX:
1285 {
1286 pNode->adcmux.u32F01_param = 0; /* Connection select control index (STAC9220_NID_PIN_E). */
1287 goto adcmux_init;
1288 }
1289
1290 case STAC9220_NID_ADC1_MUX:
1291 {
1292 pNode->adcmux.u32F01_param = 1; /* Connection select control index (STAC9220_NID_PIN_CD). */
1293 /* Fall through is intentional. */
1294
1295 adcmux_init:
1296
1297 pNode->adcmux.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_SELECTOR, 0, 0)
1298 | CODEC_F00_09_CAP_CONNECTION_LIST
1299 | CODEC_F00_09_CAP_AMP_FMT_OVERRIDE
1300 | CODEC_F00_09_CAP_OUT_AMP_PRESENT
1301 | CODEC_F00_09_CAP_STEREO;
1302
1303 pNode->adcmux.node.au32F00_param[0xD] = CODEC_MAKE_F00_0D(0, 27, 4, 0);
1304
1305 /* Connection list entries. */
1306 pNode->adcmux.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 7 /* Entries */);
1307 pNode->adcmux.node.au32F02_param[0x0] = RT_MAKE_U32_FROM_U8(STAC9220_NID_PIN_E,
1308 STAC9220_NID_PIN_CD,
1309 STAC9220_NID_PIN_F,
1310 STAC9220_NID_PIN_B);
1311 pNode->adcmux.node.au32F02_param[0x4] = RT_MAKE_U32_FROM_U8(STAC9220_NID_PIN_C,
1312 STAC9220_NID_PIN_HEADPHONE1,
1313 STAC9220_NID_PIN_HEADPHONE0,
1314 0x0 /* Unused */);
1315
1316 /* STAC 9220 v10 6.21-22.{4,5} both(left and right) out amplifiers initialized with 0. */
1317 RT_ZERO(pNode->adcmux.B_params);
1318 break;
1319 }
1320
1321 case STAC9220_NID_PCBEEP:
1322 {
1323 pNode->pcbeep.u32F0a_param = 0;
1324
1325 pNode->pcbeep.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_BEEP_GEN, 0, 0)
1326 | CODEC_F00_09_CAP_AMP_FMT_OVERRIDE
1327 | CODEC_F00_09_CAP_OUT_AMP_PRESENT;
1328 pNode->pcbeep.node.au32F00_param[0xD] = CODEC_MAKE_F00_0D(0, 17, 3, 3);
1329
1330 RT_ZERO(pNode->pcbeep.B_params);
1331 break;
1332 }
1333
1334 case STAC9220_NID_PIN_CD:
1335 {
1336 pNode->cdnode.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0, 0)
1337 | CODEC_F00_09_CAP_STEREO;
1338 pNode->cdnode.node.au32F00_param[0xC] = CODEC_F00_0C_CAP_INPUT;
1339
1340 if (!pThis->fInReset)
1341 pNode->cdnode.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_FIXED,
1342 CODEC_F1C_LOCATION_INTERNAL,
1343 CODEC_F1C_DEVICE_CD,
1344 CODEC_F1C_CONNECTION_TYPE_ATAPI,
1345 CODEC_F1C_COLOR_UNKNOWN,
1346 CODEC_F1C_MISC_NONE,
1347 CODEC_F1C_ASSOCIATION_GROUP_4, 0x2 /* Seq */);
1348 break;
1349 }
1350
1351 case STAC9220_NID_VOL_KNOB:
1352 {
1353 pNode->volumeKnob.u32F08_param = 0;
1354 pNode->volumeKnob.u32F0f_param = 0x7f;
1355
1356 pNode->volumeKnob.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_VOLUME_KNOB, 0, 0);
1357 pNode->volumeKnob.node.au32F00_param[0xD] = RT_BIT(7) | 0x7F;
1358
1359 /* Connection list entries. */
1360 pNode->volumeKnob.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 4 /* Entries */);
1361 pNode->volumeKnob.node.au32F02_param[0x0] = RT_MAKE_U32_FROM_U8(STAC9220_NID_DAC0,
1362 STAC9220_NID_DAC1,
1363 STAC9220_NID_DAC2,
1364 STAC9220_NID_DAC3);
1365 break;
1366 }
1367
1368 case STAC9220_NID_AMP_ADC0: /* ADC0Vol */
1369 {
1370 pNode->adcvol.node.au32F02_param[0] = STAC9220_NID_ADC0_MUX;
1371 goto adcvol_init;
1372 }
1373
1374 case STAC9220_NID_AMP_ADC1: /* ADC1Vol */
1375 {
1376 pNode->adcvol.node.au32F02_param[0] = STAC9220_NID_ADC1_MUX;
1377 /* Fall through is intentional. */
1378
1379 adcvol_init:
1380
1381 pNode->adcvol.node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_SELECTOR, 0, 0)
1382 | CODEC_F00_09_CAP_L_R_SWAP
1383 | CODEC_F00_09_CAP_CONNECTION_LIST
1384 | CODEC_F00_09_CAP_IN_AMP_PRESENT
1385 | CODEC_F00_09_CAP_STEREO;
1386
1387
1388 pNode->adcvol.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 1 /* Entries */);
1389
1390 RT_ZERO(pNode->adcvol.B_params);
1391 AMPLIFIER_REGISTER(pNode->adcvol.B_params, AMPLIFIER_IN, AMPLIFIER_LEFT, 0) = RT_BIT(7);
1392 AMPLIFIER_REGISTER(pNode->adcvol.B_params, AMPLIFIER_IN, AMPLIFIER_RIGHT, 0) = RT_BIT(7);
1393 break;
1394 }
1395
1396 /*
1397 * STAC9221 nodes.
1398 */
1399
1400 case STAC9221_NID_ADAT_OUT:
1401 {
1402 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_VENDOR_DEFINED, 3, 0)
1403 | CODEC_F00_09_CAP_DIGITAL
1404 | CODEC_F00_09_CAP_STEREO;
1405 break;
1406 }
1407
1408 case STAC9221_NID_I2S_OUT:
1409 {
1410 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_OUTPUT, 3, 0)
1411 | CODEC_F00_09_CAP_DIGITAL
1412 | CODEC_F00_09_CAP_STEREO;
1413 break;
1414 }
1415
1416 case STAC9221_NID_PIN_I2S_OUT:
1417 {
1418 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_PIN_COMPLEX, 0, 0)
1419 | CODEC_F00_09_CAP_DIGITAL
1420 | CODEC_F00_09_CAP_CONNECTION_LIST
1421 | CODEC_F00_09_CAP_STEREO;
1422
1423 pNode->node.au32F00_param[0xC] = CODEC_F00_0C_CAP_OUTPUT;
1424
1425 /* Connection list entries. */
1426 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(CODEC_F00_0E_LIST_NID_SHORT, 1 /* Entries */);
1427 pNode->node.au32F02_param[0] = STAC9221_NID_I2S_OUT;
1428
1429 if (!pThis->fInReset)
1430 pNode->reserved.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_NO_PHYS,
1431 CODEC_F1C_LOCATION_NA,
1432 CODEC_F1C_DEVICE_LINE_OUT,
1433 CODEC_F1C_CONNECTION_TYPE_UNKNOWN,
1434 CODEC_F1C_COLOR_UNKNOWN,
1435 CODEC_F1C_MISC_NONE,
1436 CODEC_F1C_ASSOCIATION_GROUP_15, 0xB /* Seq */);
1437 break;
1438 }
1439
1440 default:
1441 AssertMsgFailed(("Node %RU8 not implemented\n", uNID));
1442 break;
1443 }
1444
1445 return VINF_SUCCESS;
1446}
1447
1448static int stac9220Construct(PHDACODEC pThis)
1449{
1450 unconst(pThis->cTotalNodes) = STAC9221_NUM_NODES;
1451
1452 pThis->pfnCodecNodeReset = stac9220ResetNode;
1453
1454 pThis->u16VendorId = 0x8384; /* SigmaTel */
1455 /*
1456 * Note: The Linux kernel uses "patch_stac922x" for the fixups,
1457 * which in turn uses "ref922x_pin_configs" for the configuration
1458 * defaults tweaking in sound/pci/hda/patch_sigmatel.c.
1459 */
1460 pThis->u16DeviceId = 0x7680; /* STAC9221 A1 */
1461 pThis->u8BSKU = 0x76;
1462 pThis->u8AssemblyId = 0x80;
1463
1464 pThis->paNodes = (PCODECNODE)RTMemAllocZ(sizeof(CODECNODE) * pThis->cTotalNodes);
1465 if (!pThis->paNodes)
1466 return VERR_NO_MEMORY;
1467
1468 pThis->fInReset = false;
1469
1470#define STAC9220WIDGET(type) pThis->au8##type##s = g_abStac9220##type##s
1471 STAC9220WIDGET(Port);
1472 STAC9220WIDGET(Dac);
1473 STAC9220WIDGET(Adc);
1474 STAC9220WIDGET(AdcVol);
1475 STAC9220WIDGET(AdcMux);
1476 STAC9220WIDGET(Pcbeep);
1477 STAC9220WIDGET(SpdifIn);
1478 STAC9220WIDGET(SpdifOut);
1479 STAC9220WIDGET(DigInPin);
1480 STAC9220WIDGET(DigOutPin);
1481 STAC9220WIDGET(Cd);
1482 STAC9220WIDGET(VolKnob);
1483 STAC9220WIDGET(Reserved);
1484#undef STAC9220WIDGET
1485
1486 unconst(pThis->u8AdcVolsLineIn) = STAC9220_NID_AMP_ADC0;
1487 unconst(pThis->u8DacLineOut) = STAC9220_NID_DAC1;
1488
1489 return VINF_SUCCESS;
1490}
1491
1492
1493/*
1494 * Some generic predicate functions.
1495 */
1496
1497#define DECLISNODEOFTYPE(type) \
1498 DECLINLINE(bool) hdaCodecIs##type##Node(PHDACODEC pThis, uint8_t cNode) \
1499 { \
1500 Assert(pThis->au8##type##s); \
1501 for (int i = 0; pThis->au8##type##s[i] != 0; ++i) \
1502 if (pThis->au8##type##s[i] == cNode) \
1503 return true; \
1504 return false; \
1505 }
1506/* hdaCodecIsPortNode */
1507DECLISNODEOFTYPE(Port)
1508/* hdaCodecIsDacNode */
1509DECLISNODEOFTYPE(Dac)
1510/* hdaCodecIsAdcVolNode */
1511DECLISNODEOFTYPE(AdcVol)
1512/* hdaCodecIsAdcNode */
1513DECLISNODEOFTYPE(Adc)
1514/* hdaCodecIsAdcMuxNode */
1515DECLISNODEOFTYPE(AdcMux)
1516/* hdaCodecIsPcbeepNode */
1517DECLISNODEOFTYPE(Pcbeep)
1518/* hdaCodecIsSpdifOutNode */
1519DECLISNODEOFTYPE(SpdifOut)
1520/* hdaCodecIsSpdifInNode */
1521DECLISNODEOFTYPE(SpdifIn)
1522/* hdaCodecIsDigInPinNode */
1523DECLISNODEOFTYPE(DigInPin)
1524/* hdaCodecIsDigOutPinNode */
1525DECLISNODEOFTYPE(DigOutPin)
1526/* hdaCodecIsCdNode */
1527DECLISNODEOFTYPE(Cd)
1528/* hdaCodecIsVolKnobNode */
1529DECLISNODEOFTYPE(VolKnob)
1530/* hdaCodecIsReservedNode */
1531DECLISNODEOFTYPE(Reserved)
1532
1533
1534/*
1535 * Misc helpers.
1536 */
1537static int hdaCodecToAudVolume(PHDACODEC pThis, AMPLIFIER *pAmp, PDMAUDIOMIXERCTL enmMixerCtl)
1538{
1539 uint8_t iDir;
1540 switch (enmMixerCtl)
1541 {
1542 case PDMAUDIOMIXERCTL_VOLUME_MASTER:
1543 case PDMAUDIOMIXERCTL_FRONT:
1544 iDir = AMPLIFIER_OUT;
1545 break;
1546 case PDMAUDIOMIXERCTL_LINE_IN:
1547 case PDMAUDIOMIXERCTL_MIC_IN:
1548 iDir = AMPLIFIER_IN;
1549 break;
1550 default:
1551 AssertMsgFailedReturn(("Invalid mixer control %ld\n", enmMixerCtl), VERR_INVALID_PARAMETER);
1552 break;
1553 }
1554
1555 int iMute;
1556 iMute = AMPLIFIER_REGISTER(*pAmp, iDir, AMPLIFIER_LEFT, 0) & RT_BIT(7);
1557 iMute |= AMPLIFIER_REGISTER(*pAmp, iDir, AMPLIFIER_RIGHT, 0) & RT_BIT(7);
1558 iMute >>=7;
1559 iMute &= 0x1;
1560
1561 uint8_t lVol = AMPLIFIER_REGISTER(*pAmp, iDir, AMPLIFIER_LEFT, 0) & 0x7f;
1562 uint8_t rVol = AMPLIFIER_REGISTER(*pAmp, iDir, AMPLIFIER_RIGHT, 0) & 0x7f;
1563
1564 /*
1565 * The STAC9220 volume controls have 0 to -96dB attenuation range in 128 steps.
1566 * We have 0 to -96dB range in 256 steps. HDA volume setting of 127 must map
1567 * to 255 internally (0dB), while HDA volume setting of 0 (-96dB) should map
1568 * to 1 (rather than zero) internally.
1569 */
1570 lVol = (lVol + 1) * (2 * 255) / 256;
1571 rVol = (rVol + 1) * (2 * 255) / 256;
1572
1573 PDMAUDIOVOLUME Vol = { RT_BOOL(iMute), lVol, rVol };
1574 return pThis->pfnMixerSetVolume(pThis->pHDAState, enmMixerCtl, &Vol);
1575}
1576
1577DECLINLINE(void) hdaCodecSetRegister(uint32_t *pu32Reg, uint32_t u32Cmd, uint8_t u8Offset, uint32_t mask)
1578{
1579 Assert((pu32Reg && u8Offset < 32));
1580 *pu32Reg &= ~(mask << u8Offset);
1581 *pu32Reg |= (u32Cmd & mask) << u8Offset;
1582}
1583
1584DECLINLINE(void) hdaCodecSetRegisterU8(uint32_t *pu32Reg, uint32_t u32Cmd, uint8_t u8Offset)
1585{
1586 hdaCodecSetRegister(pu32Reg, u32Cmd, u8Offset, CODEC_VERB_8BIT_DATA);
1587}
1588
1589DECLINLINE(void) hdaCodecSetRegisterU16(uint32_t *pu32Reg, uint32_t u32Cmd, uint8_t u8Offset)
1590{
1591 hdaCodecSetRegister(pu32Reg, u32Cmd, u8Offset, CODEC_VERB_16BIT_DATA);
1592}
1593
1594
1595/*
1596 * Verb processor functions.
1597 */
1598static DECLCALLBACK(int) vrbProcUnimplemented(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1599{
1600 LogFlowFunc(("cmd(raw:%x: cad:%x, d:%c, nid:%x, verb:%x)\n", cmd,
1601 CODEC_CAD(cmd), CODEC_DIRECT(cmd) ? 'N' : 'Y', CODEC_NID(cmd), CODEC_VERBDATA(cmd)));
1602 *pResp = 0;
1603 return VINF_SUCCESS;
1604}
1605
1606static DECLCALLBACK(int) vrbProcBreak(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1607{
1608 int rc;
1609 rc = vrbProcUnimplemented(pThis, cmd, pResp);
1610 *pResp |= CODEC_RESPONSE_UNSOLICITED;
1611 return rc;
1612}
1613
1614/* B-- */
1615static DECLCALLBACK(int) vrbProcGetAmplifier(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1616{
1617 *pResp = 0;
1618
1619 /* HDA spec 7.3.3.7 Note A */
1620 /** @todo: If index out of range response should be 0. */
1621 uint8_t u8Index = CODEC_GET_AMP_DIRECTION(cmd) == AMPLIFIER_OUT ? 0 : CODEC_GET_AMP_INDEX(cmd);
1622
1623 PCODECNODE pNode = &pThis->paNodes[CODEC_NID(cmd)];
1624 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
1625 *pResp = AMPLIFIER_REGISTER(pNode->dac.B_params,
1626 CODEC_GET_AMP_DIRECTION(cmd),
1627 CODEC_GET_AMP_SIDE(cmd),
1628 u8Index);
1629 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
1630 *pResp = AMPLIFIER_REGISTER(pNode->adcvol.B_params,
1631 CODEC_GET_AMP_DIRECTION(cmd),
1632 CODEC_GET_AMP_SIDE(cmd),
1633 u8Index);
1634 else if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd)))
1635 *pResp = AMPLIFIER_REGISTER(pNode->adcmux.B_params,
1636 CODEC_GET_AMP_DIRECTION(cmd),
1637 CODEC_GET_AMP_SIDE(cmd),
1638 u8Index);
1639 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
1640 *pResp = AMPLIFIER_REGISTER(pNode->pcbeep.B_params,
1641 CODEC_GET_AMP_DIRECTION(cmd),
1642 CODEC_GET_AMP_SIDE(cmd),
1643 u8Index);
1644 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1645 *pResp = AMPLIFIER_REGISTER(pNode->port.B_params,
1646 CODEC_GET_AMP_DIRECTION(cmd),
1647 CODEC_GET_AMP_SIDE(cmd),
1648 u8Index);
1649 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1650 *pResp = AMPLIFIER_REGISTER(pNode->adc.B_params,
1651 CODEC_GET_AMP_DIRECTION(cmd),
1652 CODEC_GET_AMP_SIDE(cmd),
1653 u8Index);
1654 else
1655 LogRel2(("HDA: Warning: Unhandled get amplifier command: 0x%x (NID=0x%x [%RU8])\n", cmd, CODEC_NID(cmd), CODEC_NID(cmd)));
1656
1657 return VINF_SUCCESS;
1658}
1659
1660/* 3-- */
1661static DECLCALLBACK(int) vrbProcSetAmplifier(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1662{
1663 *pResp = 0;
1664
1665 PCODECNODE pNode = &pThis->paNodes[CODEC_NID(cmd)];
1666 AMPLIFIER *pAmplifier = NULL;
1667 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
1668 pAmplifier = &pNode->dac.B_params;
1669 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
1670 pAmplifier = &pNode->adcvol.B_params;
1671 else if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd)))
1672 pAmplifier = &pNode->adcmux.B_params;
1673 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
1674 pAmplifier = &pNode->pcbeep.B_params;
1675 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1676 pAmplifier = &pNode->port.B_params;
1677 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1678 pAmplifier = &pNode->adc.B_params;
1679 else
1680 LogRel2(("HDA: Warning: Unhandled set amplifier command: 0x%x (Payload=%RU16, NID=0x%x [%RU8])\n",
1681 cmd, CODEC_VERB_PAYLOAD16(cmd), CODEC_NID(cmd), CODEC_NID(cmd)));
1682
1683 if (!pAmplifier)
1684 return VINF_SUCCESS;
1685
1686 bool fIsOut = CODEC_SET_AMP_IS_OUT_DIRECTION(cmd);
1687 bool fIsIn = CODEC_SET_AMP_IS_IN_DIRECTION(cmd);
1688 bool fIsRight = CODEC_SET_AMP_IS_RIGHT_SIDE(cmd);
1689 bool fIsLeft = CODEC_SET_AMP_IS_LEFT_SIDE(cmd);
1690 uint8_t u8Index = CODEC_SET_AMP_INDEX(cmd);
1691
1692 if ( (!fIsLeft && !fIsRight)
1693 || (!fIsOut && !fIsIn))
1694 return VINF_SUCCESS;
1695
1696 if (fIsIn)
1697 {
1698 if (fIsLeft)
1699 hdaCodecSetRegisterU8(&AMPLIFIER_REGISTER(*pAmplifier, AMPLIFIER_IN, AMPLIFIER_LEFT, u8Index), cmd, 0);
1700 if (fIsRight)
1701 hdaCodecSetRegisterU8(&AMPLIFIER_REGISTER(*pAmplifier, AMPLIFIER_IN, AMPLIFIER_RIGHT, u8Index), cmd, 0);
1702
1703 /** @todo Fix ID of u8AdcVolsLineIn! */
1704 hdaCodecToAudVolume(pThis, pAmplifier, PDMAUDIOMIXERCTL_LINE_IN);
1705 }
1706 if (fIsOut)
1707 {
1708 if (fIsLeft)
1709 hdaCodecSetRegisterU8(&AMPLIFIER_REGISTER(*pAmplifier, AMPLIFIER_OUT, AMPLIFIER_LEFT, u8Index), cmd, 0);
1710 if (fIsRight)
1711 hdaCodecSetRegisterU8(&AMPLIFIER_REGISTER(*pAmplifier, AMPLIFIER_OUT, AMPLIFIER_RIGHT, u8Index), cmd, 0);
1712
1713 if (CODEC_NID(cmd) == pThis->u8DacLineOut)
1714 hdaCodecToAudVolume(pThis, pAmplifier, PDMAUDIOMIXERCTL_FRONT);
1715 }
1716
1717 return VINF_SUCCESS;
1718}
1719
1720static DECLCALLBACK(int) vrbProcGetParameter(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1721{
1722 Assert((cmd & CODEC_VERB_8BIT_DATA) < CODECNODE_F00_PARAM_LENGTH);
1723 if ((cmd & CODEC_VERB_8BIT_DATA) >= CODECNODE_F00_PARAM_LENGTH)
1724 {
1725 *pResp = 0;
1726
1727 LogFlowFunc(("invalid F00 parameter %d\n", (cmd & CODEC_VERB_8BIT_DATA)));
1728 return VINF_SUCCESS;
1729 }
1730
1731 *pResp = pThis->paNodes[CODEC_NID(cmd)].node.au32F00_param[cmd & CODEC_VERB_8BIT_DATA];
1732 return VINF_SUCCESS;
1733}
1734
1735/* F01 */
1736static DECLCALLBACK(int) vrbProcGetConSelectCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1737{
1738 *pResp = 0;
1739
1740 if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd)))
1741 *pResp = pThis->paNodes[CODEC_NID(cmd)].adcmux.u32F01_param;
1742 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1743 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F01_param;
1744 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1745 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F01_param;
1746 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1747 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F01_param;
1748 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
1749 *pResp = pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F01_param;
1750 else
1751 LogRel2(("HDA: Warning: Unhandled get connection select control command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
1752
1753 return VINF_SUCCESS;
1754}
1755
1756/* 701 */
1757static DECLCALLBACK(int) vrbProcSetConSelectCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1758{
1759 *pResp = 0;
1760
1761 uint32_t *pu32Reg = NULL;
1762 if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd)))
1763 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adcmux.u32F01_param;
1764 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1765 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F01_param;
1766 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1767 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F01_param;
1768 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1769 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adc.u32F01_param;
1770 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
1771 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F01_param;
1772 else
1773 LogRel2(("HDA: Warning: Unhandled set connection select control command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
1774
1775 if (pu32Reg)
1776 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
1777
1778 return VINF_SUCCESS;
1779}
1780
1781/* F07 */
1782static DECLCALLBACK(int) vrbProcGetPinCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1783{
1784 *pResp = 0;
1785
1786 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1787 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F07_param;
1788 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1789 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F07_param;
1790 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1791 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F07_param;
1792 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd)))
1793 *pResp = pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F07_param;
1794 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
1795 *pResp = pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F07_param;
1796 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
1797 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F07_param;
1798 else
1799 LogRel2(("HDA: Warning: Unhandled get pin control command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
1800
1801 return VINF_SUCCESS;
1802}
1803
1804/* 707 */
1805static DECLCALLBACK(int) vrbProcSetPinCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1806{
1807 *pResp = 0;
1808
1809 uint32_t *pu32Reg = NULL;
1810 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1811 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F07_param;
1812 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1813 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F07_param;
1814 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1815 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F07_param;
1816 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd)))
1817 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F07_param;
1818 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
1819 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F07_param;
1820 else if ( hdaCodecIsReservedNode(pThis, CODEC_NID(cmd))
1821 && CODEC_NID(cmd) == 0x1b)
1822 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F07_param;
1823 else
1824 LogRel2(("HDA: Warning: Unhandled set pin control command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
1825
1826 if (pu32Reg)
1827 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
1828
1829 return VINF_SUCCESS;
1830}
1831
1832/* F08 */
1833static DECLCALLBACK(int) vrbProcGetUnsolicitedEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1834{
1835 *pResp = 0;
1836
1837 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1838 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F08_param;
1839 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1840 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
1841 else if ((cmd) == STAC9220_NID_AFG)
1842 *pResp = pThis->paNodes[CODEC_NID(cmd)].afg.u32F08_param;
1843 else if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd)))
1844 *pResp = pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F08_param;
1845 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1846 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F08_param;
1847 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1848 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
1849 else
1850 LogRel2(("HDA: Warning: Unhandled get unsolicited enabled command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
1851
1852 return VINF_SUCCESS;
1853}
1854
1855/* 708 */
1856static DECLCALLBACK(int) vrbProcSetUnsolicitedEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1857{
1858 *pResp = 0;
1859
1860 uint32_t *pu32Reg = NULL;
1861 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1862 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F08_param;
1863 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1864 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
1865 else if (CODEC_NID(cmd) == STAC9220_NID_AFG)
1866 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].afg.u32F08_param;
1867 else if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd)))
1868 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F08_param;
1869 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1870 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
1871 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
1872 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F08_param;
1873 else
1874 LogRel2(("HDA: Warning: Unhandled set unsolicited enabled command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
1875
1876 if (pu32Reg)
1877 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
1878
1879 return VINF_SUCCESS;
1880}
1881
1882/* F09 */
1883static DECLCALLBACK(int) vrbProcGetPinSense(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1884{
1885 *pResp = 0;
1886
1887 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1888 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F09_param;
1889 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1890 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F09_param;
1891 else
1892 {
1893 AssertFailed();
1894 LogRel2(("HDA: Warning: Unhandled get pin sense command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
1895 }
1896
1897 return VINF_SUCCESS;
1898}
1899
1900/* 709 */
1901static DECLCALLBACK(int) vrbProcSetPinSense(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1902{
1903 *pResp = 0;
1904
1905 uint32_t *pu32Reg = NULL;
1906 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
1907 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F09_param;
1908 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
1909 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F09_param;
1910 else
1911 LogRel2(("HDA: Warning: Unhandled set pin sense command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
1912
1913 if (pu32Reg)
1914 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
1915
1916 return VINF_SUCCESS;
1917}
1918
1919static DECLCALLBACK(int) vrbProcGetConnectionListEntry(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1920{
1921 *pResp = 0;
1922
1923 Assert((cmd & CODEC_VERB_8BIT_DATA) < CODECNODE_F02_PARAM_LENGTH);
1924 if ((cmd & CODEC_VERB_8BIT_DATA) >= CODECNODE_F02_PARAM_LENGTH)
1925 {
1926 LogFlowFunc(("access to invalid F02 index %d\n", (cmd & CODEC_VERB_8BIT_DATA)));
1927 return VINF_SUCCESS;
1928 }
1929 *pResp = pThis->paNodes[CODEC_NID(cmd)].node.au32F02_param[cmd & CODEC_VERB_8BIT_DATA];
1930 return VINF_SUCCESS;
1931}
1932
1933/* F03 */
1934static DECLCALLBACK(int) vrbProcGetProcessingState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1935{
1936 *pResp = 0;
1937
1938 if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1939 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F03_param;
1940
1941 return VINF_SUCCESS;
1942}
1943
1944/* 703 */
1945static DECLCALLBACK(int) vrbProcSetProcessingState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1946{
1947 *pResp = 0;
1948
1949 if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
1950 hdaCodecSetRegisterU8(&pThis->paNodes[CODEC_NID(cmd)].adc.u32F03_param, cmd, 0);
1951 return VINF_SUCCESS;
1952}
1953
1954/* F0D */
1955static DECLCALLBACK(int) vrbProcGetDigitalConverter(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1956{
1957 *pResp = 0;
1958
1959 if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
1960 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F0d_param;
1961 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
1962 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F0d_param;
1963
1964 return VINF_SUCCESS;
1965}
1966
1967static int codecSetDigitalConverter(PHDACODEC pThis, uint32_t cmd, uint8_t u8Offset, uint64_t *pResp)
1968{
1969 *pResp = 0;
1970
1971 if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
1972 hdaCodecSetRegisterU8(&pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F0d_param, cmd, u8Offset);
1973 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
1974 hdaCodecSetRegisterU8(&pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F0d_param, cmd, u8Offset);
1975 return VINF_SUCCESS;
1976}
1977
1978/* 70D */
1979static DECLCALLBACK(int) vrbProcSetDigitalConverter1(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1980{
1981 return codecSetDigitalConverter(pThis, cmd, 0, pResp);
1982}
1983
1984/* 70E */
1985static DECLCALLBACK(int) vrbProcSetDigitalConverter2(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1986{
1987 return codecSetDigitalConverter(pThis, cmd, 8, pResp);
1988}
1989
1990/* F20 */
1991static DECLCALLBACK(int) vrbProcGetSubId(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
1992{
1993 Assert(CODEC_CAD(cmd) == pThis->id);
1994 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
1995 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
1996 {
1997 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
1998 return VINF_SUCCESS;
1999 }
2000 if (CODEC_NID(cmd) == STAC9220_NID_AFG)
2001 *pResp = pThis->paNodes[CODEC_NID(cmd)].afg.u32F20_param;
2002 else
2003 *pResp = 0;
2004 return VINF_SUCCESS;
2005}
2006
2007static int codecSetSubIdX(PHDACODEC pThis, uint32_t cmd, uint8_t u8Offset)
2008{
2009 Assert(CODEC_CAD(cmd) == pThis->id);
2010 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2011 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2012 {
2013 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2014 return VINF_SUCCESS;
2015 }
2016 uint32_t *pu32Reg;
2017 if (CODEC_NID(cmd) == STAC9220_NID_AFG)
2018 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].afg.u32F20_param;
2019 else
2020 AssertFailedReturn(VINF_SUCCESS);
2021 hdaCodecSetRegisterU8(pu32Reg, cmd, u8Offset);
2022 return VINF_SUCCESS;
2023}
2024
2025/* 720 */
2026static DECLCALLBACK(int) vrbProcSetSubId0(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2027{
2028 *pResp = 0;
2029 return codecSetSubIdX(pThis, cmd, 0);
2030}
2031
2032/* 721 */
2033static DECLCALLBACK(int) vrbProcSetSubId1(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2034{
2035 *pResp = 0;
2036 return codecSetSubIdX(pThis, cmd, 8);
2037}
2038
2039/* 722 */
2040static DECLCALLBACK(int) vrbProcSetSubId2(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2041{
2042 *pResp = 0;
2043 return codecSetSubIdX(pThis, cmd, 16);
2044}
2045
2046/* 723 */
2047static DECLCALLBACK(int) vrbProcSetSubId3(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2048{
2049 *pResp = 0;
2050 return codecSetSubIdX(pThis, cmd, 24);
2051}
2052
2053static DECLCALLBACK(int) vrbProcReset(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2054{
2055 Assert(CODEC_CAD(cmd) == pThis->id);
2056 Assert(CODEC_NID(cmd) == STAC9220_NID_AFG);
2057
2058 if ( CODEC_NID(cmd) == STAC9220_NID_AFG
2059 && pThis->pfnCodecNodeReset)
2060 {
2061 LogFunc(("Entering reset ...\n"));
2062
2063 pThis->fInReset = true;
2064
2065 for (uint8_t i = 0; i < pThis->cTotalNodes; ++i)
2066 pThis->pfnCodecNodeReset(pThis, i, &pThis->paNodes[i]);
2067
2068 pThis->fInReset = false;
2069
2070 LogFunc(("Exited reset\n"));
2071 }
2072
2073 *pResp = 0;
2074 return VINF_SUCCESS;
2075}
2076
2077/* F05 */
2078static DECLCALLBACK(int) vrbProcGetPowerState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2079{
2080 *pResp = 0;
2081
2082 if (CODEC_NID(cmd) == STAC9220_NID_AFG)
2083 *pResp = pThis->paNodes[CODEC_NID(cmd)].afg.u32F05_param;
2084 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2085 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32F05_param;
2086 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2087 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F05_param;
2088 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2089 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F05_param;
2090 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
2091 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F05_param;
2092 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2093 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F05_param;
2094 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2095 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F05_param;
2096 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2097 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F05_param;
2098 else
2099 LogRel2(("HDA: Warning: Unhandled get power state command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
2100
2101 LogFunc(("[NID0x%02x]: fReset=%RTbool, fStopOk=%RTbool, Act=D%RU8, Set=D%RU8\n",
2102 CODEC_NID(cmd), CODEC_F05_IS_RESET(*pResp), CODEC_F05_IS_STOPOK(*pResp), CODEC_F05_ACT(*pResp), CODEC_F05_SET(*pResp)));
2103 return VINF_SUCCESS;
2104}
2105
2106/* 705 */
2107#if 1
2108static DECLCALLBACK(int) vrbProcSetPowerState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2109{
2110 *pResp = 0;
2111
2112 uint32_t *pu32Reg = NULL;
2113 if (CODEC_NID(cmd) == STAC9220_NID_AFG)
2114 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].afg.u32F05_param;
2115 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2116 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].dac.u32F05_param;
2117 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2118 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F05_param;
2119 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
2120 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F05_param;
2121 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2122 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adc.u32F05_param;
2123 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2124 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F05_param;
2125 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2126 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F05_param;
2127 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2128 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F05_param;
2129 else
2130 {
2131 AssertFailed();
2132 LogRel2(("HDA: Warning: Unhandled set power state command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
2133 }
2134
2135 if (!pu32Reg)
2136 return VINF_SUCCESS;
2137
2138 bool fReset = CODEC_F05_IS_RESET (*pu32Reg);
2139 bool fStopOk = CODEC_F05_IS_STOPOK(*pu32Reg);
2140 bool fError = CODEC_F05_IS_ERROR (*pu32Reg);
2141 uint8_t uPwrAct = CODEC_F05_ACT (*pu32Reg);
2142 uint8_t uPwrSet = CODEC_F05_SET (*pu32Reg);
2143
2144 uint8_t uPwrCmd = CODEC_F05_SET (cmd);
2145
2146 LogFunc(("[NID0x%02x] Cmd=D%RU8, fReset=%RTbool, fStopOk=%RTbool, fError=%RTbool, uPwrAct=D%RU8, uPwrSet=D%RU8\n",
2147 CODEC_NID(cmd), uPwrCmd, fReset, fStopOk, fError, uPwrAct, uPwrSet));
2148
2149 LogFunc(("AFG: Act=D%RU8, Set=D%RU8\n",
2150 CODEC_F05_ACT(pThis->paNodes[STAC9220_NID_AFG].afg.u32F05_param),
2151 CODEC_F05_SET(pThis->paNodes[STAC9220_NID_AFG].afg.u32F05_param)));
2152
2153 if (CODEC_NID(cmd) == STAC9220_NID_AFG)
2154 *pu32Reg = CODEC_MAKE_F05(fReset, fStopOk, 0, uPwrCmd /* PS-Act */, uPwrCmd /* PS-Set */);
2155
2156 const uint8_t uAFGPwrAct = CODEC_F05_ACT(pThis->paNodes[STAC9220_NID_AFG].afg.u32F05_param);
2157 if (uAFGPwrAct == CODEC_F05_D0) /* Only propagate power state if AFG is on (D0). */
2158 {
2159 /* Propagate to all other nodes under this AFG. */
2160 LogFunc(("Propagating Act=D%RU8 (AFG), Set=D%RU8 to all AFG child nodes ...\n", uAFGPwrAct, uPwrCmd));
2161
2162#define PROPAGATE_PWR_STATE(_aList, _aMember) \
2163 { \
2164 const uint8_t *pu8NodeIndex = &_aList[0]; \
2165 while (*(++pu8NodeIndex)) \
2166 { \
2167 pThis->paNodes[*pu8NodeIndex]._aMember.u32F05_param = \
2168 CODEC_MAKE_F05(fReset, fStopOk, 0, uAFGPwrAct, uPwrCmd); \
2169 LogFunc(("\t[NID0x%02x]: Act=D%RU8, Set=D%RU8\n", *pu8NodeIndex, \
2170 CODEC_F05_ACT(pThis->paNodes[*pu8NodeIndex]._aMember.u32F05_param), \
2171 CODEC_F05_SET(pThis->paNodes[*pu8NodeIndex]._aMember.u32F05_param))); \
2172 } \
2173 }
2174
2175 PROPAGATE_PWR_STATE(pThis->au8Dacs, dac);
2176 PROPAGATE_PWR_STATE(pThis->au8Adcs, adc);
2177 PROPAGATE_PWR_STATE(pThis->au8DigInPins, digin);
2178 PROPAGATE_PWR_STATE(pThis->au8DigOutPins, digout);
2179 PROPAGATE_PWR_STATE(pThis->au8SpdifIns, spdifin);
2180 PROPAGATE_PWR_STATE(pThis->au8SpdifOuts, spdifout);
2181 PROPAGATE_PWR_STATE(pThis->au8Reserveds, reserved);
2182
2183#undef PROPAGATE_PWR_STATE
2184 }
2185 /*
2186 * If this node is a reqular node (not the AFG one), adopt PS-Set of the AFG node
2187 * as PS-Set of this node. PS-Act always is one level under PS-Set here.
2188 */
2189 else
2190 {
2191 *pu32Reg = CODEC_MAKE_F05(fReset, fStopOk, 0, uAFGPwrAct, uPwrCmd);
2192 }
2193
2194 LogFunc(("[NID0x%02x] fReset=%RTbool, fStopOk=%RTbool, Act=D%RU8, Set=D%RU8\n",
2195 CODEC_NID(cmd),
2196 CODEC_F05_IS_RESET(*pu32Reg), CODEC_F05_IS_STOPOK(*pu32Reg), CODEC_F05_ACT(*pu32Reg), CODEC_F05_SET(*pu32Reg)));
2197
2198 return VINF_SUCCESS;
2199}
2200#else
2201DECLINLINE(void) codecPropogatePowerState(uint32_t *pu32F05_param)
2202{
2203 Assert(pu32F05_param);
2204 if (!pu32F05_param)
2205 return;
2206 bool fReset = CODEC_F05_IS_RESET(*pu32F05_param);
2207 bool fStopOk = CODEC_F05_IS_STOPOK(*pu32F05_param);
2208 uint8_t u8SetPowerState = CODEC_F05_SET(*pu32F05_param);
2209 *pu32F05_param = CODEC_MAKE_F05(fReset, fStopOk, 0, u8SetPowerState, u8SetPowerState);
2210}
2211
2212static DECLCALLBACK(int) vrbProcSetPowerState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2213{
2214 Assert(CODEC_CAD(cmd) == pThis->id);
2215 Assert(CODEC_NID(cmd) < pThis->cTotalNodes);
2216 if (CODEC_NID(cmd) >= pThis->cTotalNodes)
2217 {
2218 LogFlowFunc(("invalid node address %d\n", CODEC_NID(cmd)));
2219 return VINF_SUCCESS;
2220 }
2221 *pResp = 0;
2222 uint32_t *pu32Reg;
2223 if (CODEC_NID(cmd) == 1 /* AFG */)
2224 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].afg.u32F05_param;
2225 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2226 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].dac.u32F05_param;
2227 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2228 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F05_param;
2229 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2230 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adc.u32F05_param;
2231 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2232 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F05_param;
2233 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2234 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F05_param;
2235 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2236 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F05_param;
2237 else
2238 AssertFailedReturn(VINF_SUCCESS);
2239
2240 bool fReset = CODEC_F05_IS_RESET(*pu32Reg);
2241 bool fStopOk = CODEC_F05_IS_STOPOK(*pu32Reg);
2242
2243 if (CODEC_NID(cmd) != 1 /* AFG */)
2244 {
2245 /*
2246 * We shouldn't propogate actual power state, which actual for AFG
2247 */
2248 *pu32Reg = CODEC_MAKE_F05(fReset, fStopOk, 0,
2249 CODEC_F05_ACT(pThis->paNodes[1].afg.u32F05_param),
2250 CODEC_F05_SET(cmd));
2251 }
2252
2253 /* Propagate next power state only if AFG is on or verb modifies AFG power state */
2254 if ( CODEC_NID(cmd) == 1 /* AFG */
2255 || !CODEC_F05_ACT(pThis->paNodes[1].afg.u32F05_param))
2256 {
2257 *pu32Reg = CODEC_MAKE_F05(fReset, fStopOk, 0, CODEC_F05_SET(cmd), CODEC_F05_SET(cmd));
2258 if ( CODEC_NID(cmd) == 1 /* AFG */
2259 && (CODEC_F05_SET(cmd)) == CODEC_F05_D0)
2260 {
2261 /* now we're powered on AFG and may propogate power states on nodes */
2262 const uint8_t *pu8NodeIndex = &pThis->au8Dacs[0];
2263 while (*(++pu8NodeIndex))
2264 codecPropogatePowerState(&pThis->paNodes[*pu8NodeIndex].dac.u32F05_param);
2265
2266 pu8NodeIndex = &pThis->au8Adcs[0];
2267 while (*(++pu8NodeIndex))
2268 codecPropogatePowerState(&pThis->paNodes[*pu8NodeIndex].adc.u32F05_param);
2269
2270 pu8NodeIndex = &pThis->au8DigInPins[0];
2271 while (*(++pu8NodeIndex))
2272 codecPropogatePowerState(&pThis->paNodes[*pu8NodeIndex].digin.u32F05_param);
2273 }
2274 }
2275 return VINF_SUCCESS;
2276}
2277#endif
2278
2279static DECLCALLBACK(int) vrbProcGetStreamId(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2280{
2281 *pResp = 0;
2282
2283 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2284 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32F06_param;
2285 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2286 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F06_param;
2287 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2288 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F06_param;
2289 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2290 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F06_param;
2291 else if (CODEC_NID(cmd) == STAC9221_NID_I2S_OUT)
2292 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F06_param;
2293 else
2294 LogRel2(("HDA: Warning: Unhandled get stream ID command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
2295
2296 LogFlowFunc(("[NID0x%02x] Stream ID=%RU8, channel=%RU8\n",
2297 CODEC_NID(cmd), CODEC_F00_06_GET_STREAM_ID(cmd), CODEC_F00_06_GET_CHANNEL_ID(cmd)));
2298
2299 return VINF_SUCCESS;
2300}
2301
2302/* F06 */
2303static DECLCALLBACK(int) vrbProcSetStreamId(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2304{
2305 *pResp = 0;
2306
2307 PDMAUDIODIR enmDir;
2308
2309 uint32_t *pu32Addr = NULL;
2310 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2311 {
2312 pu32Addr = &pThis->paNodes[CODEC_NID(cmd)].dac.u32F06_param;
2313 enmDir = PDMAUDIODIR_OUT;
2314 }
2315 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2316 {
2317 pu32Addr = &pThis->paNodes[CODEC_NID(cmd)].adc.u32F06_param;
2318 enmDir = PDMAUDIODIR_IN;
2319 }
2320 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2321 {
2322 pu32Addr = &pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F06_param;
2323 enmDir = PDMAUDIODIR_OUT;
2324 }
2325 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2326 {
2327 pu32Addr = &pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F06_param;
2328 enmDir = PDMAUDIODIR_IN;
2329 }
2330 else
2331 {
2332 enmDir = PDMAUDIODIR_UNKNOWN;
2333 LogRel2(("HDA: Warning: Unhandled set stream ID command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
2334 }
2335
2336 /* Do we (re-)assign our input/output SDn (SDI/SDO) IDs? */
2337 if (enmDir != PDMAUDIODIR_UNKNOWN)
2338 {
2339 uint8_t uSD = CODEC_F00_06_GET_STREAM_ID(cmd);
2340 uint8_t uChannel = CODEC_F00_06_GET_CHANNEL_ID(cmd);
2341
2342 LogFlowFunc(("[NID0x%02x] Setting to stream ID=%RU8, channel=%RU8, enmDir=%RU32\n",
2343 CODEC_NID(cmd), uSD, uChannel, enmDir));
2344
2345 pThis->paNodes[CODEC_NID(cmd)].node.uSD = uSD;
2346 pThis->paNodes[CODEC_NID(cmd)].node.uChannel = uChannel;
2347
2348 if (enmDir == PDMAUDIODIR_OUT)
2349 {
2350 /** @todo Check if non-interleaved streams need a different channel / SDn? */
2351
2352 /* Propagate to the controller. */
2353 pThis->pfnMixerSetStream(pThis->pHDAState, PDMAUDIOMIXERCTL_FRONT, uSD, uChannel);
2354#ifdef VBOX_WITH_HDA_51_SURROUND
2355 pThis->pfnMixerSetStream(pThis->pHDAState, PDMAUDIOMIXERCTL_CENTER_LFE, uSD, uChannel);
2356 pThis->pfnMixerSetStream(pThis->pHDAState, PDMAUDIOMIXERCTL_REAR, uSD, uChannel);
2357#endif
2358 }
2359 else if (enmDir == PDMAUDIODIR_IN)
2360 {
2361 pThis->pfnMixerSetStream(pThis->pHDAState, PDMAUDIOMIXERCTL_LINE_IN, uSD, uChannel);
2362#ifdef VBOX_WITH_HDA_MIC_IN
2363 pThis->pfnMixerSetStream(pThis->pHDAState, PDMAUDIOMIXERCTL_MIC_IN, uSD, uChannel);
2364#endif
2365 }
2366 }
2367
2368 if (pu32Addr)
2369 hdaCodecSetRegisterU8(pu32Addr, cmd, 0);
2370
2371 return VINF_SUCCESS;
2372}
2373
2374/* A0 */
2375static DECLCALLBACK(int) vrbProcGetConverterFormat(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2376{
2377 *pResp = 0;
2378
2379 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2380 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32A_param;
2381 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2382 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32A_param;
2383 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2384 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32A_param;
2385 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2386 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32A_param;
2387 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2388 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32A_param;
2389 else
2390 LogRel2(("HDA: Warning: Unhandled get converter format command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
2391
2392 return VINF_SUCCESS;
2393}
2394
2395/* Also see section 3.7.1. */
2396static DECLCALLBACK(int) vrbProcSetConverterFormat(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2397{
2398 *pResp = 0;
2399
2400 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2401 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].dac.u32A_param, cmd, 0);
2402 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd)))
2403 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].adc.u32A_param, cmd, 0);
2404 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd)))
2405 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].spdifout.u32A_param, cmd, 0);
2406 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd)))
2407 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].spdifin.u32A_param, cmd, 0);
2408 else
2409 LogRel2(("HDA: Warning: Unhandled set converter format command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
2410
2411 return VINF_SUCCESS;
2412}
2413
2414/* F0C */
2415static DECLCALLBACK(int) vrbProcGetEAPD_BTLEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2416{
2417 *pResp = 0;
2418
2419 if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
2420 *pResp = pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F0c_param;
2421 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2422 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32F0c_param;
2423 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2424 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F0c_param;
2425 else
2426 LogRel2(("HDA: Warning: Unhandled get EAPD/BTL enabled command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
2427
2428 return VINF_SUCCESS;
2429}
2430
2431/* 70C */
2432static DECLCALLBACK(int) vrbProcSetEAPD_BTLEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2433{
2434 *pResp = 0;
2435
2436 uint32_t *pu32Reg = NULL;
2437 if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd)))
2438 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F0c_param;
2439 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2440 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].dac.u32F0c_param;
2441 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2442 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F0c_param;
2443 else
2444 LogRel2(("HDA: Warning: Unhandled set EAPD/BTL enabled command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
2445
2446 if (pu32Reg)
2447 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
2448
2449 return VINF_SUCCESS;
2450}
2451
2452/* F0F */
2453static DECLCALLBACK(int) vrbProcGetVolumeKnobCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2454{
2455 *pResp = 0;
2456
2457 if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd)))
2458 *pResp = pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param;
2459 else
2460 LogRel2(("HDA: Warning: Unhandled get volume knob control command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
2461
2462 return VINF_SUCCESS;
2463}
2464
2465/* 70F */
2466static DECLCALLBACK(int) vrbProcSetVolumeKnobCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2467{
2468 *pResp = 0;
2469
2470 uint32_t *pu32Reg = NULL;
2471 if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd)))
2472 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param;
2473 else
2474 LogRel2(("HDA: Warning: Unhandled set volume knob control command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
2475
2476 if (pu32Reg)
2477 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
2478
2479 return VINF_SUCCESS;
2480}
2481
2482/* F15 */
2483static DECLCALLBACK(int) vrbProcGetGPIOData(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2484{
2485 *pResp = 0;
2486
2487 return VINF_SUCCESS;
2488}
2489
2490/* 715 */
2491static DECLCALLBACK(int) vrbProcSetGPIOData(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2492{
2493 *pResp = 0;
2494
2495 return VINF_SUCCESS;
2496}
2497
2498/* F16 */
2499static DECLCALLBACK(int) vrbProcGetGPIOEnableMask(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2500{
2501 *pResp = 0;
2502
2503 return VINF_SUCCESS;
2504}
2505
2506/* 716 */
2507static DECLCALLBACK(int) vrbProcSetGPIOEnableMask(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2508{
2509 *pResp = 0;
2510
2511 return VINF_SUCCESS;
2512}
2513
2514/* F17 */
2515static DECLCALLBACK(int) vrbProcGetGPIOUnsolisted(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2516{
2517 *pResp = 0;
2518
2519 /* Note: this is true for ALC885. */
2520 if (CODEC_NID(cmd) == STAC9220_NID_AFG)
2521 *pResp = pThis->paNodes[1].afg.u32F17_param;
2522 else
2523 LogRel2(("HDA: Warning: Unhandled get GPIO unsolisted command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
2524
2525 return VINF_SUCCESS;
2526}
2527
2528/* 717 */
2529static DECLCALLBACK(int) vrbProcSetGPIOUnsolisted(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2530{
2531 *pResp = 0;
2532
2533 uint32_t *pu32Reg = NULL;
2534 if (CODEC_NID(cmd) == STAC9220_NID_AFG)
2535 pu32Reg = &pThis->paNodes[1].afg.u32F17_param;
2536 else
2537 LogRel2(("HDA: Warning: Unhandled set GPIO unsolisted command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
2538
2539 if (pu32Reg)
2540 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
2541
2542 return VINF_SUCCESS;
2543}
2544
2545/* F1C */
2546static DECLCALLBACK(int) vrbProcGetConfig(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2547{
2548 *pResp = 0;
2549
2550 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
2551 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F1c_param;
2552 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
2553 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F1c_param;
2554 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2555 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F1c_param;
2556 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
2557 *pResp = pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F1c_param;
2558 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd)))
2559 *pResp = pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F1c_param;
2560 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2561 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F1c_param;
2562 else
2563 LogRel2(("HDA: Warning: Unhandled get config command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
2564
2565 return VINF_SUCCESS;
2566}
2567
2568static int codecSetConfigX(PHDACODEC pThis, uint32_t cmd, uint8_t u8Offset)
2569{
2570 uint32_t *pu32Reg = NULL;
2571 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd)))
2572 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F1c_param;
2573 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd)))
2574 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F1c_param;
2575 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd)))
2576 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F1c_param;
2577 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd)))
2578 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F1c_param;
2579 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd)))
2580 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F1c_param;
2581 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)))
2582 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F1c_param;
2583 else
2584 LogRel2(("HDA: Warning: Unhandled set config command (%RU8) for NID0x%02x: 0x%x\n", u8Offset, CODEC_NID(cmd), cmd));
2585
2586 if (pu32Reg)
2587 hdaCodecSetRegisterU8(pu32Reg, cmd, u8Offset);
2588
2589 return VINF_SUCCESS;
2590}
2591
2592/* 71C */
2593static DECLCALLBACK(int) vrbProcSetConfig0(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2594{
2595 *pResp = 0;
2596 return codecSetConfigX(pThis, cmd, 0);
2597}
2598
2599/* 71D */
2600static DECLCALLBACK(int) vrbProcSetConfig1(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2601{
2602 *pResp = 0;
2603 return codecSetConfigX(pThis, cmd, 8);
2604}
2605
2606/* 71E */
2607static DECLCALLBACK(int) vrbProcSetConfig2(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2608{
2609 *pResp = 0;
2610 return codecSetConfigX(pThis, cmd, 16);
2611}
2612
2613/* 71E */
2614static DECLCALLBACK(int) vrbProcSetConfig3(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2615{
2616 *pResp = 0;
2617 return codecSetConfigX(pThis, cmd, 24);
2618}
2619
2620/* F04 */
2621static DECLCALLBACK(int) vrbProcGetSDISelect(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2622{
2623 *pResp = 0;
2624
2625 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2626 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32F04_param;
2627 else
2628 LogRel2(("HDA: Warning: Unhandled get SDI select command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
2629
2630 return VINF_SUCCESS;
2631}
2632
2633/* 704 */
2634static DECLCALLBACK(int) vrbProcSetSDISelect(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
2635{
2636 *pResp = 0;
2637
2638 uint32_t *pu32Reg = NULL;
2639 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd)))
2640 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].dac.u32F04_param;
2641 else
2642 LogRel2(("HDA: Warning: Unhandled set SDI select command for NID0x%02x: 0x%x\n", CODEC_NID(cmd), cmd));
2643
2644 if (pu32Reg)
2645 hdaCodecSetRegisterU8(pu32Reg, cmd, 0);
2646
2647 return VINF_SUCCESS;
2648}
2649
2650/**
2651 * HDA codec verb map.
2652 * @todo Any reason not to use binary search here?
2653 */
2654static const CODECVERB g_aCodecVerbs[] =
2655{
2656 /* Verb Verb mask Callback Name
2657 * ---------- --------------------- ----------------------------------------------------------
2658 */
2659 { 0x000F0000, CODEC_VERB_8BIT_CMD , vrbProcGetParameter , "GetParameter " },
2660 { 0x000F0100, CODEC_VERB_8BIT_CMD , vrbProcGetConSelectCtrl , "GetConSelectCtrl " },
2661 { 0x00070100, CODEC_VERB_8BIT_CMD , vrbProcSetConSelectCtrl , "SetConSelectCtrl " },
2662 { 0x000F0600, CODEC_VERB_8BIT_CMD , vrbProcGetStreamId , "GetStreamId " },
2663 { 0x00070600, CODEC_VERB_8BIT_CMD , vrbProcSetStreamId , "SetStreamId " },
2664 { 0x000F0700, CODEC_VERB_8BIT_CMD , vrbProcGetPinCtrl , "GetPinCtrl " },
2665 { 0x00070700, CODEC_VERB_8BIT_CMD , vrbProcSetPinCtrl , "SetPinCtrl " },
2666 { 0x000F0800, CODEC_VERB_8BIT_CMD , vrbProcGetUnsolicitedEnabled , "GetUnsolicitedEnabled " },
2667 { 0x00070800, CODEC_VERB_8BIT_CMD , vrbProcSetUnsolicitedEnabled , "SetUnsolicitedEnabled " },
2668 { 0x000F0900, CODEC_VERB_8BIT_CMD , vrbProcGetPinSense , "GetPinSense " },
2669 { 0x00070900, CODEC_VERB_8BIT_CMD , vrbProcSetPinSense , "SetPinSense " },
2670 { 0x000F0200, CODEC_VERB_8BIT_CMD , vrbProcGetConnectionListEntry , "GetConnectionListEntry" },
2671 { 0x000F0300, CODEC_VERB_8BIT_CMD , vrbProcGetProcessingState , "GetProcessingState " },
2672 { 0x00070300, CODEC_VERB_8BIT_CMD , vrbProcSetProcessingState , "SetProcessingState " },
2673 { 0x000F0D00, CODEC_VERB_8BIT_CMD , vrbProcGetDigitalConverter , "GetDigitalConverter " },
2674 { 0x00070D00, CODEC_VERB_8BIT_CMD , vrbProcSetDigitalConverter1 , "SetDigitalConverter1 " },
2675 { 0x00070E00, CODEC_VERB_8BIT_CMD , vrbProcSetDigitalConverter2 , "SetDigitalConverter2 " },
2676 { 0x000F2000, CODEC_VERB_8BIT_CMD , vrbProcGetSubId , "GetSubId " },
2677 { 0x00072000, CODEC_VERB_8BIT_CMD , vrbProcSetSubId0 , "SetSubId0 " },
2678 { 0x00072100, CODEC_VERB_8BIT_CMD , vrbProcSetSubId1 , "SetSubId1 " },
2679 { 0x00072200, CODEC_VERB_8BIT_CMD , vrbProcSetSubId2 , "SetSubId2 " },
2680 { 0x00072300, CODEC_VERB_8BIT_CMD , vrbProcSetSubId3 , "SetSubId3 " },
2681 { 0x0007FF00, CODEC_VERB_8BIT_CMD , vrbProcReset , "Reset " },
2682 { 0x000F0500, CODEC_VERB_8BIT_CMD , vrbProcGetPowerState , "GetPowerState " },
2683 { 0x00070500, CODEC_VERB_8BIT_CMD , vrbProcSetPowerState , "SetPowerState " },
2684 { 0x000F0C00, CODEC_VERB_8BIT_CMD , vrbProcGetEAPD_BTLEnabled , "GetEAPD_BTLEnabled " },
2685 { 0x00070C00, CODEC_VERB_8BIT_CMD , vrbProcSetEAPD_BTLEnabled , "SetEAPD_BTLEnabled " },
2686 { 0x000F0F00, CODEC_VERB_8BIT_CMD , vrbProcGetVolumeKnobCtrl , "GetVolumeKnobCtrl " },
2687 { 0x00070F00, CODEC_VERB_8BIT_CMD , vrbProcSetVolumeKnobCtrl , "SetVolumeKnobCtrl " },
2688 { 0x000F1500, CODEC_VERB_8BIT_CMD , vrbProcGetGPIOData , "GetGPIOData " },
2689 { 0x00071500, CODEC_VERB_8BIT_CMD , vrbProcSetGPIOData , "SetGPIOData " },
2690 { 0x000F1600, CODEC_VERB_8BIT_CMD , vrbProcGetGPIOEnableMask , "GetGPIOEnableMask " },
2691 { 0x00071600, CODEC_VERB_8BIT_CMD , vrbProcSetGPIOEnableMask , "SetGPIOEnableMask " },
2692 { 0x000F1700, CODEC_VERB_8BIT_CMD , vrbProcGetGPIOUnsolisted , "GetGPIOUnsolisted " },
2693 { 0x00071700, CODEC_VERB_8BIT_CMD , vrbProcSetGPIOUnsolisted , "SetGPIOUnsolisted " },
2694 { 0x000F1C00, CODEC_VERB_8BIT_CMD , vrbProcGetConfig , "GetConfig " },
2695 { 0x00071C00, CODEC_VERB_8BIT_CMD , vrbProcSetConfig0 , "SetConfig0 " },
2696 { 0x00071D00, CODEC_VERB_8BIT_CMD , vrbProcSetConfig1 , "SetConfig1 " },
2697 { 0x00071E00, CODEC_VERB_8BIT_CMD , vrbProcSetConfig2 , "SetConfig2 " },
2698 { 0x00071F00, CODEC_VERB_8BIT_CMD , vrbProcSetConfig3 , "SetConfig3 " },
2699 { 0x000A0000, CODEC_VERB_16BIT_CMD, vrbProcGetConverterFormat , "GetConverterFormat " },
2700 { 0x00020000, CODEC_VERB_16BIT_CMD, vrbProcSetConverterFormat , "SetConverterFormat " },
2701 { 0x000B0000, CODEC_VERB_16BIT_CMD, vrbProcGetAmplifier , "GetAmplifier " },
2702 { 0x00030000, CODEC_VERB_16BIT_CMD, vrbProcSetAmplifier , "SetAmplifier " },
2703 { 0x000F0400, CODEC_VERB_8BIT_CMD , vrbProcGetSDISelect , "GetSDISelect " },
2704 { 0x00070400, CODEC_VERB_8BIT_CMD , vrbProcSetSDISelect , "SetSDISelect " }
2705 /** @todo Implement 0x7e7: IDT Set GPIO (STAC922x only). */
2706};
2707
2708#ifdef DEBUG
2709typedef struct CODECDBGINFO
2710{
2711 /** DBGF info helpers. */
2712 PCDBGFINFOHLP pHlp;
2713 /** Current recursion level. */
2714 uint8_t uLevel;
2715 /** Pointer to codec state. */
2716 PHDACODEC pThis;
2717
2718} CODECDBGINFO, *PCODECDBGINFO;
2719
2720#define CODECDBG_INDENT pInfo->uLevel++;
2721#define CODECDBG_UNINDENT if (pInfo->uLevel) pInfo->uLevel--;
2722
2723#define CODECDBG_PRINT(...) pInfo->pHlp->pfnPrintf(pInfo->pHlp, __VA_ARGS__)
2724#define CODECDBG_PRINTI(...) codecDbgPrintf(pInfo, __VA_ARGS__)
2725
2726static void codecDbgPrintfIndentV(PCODECDBGINFO pInfo, uint16_t uIndent, const char *pszFormat, va_list va)
2727{
2728 char *pszValueFormat;
2729 if (RTStrAPrintfV(&pszValueFormat, pszFormat, va))
2730 {
2731 pInfo->pHlp->pfnPrintf(pInfo->pHlp, "%*s%s", uIndent, "", pszValueFormat);
2732 RTStrFree(pszValueFormat);
2733 }
2734}
2735
2736static void codecDbgPrintf(PCODECDBGINFO pInfo, const char *pszFormat, ...)
2737{
2738 va_list va;
2739 va_start(va, pszFormat);
2740 codecDbgPrintfIndentV(pInfo, pInfo->uLevel * 4, pszFormat, va);
2741 va_end(va);
2742}
2743
2744/* Power state */
2745static void codecDbgPrintNodeRegF05(PCODECDBGINFO pInfo, uint32_t u32Reg)
2746{
2747 codecDbgPrintf(pInfo, "Power (F05): fReset=%RTbool, fStopOk=%RTbool, Set=%RU8, Act=%RU8\n",
2748 CODEC_F05_IS_RESET(u32Reg), CODEC_F05_IS_STOPOK(u32Reg), CODEC_F05_SET(u32Reg), CODEC_F05_ACT(u32Reg));
2749}
2750
2751static void codecDbgPrintNodeRegA(PCODECDBGINFO pInfo, uint32_t u32Reg)
2752{
2753 codecDbgPrintf(pInfo, "RegA: %x\n", u32Reg);
2754}
2755
2756static void codecDbgPrintNodeRegF00(PCODECDBGINFO pInfo, uint32_t *paReg00)
2757{
2758 codecDbgPrintf(pInfo, "Parameters (F00):\n");
2759
2760 CODECDBG_INDENT
2761 codecDbgPrintf(pInfo, "Connections: %RU8\n", CODEC_F00_0E_COUNT(paReg00[0xE]));
2762 codecDbgPrintf(pInfo, "Amplifier Caps:\n");
2763 uint32_t uReg = paReg00[0xD];
2764 CODECDBG_INDENT
2765 codecDbgPrintf(pInfo, "Input Steps=%02RU8, StepSize=%02RU8, StepOff=%02RU8, fCanMute=%RTbool\n",
2766 CODEC_F00_0D_NUM_STEPS(uReg),
2767 CODEC_F00_0D_STEP_SIZE(uReg),
2768 CODEC_F00_0D_OFFSET(uReg),
2769 RT_BOOL(CODEC_F00_0D_IS_CAP_MUTE(uReg)));
2770
2771 uReg = paReg00[0x12];
2772 codecDbgPrintf(pInfo, "Output Steps=%02RU8, StepSize=%02RU8, StepOff=%02RU8, fCanMute=%RTbool\n",
2773 CODEC_F00_12_NUM_STEPS(uReg),
2774 CODEC_F00_12_STEP_SIZE(uReg),
2775 CODEC_F00_12_OFFSET(uReg),
2776 RT_BOOL(CODEC_F00_12_IS_CAP_MUTE(uReg)));
2777 CODECDBG_UNINDENT
2778 CODECDBG_UNINDENT
2779}
2780
2781static void codecDbgPrintNodeAmp(PCODECDBGINFO pInfo, uint32_t *paReg, uint8_t uIdx, uint8_t uDir)
2782{
2783#define CODECDBG_AMP(reg, chan) \
2784 codecDbgPrintf(pInfo, "Amp %RU8 %s %s: In=%RTbool, Out=%RTbool, Left=%RTbool, Right=%RTbool, Idx=%RU8, fMute=%RTbool, uGain=%RU8\n", \
2785 uIdx, chan, uDir == AMPLIFIER_IN ? "In" : "Out", \
2786 RT_BOOL(CODEC_SET_AMP_IS_IN_DIRECTION(reg)), RT_BOOL(CODEC_SET_AMP_IS_OUT_DIRECTION(reg)), \
2787 RT_BOOL(CODEC_SET_AMP_IS_LEFT_SIDE(reg)), RT_BOOL(CODEC_SET_AMP_IS_RIGHT_SIDE(reg)), \
2788 CODEC_SET_AMP_INDEX(reg), RT_BOOL(CODEC_SET_AMP_MUTE(reg)), CODEC_SET_AMP_GAIN(reg));
2789
2790 uint32_t regAmp = AMPLIFIER_REGISTER(paReg, uDir, AMPLIFIER_LEFT, uIdx);
2791 CODECDBG_AMP(regAmp, "Left");
2792 regAmp = AMPLIFIER_REGISTER(paReg, uDir, AMPLIFIER_RIGHT, uIdx);
2793 CODECDBG_AMP(regAmp, "Right");
2794
2795#undef CODECDBG_AMP
2796}
2797
2798static void codecDbgPrintNodeConnections(PCODECDBGINFO pInfo, PCODECNODE pNode)
2799{
2800 if (pNode->node.au32F00_param[0xE] == 0) /* Directly connected to HDA link. */
2801 {
2802 codecDbgPrintf(pInfo, "[HDA LINK]\n");
2803 return;
2804 }
2805}
2806
2807static void codecDbgPrintNode(PCODECDBGINFO pInfo, PCODECNODE pNode, bool fRecursive)
2808{
2809 codecDbgPrintf(pInfo, "Node 0x%02x (%02RU8): ", pNode->node.uID, pNode->node.uID);
2810
2811 if (pNode->node.uID == STAC9220_NID_ROOT)
2812 {
2813 CODECDBG_PRINT("ROOT\n");
2814 }
2815 else if (pNode->node.uID == STAC9220_NID_AFG)
2816 {
2817 CODECDBG_PRINT("AFG\n");
2818 CODECDBG_INDENT
2819 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2820 codecDbgPrintNodeRegF05(pInfo, pNode->afg.u32F05_param);
2821 CODECDBG_UNINDENT
2822 }
2823 else if (hdaCodecIsPortNode(pInfo->pThis, pNode->node.uID))
2824 {
2825 CODECDBG_PRINT("PORT\n");
2826 }
2827 else if (hdaCodecIsDacNode(pInfo->pThis, pNode->node.uID))
2828 {
2829 CODECDBG_PRINT("DAC\n");
2830 CODECDBG_INDENT
2831 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2832 codecDbgPrintNodeRegF05(pInfo, pNode->dac.u32F05_param);
2833 codecDbgPrintNodeRegA (pInfo, pNode->dac.u32A_param);
2834 codecDbgPrintNodeAmp (pInfo, pNode->dac.B_params, 0, AMPLIFIER_OUT);
2835 CODECDBG_UNINDENT
2836 }
2837 else if (hdaCodecIsAdcVolNode(pInfo->pThis, pNode->node.uID))
2838 {
2839 CODECDBG_PRINT("ADC VOLUME\n");
2840 CODECDBG_INDENT
2841 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2842 codecDbgPrintNodeRegA (pInfo, pNode->adcvol.u32A_params);
2843 codecDbgPrintNodeAmp (pInfo, pNode->adcvol.B_params, 0, AMPLIFIER_IN);
2844 CODECDBG_UNINDENT
2845 }
2846 else if (hdaCodecIsAdcNode(pInfo->pThis, pNode->node.uID))
2847 {
2848 CODECDBG_PRINT("ADC\n");
2849 CODECDBG_INDENT
2850 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2851 codecDbgPrintNodeRegF05(pInfo, pNode->adc.u32F05_param);
2852 codecDbgPrintNodeRegA (pInfo, pNode->adc.u32A_param);
2853 codecDbgPrintNodeAmp (pInfo, pNode->adc.B_params, 0, AMPLIFIER_IN);
2854 CODECDBG_UNINDENT
2855 }
2856 else if (hdaCodecIsAdcMuxNode(pInfo->pThis, pNode->node.uID))
2857 {
2858 CODECDBG_PRINT("ADC MUX\n");
2859 CODECDBG_INDENT
2860 codecDbgPrintNodeRegF00(pInfo, pNode->node.au32F00_param);
2861 codecDbgPrintNodeRegA (pInfo, pNode->adcmux.u32A_param);
2862 codecDbgPrintNodeAmp (pInfo, pNode->adcmux.B_params, 0, AMPLIFIER_IN);
2863 CODECDBG_UNINDENT
2864 }
2865 else if (hdaCodecIsPcbeepNode(pInfo->pThis, pNode->node.uID))
2866 {
2867 CODECDBG_PRINT("PC BEEP\n");
2868 }
2869 else if (hdaCodecIsSpdifOutNode(pInfo->pThis, pNode->node.uID))
2870 {
2871 CODECDBG_PRINT("SPDIF OUT\n");
2872 }
2873 else if (hdaCodecIsSpdifInNode(pInfo->pThis, pNode->node.uID))
2874 {
2875 CODECDBG_PRINT("SPDIF IN\n");
2876 }
2877 else if (hdaCodecIsDigInPinNode(pInfo->pThis, pNode->node.uID))
2878 {
2879 CODECDBG_PRINT("DIGITAL IN PIN\n");
2880 }
2881 else if (hdaCodecIsDigOutPinNode(pInfo->pThis, pNode->node.uID))
2882 {
2883 CODECDBG_PRINT("DIGITAL OUT PIN\n");
2884 }
2885 else if (hdaCodecIsCdNode(pInfo->pThis, pNode->node.uID))
2886 {
2887 CODECDBG_PRINT("CD\n");
2888 }
2889 else if (hdaCodecIsVolKnobNode(pInfo->pThis, pNode->node.uID))
2890 {
2891 CODECDBG_PRINT("VOLUME KNOB\n");
2892 }
2893 else if (hdaCodecIsReservedNode(pInfo->pThis, pNode->node.uID))
2894 {
2895 CODECDBG_PRINT("RESERVED\n");
2896 }
2897 else
2898 CODECDBG_PRINT("UNKNOWN TYPE 0x%x\n", pNode->node.uID);
2899
2900 if (fRecursive)
2901 {
2902#define CODECDBG_PRINT_CONLIST_ENTRY(_aNode, _aEntry) \
2903 if (cCnt >= _aEntry) \
2904 { \
2905 const uint8_t uID = RT_BYTE##_aEntry(_aNode->node.au32F02_param[0x0]); \
2906 if (pNode->node.uID == uID) \
2907 codecDbgPrintNode(pInfo, _aNode, false /* fRecursive */); \
2908 }
2909
2910 /* Slow recursion, but this is debug stuff anyway. */
2911 for (uint8_t i = 0; i < pInfo->pThis->cTotalNodes; i++)
2912 {
2913 const PCODECNODE pSubNode = &pInfo->pThis->paNodes[i];
2914 if (pSubNode->node.uID == pNode->node.uID)
2915 continue;
2916
2917 const uint8_t cCnt = CODEC_F00_0E_COUNT(pSubNode->node.au32F00_param[0xE]);
2918 if (cCnt == 0) /* No connections present? Skip. */
2919 continue;
2920
2921 CODECDBG_INDENT
2922 CODECDBG_PRINT_CONLIST_ENTRY(pSubNode, 1)
2923 CODECDBG_PRINT_CONLIST_ENTRY(pSubNode, 2)
2924 CODECDBG_PRINT_CONLIST_ENTRY(pSubNode, 3)
2925 CODECDBG_PRINT_CONLIST_ENTRY(pSubNode, 4)
2926 CODECDBG_UNINDENT
2927 }
2928
2929#undef CODECDBG_PRINT_CONLIST_ENTRY
2930 }
2931}
2932
2933static DECLCALLBACK(void) codecDbgListNodes(PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs)
2934{
2935 pHlp->pfnPrintf(pHlp, "HDA LINK / INPUTS\n");
2936
2937 CODECDBGINFO dbgInfo;
2938 dbgInfo.pHlp = pHlp;
2939 dbgInfo.pThis = pThis;
2940 dbgInfo.uLevel = 0;
2941
2942 PCODECDBGINFO pInfo = &dbgInfo;
2943
2944 CODECDBG_INDENT
2945 for (uint8_t i = 0; i < pThis->cTotalNodes; i++)
2946 {
2947 PCODECNODE pNode = &pThis->paNodes[i];
2948
2949 /* Start with all nodes which have connection entries set. */
2950 if (CODEC_F00_0E_COUNT(pNode->node.au32F00_param[0xE]))
2951 codecDbgPrintNode(&dbgInfo, pNode, true /* fRecursive */);
2952 }
2953 CODECDBG_UNINDENT
2954}
2955
2956static DECLCALLBACK(void) codecDbgSelector(PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs)
2957{
2958
2959}
2960#endif
2961
2962static DECLCALLBACK(int) codecLookup(PHDACODEC pThis, uint32_t cmd, uint64_t *puResp)
2963{
2964 AssertPtrReturn(pThis, VERR_INVALID_POINTER);
2965 AssertPtrReturn(puResp, VERR_INVALID_POINTER);
2966
2967 if (CODEC_CAD(cmd) != pThis->id)
2968 {
2969 *puResp = 0;
2970 AssertMsgFailed(("Unknown codec address 0x%x\n", CODEC_CAD(cmd)));
2971 return VERR_INVALID_PARAMETER;
2972 }
2973
2974 if ( CODEC_VERBDATA(cmd) == 0
2975 || CODEC_NID(cmd) >= pThis->cTotalNodes)
2976 {
2977 *puResp = 0;
2978 AssertMsgFailed(("[NID0x%02x] Unknown / invalid node or data (0x%x)\n", CODEC_NID(cmd), CODEC_VERBDATA(cmd)));
2979 return VERR_INVALID_PARAMETER;
2980 }
2981
2982 /** @todo r=andy Implement a binary search here. */
2983 for (size_t i = 0; i < pThis->cVerbs; i++)
2984 {
2985 if ((CODEC_VERBDATA(cmd) & pThis->paVerbs[i].mask) == pThis->paVerbs[i].verb)
2986 {
2987 int rc2 = pThis->paVerbs[i].pfn(pThis, cmd, puResp);
2988 AssertRC(rc2);
2989 Log3Func(("[NID0x%02x] (0x%x) %s: 0x%x -> 0x%x\n",
2990 CODEC_NID(cmd), pThis->paVerbs[i].verb, pThis->paVerbs[i].pszName, CODEC_VERB_PAYLOAD8(cmd), *puResp));
2991 return rc2;
2992 }
2993 }
2994
2995 *puResp = 0;
2996 LogFunc(("[NID0x%02x] Callback for %x not found\n", CODEC_NID(cmd), CODEC_VERBDATA(cmd)));
2997 return VERR_NOT_FOUND;
2998}
2999
3000/*
3001 * APIs exposed to DevHDA.
3002 */
3003
3004int hdaCodecAddStream(PHDACODEC pThis, PDMAUDIOMIXERCTL enmMixerCtl, PPDMAUDIOSTREAMCFG pCfg)
3005{
3006 AssertPtrReturn(pThis, VERR_INVALID_POINTER);
3007 AssertPtrReturn(pCfg, VERR_INVALID_POINTER);
3008
3009 int rc = VINF_SUCCESS;
3010
3011 switch (enmMixerCtl)
3012 {
3013 case PDMAUDIOMIXERCTL_VOLUME_MASTER:
3014 case PDMAUDIOMIXERCTL_FRONT:
3015#ifdef VBOX_WITH_HDA_51_SURROUND
3016 case PDMAUDIOMIXERCTL_CENTER_LFE:
3017 case PDMAUDIOMIXERCTL_REAR:
3018#endif
3019 {
3020 break;
3021 }
3022 case PDMAUDIOMIXERCTL_LINE_IN:
3023#ifdef VBOX_WITH_HDA_MIC_IN
3024 case PDMAUDIOMIXERCTL_MIC_IN:
3025#endif
3026 {
3027 break;
3028 }
3029 default:
3030 AssertMsgFailed(("Mixer control %ld not implemented\n", enmMixerCtl));
3031 rc = VERR_NOT_IMPLEMENTED;
3032 break;
3033 }
3034
3035 if (RT_SUCCESS(rc))
3036 rc = pThis->pfnMixerAddStream(pThis->pHDAState, enmMixerCtl, pCfg);
3037
3038 LogFlowFuncLeaveRC(rc);
3039 return rc;
3040}
3041
3042int hdaCodecRemoveStream(PHDACODEC pThis, PDMAUDIOMIXERCTL enmMixerCtl)
3043{
3044 AssertPtrReturn(pThis, VERR_INVALID_POINTER);
3045
3046 int rc = pThis->pfnMixerRemoveStream(pThis->pHDAState, enmMixerCtl);
3047
3048 LogFlowFuncLeaveRC(rc);
3049 return rc;
3050}
3051
3052int hdaCodecSaveState(PHDACODEC pThis, PSSMHANDLE pSSM)
3053{
3054 AssertLogRelMsgReturn(pThis->cTotalNodes == STAC9221_NUM_NODES, ("cTotalNodes=%#x, should be 0x1c", pThis->cTotalNodes),
3055 VERR_INTERNAL_ERROR);
3056 SSMR3PutU32(pSSM, pThis->cTotalNodes);
3057 for (unsigned idxNode = 0; idxNode < pThis->cTotalNodes; ++idxNode)
3058 SSMR3PutStructEx(pSSM, &pThis->paNodes[idxNode].SavedState, sizeof(pThis->paNodes[idxNode].SavedState),
3059 0 /*fFlags*/, g_aCodecNodeFields, NULL /*pvUser*/);
3060 return VINF_SUCCESS;
3061}
3062
3063int hdaCodecLoadState(PHDACODEC pThis, PSSMHANDLE pSSM, uint32_t uVersion)
3064{
3065 PCSSMFIELD pFields;
3066 uint32_t fFlags;
3067 switch (uVersion)
3068 {
3069 case HDA_SSM_VERSION_1:
3070 AssertReturn(pThis->cTotalNodes == 0x1c, VERR_INTERNAL_ERROR);
3071 pFields = g_aCodecNodeFieldsV1;
3072 fFlags = SSMSTRUCT_FLAGS_MEM_BAND_AID_RELAXED;
3073 break;
3074
3075 case HDA_SSM_VERSION_2:
3076 case HDA_SSM_VERSION_3:
3077 AssertReturn(pThis->cTotalNodes == 0x1c, VERR_INTERNAL_ERROR);
3078 pFields = g_aCodecNodeFields;
3079 fFlags = SSMSTRUCT_FLAGS_MEM_BAND_AID_RELAXED;
3080 break;
3081
3082 /* Since version 4 a flexible node count is supported. */
3083 case HDA_SSM_VERSION_4:
3084 case HDA_SSM_VERSION_5:
3085 case HDA_SSM_VERSION:
3086 {
3087 uint32_t cNodes;
3088 int rc2 = SSMR3GetU32(pSSM, &cNodes);
3089 AssertRCReturn(rc2, rc2);
3090 if (cNodes != 0x1c)
3091 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
3092 AssertReturn(pThis->cTotalNodes == 0x1c, VERR_INTERNAL_ERROR);
3093
3094 pFields = g_aCodecNodeFields;
3095 fFlags = 0;
3096 break;
3097 }
3098
3099 default:
3100 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
3101 }
3102
3103 for (unsigned idxNode = 0; idxNode < pThis->cTotalNodes; ++idxNode)
3104 {
3105 uint8_t idOld = pThis->paNodes[idxNode].SavedState.Core.uID;
3106 int rc = SSMR3GetStructEx(pSSM, &pThis->paNodes[idxNode].SavedState,
3107 sizeof(pThis->paNodes[idxNode].SavedState),
3108 fFlags, pFields, NULL);
3109 if (RT_FAILURE(rc))
3110 return rc;
3111 AssertLogRelMsgReturn(idOld == pThis->paNodes[idxNode].SavedState.Core.uID,
3112 ("loaded %#x, expected %#x\n", pThis->paNodes[idxNode].SavedState.Core.uID, idOld),
3113 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
3114 }
3115
3116 /*
3117 * Update stuff after changing the state.
3118 */
3119 if (hdaCodecIsDacNode(pThis, pThis->u8DacLineOut))
3120 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8DacLineOut].dac.B_params, PDMAUDIOMIXERCTL_FRONT);
3121 else if (hdaCodecIsSpdifOutNode(pThis, pThis->u8DacLineOut))
3122 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8DacLineOut].spdifout.B_params, PDMAUDIOMIXERCTL_FRONT);
3123 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8AdcVolsLineIn].adcvol.B_params, PDMAUDIOMIXERCTL_LINE_IN);
3124
3125 return VINF_SUCCESS;
3126}
3127
3128/**
3129 * Powers off the codec.
3130 *
3131 * @param pThis Codec to power off.
3132 */
3133void hdaCodecPowerOff(PHDACODEC pThis)
3134{
3135 if (!pThis)
3136 return;
3137
3138 LogFlowFuncEnter();
3139
3140 LogRel2(("HDA: Powering off codec ...\n"));
3141
3142 int rc2 = hdaCodecRemoveStream(pThis, PDMAUDIOMIXERCTL_FRONT);
3143 AssertRC(rc2);
3144#ifdef VBOX_WITH_HDA_51_SURROUND
3145 rc2 = hdaCodecRemoveStream(pThis, PDMAUDIOMIXERCTL_CENTER_LFE);
3146 AssertRC(rc2);
3147 rc2 = hdaCodecRemoveStream(pThis, PDMAUDIOMIXERCTL_REAR);
3148 AssertRC(rc2);
3149#endif
3150
3151#ifdef VBOX_WITH_HDA_MIC_IN
3152 rc2 = hdaCodecRemoveStream(pThis, PDMAUDIOMIXERCTL_MIC_IN);
3153 AssertRC(rc2);
3154#endif
3155 rc2 = hdaCodecRemoveStream(pThis, PDMAUDIOMIXERCTL_LINE_IN);
3156 AssertRC(rc2);
3157}
3158
3159void hdaCodecDestruct(PHDACODEC pThis)
3160{
3161 if (!pThis)
3162 return;
3163
3164 LogFlowFuncEnter();
3165
3166 if (pThis->paNodes)
3167 {
3168 RTMemFree(pThis->paNodes);
3169 pThis->paNodes = NULL;
3170 }
3171}
3172
3173int hdaCodecConstruct(PPDMDEVINS pDevIns, PHDACODEC pThis,
3174 uint16_t uLUN, PCFGMNODE pCfg)
3175{
3176 AssertPtrReturn(pDevIns, VERR_INVALID_POINTER);
3177 AssertPtrReturn(pThis, VERR_INVALID_POINTER);
3178 AssertPtrReturn(pCfg, VERR_INVALID_POINTER);
3179
3180 pThis->id = uLUN;
3181 pThis->paVerbs = &g_aCodecVerbs[0];
3182 pThis->cVerbs = RT_ELEMENTS(g_aCodecVerbs);
3183
3184#ifdef DEBUG
3185 pThis->pfnDbgSelector = codecDbgSelector;
3186 pThis->pfnDbgListNodes = codecDbgListNodes;
3187#endif
3188 pThis->pfnLookup = codecLookup;
3189
3190 int rc = stac9220Construct(pThis);
3191 AssertRCReturn(rc, rc);
3192
3193 /* Common root node initializers. */
3194 pThis->paNodes[STAC9220_NID_ROOT].root.node.au32F00_param[0] = CODEC_MAKE_F00_00(pThis->u16VendorId, pThis->u16DeviceId);
3195 pThis->paNodes[STAC9220_NID_ROOT].root.node.au32F00_param[4] = CODEC_MAKE_F00_04(0x1, 0x1);
3196
3197 /* Common AFG node initializers. */
3198 pThis->paNodes[STAC9220_NID_AFG].afg.node.au32F00_param[0x4] = CODEC_MAKE_F00_04(0x2, pThis->cTotalNodes - 2);
3199 pThis->paNodes[STAC9220_NID_AFG].afg.node.au32F00_param[0x5] = CODEC_MAKE_F00_05(1, CODEC_F00_05_AFG);
3200 pThis->paNodes[STAC9220_NID_AFG].afg.node.au32F00_param[0xA] = CODEC_F00_0A_44_1KHZ | CODEC_F00_0A_16_BIT;
3201 pThis->paNodes[STAC9220_NID_AFG].afg.u32F20_param = CODEC_MAKE_F20(pThis->u16VendorId, pThis->u8BSKU, pThis->u8AssemblyId);
3202
3203 do
3204 {
3205 /* Initialize the streams to some default values (44.1 kHz, 16-bit signed, 2 channels).
3206 * The codec's (fixed) delivery rate is 48kHz, so a frame will be delivered every 20.83us. */
3207 PDMAUDIOSTREAMCFG strmCfg;
3208 RT_ZERO(strmCfg);
3209 strmCfg.uHz = 44100;
3210 strmCfg.cChannels = 2;
3211 strmCfg.enmFormat = PDMAUDIOFMT_S16;
3212 strmCfg.enmEndianness = PDMAUDIOHOSTENDIANNESS;
3213
3214 /* Note: Adding the default input/output streams is *not* critical for the overall
3215 * codec construction result. */
3216
3217 /*
3218 * Output streams.
3219 */
3220 strmCfg.enmDir = PDMAUDIODIR_OUT;
3221
3222 /* Front. */
3223 RTStrPrintf(strmCfg.szName, RT_ELEMENTS(strmCfg.szName), "Front");
3224 strmCfg.DestSource.Dest = PDMAUDIOPLAYBACKDEST_FRONT;
3225 int rc2 = hdaCodecAddStream(pThis, PDMAUDIOMIXERCTL_FRONT, &strmCfg);
3226 if (RT_FAILURE(rc2))
3227 LogRel2(("HDA: Failed to add front output stream: %Rrc\n", rc2));
3228
3229#ifdef VBOX_WITH_HDA_51_SURROUND
3230 /* Center / LFE. */
3231 RTStrPrintf(strmCfg.szName, RT_ELEMENTS(strmCfg.szName), "Center / LFE");
3232 strmCfg.DestSource.Dest = PDMAUDIOPLAYBACKDEST_CENTER_LFE;
3233 /** @todo Handle mono channel if only center *or* LFE is available? */
3234 rc2 = hdaCodecAddStream(pThis, PDMAUDIOMIXERCTL_CENTER_LFE, &strmCfg);
3235 if (RT_FAILURE(rc2))
3236 LogRel2(("HDA: Failed to add center/LFE output stream: %Rrc\n", rc2));
3237
3238 /* Rear. */
3239 RTStrPrintf(strmCfg.szName, RT_ELEMENTS(strmCfg.szName), "Rear");
3240 strmCfg.DestSource.Dest = PDMAUDIOPLAYBACKDEST_REAR;
3241 rc2 = hdaCodecAddStream(pThis, PDMAUDIOMIXERCTL_REAR, &strmCfg);
3242 if (RT_FAILURE(rc2))
3243 LogRel2(("HDA: Failed to add rear output stream: %Rrc\n", rc2));
3244#endif
3245
3246 /*
3247 * Input streams.
3248 */
3249 strmCfg.enmDir = PDMAUDIODIR_IN;
3250
3251#ifdef VBOX_WITH_HDA_MIC_IN
3252 RTStrPrintf(strmCfg.szName, RT_ELEMENTS(strmCfg.szName), "Microphone In");
3253 strmCfg.DestSource.Source = PDMAUDIORECSOURCE_MIC;
3254 rc2 = hdaCodecAddStream(pThis, PDMAUDIOMIXERCTL_MIC_IN, &strmCfg);
3255 if (RT_FAILURE(rc2))
3256 LogRel2(("HDA: Failed to add microphone input stream: %Rrc\n", rc2));
3257#endif
3258 RTStrPrintf(strmCfg.szName, RT_ELEMENTS(strmCfg.szName), "Line In");
3259 strmCfg.DestSource.Source = PDMAUDIORECSOURCE_LINE;
3260 rc2 = hdaCodecAddStream(pThis, PDMAUDIOMIXERCTL_LINE_IN, &strmCfg);
3261 if (RT_FAILURE(rc2))
3262 LogRel2(("HDA: Failed to add line input stream: %Rrc\n", rc2));
3263
3264 } while (0);
3265
3266 /*
3267 * Reset nodes.
3268 */
3269 AssertPtr(pThis->paNodes);
3270 AssertPtr(pThis->pfnCodecNodeReset);
3271
3272 for (uint8_t i = 0; i < pThis->cTotalNodes; i++)
3273 pThis->pfnCodecNodeReset(pThis, i, &pThis->paNodes[i]);
3274
3275 /*
3276 * Set initial volume.
3277 */
3278 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8DacLineOut].dac.B_params, PDMAUDIOMIXERCTL_FRONT);
3279 hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8AdcVolsLineIn].adcvol.B_params, PDMAUDIOMIXERCTL_LINE_IN);
3280#ifdef VBOX_WITH_HDA_MIC_IN
3281 #error "Implement mic-in support!"
3282#endif
3283
3284 LogFlowFuncLeaveRC(rc);
3285 return rc;
3286}
3287
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