DevIchAc97.cpp@ 61706

最後變更在這個檔案從61706是 61668,由 vboxsync 提交於 9 年前
Audio: Update.
屬性 svn:eol-style 設為 `native` 屬性 svn:keywords 設為 `Author Date Id Revision`
檔案大小: 99.5 KB

行
1	/* $Id: DevIchAc97.cpp 61668 2016-06-13 07:35:56Z vboxsync $ */
2	/** @file
3	* DevIchAc97 - VBox ICH AC97 Audio Controller.
4	*/
5
6	/*
7	* Copyright (C) 2006-2016 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.alldomusa.eu.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_DEV_AC97
23	#include <VBox/log.h>
24	#include <VBox/vmm/pdmdev.h>
25	#include <VBox/vmm/pdmaudioifs.h>
26
27	#include <iprt/assert.h>
28	#ifdef IN_RING3
29	# ifdef DEBUG
30	# include <iprt/file.h>
31	# endif
32	# include <iprt/mem.h>
33	# include <iprt/string.h>
34	# include <iprt/uuid.h>
35	#endif
36
37	#include "VBoxDD.h"
38
39	#include "AudioMixBuffer.h"
40	#include "AudioMixer.h"
41	#include "DrvAudio.h"
42
43
44	/*********************************************************************************************************************************
45	* Defined Constants And Macros *
46	*********************************************************************************************************************************/
47
48	#ifdef DEBUG_andy
49	/*
50	* AC97_DEBUG_DUMP_PCM_DATA enables dumping the raw PCM data
51	* to a file on the host. Be sure to adjust AC97_DEBUG_DUMP_PCM_DATA_PATH
52	* to your needs before using this!
53	*/
54	# define AC97_DEBUG_DUMP_PCM_DATA
55	# ifdef RT_OS_WINDOWS
56	# define AC97_DEBUG_DUMP_PCM_DATA_PATH "c:\\temp\\"
57	# else
58	# define AC97_DEBUG_DUMP_PCM_DATA_PATH "/tmp/"
59	# endif
60	#endif /* DEBUG_andy */
61
62	/** Current saved state version. */
63	#define AC97_SSM_VERSION 1
64
65	/** Timer frequency (in Hz) */
66	#define AC97_TIMER_HZ 200
67
68	/** @todo Use AC97_ prefixes! */
69	#define SR_FIFOE RT_BIT(4) /* rwc, FIFO error. */
70	#define SR_BCIS RT_BIT(3) /* rwc, Buffer completion interrupt status. */
71	#define SR_LVBCI RT_BIT(2) /* rwc, Last valid buffer completion interrupt. */
72	#define SR_CELV RT_BIT(1) /* ro, Current equals last valid. */
73	#define SR_DCH RT_BIT(0) /* ro, Controller halted. */
74	#define SR_VALID_MASK (RT_BIT(5) - 1)
75	#define SR_WCLEAR_MASK (SR_FIFOE \| SR_BCIS \| SR_LVBCI)
76	#define SR_RO_MASK (SR_DCH \| SR_CELV)
77	#define SR_INT_MASK (SR_FIFOE \| SR_BCIS \| SR_LVBCI)
78
79	#define CR_IOCE RT_BIT(4) /* rw, Interrupt On Completion Enable. */
80	#define CR_FEIE RT_BIT(3) /* rw FIFO Error Interrupt Enable. */
81	#define CR_LVBIE RT_BIT(2) /* rw Last Valid Buffer Interrupt Enable. */
82	#define CR_RR RT_BIT(1) /* rw Reset Registers. */
83	#define CR_RPBM RT_BIT(0) /* rw Run/Pause Bus Master. */
84	#define CR_VALID_MASK (RT_BIT(5) - 1)
85	#define CR_DONT_CLEAR_MASK (CR_IOCE \| CR_FEIE \| CR_LVBIE)
86
87	#define GC_WR 4 /* rw */
88	#define GC_CR 2 /* rw */
89	#define GC_VALID_MASK (RT_BIT(6) - 1)
90
91	#define GS_MD3 RT_BIT(17) /* rw */
92	#define GS_AD3 RT_BIT(16) /* rw */
93	#define GS_RCS RT_BIT(15) /* rwc */
94	#define GS_B3S12 RT_BIT(14) /* ro */
95	#define GS_B2S12 RT_BIT(13) /* ro */
96	#define GS_B1S12 RT_BIT(12) /* ro */
97	#define GS_S1R1 RT_BIT(11) /* rwc */
98	#define GS_S0R1 RT_BIT(10) /* rwc */
99	#define GS_S1CR RT_BIT(9) /* ro */
100	#define GS_S0CR RT_BIT(8) /* ro */
101	#define GS_MINT RT_BIT(7) /* ro */
102	#define GS_POINT RT_BIT(6) /* ro */
103	#define GS_PIINT RT_BIT(5) /* ro */
104	#define GS_RSRVD (RT_BIT(4)\|RT_BIT(3))
105	#define GS_MOINT RT_BIT(2) /* ro */
106	#define GS_MIINT RT_BIT(1) /* ro */
107	#define GS_GSCI RT_BIT(0) /* rwc */
108	#define GS_RO_MASK (GS_B3S12 \| \
109	GS_B2S12 \| \
110	GS_B1S12 \| \
111	GS_S1CR \| \
112	GS_S0CR \| \
113	GS_MINT \| \
114	GS_POINT \| \
115	GS_PIINT \| \
116	GS_RSRVD \| \
117	GS_MOINT \| \
118	GS_MIINT)
119	#define GS_VALID_MASK (RT_BIT(18) - 1)
120	#define GS_WCLEAR_MASK (GS_RCS\|GS_S1R1\|GS_S0R1\|GS_GSCI)
121
122	/** @name Buffer Descriptor
123	* @{ */
124	#define BD_IOC RT_BIT(31) /*< Interrupt on Completion. /
125	#define BD_BUP RT_BIT(30) /*< Buffer Underrun Policy. /
126
127	#define BD_MAX_LEN_MASK 0xFFFE
128	/** @} */
129
130	/** @name Extended Audio Status and Control Register
131	* @{ */
132	#define EACS_VRA 1 /*< Variable Rate Audio (4.2.1.1). /
133	#define EACS_VRM 8 /*< Variable Rate Mic Audio (4.2.1.1). /
134	/** @} */
135
136	#define VOL_MASK 0x1f
137	#define MUTE_SHIFT 15
138
139	#define REC_MASK 7
140	enum
141	{
142	REC_MIC = 0,
143	REC_CD,
144	REC_VIDEO,
145	REC_AUX,
146	REC_LINE_IN,
147	REC_STEREO_MIX,
148	REC_MONO_MIX,
149	REC_PHONE
150	};
151
152	enum
153	{
154	AC97_Reset = 0x00,
155	AC97_Master_Volume_Mute = 0x02,
156	AC97_Headphone_Volume_Mute = 0x04, /** Also known as AUX, see table 16, section 5.7. */
157	AC97_Master_Volume_Mono_Mute = 0x06,
158	AC97_Master_Tone_RL = 0x08,
159	AC97_PC_BEEP_Volume_Mute = 0x0A,
160	AC97_Phone_Volume_Mute = 0x0C,
161	AC97_Mic_Volume_Mute = 0x0E,
162	AC97_Line_In_Volume_Mute = 0x10,
163	AC97_CD_Volume_Mute = 0x12,
164	AC97_Video_Volume_Mute = 0x14,
165	AC97_Aux_Volume_Mute = 0x16,
166	AC97_PCM_Out_Volume_Mute = 0x18,
167	AC97_Record_Select = 0x1A,
168	AC97_Record_Gain_Mute = 0x1C,
169	AC97_Record_Gain_Mic_Mute = 0x1E,
170	AC97_General_Purpose = 0x20,
171	AC97_3D_Control = 0x22,
172	AC97_AC_97_RESERVED = 0x24,
173	AC97_Powerdown_Ctrl_Stat = 0x26,
174	AC97_Extended_Audio_ID = 0x28,
175	AC97_Extended_Audio_Ctrl_Stat = 0x2A,
176	AC97_PCM_Front_DAC_Rate = 0x2C,
177	AC97_PCM_Surround_DAC_Rate = 0x2E,
178	AC97_PCM_LFE_DAC_Rate = 0x30,
179	AC97_PCM_LR_ADC_Rate = 0x32,
180	AC97_MIC_ADC_Rate = 0x34,
181	AC97_6Ch_Vol_C_LFE_Mute = 0x36,
182	AC97_6Ch_Vol_L_R_Surround_Mute = 0x38,
183	AC97_Vendor_Reserved = 0x58,
184	AC97_AD_Misc = 0x76,
185	AC97_Vendor_ID1 = 0x7c,
186	AC97_Vendor_ID2 = 0x7e
187	};
188
189	/* Codec models. */
190	enum {
191	Codec_STAC9700 = 0, /* SigmaTel STAC9700 */
192	Codec_AD1980, /* Analog Devices AD1980 */
193	Codec_AD1981B /* Analog Devices AD1981B */
194	};
195
196	/* Analog Devices miscellaneous regiter bits used in AD1980. */
197	#define AD_MISC_LOSEL RT_BIT(5) /* Surround (rear) goes to line out outputs. */
198	#define AD_MISC_HPSEL RT_BIT(10) /* PCM (front) goes to headphone outputs. */
199
200	#define ICHAC97STATE_2_DEVINS(a_pAC97) ((a_pAC97)->pDevInsR3)
201
202	enum
203	{
204	BUP_SET = RT_BIT(0),
205	BUP_LAST = RT_BIT(1)
206	};
207
208	/** Emits registers for a specific (Native Audio Bus Master BAR) NABMBAR. */
209	#define AC97_NABMBAR_REGS(prefix, off) \
210	enum { \
211	prefix ## _BDBAR = off, /* Buffer Descriptor Base Address */ \
212	prefix ## _CIV = off + 4, /* Current Index Value */ \
213	prefix ## _LVI = off + 5, /* Last Valid Index */ \
214	prefix ## _SR = off + 6, /* Status Register */ \
215	prefix ## _PICB = off + 8, /* Position in Current Buffer */ \
216	prefix ## _PIV = off + 10, /* Prefetched Index Value */ \
217	prefix ## _CR = off + 11 /* Control Register */ \
218	}
219
220	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
221	typedef enum
222	{
223	PI_INDEX = 0, /** PCM in */
224	PO_INDEX, /** PCM out */
225	MC_INDEX, /** Mic in */
226	LAST_INDEX
227	} AC97SOUNDSOURCE;
228
229	AC97_NABMBAR_REGS(PI, PI_INDEX * 16);
230	AC97_NABMBAR_REGS(PO, PO_INDEX * 16);
231	AC97_NABMBAR_REGS(MC, MC_INDEX * 16);
232	#endif
233
234	enum
235	{
236	/** NABMBAR: Global Control Register. */
237	GLOB_CNT = 0x2c,
238	/** NABMBAR Global Status. */
239	GLOB_STA = 0x30,
240	/** Codec Access Semaphore Register. */
241	CAS = 0x34
242	};
243
244	#define AC97_PORT2IDX(a_idx) ( ((a_idx) >> 4) & 3 )
245
246	/*********************************************************************************************************************************
247	* Structures and Typedefs *
248	*********************************************************************************************************************************/
249
250	/**
251	* Buffer Descriptor List Entry (BDLE).
252	*/
253	typedef struct AC97BDLE
254	{
255	uint32_t addr;
256	uint32_t ctl_len;
257	} AC97BDLE, *PAC97BDLE;
258
259	/**
260	* Bus master register set for an audio stream.
261	*/
262	typedef struct AC97BMREGS
263	{
264	uint32_t bdbar; /** rw 0, Buffer Descriptor List: BAR (Base Address Register). */
265	uint8_t civ; /** ro 0, Current index value. */
266	uint8_t lvi; /** rw 0, Last valid index. */
267	uint16_t sr; /** rw 1, Status register. */
268	uint16_t picb; /** ro 0, Position in current buffer (in samples). */
269	uint8_t piv; /** ro 0, Prefetched index value. */
270	uint8_t cr; /** rw 0, Control register. */
271	int bd_valid; /** Whether current BDLE is initialized or not. */
272	AC97BDLE bd; /** Current Buffer Descriptor List Entry (BDLE). */
273	} AC97BMREGS, *PAC97BMREGS;
274
275	/**
276	* Internal state of an AC97 stream.
277	*/
278	typedef struct AC97STREAMSTATE
279	{
280	/** Temporary FIFO write buffer. */
281	R3PTRTYPE(uint8_t *) au8FIFOW;
282	/** Size of the temporary FIFO write buffer. */
283	uint32_t cbFIFOW;
284	/** Current write offset in FIFO write buffer. */
285	uint32_t offFIFOW;
286	uint8_t Padding;
287	} AC97STREAMSTATE, *PAC97STREAMSTATE;
288
289	/**
290	* Structure for keeping an AC97 stream state.
291	*
292	* Contains only register values which do not change until a
293	* stream reset occurs.
294	*/
295	typedef struct AC97STREAM
296	{
297	/** Stream number (SDn). */
298	uint8_t u8Strm;
299	/** Bus master registers of this stream. */
300	AC97BMREGS Regs;
301	/** Internal state of this stream. */
302	AC97STREAMSTATE State;
303	} AC97STREAM, *PAC97STREAM;
304
305	typedef struct AC97INPUTSTREAM
306	{
307	/** Mixer handle for input stream. */
308	R3PTRTYPE(PAUDMIXSTREAM) pMixStrm;
309	} AC97INPUTSTREAM, *PAC97INPUTSTREAM;
310
311	typedef struct AC97OUTPUTSTREAM
312	{
313	/** Mixer handle for output stream. */
314	R3PTRTYPE(PAUDMIXSTREAM) pMixStrm;
315	} AC97OUTPUTSTREAM, *PAC97OUTPUTSTREAM;
316
317	/**
318	* Struct for maintaining a host backend driver.
319	*/
320	typedef struct AC97STATE *PAC97STATE;
321	typedef struct AC97DRIVER
322	{
323	/** Node for storing this driver in our device driver list of AC97STATE. */
324	RTLISTNODER3 Node;
325	/** Pointer to AC97 controller (state). */
326	R3PTRTYPE(PAC97STATE) pAC97State;
327	/** Driver flags. */
328	PDMAUDIODRVFLAGS Flags;
329	uint32_t PaddingFlags;
330	/** LUN # to which this driver has been assigned. */
331	uint8_t uLUN;
332	/** Whether this driver is in an attached state or not. */
333	bool fAttached;
334	uint8_t Padding[4];
335	/** Pointer to attached driver base interface. */
336	R3PTRTYPE(PPDMIBASE) pDrvBase;
337	/** Audio connector interface to the underlying host backend. */
338	R3PTRTYPE(PPDMIAUDIOCONNECTOR) pConnector;
339	/** Stream for line input. */
340	AC97INPUTSTREAM LineIn;
341	/** Stream for mic input. */
342	AC97INPUTSTREAM MicIn;
343	/** Stream for output. */
344	AC97OUTPUTSTREAM Out;
345	} AC97DRIVER, *PAC97DRIVER;
346
347	typedef struct AC97STATE
348	{
349	/** The PCI device state. */
350	PCIDevice PciDev;
351	/** R3 Pointer to the device instance. */
352	PPDMDEVINSR3 pDevInsR3;
353	/** Global Control (Bus Master Control Register). */
354	uint32_t glob_cnt;
355	/** Global Status (Bus Master Control Register). */
356	uint32_t glob_sta;
357	/** Codec Access Semaphore Register (Bus Master Control Register). */
358	uint32_t cas;
359	uint32_t last_samp;
360	uint8_t mixer_data[256];
361	/** Stream state for line-in. */
362	AC97STREAM StreamLineIn;
363	/** Stream state for microphone-in. */
364	AC97STREAM StreamMicIn;
365	/** Stream state for output. */
366	AC97STREAM StreamOut;
367	/** Number of active (running) SDn streams. */
368	uint8_t cStreamsActive;
369	#ifndef VBOX_WITH_AUDIO_CALLBACKS
370	/** The timer for pumping data thru the attached LUN drivers. */
371	PTMTIMERR3 pTimer;
372	# if HC_ARCH_BITS == 32
373	uint32_t Padding0;
374	# endif
375	/** Flag indicating whether the timer is active or not. */
376	bool fTimerActive;
377	uint8_t u8Padding1[7];
378	/** The timer interval for pumping data thru the LUN drivers in timer ticks. */
379	uint64_t cTimerTicks;
380	/** Timestamp of the last timer callback (ac97Timer).
381	* Used to calculate the time actually elapsed between two timer callbacks. */
382	uint64_t uTimerTS;
383	#endif
384	#ifdef VBOX_WITH_STATISTICS
385	uint8_t Padding1;
386	STAMPROFILE StatTimer;
387	STAMCOUNTER StatBytesRead;
388	STAMCOUNTER StatBytesWritten;
389	#endif
390	/** List of associated LUN drivers (AC97DRIVER). */
391	RTLISTANCHOR lstDrv;
392	/** The device's software mixer. */
393	R3PTRTYPE(PAUDIOMIXER) pMixer;
394	/** Audio sink for PCM output. */
395	R3PTRTYPE(PAUDMIXSINK) pSinkOutput;
396	/** Audio sink for line input. */
397	R3PTRTYPE(PAUDMIXSINK) pSinkLineIn;
398	/** Audio sink for microphone input. */
399	R3PTRTYPE(PAUDMIXSINK) pSinkMicIn;
400	uint8_t silence[128];
401	int bup_flag;
402	/** The base interface for LUN\#0. */
403	PDMIBASE IBase;
404	/** Base port of the I/O space region. */
405	RTIOPORT IOPortBase[2];
406	/** Codec model. */
407	uint32_t uCodecModel;
408	} AC97STATE, *PAC97STATE;
409
410	#ifdef VBOX_WITH_STATISTICS
411	AssertCompileMemberAlignment(AC97STATE, StatTimer, 8);
412	AssertCompileMemberAlignment(AC97STATE, StatBytesRead, 8);
413	AssertCompileMemberAlignment(AC97STATE, StatBytesWritten, 8);
414	#endif
415
416	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
417
418	static void ichac97DestroyIn(PAC97STATE pThis, PDMAUDIORECSOURCE enmRecSource);
419	static void ichac97DestroyOut(PAC97STATE pThis);
420	DECLINLINE(PAC97STREAM) ichac97GetStreamFromID(PAC97STATE pThis, uint32_t uID);
421	static int ichac97StreamInit(PAC97STATE pThis, PAC97STREAM pStream, uint8_t u8Strm);
422	static DECLCALLBACK(void) ichac97Reset(PPDMDEVINS pDevIns);
423	#ifndef VBOX_WITH_AUDIO_CALLBACKS
424	static void ichac97TimerMaybeStart(PAC97STATE pThis);
425	static void ichac97TimerMaybeStop(PAC97STATE pThis);
426	static DECLCALLBACK(void) ichac97Timer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser);
427	#endif
428	static int ichac97TransferAudio(PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToProcess, uint32_t *pcbProcessed);
429
430	static void ichac97WarmReset(PAC97STATE pThis)
431	{
432	NOREF(pThis);
433	}
434
435	static void ichac97ColdReset(PAC97STATE pThis)
436	{
437	NOREF(pThis);
438	}
439
440	DECLINLINE(PAUDMIXSINK) ichac97IndexToSink(PAC97STATE pThis, uint8_t uIndex)
441	{
442	AssertPtrReturn(pThis, NULL);
443
444	switch (uIndex)
445	{
446	case PI_INDEX: return pThis->pSinkLineIn; break;
447	case PO_INDEX: return pThis->pSinkOutput; break;
448	case MC_INDEX: return pThis->pSinkMicIn; break;
449	default: break;
450	}
451
452	AssertMsgFailed(("Wrong index %RU8\n", uIndex));
453	return NULL;
454	}
455
456	/** Fetches the buffer descriptor at _CIV. */
457	static void ichac97StreamFetchBDLE(PAC97STATE pThis, PAC97STREAM pStream)
458	{
459	PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(pThis);
460	PAC97BMREGS pRegs = &pStream->Regs;
461
462	uint32_t u32[2];
463
464	PDMDevHlpPhysRead(pDevIns, pRegs->bdbar + pRegs->civ * 8, &u32[0], sizeof(u32));
465	pRegs->bd_valid = 1;
466	#if !defined(RT_ARCH_X86) && !defined(RT_ARCH_AMD64)
467	# error Please adapt the code (audio buffers are little endian)!
468	#else
469	pRegs->bd.addr = RT_H2LE_U32(u32[0] & ~3);
470	pRegs->bd.ctl_len = RT_H2LE_U32(u32[1]);
471	#endif
472	pRegs->picb = pRegs->bd.ctl_len & BD_MAX_LEN_MASK;
473	LogFlowFunc(("bd %2d addr=%#x ctl=%#06x len=%#x(%d bytes)\n",
474	pRegs->civ, pRegs->bd.addr, pRegs->bd.ctl_len >> 16,
475	pRegs->bd.ctl_len & BD_MAX_LEN_MASK,
476	(pRegs->bd.ctl_len & BD_MAX_LEN_MASK) << 1)); /** @todo r=andy Assumes 16bit samples. */
477	}
478
479	/**
480	* Update the BM status register
481	*/
482	static void ichac97StreamUpdateStatus(PAC97STATE pThis, PAC97STREAM pStream, uint32_t new_sr)
483	{
484	PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(pThis);
485	PAC97BMREGS pRegs = &pStream->Regs;
486
487	bool fSignal = false;
488	int iIRQL;
489
490	uint32_t new_mask = new_sr & SR_INT_MASK;
491	uint32_t old_mask = pRegs->sr & SR_INT_MASK;
492
493	static uint32_t const masks[] = { GS_PIINT, GS_POINT, GS_MINT };
494
495	if (new_mask ^ old_mask)
496	{
497	/** @todo Is IRQ deasserted when only one of status bits is cleared? */
498	if (!new_mask)
499	{
500	fSignal = true;
501	iIRQL = 0;
502	}
503	else if ((new_mask & SR_LVBCI) && (pRegs->cr & CR_LVBIE))
504	{
505	fSignal = true;
506	iIRQL = 1;
507	}
508	else if ((new_mask & SR_BCIS) && (pRegs->cr & CR_IOCE))
509	{
510	fSignal = true;
511	iIRQL = 1;
512	}
513	}
514
515	pRegs->sr = new_sr;
516
517	LogFlowFunc(("IOC%d, LVB%d, sr=%#x, fSignal=%RTbool, IRQL=%d\n",
518	pRegs->sr & SR_BCIS, pRegs->sr & SR_LVBCI, pRegs->sr, fSignal, iIRQL));
519
520	if (fSignal)
521	{
522	if (iIRQL)
523	pThis->glob_sta \|= masks[pStream->u8Strm];
524	else
525	pThis->glob_sta &= ~masks[pStream->u8Strm];
526
527	LogFlowFunc(("Setting IRQ level=%d\n", iIRQL));
528	PDMDevHlpPCISetIrq(pDevIns, 0, iIRQL);
529	}
530	}
531
532	static bool ichac97StreamIsActive(PAC97STATE pThis, PAC97STREAM pStream)
533	{
534	AssertPtrReturn(pThis, false);
535	AssertPtrReturn(pStream, false);
536
537	PAUDMIXSINK pSink = ichac97IndexToSink(pThis, pStream->u8Strm);
538	bool fActive = RT_BOOL(AudioMixerSinkGetStatus(pSink) & AUDMIXSINK_STS_RUNNING);
539
540	LogFlowFunc(("[SD%RU8] fActive=%RTbool\n", pStream->u8Strm, fActive));
541	return fActive;
542	}
543
544	static int ichac97StreamSetActive(PAC97STATE pThis, PAC97STREAM pStream, bool fActive)
545	{
546	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
547	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
548
549	if (!fActive)
550	{
551	if (pThis->cStreamsActive) /* Disable can be called mupltiple times. */
552	pThis->cStreamsActive--;
553
554	#ifndef VBOX_WITH_AUDIO_CALLBACKS
555	ichac97TimerMaybeStop(pThis);
556	#endif
557	}
558	else
559	{
560	pThis->cStreamsActive++;
561	#ifndef VBOX_WITH_AUDIO_CALLBACKS
562	ichac97TimerMaybeStart(pThis);
563	#endif
564	}
565
566	int rc = AudioMixerSinkCtl(ichac97IndexToSink(pThis, pStream->u8Strm),
567	fActive ? AUDMIXSINKCMD_ENABLE : AUDMIXSINKCMD_DISABLE);
568
569	LogFlowFunc(("[SD%RU8] fActive=%RTbool, cStreamsActive=%RU8, rc=%Rrc\n",
570	pStream->u8Strm, fActive, pThis->cStreamsActive, rc));
571
572	return rc;
573	}
574
575	static void ichac97StreamResetBMRegs(PAC97STATE pThis, PAC97STREAM pStream)
576	{
577	AssertPtrReturnVoid(pThis);
578	AssertPtrReturnVoid(pStream);
579
580	LogFlowFunc(("[SD%RU8]\n", pStream->u8Strm));
581
582	PAC97BMREGS pRegs = &pStream->Regs;
583
584	pRegs->bdbar = 0;
585	pRegs->civ = 0;
586	pRegs->lvi = 0;
587
588	ichac97StreamUpdateStatus(pThis, pStream, SR_DCH); /** @todo Do we need to do that? */
589
590	pRegs->picb = 0;
591	pRegs->piv = 0;
592	pRegs->cr = pRegs->cr & CR_DONT_CLEAR_MASK;
593	pRegs->bd_valid = 0;
594
595	ichac97StreamSetActive(pThis, pStream, false /* fActive */);
596
597	RT_ZERO(pThis->silence);
598	}
599
600	static void ichac97StreamDestroy(PAC97STREAM pStream)
601	{
602	LogFlowFunc(("[SD%RU8]\n", pStream->u8Strm));
603
604	if (pStream->State.au8FIFOW)
605	{
606	Assert(pStream->State.cbFIFOW);
607	RTMemFree(pStream->State.au8FIFOW);
608	pStream->State.au8FIFOW = NULL;
609	}
610
611	pStream->State.cbFIFOW = 0;
612	pStream->State.offFIFOW = 0;
613	}
614
615	static void ichac97StreamsDestroy(PAC97STATE pThis)
616	{
617	LogFlowFuncEnter();
618
619	ichac97DestroyIn(pThis, PDMAUDIORECSOURCE_LINE);
620	ichac97DestroyIn(pThis, PDMAUDIORECSOURCE_MIC);
621	ichac97DestroyOut(pThis);
622
623	ichac97StreamDestroy(&pThis->StreamLineIn);
624	ichac97StreamDestroy(&pThis->StreamMicIn);
625	ichac97StreamDestroy(&pThis->StreamOut);
626	}
627
628	static int ichac97StreamsInit(PAC97STATE pThis)
629	{
630	LogFlowFuncEnter();
631
632	ichac97StreamInit(pThis, &pThis->StreamLineIn, PI_INDEX);
633	ichac97StreamInit(pThis, &pThis->StreamMicIn, MC_INDEX);
634	ichac97StreamInit(pThis, &pThis->StreamOut, PO_INDEX);
635
636	return VINF_SUCCESS;
637	}
638
639	static void ichac97MixerSet(PAC97STATE pThis, uint32_t u8Idx, uint16_t v)
640	{
641	if (u8Idx + 2 > sizeof(pThis->mixer_data))
642	{
643	AssertMsgFailed(("Index %RU8 out of bounds(%zu)\n", u8Idx, sizeof(pThis->mixer_data)));
644	return;
645	}
646
647	pThis->mixer_data[u8Idx + 0] = RT_LO_U8(v);
648	pThis->mixer_data[u8Idx + 1] = RT_HI_U8(v);
649	}
650
651	static uint16_t ichac97MixerGet(PAC97STATE pThis, uint32_t u8Idx)
652	{
653	uint16_t uVal;
654
655	if (u8Idx + 2 > sizeof(pThis->mixer_data))
656	{
657	AssertMsgFailed(("Index %RU8 out of bounds (%zu)\n", u8Idx, sizeof(pThis->mixer_data)));
658	uVal = UINT16_MAX;
659	}
660	else
661	uVal = RT_MAKE_U16(pThis->mixer_data[u8Idx + 0], pThis->mixer_data[u8Idx + 1]);
662
663	return uVal;
664	}
665
666	static void ichac97DestroyIn(PAC97STATE pThis, PDMAUDIORECSOURCE enmRecSource)
667	{
668	AssertPtrReturnVoid(pThis);
669
670	LogFlowFuncEnter();
671
672	PAUDMIXSINK pSink;
673	switch (enmRecSource)
674	{
675	case PDMAUDIORECSOURCE_MIC:
676	pSink = pThis->pSinkMicIn;
677	break;
678	case PDMAUDIORECSOURCE_LINE:
679	pSink = pThis->pSinkLineIn;
680	break;
681	default:
682	AssertMsgFailed(("Audio source %ld not supported\n", enmRecSource));
683	return;
684	}
685
686	PAC97DRIVER pDrv;
687	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
688	{
689	PAC97INPUTSTREAM pStream;
690	if (enmRecSource == PDMAUDIORECSOURCE_MIC) /** @todo Refine this once we have more streams. */
691	pStream = &pDrv->MicIn;
692	else
693	pStream = &pDrv->LineIn;
694
695	if (pStream->pMixStrm)
696	{
697	AudioMixerSinkRemoveStream(pSink, pStream->pMixStrm);
698	AudioMixerStreamDestroy(pStream->pMixStrm);
699	}
700	pStream->pMixStrm = NULL;
701	}
702	}
703
704	static void ichac97DestroyOut(PAC97STATE pThis)
705	{
706	AssertPtrReturnVoid(pThis);
707
708	LogFlowFuncEnter();
709
710	PAC97DRIVER pDrv;
711	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
712	{
713	if (pDrv->Out.pMixStrm)
714	{
715	AudioMixerSinkRemoveStream(pThis->pSinkOutput, pDrv->Out.pMixStrm);
716	AudioMixerStreamDestroy(pDrv->Out.pMixStrm);
717
718	pDrv->Out.pMixStrm = NULL;
719	}
720	}
721	}
722
723	static int ichac97CreateIn(PAC97STATE pThis,
724	const char *pszName, PDMAUDIORECSOURCE enmRecSource, PPDMAUDIOSTREAMCFG pCfg)
725	{
726	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
727	AssertPtrReturn(pszName, VERR_INVALID_POINTER);
728	AssertPtrReturn(pCfg, VERR_INVALID_POINTER);
729
730	PAUDMIXSINK pSink;
731	switch (enmRecSource)
732	{
733	case PDMAUDIORECSOURCE_MIC:
734	pSink = pThis->pSinkMicIn;
735	break;
736	case PDMAUDIORECSOURCE_LINE:
737	pSink = pThis->pSinkLineIn;
738	break;
739	default:
740	AssertMsgFailed(("Audio source %ld not supported\n", enmRecSource));
741	return VERR_NOT_SUPPORTED;
742	}
743
744	/* Update the sink's format. */
745	PDMPCMPROPS PCMProps;
746	int rc = DrvAudioHlpStreamCfgToProps(pCfg, &PCMProps);
747	if (RT_SUCCESS(rc))
748	rc = AudioMixerSinkSetFormat(pSink, &PCMProps);
749
750	if (RT_FAILURE(rc))
751	return rc;
752
753	PAC97DRIVER pDrv;
754	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
755	{
756	if (!RTStrPrintf(pCfg->szName, sizeof(pCfg->szName), "[LUN#%RU8] %s", pDrv->uLUN, pszName))
757	{
758	rc = VERR_BUFFER_OVERFLOW;
759	break;
760	}
761
762	PAC97INPUTSTREAM pStream;
763	if (enmRecSource == PDMAUDIORECSOURCE_MIC) /** @todo Refine this once we have more streams. */
764	pStream = &pDrv->MicIn;
765	else
766	pStream = &pDrv->LineIn;
767
768	AudioMixerSinkRemoveStream(pSink, pStream->pMixStrm);
769
770	AudioMixerStreamDestroy(pStream->pMixStrm);
771	pStream->pMixStrm = NULL;
772
773	int rc2 = AudioMixerSinkCreateStream(pSink, pDrv->pConnector, pCfg, 0 /* fFlags */ , &pStream->pMixStrm);
774	if (RT_SUCCESS(rc2))
775	{
776	rc2 = AudioMixerSinkAddStream(pSink, pStream->pMixStrm);
777	LogFlowFunc(("LUN#%RU8: Created input \"%s\", rc=%Rrc\n", pDrv->uLUN, pCfg->szName, rc2));
778	}
779
780	if (RT_SUCCESS(rc))
781	rc = rc2;
782	}
783
784	LogFlowFuncLeaveRC(rc);
785	return rc;
786	}
787
788	static int ichac97CreateOut(PAC97STATE pThis, const char *pszName, PPDMAUDIOSTREAMCFG pCfg)
789	{
790	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
791	AssertPtrReturn(pszName, VERR_INVALID_POINTER);
792	AssertPtrReturn(pCfg, VERR_INVALID_POINTER);
793
794	/* Update the sink's format. */
795	PDMPCMPROPS PCMProps;
796	int rc = DrvAudioHlpStreamCfgToProps(pCfg, &PCMProps);
797	if (RT_SUCCESS(rc))
798	rc = AudioMixerSinkSetFormat(pThis->pSinkOutput, &PCMProps);
799
800	if (RT_FAILURE(rc))
801	return rc;
802
803	PAC97DRIVER pDrv;
804	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
805	{
806	if (!RTStrPrintf(pCfg->szName, sizeof(pCfg->szName), "[LUN#%RU8] %s (%RU32Hz, %RU8 %s)",
807	pDrv->uLUN, pszName, pCfg->uHz, pCfg->cChannels, pCfg->cChannels > 1 ? "Channels" : "Channel"))
808	{
809	rc = VERR_BUFFER_OVERFLOW;
810	break;
811	}
812
813	AudioMixerSinkRemoveStream(pThis->pSinkOutput, pDrv->Out.pMixStrm);
814
815	AudioMixerStreamDestroy(pDrv->Out.pMixStrm);
816	pDrv->Out.pMixStrm = NULL;
817
818	int rc2 = AudioMixerSinkCreateStream(pThis->pSinkOutput, pDrv->pConnector, pCfg, 0 /* fFlags */, &pDrv->Out.pMixStrm);
819	if (RT_SUCCESS(rc2))
820	{
821	rc2 = AudioMixerSinkAddStream(pThis->pSinkOutput, pDrv->Out.pMixStrm);
822	LogFlowFunc(("LUN#%RU8: Created output \"%s\", rc=%Rrc\n", pDrv->uLUN, pCfg->szName, rc2));
823	}
824
825	if (RT_SUCCESS(rc))
826	rc = rc2;
827	}
828
829	LogFlowFuncLeaveRC(rc);
830	return rc;
831	}
832
833	static int ichac97StreamInitEx(PAC97STATE pThis, PAC97STREAM pStream, uint8_t u8Strm, PPDMAUDIOSTREAMCFG pCfg)
834	{
835	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
836	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
837	AssertReturn(u8Strm <= LAST_INDEX, VERR_INVALID_PARAMETER);
838	AssertPtrReturn(pCfg, VERR_INVALID_POINTER);
839
840	pStream->u8Strm = u8Strm;
841
842	LogFlowFunc(("u8Strm=%RU8, %RU32Hz, %RU8 %s\n",
843	pStream->u8Strm, pCfg->uHz, pCfg->cChannels, pCfg->cChannels > 1 ? "Channels" : "Channel"));
844
845	int rc;
846	switch (pStream->u8Strm)
847	{
848	case PI_INDEX:
849	rc = ichac97CreateIn(pThis, "ac97.pi", PDMAUDIORECSOURCE_LINE, pCfg);
850	break;
851
852	case MC_INDEX:
853	rc = ichac97CreateIn(pThis, "ac97.mc", PDMAUDIORECSOURCE_MIC, pCfg);
854	break;
855
856	case PO_INDEX:
857	rc = ichac97CreateOut(pThis, "ac97.po", pCfg);
858	break;
859
860	default:
861	rc = VERR_NOT_SUPPORTED;
862	break;
863	}
864
865	if (RT_FAILURE(rc))
866	LogRel2(("AC97: Error opening stream #%RU8, rc=%Rrc\n", pStream->u8Strm, rc));
867
868	LogFlowFuncLeaveRC(rc);
869	return rc;
870	}
871
872	static int ichac97StreamInit(PAC97STATE pThis, PAC97STREAM pStream, uint8_t u8Strm)
873	{
874	int rc = VINF_SUCCESS;
875
876	PDMAUDIOSTREAMCFG streamCfg;
877	RT_ZERO(streamCfg);
878
879	switch (u8Strm)
880	{
881	case PI_INDEX:
882	streamCfg.uHz = ichac97MixerGet(pThis, AC97_PCM_LR_ADC_Rate);
883	streamCfg.enmDir = PDMAUDIODIR_IN;
884	streamCfg.DestSource.Source = PDMAUDIORECSOURCE_LINE;
885	break;
886
887	case MC_INDEX:
888	streamCfg.uHz = ichac97MixerGet(pThis, AC97_MIC_ADC_Rate);
889	streamCfg.enmDir = PDMAUDIODIR_IN;
890	streamCfg.DestSource.Source = PDMAUDIORECSOURCE_MIC;
891	break;
892
893	case PO_INDEX:
894	streamCfg.uHz = ichac97MixerGet(pThis, AC97_PCM_Front_DAC_Rate);
895	streamCfg.enmDir = PDMAUDIODIR_OUT;
896	streamCfg.DestSource.Dest = PDMAUDIOPLAYBACKDEST_FRONT;
897	break;
898
899	default:
900	rc = VERR_NOT_SUPPORTED;
901	break;
902	}
903
904	if (RT_SUCCESS(rc))
905	{
906	pStream->State.cbFIFOW = _4K; /** @todo Make FIFOW size configurable. */
907	pStream->State.offFIFOW = 0;
908	pStream->State.au8FIFOW = (uint8_t *)RTMemAllocZ(pStream->State.cbFIFOW);
909	if (!pStream->State.au8FIFOW)
910	rc = VERR_NO_MEMORY;
911	}
912
913	if (RT_SUCCESS(rc))
914	{
915	if (streamCfg.uHz)
916	{
917	streamCfg.cChannels = 2; /** @todo Handle mono channels? */
918	streamCfg.enmFormat = PDMAUDIOFMT_S16;
919	streamCfg.enmEndianness = PDMAUDIOHOSTENDIANNESS;
920
921	rc = ichac97StreamInitEx(pThis, pStream, u8Strm, &streamCfg);
922	}
923	else
924	{
925	/* If no frequency is given, disable the stream. */
926	rc = ichac97StreamSetActive(pThis, pStream, false /* fActive */);
927	}
928	}
929
930	LogFlowFunc(("[SD%RU8] rc=%Rrc\n", u8Strm, rc));
931	return rc;
932	}
933
934	static int ichac97StreamReInit(PAC97STATE pThis, PAC97STREAM pStrm)
935	{
936	return ichac97StreamInit(pThis, pStrm, pStrm->u8Strm);
937	}
938
939	static void ichac97StreamReset(PAC97STATE pThis, PAC97STREAM pStrm)
940	{
941	AssertPtrReturnVoid(pThis);
942	AssertPtrReturnVoid(pStrm);
943
944	LogFlowFunc(("[SD%RU8]\n", pStrm->u8Strm));
945
946	if (pStrm->State.au8FIFOW)
947	{
948	Assert(pStrm->State.cbFIFOW);
949	RT_BZERO(pStrm->State.au8FIFOW, pStrm->State.cbFIFOW);
950	}
951
952	pStrm->State.offFIFOW = 0;
953	}
954
955	static int ichac97MixerSetVolume(PAC97STATE pThis, int index, PDMAUDIOMIXERCTL mt, uint32_t val)
956	{
957	int mute = (val >> MUTE_SHIFT) & 1;
958	uint8_t rvol = val & VOL_MASK;
959	uint8_t lvol = (val >> 8) & VOL_MASK;
960
961	/* For the master volume, 0 corresponds to 0dB gain. But for the other
962	* volume controls, 0 corresponds to +12dB and 8 to 0dB. */
963	if (mt != PDMAUDIOMIXERCTL_VOLUME)
964	{
965	/* NB: Currently there is no gain support, only attenuation. */
966	lvol = lvol < 8 ? 0 : lvol - 8;
967	rvol = rvol < 8 ? 0 : rvol - 8;
968	}
969
970	/* AC'97 has 1.5dB steps; we use 0.375dB steps. */
971	rvol = 255 - rvol * 4;
972	lvol = 255 - lvol * 4;
973
974	LogFunc(("mt=%ld, val=%RX32, mute=%RTbool\n", mt, val, RT_BOOL(mute)));
975
976	int rc;
977
978	if (pThis->pMixer) /* Device can be in reset state, so no mixer available. */
979	{
980	PDMAUDIOVOLUME vol = { RT_BOOL(mute), lvol, rvol };
981	switch (mt)
982	{
983	case PDMAUDIOMIXERCTL_VOLUME:
984	rc = AudioMixerSetMasterVolume(pThis->pMixer, &vol);
985	break;
986
987	case PDMAUDIOMIXERCTL_FRONT:
988	rc = AudioMixerSinkSetVolume(pThis->pSinkOutput, &vol);
989	break;
990
991	case PDMAUDIOMIXERCTL_MIC_IN:
992	rc = AudioMixerSinkSetVolume(pThis->pSinkMicIn, &vol);
993	break;
994
995	case PDMAUDIOMIXERCTL_LINE_IN:
996	rc = AudioMixerSinkSetVolume(pThis->pSinkLineIn, &vol);
997	break;
998
999	default:
1000	rc = VERR_NOT_SUPPORTED;
1001	break;
1002	}
1003	}
1004	else
1005	rc = VINF_SUCCESS;
1006
1007	rvol = VOL_MASK - ((VOL_MASK * rvol) / 255);
1008	lvol = VOL_MASK - ((VOL_MASK * lvol) / 255);
1009
1010	/*
1011	* From AC'97 SoundMax Codec AD1981A: "Because AC '97 defines 6-bit volume registers, to
1012	* maintain compatibility whenever the D5 or D13 bits are set to `1,' their respective
1013	* lower five volume bits are automatically set to `1' by the Codec logic. On readback,
1014	* all lower 5 bits will read ones whenever these bits are set to `1.'"
1015	*
1016	* Linux ALSA depends on this behavior.
1017	*/
1018	if (val & RT_BIT(5))
1019	val \|= RT_BIT(4) \| RT_BIT(3) \| RT_BIT(2) \| RT_BIT(1) \| RT_BIT(0);
1020	if (val & RT_BIT(13))
1021	val \|= RT_BIT(12) \| RT_BIT(11) \| RT_BIT(10) \| RT_BIT(9) \| RT_BIT(8);
1022
1023	ichac97MixerSet(pThis, index, val);
1024
1025	if (RT_FAILURE(rc))
1026	LogFlowFunc(("Failed with %Rrc\n", rc));
1027
1028	return rc;
1029	}
1030
1031	static PDMAUDIORECSOURCE ichac97IndextoRecSource(uint8_t i)
1032	{
1033	switch (i)
1034	{
1035	case REC_MIC: return PDMAUDIORECSOURCE_MIC;
1036	case REC_CD: return PDMAUDIORECSOURCE_CD;
1037	case REC_VIDEO: return PDMAUDIORECSOURCE_VIDEO;
1038	case REC_AUX: return PDMAUDIORECSOURCE_AUX;
1039	case REC_LINE_IN: return PDMAUDIORECSOURCE_LINE;
1040	case REC_PHONE: return PDMAUDIORECSOURCE_PHONE;
1041	default:
1042	break;
1043	}
1044
1045	LogFlowFunc(("Unknown record source %d, using MIC\n", i));
1046	return PDMAUDIORECSOURCE_MIC;
1047	}
1048
1049	static uint8_t ichac97RecSourceToIndex(PDMAUDIORECSOURCE rs)
1050	{
1051	switch (rs)
1052	{
1053	case PDMAUDIORECSOURCE_MIC: return REC_MIC;
1054	case PDMAUDIORECSOURCE_CD: return REC_CD;
1055	case PDMAUDIORECSOURCE_VIDEO: return REC_VIDEO;
1056	case PDMAUDIORECSOURCE_AUX: return REC_AUX;
1057	case PDMAUDIORECSOURCE_LINE: return REC_LINE_IN;
1058	case PDMAUDIORECSOURCE_PHONE: return REC_PHONE;
1059	default:
1060	break;
1061	}
1062
1063	LogFlowFunc(("Unknown audio recording source %d using MIC\n", rs));
1064	return REC_MIC;
1065	}
1066
1067	static void ichac97RecordSelect(PAC97STATE pThis, uint32_t val)
1068	{
1069	uint8_t rs = val & REC_MASK;
1070	uint8_t ls = (val >> 8) & REC_MASK;
1071	PDMAUDIORECSOURCE ars = ichac97IndextoRecSource(rs);
1072	PDMAUDIORECSOURCE als = ichac97IndextoRecSource(ls);
1073	rs = ichac97RecSourceToIndex(ars);
1074	ls = ichac97RecSourceToIndex(als);
1075	ichac97MixerSet(pThis, AC97_Record_Select, rs \| (ls << 8));
1076	}
1077
1078	static int ichac97MixerReset(PAC97STATE pThis)
1079	{
1080	AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
1081
1082	LogFlowFuncEnter();
1083
1084	RT_ZERO(pThis->mixer_data);
1085
1086	/* Note: Make sure to reset all registers first before bailing out on error. */
1087
1088	ichac97MixerSet(pThis, AC97_Reset , 0x0000); /* 6940 */
1089	ichac97MixerSet(pThis, AC97_Master_Volume_Mono_Mute , 0x8000);
1090	ichac97MixerSet(pThis, AC97_PC_BEEP_Volume_Mute , 0x0000);
1091
1092	ichac97MixerSet(pThis, AC97_Phone_Volume_Mute , 0x8008);
1093	ichac97MixerSet(pThis, AC97_Mic_Volume_Mute , 0x8008);
1094	ichac97MixerSet(pThis, AC97_CD_Volume_Mute , 0x8808);
1095	ichac97MixerSet(pThis, AC97_Aux_Volume_Mute , 0x8808);
1096	ichac97MixerSet(pThis, AC97_Record_Gain_Mic_Mute , 0x8000);
1097	ichac97MixerSet(pThis, AC97_General_Purpose , 0x0000);
1098	ichac97MixerSet(pThis, AC97_3D_Control , 0x0000);
1099	ichac97MixerSet(pThis, AC97_Powerdown_Ctrl_Stat , 0x000f);
1100
1101	ichac97MixerSet(pThis, AC97_Extended_Audio_ID , 0x0809);
1102	ichac97MixerSet(pThis, AC97_Extended_Audio_Ctrl_Stat, 0x0009);
1103	ichac97MixerSet(pThis, AC97_PCM_Front_DAC_Rate , 0xbb80);
1104	ichac97MixerSet(pThis, AC97_PCM_Surround_DAC_Rate , 0xbb80);
1105	ichac97MixerSet(pThis, AC97_PCM_LFE_DAC_Rate , 0xbb80);
1106	ichac97MixerSet(pThis, AC97_PCM_LR_ADC_Rate , 0xbb80);
1107	ichac97MixerSet(pThis, AC97_MIC_ADC_Rate , 0xbb80);
1108
1109	if (pThis->uCodecModel == Codec_AD1980)
1110	{
1111	/* Analog Devices 1980 (AD1980) */
1112	ichac97MixerSet(pThis, AC97_Reset , 0x0010); /* Headphones. */
1113	ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x4144);
1114	ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x5370);
1115	ichac97MixerSet(pThis, AC97_Headphone_Volume_Mute , 0x8000);
1116	}
1117	else if (pThis->uCodecModel == Codec_AD1981B)
1118	{
1119	/* Analog Devices 1981B (AD1981B) */
1120	ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x4144);
1121	ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x5374);
1122	}
1123	else
1124	{
1125	/* Sigmatel 9700 (STAC9700) */
1126	ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x8384);
1127	ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x7600); /* 7608 */
1128	}
1129	ichac97RecordSelect(pThis, 0);
1130
1131	ichac97MixerSetVolume(pThis, AC97_Master_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME, 0x8000);
1132	ichac97MixerSetVolume(pThis, AC97_PCM_Out_Volume_Mute, PDMAUDIOMIXERCTL_FRONT, 0x8808);
1133	ichac97MixerSetVolume(pThis, AC97_Line_In_Volume_Mute, PDMAUDIOMIXERCTL_LINE_IN, 0x8808);
1134
1135	return VINF_SUCCESS;
1136	}
1137
1138	/**
1139	* Writes data from the device to the host backends.
1140	*
1141	* @return IPRT status code.
1142	* @param pThis
1143	* @param pStream
1144	* @param cbMax
1145	* @param pcbWritten
1146	*/
1147	static int ichac97WriteAudio(PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToWrite, uint32_t *pcbWritten)
1148	{
1149	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
1150	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
1151	AssertReturn(cbToWrite, VERR_INVALID_PARAMETER);
1152	/* pcbWritten is optional. */
1153
1154	PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(pThis);
1155	PAC97BMREGS pRegs = &pStream->Regs;
1156
1157	uint32_t uAddr = pRegs->bd.addr;
1158
1159	uint32_t cbWrittenTotal = 0;
1160
1161	Log3Func(("PICB=%RU16, cbToWrite=%RU32\n", pRegs->picb, cbToWrite));
1162
1163	uint32_t cbLeft = RT_MIN((uint32_t)(pRegs->picb << 1), cbToWrite); /** @todo r=andy Assumes 16bit sample size. */
1164	if (!cbLeft)
1165	{
1166	if (pcbWritten)
1167	*pcbWritten = 0;
1168	return VINF_EOF;
1169	}
1170
1171	int rc = VINF_SUCCESS;
1172
1173	Assert(pStream->State.offFIFOW <= pStream->State.cbFIFOW);
1174	uint32_t cbFIFOW = pStream->State.cbFIFOW - pStream->State.offFIFOW;
1175	uint8_t *pu8FIFOW = &pStream->State.au8FIFOW[pStream->State.offFIFOW];
1176
1177	uint32_t cbWritten = 0;
1178
1179	while (cbLeft)
1180	{
1181	uint32_t cbToRead = RT_MIN(cbLeft, cbFIFOW);
1182
1183	PDMDevHlpPhysRead(pDevIns, uAddr, pu8FIFOW, cbToRead); /** @todo r=andy Check rc? */
1184
1185	#ifdef AC97_DEBUG_DUMP_PCM_DATA
1186	RTFILE fh;
1187	RTFileOpen(&fh, AC97_DEBUG_DUMP_PCM_DATA_PATH "ac97WriteAudio.pcm",
1188	RTFILE_O_OPEN_CREATE \| RTFILE_O_APPEND \| RTFILE_O_WRITE \| RTFILE_O_DENY_NONE);
1189	RTFileWrite(fh, pu8FIFOW, cbToRead, NULL);
1190	RTFileClose(fh);
1191	#endif
1192	/*
1193	* Write data to the mixer sink.
1194	*/
1195	rc = AudioMixerSinkWrite(pThis->pSinkOutput, AUDMIXOP_COPY, pu8FIFOW, cbToRead, &cbWritten);
1196	if (RT_FAILURE(rc))
1197	break;
1198
1199	/* Advance. */
1200	Assert(cbLeft >= cbWritten);
1201	cbLeft -= cbWritten;
1202	cbWrittenTotal += cbWritten;
1203	uAddr += cbWritten;
1204	Assert(cbWrittenTotal <= cbToWrite);
1205
1206	LogFlowFunc(("%RU32 / %RU32\n", cbWrittenTotal, cbToWrite));
1207	}
1208
1209	/* Set new buffer descriptor address. */
1210	pRegs->bd.addr = uAddr;
1211
1212	if (RT_SUCCESS(rc))
1213	{
1214	if (!cbLeft) /* All data written? */
1215	{
1216	if (cbWritten < 4)
1217	{
1218	AssertMsgFailed(("Unable to save last written sample, cbWritten < 4 (is %RU32)\n", cbWritten));
1219	pThis->last_samp = 0;
1220	}
1221	else
1222	pThis->last_samp = (uint32_t )&pStream->State.au8FIFOW[pStream->State.offFIFOW + cbWritten - 4];
1223	}
1224
1225	if (pcbWritten)
1226	*pcbWritten = cbWrittenTotal;
1227	}
1228
1229	if (RT_FAILURE(rc))
1230	LogFlowFunc(("Failed with %Rrc\n", rc));
1231
1232	return rc;
1233	}
1234
1235	static void ichac97WriteBUP(PAC97STATE pThis, uint32_t cbElapsed)
1236	{
1237	LogFlowFunc(("cbElapsed=%RU32\n", cbElapsed));
1238
1239	if (!(pThis->bup_flag & BUP_SET))
1240	{
1241	if (pThis->bup_flag & BUP_LAST)
1242	{
1243	unsigned int i;
1244	uint32_t p = (uint32_t)pThis->silence;
1245	for (i = 0; i < sizeof(pThis->silence) / 4; i++) /** @todo r=andy Assumes 16-bit samples, stereo. */
1246	*p++ = pThis->last_samp;
1247	}
1248	else
1249	RT_ZERO(pThis->silence);
1250
1251	pThis->bup_flag \|= BUP_SET;
1252	}
1253
1254	while (cbElapsed)
1255	{
1256	uint32_t cbToWrite = RT_MIN(cbElapsed, (uint32_t)sizeof(pThis->silence));
1257	uint32_t cbWrittenToStream;
1258
1259	int rc2 = AudioMixerSinkWrite(pThis->pSinkOutput, AUDMIXOP_COPY,
1260	pThis->silence, cbToWrite, &cbWrittenToStream);
1261	if (RT_SUCCESS(rc2))
1262	{
1263	if (cbWrittenToStream < cbToWrite) /* Lagging behind? */
1264	LogFlowFunc(("Warning: Only written %RU32 / %RU32 bytes, expect lags\n", cbWrittenToStream, cbToWrite));
1265	}
1266
1267	/* Always report all data as being written;
1268	* backends who were not able to catch up have to deal with it themselves. */
1269	Assert(cbElapsed >= cbToWrite);
1270	cbElapsed -= cbToWrite;
1271	}
1272	}
1273
1274	static int ichac97ReadAudio(PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToRead, uint32_t *pcbRead)
1275	{
1276	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
1277	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
1278	AssertReturn(cbToRead, VERR_INVALID_PARAMETER);
1279	/* pcbRead is optional. */
1280
1281	PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(pThis);
1282	PAC97BMREGS pRegs = &pStream->Regs;
1283
1284	/* Select audio sink to process. */
1285	AssertMsg(pStream->u8Strm != PO_INDEX, ("Can't read from output\n"));
1286	PAUDMIXSINK pSink = pStream->u8Strm == MC_INDEX ? pThis->pSinkMicIn : pThis->pSinkLineIn;
1287	AssertPtr(pSink);
1288
1289	uint32_t cbRead = 0;
1290
1291	cbToRead = RT_MIN((uint32_t)(pRegs->picb << 1),
1292	RT_MIN(pStream->State.cbFIFOW, cbToRead)); /** @todo r=andy Assumes 16bit samples. */
1293
1294	if (!cbToRead)
1295	{
1296	if (pcbRead)
1297	*pcbRead = 0;
1298	return VINF_EOF;
1299	}
1300
1301	int rc;
1302
1303	rc = AudioMixerSinkRead(pSink, AUDMIXOP_BLEND, &pStream->State.au8FIFOW[pStream->State.offFIFOW], cbToRead, &cbRead);
1304	if ( RT_SUCCESS(rc)
1305	&& cbRead)
1306	{
1307	PDMDevHlpPCIPhysWrite(pDevIns, pRegs->bd.addr, &pStream->State.au8FIFOW[pStream->State.offFIFOW], cbRead);
1308	pRegs->bd.addr += cbRead;
1309	}
1310
1311	if (RT_SUCCESS(rc))
1312	{
1313	if (!cbRead)
1314	rc = VINF_EOF;
1315
1316	if (pcbRead)
1317	*pcbRead = cbRead;
1318	}
1319
1320	return rc;
1321	}
1322
1323	#ifndef VBOX_WITH_AUDIO_CALLBACKS
1324
1325	static void ichac97TimerMaybeStart(PAC97STATE pThis)
1326	{
1327	if (pThis->cStreamsActive == 0) /* Only start the timer if there are no active streams. */
1328	return;
1329
1330	if (!pThis->pTimer)
1331	return;
1332
1333	if (ASMAtomicReadBool(&pThis->fTimerActive) == true) /* Alredy started? */
1334	return;
1335
1336	LogFlowFunc(("Starting timer\n"));
1337
1338	/* Set timer flag. */
1339	ASMAtomicXchgBool(&pThis->fTimerActive, true);
1340
1341	/* Update current time timestamp. */
1342	pThis->uTimerTS = TMTimerGet(pThis->pTimer);
1343
1344	/* Fire off timer. */
1345	TMTimerSet(pThis->pTimer, TMTimerGet(pThis->pTimer) + pThis->cTimerTicks);
1346	}
1347
1348	static void ichac97TimerMaybeStop(PAC97STATE pThis)
1349	{
1350	if (pThis->cStreamsActive) /* Some streams still active? Bail out. */
1351	return;
1352
1353	if (!pThis->pTimer)
1354	return;
1355
1356	if (ASMAtomicReadBool(&pThis->fTimerActive) == false) /* Already stopped? */
1357	return;
1358
1359	LogFlowFunc(("Stopping timer\n"));
1360
1361	/* Set timer flag. */
1362	ASMAtomicXchgBool(&pThis->fTimerActive, false);
1363	}
1364
1365	static DECLCALLBACK(void) ichac97Timer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
1366	{
1367	PAC97STATE pThis = (PAC97STATE)pvUser;
1368	Assert(pThis == PDMINS_2_DATA(pDevIns, PAC97STATE));
1369	AssertPtr(pThis);
1370
1371	STAM_PROFILE_START(&pThis->StatTimer, a);
1372
1373	uint64_t cTicksNow = TMTimerGet(pTimer);
1374	uint64_t cTicksElapsed = cTicksNow - pThis->uTimerTS;
1375	uint64_t cTicksPerSec = TMTimerGetFreq(pTimer);
1376
1377	LogFlowFuncEnter();
1378
1379	/* Update current time timestamp. */
1380	pThis->uTimerTS = cTicksNow;
1381
1382	/* Flag indicating whether to kick the timer again for a
1383	* new data processing round. */
1384	bool fKickTimer = false;
1385
1386	uint32_t cbToProcess;
1387
1388	int rc = AudioMixerSinkUpdate(pThis->pSinkLineIn);
1389	if (RT_SUCCESS(rc))
1390	{
1391	cbToProcess = AudioMixerSinkGetReadable(pThis->pSinkLineIn);
1392	if (cbToProcess)
1393	rc = ichac97TransferAudio(pThis, &pThis->StreamLineIn, cbToProcess, NULL /* pcbProcessed */);
1394
1395	fKickTimer \|= AudioMixerSinkGetStatus(pThis->pSinkLineIn) & AUDMIXSINK_STS_DIRTY;
1396	}
1397
1398	rc = AudioMixerSinkUpdate(pThis->pSinkMicIn);
1399	if (RT_SUCCESS(rc))
1400	{
1401	cbToProcess = AudioMixerSinkGetReadable(pThis->pSinkMicIn);
1402	if (cbToProcess)
1403	rc = ichac97TransferAudio(pThis, &pThis->StreamMicIn, cbToProcess, NULL /* pcbProcessed */);
1404
1405	fKickTimer \|= AudioMixerSinkGetStatus(pThis->pSinkMicIn) & AUDMIXSINK_STS_DIRTY;
1406	}
1407
1408	rc = AudioMixerSinkUpdate(pThis->pSinkOutput);
1409	if (RT_SUCCESS(rc))
1410	{
1411	cbToProcess = AudioMixerSinkGetWritable(pThis->pSinkOutput);
1412	if (cbToProcess)
1413	rc = ichac97TransferAudio(pThis, &pThis->StreamOut, cbToProcess, NULL /* pcbProcessed */);
1414
1415	fKickTimer \|= AudioMixerSinkGetStatus(pThis->pSinkOutput) & AUDMIXSINK_STS_DIRTY;
1416	}
1417
1418	if ( ASMAtomicReadBool(&pThis->fTimerActive)
1419	\|\| fKickTimer)
1420	{
1421	/* Kick the timer again. */
1422	uint64_t cTicks = pThis->cTimerTicks;
1423	/** @todo adjust cTicks down by now much cbOutMin represents. */
1424	TMTimerSet(pThis->pTimer, cTicksNow + cTicks);
1425	}
1426
1427	STAM_PROFILE_STOP(&pThis->StatTimer, a);
1428	}
1429
1430	#endif /* !VBOX_WITH_AUDIO_CALLBACKS */
1431
1432	static int ichac97TransferAudio(PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToProcess, uint32_t *pcbProcessed)
1433	{
1434	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
1435	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
1436	/* pcbProcessed is optional. */
1437
1438	Log3Func(("[SD%RU8] cbToProcess=%RU32\n", pStream->u8Strm, cbToProcess));
1439
1440	PAC97BMREGS pRegs = &pStream->Regs;
1441
1442	if (pRegs->sr & SR_DCH) /* Controller halted? */
1443	{
1444	if (pRegs->cr & CR_RPBM) /* Bus master operation starts. */
1445	{
1446	switch (pStream->u8Strm)
1447	{
1448	case PO_INDEX:
1449	ichac97WriteBUP(pThis, cbToProcess);
1450	break;
1451
1452	default:
1453	break;
1454	}
1455	}
1456
1457	if (pcbProcessed)
1458	*pcbProcessed = 0;
1459	return VINF_SUCCESS;
1460	}
1461
1462	/* BCIS flag still set? Skip iteration. */
1463	if (pRegs->sr & SR_BCIS)
1464	{
1465	Log3Func(("[SD%RU8] BCIS set\n", pStream->u8Strm));
1466	if (pcbProcessed)
1467	*pcbProcessed = 0;
1468	return VINF_SUCCESS;
1469	}
1470
1471	int rc = VINF_SUCCESS;
1472
1473	uint32_t cbLeft = RT_MIN((uint32_t)(pRegs->picb << 1), cbToProcess);
1474	uint32_t cbTotal = 0;
1475
1476	Log3Func(("[SD%RU8] cbLeft=%RU32\n", pStream->u8Strm, cbLeft));
1477
1478	while (cbLeft)
1479	{
1480	if (!pRegs->bd_valid)
1481	{
1482	LogFlowFunc(("Invalid buffer descriptor, fetching next one ...\n"));
1483	ichac97StreamFetchBDLE(pThis, pStream);
1484	}
1485
1486	if (!pRegs->picb) /* Got a new buffer descriptor, that is, the position is 0? */
1487	{
1488	LogFlowFunc(("Fresh buffer descriptor %RU8 is empty, addr=%#x, len=%#x, skipping\n",
1489	pRegs->civ, pRegs->bd.addr, pRegs->bd.ctl_len));
1490	if (pRegs->civ == pRegs->lvi)
1491	{
1492	pRegs->sr \|= SR_DCH; /** @todo r=andy Also set CELV? */
1493	pThis->bup_flag = 0;
1494
1495	rc = VINF_EOF;
1496	break;
1497	}
1498
1499	pRegs->sr &= ~SR_CELV;
1500	pRegs->civ = pRegs->piv;
1501	pRegs->piv = (pRegs->piv + 1) % 32; /** @todo r=andy Define for max BDLEs? */
1502
1503	ichac97StreamFetchBDLE(pThis, pStream);
1504	continue;
1505	}
1506
1507	uint32_t cbToTransfer, cbTransferred;
1508	switch (pStream->u8Strm)
1509	{
1510	case PO_INDEX:
1511	{
1512	cbToTransfer = RT_MIN((uint32_t)(pRegs->picb << 1), cbLeft); /** @todo r=andy Assumes 16bit samples. */
1513
1514	rc = ichac97WriteAudio(pThis, pStream, cbToTransfer, &cbTransferred);
1515	if ( RT_SUCCESS(rc)
1516	&& cbTransferred)
1517	{
1518	cbTotal += cbTransferred;
1519	Assert(cbLeft >= cbTransferred);
1520	cbLeft -= cbTransferred;
1521	Assert((cbTransferred & 1) == 0); /* Else the following shift won't work */
1522	pRegs->picb -= (cbTransferred >> 1); /** @todo r=andy Assumes 16bit samples. */
1523	}
1524	break;
1525	}
1526
1527	case PI_INDEX:
1528	case MC_INDEX:
1529	{
1530	cbToTransfer = RT_MIN((uint32_t)(pRegs->picb << 1), cbLeft); /** @todo r=andy Assumes 16bit samples. */
1531
1532	rc = ichac97ReadAudio(pThis, pStream, cbToTransfer, &cbTransferred);
1533	if ( RT_SUCCESS(rc)
1534	&& cbTransferred)
1535	{
1536	cbTotal += cbTransferred;
1537	Assert(cbLeft >= cbTransferred);
1538	cbLeft -= cbTransferred;
1539	Assert((cbTransferred & 1) == 0); /* Else the following shift won't work */
1540	pRegs->picb -= (cbTransferred >> 1); /** @todo r=andy Assumes 16bit samples. */
1541	}
1542	break;
1543	}
1544
1545	default:
1546	AssertMsgFailed(("Stream #%RU8 not supported\n", pStream->u8Strm));
1547	rc = VERR_NOT_SUPPORTED;
1548	break;
1549	}
1550
1551	LogFlowFunc(("[SD%RU8]: %RU32 / %RU32, rc=%Rrc\n", pStream->u8Strm, cbTotal, cbToProcess, rc));
1552
1553	if (!pRegs->picb)
1554	{
1555	uint32_t new_sr = pRegs->sr & ~SR_CELV;
1556
1557	if (pRegs->bd.ctl_len & BD_IOC)
1558	{
1559	new_sr \|= SR_BCIS;
1560	}
1561
1562	if (pRegs->civ == pRegs->lvi)
1563	{
1564	/* Did we run out of data? */
1565	LogFunc(("Underrun CIV (%RU8) == LVI (%RU8)\n", pRegs->civ, pRegs->lvi));
1566
1567	new_sr \|= SR_LVBCI \| SR_DCH \| SR_CELV;
1568	pThis->bup_flag = (pRegs->bd.ctl_len & BD_BUP) ? BUP_LAST : 0;
1569
1570	rc = VINF_EOF;
1571	}
1572	else
1573	{
1574	pRegs->civ = pRegs->piv;
1575	pRegs->piv = (pRegs->piv + 1) % 32; /** @todo r=andy Define for max BDLEs? */
1576	ichac97StreamFetchBDLE(pThis, pStream);
1577	}
1578
1579	ichac97StreamUpdateStatus(pThis, pStream, new_sr);
1580	}
1581
1582	if (rc == VINF_EOF) /* All data processed? */
1583	break;
1584	}
1585
1586	if (RT_SUCCESS(rc))
1587	{
1588	if (pcbProcessed)
1589	*pcbProcessed = cbTotal;
1590	}
1591
1592	LogFlowFuncLeaveRC(rc);
1593	return rc;
1594	}
1595
1596	/**
1597	* @callback_method_impl{FNIOMIOPORTIN}
1598	*/
1599	static DECLCALLBACK(int) ichac97IOPortNABMRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
1600	uint32_t *pu32Val, unsigned cbVal)
1601	{
1602	PAC97STATE pThis = (PAC97STATE)pvUser;
1603
1604	/* Get the index of the NABMBAR port. */
1605	const uint32_t uPortIdx = Port - pThis->IOPortBase[1];
1606
1607	PAC97STREAM pStream = ichac97GetStreamFromID(pThis, AC97_PORT2IDX(uPortIdx));
1608	PAC97BMREGS pRegs = pStream ? &pStream->Regs : NULL;
1609
1610	switch (cbVal)
1611	{
1612	case 1:
1613	{
1614	switch (uPortIdx)
1615	{
1616	case CAS:
1617	/* Codec Access Semaphore Register */
1618	LogFlowFunc(("CAS %d\n", pThis->cas));
1619	*pu32Val = pThis->cas;
1620	pThis->cas = 1;
1621	break;
1622	case PI_CIV:
1623	case PO_CIV:
1624	case MC_CIV:
1625	/* Current Index Value Register */
1626	*pu32Val = pRegs->civ;
1627	LogFlowFunc(("CIV[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
1628	break;
1629	case PI_LVI:
1630	case PO_LVI:
1631	case MC_LVI:
1632	/* Last Valid Index Register */
1633	*pu32Val = pRegs->lvi;
1634	LogFlowFunc(("LVI[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
1635	break;
1636	case PI_PIV:
1637	case PO_PIV:
1638	case MC_PIV:
1639	/* Prefetched Index Value Register */
1640	*pu32Val = pRegs->piv;
1641	LogFlowFunc(("PIV[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
1642	break;
1643	case PI_CR:
1644	case PO_CR:
1645	case MC_CR:
1646	/* Control Register */
1647	*pu32Val = pRegs->cr;
1648	LogFlowFunc(("CR[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
1649	break;
1650	case PI_SR:
1651	case PO_SR:
1652	case MC_SR:
1653	/* Status Register (lower part) */
1654	pu32Val = pRegs->sr & 0xff; /* @todo r=andy Use RT_LO_U8. */
1655	LogFlowFunc(("SRb[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
1656	break;
1657	default:
1658	*pu32Val = UINT32_MAX;
1659	LogFlowFunc(("U nabm readb %#x -> %#x\n", Port, *pu32Val));
1660	break;
1661	}
1662	break;
1663	}
1664
1665	case 2:
1666	{
1667	switch (uPortIdx)
1668	{
1669	case PI_SR:
1670	case PO_SR:
1671	case MC_SR:
1672	/* Status Register */
1673	*pu32Val = pRegs->sr;
1674	LogFlowFunc(("SR[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
1675	break;
1676	case PI_PICB:
1677	case PO_PICB:
1678	case MC_PICB:
1679	/* Position in Current Buffer */
1680	*pu32Val = pRegs->picb;
1681	LogFlowFunc(("PICB[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
1682	break;
1683	default:
1684	*pu32Val = UINT32_MAX;
1685	LogFlowFunc(("U nabm readw %#x -> %#x\n", Port, *pu32Val));
1686	break;
1687	}
1688	break;
1689	}
1690
1691	case 4:
1692	{
1693	switch (uPortIdx)
1694	{
1695	case PI_BDBAR:
1696	case PO_BDBAR:
1697	case MC_BDBAR:
1698	/* Buffer Descriptor Base Address Register */
1699	*pu32Val = pRegs->bdbar;
1700	LogFlowFunc(("BMADDR[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
1701	break;
1702	case PI_CIV:
1703	case PO_CIV:
1704	case MC_CIV:
1705	/* 32-bit access: Current Index Value Register +
1706	* Last Valid Index Register +
1707	* Status Register */
1708	pu32Val = pRegs->civ \| (pRegs->lvi << 8) \| (pRegs->sr << 16); /* @todo r=andy Use RT_MAKE_U32_FROM_U8. */
1709	LogFlowFunc(("CIV LVI SR[%d] -> %#x, %#x, %#x\n",
1710	AC97_PORT2IDX(uPortIdx), pRegs->civ, pRegs->lvi, pRegs->sr));
1711	break;
1712	case PI_PICB:
1713	case PO_PICB:
1714	case MC_PICB:
1715	/* 32-bit access: Position in Current Buffer Register +
1716	* Prefetched Index Value Register +
1717	* Control Register */
1718	pu32Val = pRegs->picb \| (pRegs->piv << 16) \| (pRegs->cr << 24); /* @todo r=andy Use RT_MAKE_U32_FROM_U8. */
1719	LogFlowFunc(("PICB PIV CR[%d] -> %#x %#x %#x %#x\n",
1720	AC97_PORT2IDX(uPortIdx), *pu32Val, pRegs->picb, pRegs->piv, pRegs->cr));
1721	break;
1722	case GLOB_CNT:
1723	/* Global Control */
1724	*pu32Val = pThis->glob_cnt;
1725	LogFlowFunc(("glob_cnt -> %#x\n", *pu32Val));
1726	break;
1727	case GLOB_STA:
1728	/* Global Status */
1729	*pu32Val = pThis->glob_sta \| GS_S0CR;
1730	LogFlowFunc(("glob_sta -> %#x\n", *pu32Val));
1731	break;
1732	default:
1733	*pu32Val = UINT32_MAX;
1734	LogFlowFunc(("U nabm readl %#x -> %#x\n", Port, *pu32Val));
1735	break;
1736	}
1737	break;
1738	}
1739
1740	default:
1741	return VERR_IOM_IOPORT_UNUSED;
1742	}
1743	return VINF_SUCCESS;
1744	}
1745
1746	/**
1747	* @callback_method_impl{FNIOMIOPORTOUT}
1748	*/
1749	static DECLCALLBACK(int) ichac97IOPortNABMWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
1750	uint32_t u32Val, unsigned cbVal)
1751	{
1752	PAC97STATE pThis = (PAC97STATE)pvUser;
1753
1754	/* Get the index of the NABMBAR register. */
1755	const uint32_t uPortIdx = Port - pThis->IOPortBase[1];
1756
1757	PAC97STREAM pStream = ichac97GetStreamFromID(pThis, AC97_PORT2IDX(uPortIdx));
1758	PAC97BMREGS pRegs = pStream ? &pStream->Regs : NULL;
1759
1760	switch (cbVal)
1761	{
1762	case 1:
1763	{
1764	switch (uPortIdx)
1765	{
1766	case PI_LVI:
1767	case PO_LVI:
1768	case MC_LVI:
1769	/* Last Valid Index */
1770	if ((pRegs->cr & CR_RPBM) && (pRegs->sr & SR_DCH))
1771	{
1772	pRegs->sr &= ~(SR_DCH \| SR_CELV);
1773	pRegs->civ = pRegs->piv;
1774	pRegs->piv = (pRegs->piv + 1) % 32;
1775
1776	ichac97StreamFetchBDLE(pThis, pStream);
1777	}
1778	pRegs->lvi = u32Val % 32;
1779	LogFlowFunc(("LVI[%d] <- %#x\n", AC97_PORT2IDX(uPortIdx), u32Val));
1780	break;
1781	case PI_CR:
1782	case PO_CR:
1783	case MC_CR:
1784	{
1785	/* Control Register */
1786	if (u32Val & CR_RR) /* Busmaster reset */
1787	{
1788	ichac97StreamResetBMRegs(pThis, pStream);
1789	}
1790	else
1791	{
1792	pRegs->cr = u32Val & CR_VALID_MASK;
1793	if (!(pRegs->cr & CR_RPBM))
1794	{
1795	ichac97StreamSetActive(pThis, pStream, false /* fActive */);
1796	pRegs->sr \|= SR_DCH;
1797	}
1798	else
1799	{
1800	pRegs->civ = pRegs->piv;
1801	pRegs->piv = (pRegs->piv + 1) % 32;
1802
1803	ichac97StreamFetchBDLE(pThis, pStream);
1804
1805	pRegs->sr &= ~SR_DCH;
1806	ichac97StreamSetActive(pThis, pStream, true /* fActive */);
1807	}
1808	}
1809	LogFlowFunc(("CR[%d] <- %#x (cr %#x)\n", AC97_PORT2IDX(uPortIdx), u32Val, pRegs->cr));
1810	break;
1811	}
1812	case PI_SR:
1813	case PO_SR:
1814	case MC_SR:
1815	/* Status Register */
1816	pRegs->sr \|= u32Val & ~(SR_RO_MASK \| SR_WCLEAR_MASK);
1817	ichac97StreamUpdateStatus(pThis, pStream, pRegs->sr & ~(u32Val & SR_WCLEAR_MASK));
1818	LogFlowFunc(("SR[%d] <- %#x (sr %#x)\n", AC97_PORT2IDX(uPortIdx), u32Val, pRegs->sr));
1819	break;
1820	default:
1821	LogFlowFunc(("U nabm writeb %#x <- %#x\n", Port, u32Val));
1822	break;
1823	}
1824	break;
1825	}
1826
1827	case 2:
1828	{
1829	switch (uPortIdx)
1830	{
1831	case PI_SR:
1832	case PO_SR:
1833	case MC_SR:
1834	/* Status Register */
1835	pRegs->sr \|= u32Val & ~(SR_RO_MASK \| SR_WCLEAR_MASK);
1836	ichac97StreamUpdateStatus(pThis, pStream, pRegs->sr & ~(u32Val & SR_WCLEAR_MASK));
1837	LogFlowFunc(("SR[%d] <- %#x (sr %#x)\n", AC97_PORT2IDX(uPortIdx), u32Val, pRegs->sr));
1838	break;
1839	default:
1840	LogFlowFunc(("U nabm writew %#x <- %#x\n", Port, u32Val));
1841	break;
1842	}
1843	break;
1844	}
1845
1846	case 4:
1847	{
1848	switch (uPortIdx)
1849	{
1850	case PI_BDBAR:
1851	case PO_BDBAR:
1852	case MC_BDBAR:
1853	/* Buffer Descriptor list Base Address Register */
1854	pRegs->bdbar = u32Val & ~3;
1855	LogFlowFunc(("BDBAR[%d] <- %#x (bdbar %#x)\n", AC97_PORT2IDX(uPortIdx), u32Val, pRegs->bdbar));
1856	break;
1857	case GLOB_CNT:
1858	/* Global Control */
1859	if (u32Val & GC_WR)
1860	ichac97WarmReset(pThis);
1861	if (u32Val & GC_CR)
1862	ichac97ColdReset(pThis);
1863	if (!(u32Val & (GC_WR \| GC_CR)))
1864	pThis->glob_cnt = u32Val & GC_VALID_MASK;
1865	LogFlowFunc(("glob_cnt <- %#x (glob_cnt %#x)\n", u32Val, pThis->glob_cnt));
1866	break;
1867	case GLOB_STA:
1868	/* Global Status */
1869	pThis->glob_sta &= ~(u32Val & GS_WCLEAR_MASK);
1870	pThis->glob_sta \|= (u32Val & ~(GS_WCLEAR_MASK \| GS_RO_MASK)) & GS_VALID_MASK;
1871	LogFlowFunc(("glob_sta <- %#x (glob_sta %#x)\n", u32Val, pThis->glob_sta));
1872	break;
1873	default:
1874	LogFlowFunc(("U nabm writel %#x <- %#x\n", Port, u32Val));
1875	break;
1876	}
1877	break;
1878	}
1879
1880	default:
1881	AssertMsgFailed(("Port=%#x cb=%d u32=%#x\n", Port, cbVal, u32Val));
1882	break;
1883	}
1884	return VINF_SUCCESS;
1885	}
1886
1887	/**
1888	* @callback_method_impl{FNIOMIOPORTIN}
1889	*/
1890	static DECLCALLBACK(int) ichac97IOPortNAMRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT Port, uint32_t pu32Val, unsigned cbVal)
1891	{
1892	PAC97STATE pThis = (PAC97STATE)pvUser;
1893
1894	switch (cbVal)
1895	{
1896	case 1:
1897	{
1898	LogFlowFunc(("U nam readb %#x\n", Port));
1899	pThis->cas = 0;
1900	*pu32Val = UINT32_MAX;
1901	break;
1902	}
1903
1904	case 2:
1905	{
1906	uint32_t index = Port - pThis->IOPortBase[0];
1907	*pu32Val = UINT32_MAX;
1908	pThis->cas = 0;
1909	switch (index)
1910	{
1911	default:
1912	*pu32Val = ichac97MixerGet(pThis, index);
1913	LogFlowFunc(("nam readw %#x -> %#x\n", Port, *pu32Val));
1914	break;
1915	}
1916	break;
1917	}
1918
1919	case 4:
1920	{
1921	LogFlowFunc(("U nam readl %#x\n", Port));
1922	pThis->cas = 0;
1923	*pu32Val = UINT32_MAX;
1924	break;
1925	}
1926
1927	default:
1928	return VERR_IOM_IOPORT_UNUSED;
1929	}
1930	return VINF_SUCCESS;
1931	}
1932
1933	/**
1934	* @callback_method_impl{FNIOMIOPORTOUT}
1935	*/
1936	static DECLCALLBACK(int) ichac97IOPortNAMWrite(PPDMDEVINS pDevIns,
1937	void *pvUser, RTIOPORT Port, uint32_t u32Val, unsigned cbVal)
1938	{
1939	PAC97STATE pThis = (PAC97STATE)pvUser;
1940
1941	switch (cbVal)
1942	{
1943	case 1:
1944	{
1945	LogFlowFunc(("U nam writeb %#x <- %#x\n", Port, u32Val));
1946	pThis->cas = 0;
1947	break;
1948	}
1949
1950	case 2:
1951	{
1952	uint32_t index = Port - pThis->IOPortBase[0];
1953	pThis->cas = 0;
1954	switch (index)
1955	{
1956	case AC97_Reset:
1957	ichac97Reset(pThis->CTX_SUFF(pDevIns));
1958	break;
1959	case AC97_Powerdown_Ctrl_Stat:
1960	u32Val &= ~0xf;
1961	u32Val \|= ichac97MixerGet(pThis, index) & 0xf;
1962	ichac97MixerSet(pThis, index, u32Val);
1963	break;
1964	case AC97_Master_Volume_Mute:
1965	if (pThis->uCodecModel == Codec_AD1980)
1966	if (ichac97MixerGet(pThis, AC97_AD_Misc) & AD_MISC_LOSEL)
1967	break; /* Register controls surround (rear), do nothing. */
1968	ichac97MixerSetVolume(pThis, index, PDMAUDIOMIXERCTL_VOLUME, u32Val);
1969	break;
1970	case AC97_Headphone_Volume_Mute:
1971	if (pThis->uCodecModel == Codec_AD1980)
1972	if (ichac97MixerGet(pThis, AC97_AD_Misc) & AD_MISC_HPSEL)
1973	/* Register controls PCM (front) outputs. */
1974	ichac97MixerSetVolume(pThis, index, PDMAUDIOMIXERCTL_VOLUME, u32Val);
1975	break;
1976	case AC97_PCM_Out_Volume_Mute:
1977	ichac97MixerSetVolume(pThis, index, PDMAUDIOMIXERCTL_FRONT, u32Val);
1978	break;
1979	case AC97_Line_In_Volume_Mute:
1980	ichac97MixerSetVolume(pThis, index, PDMAUDIOMIXERCTL_LINE_IN, u32Val);
1981	break;
1982	case AC97_Record_Select:
1983	ichac97RecordSelect(pThis, u32Val);
1984	break;
1985	case AC97_Vendor_ID1:
1986	case AC97_Vendor_ID2:
1987	LogFlowFunc(("Attempt to write vendor ID to %#x\n", u32Val));
1988	break;
1989	case AC97_Extended_Audio_ID:
1990	LogFlowFunc(("Attempt to write extended audio ID to %#x\n", u32Val));
1991	break;
1992	case AC97_Extended_Audio_Ctrl_Stat:
1993	if (!(u32Val & EACS_VRA))
1994	{
1995	ichac97MixerSet(pThis, AC97_PCM_Front_DAC_Rate, 48000);
1996	ichac97StreamReInit(pThis, &pThis->StreamOut);
1997
1998	ichac97MixerSet(pThis, AC97_PCM_LR_ADC_Rate, 48000);
1999	ichac97StreamReInit(pThis, &pThis->StreamLineIn);
2000	}
2001	if (!(u32Val & EACS_VRM))
2002	{
2003	ichac97MixerSet(pThis, AC97_MIC_ADC_Rate, 48000);
2004	ichac97StreamReInit(pThis, &pThis->StreamMicIn);
2005	}
2006	LogFlowFunc(("Setting extended audio control to %#x\n", u32Val));
2007	ichac97MixerSet(pThis, AC97_Extended_Audio_Ctrl_Stat, u32Val);
2008	break;
2009	case AC97_PCM_Front_DAC_Rate:
2010	if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA)
2011	{
2012	ichac97MixerSet(pThis, index, u32Val);
2013	LogFlowFunc(("Set front DAC rate to %RU32\n", u32Val));
2014	ichac97StreamReInit(pThis, &pThis->StreamOut);
2015	}
2016	else
2017	AssertMsgFailed(("Attempt to set front DAC rate to %RU32, but VRA is not set\n", u32Val));
2018	break;
2019	case AC97_MIC_ADC_Rate:
2020	if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRM)
2021	{
2022	ichac97MixerSet(pThis, index, u32Val);
2023	LogFlowFunc(("Set MIC ADC rate to %RU32\n", u32Val));
2024	ichac97StreamReInit(pThis, &pThis->StreamMicIn);
2025	}
2026	else
2027	AssertMsgFailed(("Attempt to set MIC ADC rate to %RU32, but VRM is not set\n", u32Val));
2028	break;
2029	case AC97_PCM_LR_ADC_Rate:
2030	if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA)
2031	{
2032	ichac97MixerSet(pThis, index, u32Val);
2033	LogFlowFunc(("Set front LR ADC rate to %RU32\n", u32Val));
2034	ichac97StreamReInit(pThis, &pThis->StreamLineIn);
2035	}
2036	else
2037	AssertMsgFailed(("Attempt to set LR ADC rate to %RU32, but VRA is not set\n", u32Val));
2038	break;
2039	default:
2040	LogFlowFunc(("U nam writew %#x <- %#x\n", Port, u32Val));
2041	ichac97MixerSet(pThis, index, u32Val);
2042	break;
2043	}
2044	break;
2045	}
2046
2047	case 4:
2048	{
2049	LogFlowFunc(("U nam writel %#x <- %#x\n", Port, u32Val));
2050	pThis->cas = 0;
2051	break;
2052	}
2053
2054	default:
2055	AssertMsgFailed(("Port=%#x cb=%d u32=%#x\n", Port, cbVal, u32Val));
2056	break;
2057	}
2058
2059	return VINF_SUCCESS;
2060	}
2061
2062
2063	/**
2064	* @callback_method_impl{FNPCIIOREGIONMAP}
2065	*/
2066	static DECLCALLBACK(int) ichac97IOPortMap(PPCIDEVICE pPciDev, int iRegion, RTGCPHYS GCPhysAddress, uint32_t cb,
2067	PCIADDRESSSPACE enmType)
2068	{
2069	PPDMDEVINS pDevIns = pPciDev->pDevIns;
2070	PAC97STATE pThis = RT_FROM_MEMBER(pPciDev, AC97STATE, PciDev);
2071	RTIOPORT Port = (RTIOPORT)GCPhysAddress;
2072
2073	Assert(enmType == PCI_ADDRESS_SPACE_IO);
2074	Assert(cb >= 0x20);
2075
2076	if (iRegion < 0 \|\| iRegion > 1) /* We support 2 regions max. at the moment. */
2077	return VERR_INVALID_PARAMETER;
2078
2079	int rc;
2080	if (iRegion == 0)
2081	rc = PDMDevHlpIOPortRegister(pDevIns, Port, 256, pThis,
2082	ichac97IOPortNAMWrite, ichac97IOPortNAMRead,
2083	NULL, NULL, "ICHAC97 NAM");
2084	else
2085	rc = PDMDevHlpIOPortRegister(pDevIns, Port, 64, pThis,
2086	ichac97IOPortNABMWrite, ichac97IOPortNABMRead,
2087	NULL, NULL, "ICHAC97 NABM");
2088	if (RT_FAILURE(rc))
2089	return rc;
2090
2091	pThis->IOPortBase[iRegion] = Port;
2092	return VINF_SUCCESS;
2093	}
2094
2095	DECLINLINE(PAC97STREAM) ichac97GetStreamFromID(PAC97STATE pThis, uint32_t uID)
2096	{
2097	switch (uID)
2098	{
2099	case PI_INDEX: return &pThis->StreamLineIn;
2100	case MC_INDEX: return &pThis->StreamMicIn;
2101	case PO_INDEX: return &pThis->StreamOut;
2102	default: break;
2103	}
2104
2105	return NULL;
2106	}
2107
2108	#ifdef IN_RING3
2109	static int ichac97SaveStream(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, PAC97STREAM pStream)
2110	{
2111	PAC97BMREGS pRegs = &pStream->Regs;
2112
2113	SSMR3PutU32(pSSM, pRegs->bdbar);
2114	SSMR3PutU8( pSSM, pRegs->civ);
2115	SSMR3PutU8( pSSM, pRegs->lvi);
2116	SSMR3PutU16(pSSM, pRegs->sr);
2117	SSMR3PutU16(pSSM, pRegs->picb);
2118	SSMR3PutU8( pSSM, pRegs->piv);
2119	SSMR3PutU8( pSSM, pRegs->cr);
2120	SSMR3PutS32(pSSM, pRegs->bd_valid);
2121	SSMR3PutU32(pSSM, pRegs->bd.addr);
2122	SSMR3PutU32(pSSM, pRegs->bd.ctl_len);
2123
2124	return VINF_SUCCESS;
2125	}
2126
2127	/**
2128	* @callback_method_impl{FNSSMDEVSAVEEXEC}
2129	*/
2130	static DECLCALLBACK(int) ichac97SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
2131	{
2132	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2133
2134	LogFlowFuncEnter();
2135
2136	SSMR3PutU32(pSSM, pThis->glob_cnt);
2137	SSMR3PutU32(pSSM, pThis->glob_sta);
2138	SSMR3PutU32(pSSM, pThis->cas);
2139
2140	/** @todo r=andy For the next saved state version, add unique stream identifiers and a stream count. */
2141	/* Note: The order the streams are saved here is critical, so don't touch. */
2142	int rc2 = ichac97SaveStream(pDevIns, pSSM, &pThis->StreamLineIn);
2143	AssertRC(rc2);
2144	rc2 = ichac97SaveStream(pDevIns, pSSM, &pThis->StreamOut);
2145	AssertRC(rc2);
2146	rc2 = ichac97SaveStream(pDevIns, pSSM, &pThis->StreamMicIn);
2147	AssertRC(rc2);
2148
2149	SSMR3PutMem(pSSM, pThis->mixer_data, sizeof(pThis->mixer_data));
2150
2151	uint8_t active[LAST_INDEX];
2152
2153	active[PI_INDEX] = ichac97StreamIsActive(pThis, &pThis->StreamLineIn) ? 1 : 0;
2154	active[PO_INDEX] = ichac97StreamIsActive(pThis, &pThis->StreamOut) ? 1 : 0;
2155	active[MC_INDEX] = ichac97StreamIsActive(pThis, &pThis->StreamMicIn) ? 1 : 0;
2156
2157	SSMR3PutMem(pSSM, active, sizeof(active));
2158
2159	LogFlowFuncLeaveRC(VINF_SUCCESS);
2160	return VINF_SUCCESS;
2161	}
2162
2163	static int ichac97LoadStream(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, PAC97STREAM pStream)
2164	{
2165	PAC97BMREGS pRegs = &pStream->Regs;
2166
2167	SSMR3GetU32(pSSM, &pRegs->bdbar);
2168	SSMR3GetU8( pSSM, &pRegs->civ);
2169	SSMR3GetU8( pSSM, &pRegs->lvi);
2170	SSMR3GetU16(pSSM, &pRegs->sr);
2171	SSMR3GetU16(pSSM, &pRegs->picb);
2172	SSMR3GetU8( pSSM, &pRegs->piv);
2173	SSMR3GetU8( pSSM, &pRegs->cr);
2174	SSMR3GetS32(pSSM, &pRegs->bd_valid);
2175	SSMR3GetU32(pSSM, &pRegs->bd.addr);
2176	SSMR3GetU32(pSSM, &pRegs->bd.ctl_len);
2177
2178	return VINF_SUCCESS;
2179	}
2180
2181	/**
2182	* @callback_method_impl{FNSSMDEVLOADEXEC}
2183	*/
2184	static DECLCALLBACK(int) ichac97LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
2185	{
2186	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2187
2188	LogRel2(("ichac97LoadExec: uVersion=%RU32, uPass=0x%x\n", uVersion, uPass));
2189
2190	AssertMsgReturn (uVersion == AC97_SSM_VERSION, ("%RU32\n", uVersion), VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION);
2191	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
2192
2193	SSMR3GetU32(pSSM, &pThis->glob_cnt);
2194	SSMR3GetU32(pSSM, &pThis->glob_sta);
2195	SSMR3GetU32(pSSM, &pThis->cas);
2196
2197	/** @todo r=andy For the next saved state version, add unique stream identifiers and a stream count. */
2198	/* Note: The order the streams are loaded here is critical, so don't touch. */
2199	int rc2 = ichac97LoadStream(pDevIns, pSSM, &pThis->StreamLineIn);
2200	AssertRC(rc2);
2201	rc2 = ichac97LoadStream(pDevIns, pSSM, &pThis->StreamOut);
2202	AssertRC(rc2);
2203	rc2 = ichac97LoadStream(pDevIns, pSSM, &pThis->StreamMicIn);
2204	AssertRC(rc2);
2205
2206	SSMR3GetMem(pSSM, pThis->mixer_data, sizeof(pThis->mixer_data));
2207
2208	/** @todo r=andy Stream IDs are hardcoded to certain streams. */
2209	uint8_t uaStrmsActive[LAST_INDEX];
2210	SSMR3GetMem(pSSM, uaStrmsActive, sizeof(uaStrmsActive));
2211
2212	ichac97RecordSelect(pThis, ichac97MixerGet(pThis, AC97_Record_Select));
2213	# define V_(a, b) ichac97MixerSetVolume(pThis, a, b, ichac97MixerGet(pThis, a))
2214	V_(AC97_Master_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME);
2215	V_(AC97_PCM_Out_Volume_Mute, PDMAUDIOMIXERCTL_FRONT);
2216	V_(AC97_Line_In_Volume_Mute, PDMAUDIOMIXERCTL_LINE_IN);
2217	# undef V_
2218	if (pThis->uCodecModel == Codec_AD1980)
2219	if (ichac97MixerGet(pThis, AC97_AD_Misc) & AD_MISC_HPSEL)
2220	ichac97MixerSetVolume(pThis, AC97_Headphone_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME,
2221	ichac97MixerGet(pThis, AC97_Headphone_Volume_Mute));
2222
2223	int rc = ichac97StreamsInit(pThis);
2224	if (RT_SUCCESS(rc))
2225	{
2226	/** @todo r=andy Stream IDs are hardcoded to certain streams. */
2227	rc = ichac97StreamSetActive(pThis, &pThis->StreamLineIn, RT_BOOL(uaStrmsActive[PI_INDEX]));
2228	if (RT_SUCCESS(rc))
2229	rc = ichac97StreamSetActive(pThis, &pThis->StreamMicIn, RT_BOOL(uaStrmsActive[MC_INDEX]));
2230	if (RT_SUCCESS(rc))
2231	rc = ichac97StreamSetActive(pThis, &pThis->StreamOut, RT_BOOL(uaStrmsActive[PO_INDEX]));
2232	}
2233
2234	pThis->bup_flag = 0;
2235	pThis->last_samp = 0;
2236
2237	LogFlowFuncLeaveRC(rc);
2238	return rc;
2239	}
2240
2241
2242	/**
2243	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
2244	*/
2245	static DECLCALLBACK(void ) ichac97QueryInterface(struct PDMIBASE pInterface, const char *pszIID)
2246	{
2247	PAC97STATE pThis = RT_FROM_MEMBER(pInterface, AC97STATE, IBase);
2248	Assert(&pThis->IBase == pInterface);
2249
2250	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
2251	return NULL;
2252	}
2253
2254
2255	/**
2256	* Powers off the device.
2257	*
2258	* @param pDevIns Device instance to power off.
2259	*/
2260	static DECLCALLBACK(void) ichac97PowerOff(PPDMDEVINS pDevIns)
2261	{
2262	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2263
2264	LogRel2(("AC97: Powering off ...\n"));
2265
2266	/**
2267	* Note: Destroy the mixer while powering off and not in ichac97Destruct,
2268	* giving the mixer the chance to release any references held to
2269	* PDM audio streams it maintains.
2270	*/
2271	if (pThis->pMixer)
2272	{
2273	AudioMixerDestroy(pThis->pMixer);
2274	pThis->pMixer = NULL;
2275	}
2276	}
2277
2278
2279	/**
2280	* @interface_method_impl{PDMDEVREG,pfnReset}
2281	*
2282	* @remarks The original sources didn't install a reset handler, but it seems to
2283	* make sense to me so we'll do it.
2284	*/
2285	static DECLCALLBACK(void) ichac97Reset(PPDMDEVINS pDevIns)
2286	{
2287	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2288
2289	LogFlowFuncEnter();
2290
2291	/*
2292	* Reset the device state (will need pDrv later).
2293	*/
2294	ichac97StreamResetBMRegs(pThis, &pThis->StreamLineIn);
2295	ichac97StreamResetBMRegs(pThis, &pThis->StreamMicIn);
2296	ichac97StreamResetBMRegs(pThis, &pThis->StreamOut);
2297
2298	/*
2299	* Reset the mixer too. The Windows XP driver seems to rely on
2300	* this. At least it wants to read the vendor id before it resets
2301	* the codec manually.
2302	*/
2303	ichac97MixerReset(pThis);
2304
2305	/*
2306	* Stop any audio currently playing and/or recording.
2307	*/
2308	AudioMixerSinkCtl(pThis->pSinkOutput, AUDMIXSINKCMD_DISABLE);
2309	AudioMixerSinkCtl(pThis->pSinkMicIn, AUDMIXSINKCMD_DISABLE);
2310	AudioMixerSinkCtl(pThis->pSinkLineIn, AUDMIXSINKCMD_DISABLE);
2311
2312	/*
2313	* Reset all streams.
2314	*/
2315	ichac97StreamReset(pThis, &pThis->StreamLineIn);
2316	ichac97StreamReset(pThis, &pThis->StreamMicIn);
2317	ichac97StreamReset(pThis, &pThis->StreamOut);
2318
2319	LogRel(("AC97: Reset\n"));
2320	}
2321
2322
2323	/**
2324	* @interface_method_impl{PDMDEVREG,pfnDestruct}
2325	*/
2326	static DECLCALLBACK(int) ichac97Destruct(PPDMDEVINS pDevIns)
2327	{
2328	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2329
2330	LogFlowFuncEnter();
2331
2332	ichac97StreamDestroy(&pThis->StreamLineIn);
2333	ichac97StreamDestroy(&pThis->StreamMicIn);
2334	ichac97StreamDestroy(&pThis->StreamOut);
2335
2336	PAC97DRIVER pDrv, pDrvNext;
2337	RTListForEachSafe(&pThis->lstDrv, pDrv, pDrvNext, AC97DRIVER, Node)
2338	{
2339	RTListNodeRemove(&pDrv->Node);
2340	RTMemFree(pDrv);
2341	}
2342
2343	/* Sanity. */
2344	Assert(RTListIsEmpty(&pThis->lstDrv));
2345
2346	LogFlowFuncLeave();
2347	return VINF_SUCCESS;
2348	}
2349
2350
2351	/**
2352	* Attach command, internal version.
2353	*
2354	* This is called to let the device attach to a driver for a specified LUN
2355	* during runtime. This is not called during VM construction, the device
2356	* constructor has to attach to all the available drivers.
2357	*
2358	* @returns VBox status code.
2359	* @param pDevIns The device instance.
2360	* @param pDrv Driver to (re-)use for (re-)attaching to.
2361	* If NULL is specified, a new driver will be created and appended
2362	* to the driver list.
2363	* @param uLUN The logical unit which is being detached.
2364	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
2365	*/
2366	static DECLCALLBACK(int) ichac97AttachInternal(PPDMDEVINS pDevIns, PAC97DRIVER pDrv, unsigned uLUN, uint32_t fFlags)
2367	{
2368	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2369
2370	/*
2371	* Attach driver.
2372	*/
2373	char *pszDesc = NULL;
2374	if (RTStrAPrintf(&pszDesc, "Audio driver port (AC'97) for LUN #%u", uLUN) <= 0)
2375	AssertReleaseMsgReturn(pszDesc,
2376	("Not enough memory for AC'97 driver port description of LUN #%u\n", uLUN),
2377	VERR_NO_MEMORY);
2378
2379	PPDMIBASE pDrvBase;
2380	int rc = PDMDevHlpDriverAttach(pDevIns, uLUN,
2381	&pThis->IBase, &pDrvBase, pszDesc);
2382	if (RT_SUCCESS(rc))
2383	{
2384	if (pDrv == NULL)
2385	pDrv = (PAC97DRIVER)RTMemAllocZ(sizeof(AC97DRIVER));
2386	if (pDrv)
2387	{
2388	pDrv->pDrvBase = pDrvBase;
2389	pDrv->pConnector = PDMIBASE_QUERY_INTERFACE(pDrvBase, PDMIAUDIOCONNECTOR);
2390	AssertMsg(pDrv->pConnector != NULL, ("Configuration error: LUN #%u has no host audio interface, rc=%Rrc\n", uLUN, rc));
2391	pDrv->pAC97State = pThis;
2392	pDrv->uLUN = uLUN;
2393
2394	/*
2395	* For now we always set the driver at LUN 0 as our primary
2396	* host backend. This might change in the future.
2397	*/
2398	if (pDrv->uLUN == 0)
2399	pDrv->Flags \|= PDMAUDIODRVFLAG_PRIMARY;
2400
2401	LogFunc(("LUN#%RU8: pCon=%p, drvFlags=0x%x\n", uLUN, pDrv->pConnector, pDrv->Flags));
2402
2403	/* Attach to driver list if not attached yet. */
2404	if (!pDrv->fAttached)
2405	{
2406	RTListAppend(&pThis->lstDrv, &pDrv->Node);
2407	pDrv->fAttached = true;
2408	}
2409	}
2410	else
2411	rc = VERR_NO_MEMORY;
2412	}
2413	else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
2414	LogFunc(("No attached driver for LUN #%u\n", uLUN));
2415
2416	if (RT_FAILURE(rc))
2417	{
2418	/* Only free this string on failure;
2419	* must remain valid for the live of the driver instance. */
2420	RTStrFree(pszDesc);
2421	}
2422
2423	LogFunc(("iLUN=%u, fFlags=0x%x, rc=%Rrc\n", uLUN, fFlags, rc));
2424	return rc;
2425	}
2426
2427
2428	/**
2429	* Attach command.
2430	*
2431	* This is called to let the device attach to a driver for a specified LUN
2432	* during runtime. This is not called during VM construction, the device
2433	* constructor has to attach to all the available drivers.
2434	*
2435	* @returns VBox status code.
2436	* @param pDevIns The device instance.
2437	* @param uLUN The logical unit which is being detached.
2438	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
2439	*/
2440	static DECLCALLBACK(int) ichac97Attach(PPDMDEVINS pDevIns, unsigned uLUN, uint32_t fFlags)
2441	{
2442	return ichac97AttachInternal(pDevIns, NULL /* pDrv */, uLUN, fFlags);
2443	}
2444
2445	static DECLCALLBACK(void) ichac97Detach(PPDMDEVINS pDevIns, unsigned uLUN, uint32_t fFlags)
2446	{
2447	LogFunc(("iLUN=%u, fFlags=0x%x\n", uLUN, fFlags));
2448	}
2449
2450	/**
2451	* Re-attach.
2452	*
2453	* @returns VBox status code.
2454	* @param pThis Device instance.
2455	* @param pDrv Driver instance used for attaching to.
2456	* If NULL is specified, a new driver will be created and appended
2457	* to the driver list.
2458	* @param uLUN The logical unit which is being re-detached.
2459	* @param pszDriver Driver name.
2460	*/
2461	static int ichac97Reattach(PAC97STATE pThis, PAC97DRIVER pDrv, uint8_t uLUN, const char *pszDriver)
2462	{
2463	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
2464	AssertPtrReturn(pszDriver, VERR_INVALID_POINTER);
2465
2466	PVM pVM = PDMDevHlpGetVM(pThis->pDevInsR3);
2467	PCFGMNODE pRoot = CFGMR3GetRoot(pVM);
2468	PCFGMNODE pDev0 = CFGMR3GetChild(pRoot, "Devices/ichac97/0/");
2469
2470	/* Remove LUN branch. */
2471	CFGMR3RemoveNode(CFGMR3GetChildF(pDev0, "LUN#%u/", uLUN));
2472
2473	if (pDrv)
2474	{
2475	/* Re-use a driver instance => detach the driver before. */
2476	int rc = PDMDevHlpDriverDetach(pThis->pDevInsR3, PDMIBASE_2_PDMDRV(pDrv->pDrvBase), 0 /* fFlags */);
2477	if (RT_FAILURE(rc))
2478	return rc;
2479	}
2480
2481	#define RC_CHECK() if (RT_FAILURE(rc)) { AssertReleaseRC(rc); break; }
2482
2483	int rc;
2484	do
2485	{
2486	PCFGMNODE pLunL0;
2487	rc = CFGMR3InsertNodeF(pDev0, &pLunL0, "LUN#%u/", uLUN); RC_CHECK();
2488	rc = CFGMR3InsertString(pLunL0, "Driver", "AUDIO"); RC_CHECK();
2489	rc = CFGMR3InsertNode(pLunL0, "Config/", NULL); RC_CHECK();
2490
2491	PCFGMNODE pLunL1, pLunL2;
2492	rc = CFGMR3InsertNode (pLunL0, "AttachedDriver/", &pLunL1); RC_CHECK();
2493	rc = CFGMR3InsertNode (pLunL1, "Config/", &pLunL2); RC_CHECK();
2494	rc = CFGMR3InsertString(pLunL1, "Driver", pszDriver); RC_CHECK();
2495
2496	rc = CFGMR3InsertString(pLunL2, "AudioDriver", pszDriver); RC_CHECK();
2497
2498	} while (0);
2499
2500	if (RT_SUCCESS(rc))
2501	rc = ichac97AttachInternal(pThis->pDevInsR3, pDrv, uLUN, 0 /* fFlags */);
2502
2503	LogFunc(("pThis=%p, uLUN=%u, pszDriver=%s, rc=%Rrc\n", pThis, uLUN, pszDriver, rc));
2504
2505	#undef RC_CHECK
2506
2507	return rc;
2508	}
2509
2510	/**
2511	* @interface_method_impl{PDMDEVREG,pfnConstruct}
2512	*/
2513	static DECLCALLBACK(int) ichac97Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
2514	{
2515	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
2516
2517	/* NB: This must be done before any possible failure (and running the destructor). */
2518	RTListInit(&pThis->lstDrv);
2519
2520	Assert(iInstance == 0);
2521	PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
2522
2523	/*
2524	* Validations.
2525	*/
2526	if (!CFGMR3AreValuesValid(pCfg,
2527	"Codec\0"
2528	"TimerHz\0"))
2529	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
2530	N_("Invalid configuration for the AC'97 device"));
2531
2532	/*
2533	* Read config data.
2534	*/
2535	char szCodec[20];
2536	int rc = CFGMR3QueryStringDef(pCfg, "Codec", &szCodec[0], sizeof(szCodec), "STAC9700");
2537	if (RT_FAILURE(rc))
2538	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
2539	N_("AC'97 configuration error: Querying \"Codec\" as string failed"));
2540
2541	#ifndef VBOX_WITH_AUDIO_CALLBACKS
2542	uint16_t uTimerHz;
2543	rc = CFGMR3QueryU16Def(pCfg, "TimerHz", &uTimerHz, AC97_TIMER_HZ /* Default value, if not set. */);
2544	if (RT_FAILURE(rc))
2545	return PDMDEV_SET_ERROR(pDevIns, rc,
2546	N_("AC'97 configuration error: failed to read Hertz (Hz) rate as unsigned integer"));
2547	#endif
2548
2549	/*
2550	* The AD1980 codec (with corresponding PCI subsystem vendor ID) is whitelisted
2551	* in the Linux kernel; Linux makes no attempt to measure the data rate and assumes
2552	* 48 kHz rate, which is exactly what we need. Same goes for AD1981B.
2553	*/
2554	bool fChipAD1980 = false;
2555	if (!strcmp(szCodec, "STAC9700"))
2556	pThis->uCodecModel = Codec_STAC9700;
2557	else if (!strcmp(szCodec, "AD1980"))
2558	pThis->uCodecModel = Codec_AD1980;
2559	else if (!strcmp(szCodec, "AD1981B"))
2560	pThis->uCodecModel = Codec_AD1981B;
2561	else
2562	{
2563	return PDMDevHlpVMSetError(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES, RT_SRC_POS,
2564	N_("AC'97 configuration error: The \"Codec\" value \"%s\" is unsupported"),
2565	szCodec);
2566	}
2567
2568	/*
2569	* Initialize data (most of it anyway).
2570	*/
2571	pThis->pDevInsR3 = pDevIns;
2572	/* IBase */
2573	pThis->IBase.pfnQueryInterface = ichac97QueryInterface;
2574
2575	/* PCI Device (the assertions will be removed later) */
2576	PCIDevSetVendorId (&pThis->PciDev, 0x8086); /* 00 ro - intel. */ Assert(pThis->PciDev.config[0x00] == 0x86); Assert(pThis->PciDev.config[0x01] == 0x80);
2577	PCIDevSetDeviceId (&pThis->PciDev, 0x2415); /* 02 ro - 82801 / 82801aa(?). */ Assert(pThis->PciDev.config[0x02] == 0x15); Assert(pThis->PciDev.config[0x03] == 0x24);
2578	PCIDevSetCommand (&pThis->PciDev, 0x0000); /* 04 rw,ro - pcicmd. */ Assert(pThis->PciDev.config[0x04] == 0x00); Assert(pThis->PciDev.config[0x05] == 0x00);
2579	PCIDevSetStatus (&pThis->PciDev, VBOX_PCI_STATUS_DEVSEL_MEDIUM \| VBOX_PCI_STATUS_FAST_BACK); /* 06 rwc?,ro? - pcists. */ Assert(pThis->PciDev.config[0x06] == 0x80); Assert(pThis->PciDev.config[0x07] == 0x02);
2580	PCIDevSetRevisionId (&pThis->PciDev, 0x01); /* 08 ro - rid. */ Assert(pThis->PciDev.config[0x08] == 0x01);
2581	PCIDevSetClassProg (&pThis->PciDev, 0x00); /* 09 ro - pi. */ Assert(pThis->PciDev.config[0x09] == 0x00);
2582	PCIDevSetClassSub (&pThis->PciDev, 0x01); /* 0a ro - scc; 01 == Audio. */ Assert(pThis->PciDev.config[0x0a] == 0x01);
2583	PCIDevSetClassBase (&pThis->PciDev, 0x04); /* 0b ro - bcc; 04 == multimedia. */ Assert(pThis->PciDev.config[0x0b] == 0x04);
2584	PCIDevSetHeaderType (&pThis->PciDev, 0x00); /* 0e ro - headtyp. */ Assert(pThis->PciDev.config[0x0e] == 0x00);
2585	PCIDevSetBaseAddress (&pThis->PciDev, 0, /* 10 rw - nambar - native audio mixer base. */
2586	true /* fIoSpace /, false / fPrefetchable /, false / f64Bit */, 0x00000000); Assert(pThis->PciDev.config[0x10] == 0x01); Assert(pThis->PciDev.config[0x11] == 0x00); Assert(pThis->PciDev.config[0x12] == 0x00); Assert(pThis->PciDev.config[0x13] == 0x00);
2587	PCIDevSetBaseAddress (&pThis->PciDev, 1, /* 14 rw - nabmbar - native audio bus mastering. */
2588	true /* fIoSpace /, false / fPrefetchable /, false / f64Bit */, 0x00000000); Assert(pThis->PciDev.config[0x14] == 0x01); Assert(pThis->PciDev.config[0x15] == 0x00); Assert(pThis->PciDev.config[0x16] == 0x00); Assert(pThis->PciDev.config[0x17] == 0x00);
2589	PCIDevSetInterruptLine (&pThis->PciDev, 0x00); /* 3c rw. */ Assert(pThis->PciDev.config[0x3c] == 0x00);
2590	PCIDevSetInterruptPin (&pThis->PciDev, 0x01); /* 3d ro - INTA#. */ Assert(pThis->PciDev.config[0x3d] == 0x01);
2591
2592	if (pThis->uCodecModel == Codec_AD1980)
2593	{
2594	PCIDevSetSubSystemVendorId(&pThis->PciDev, 0x1028); /* 2c ro - Dell.) */
2595	PCIDevSetSubSystemId (&pThis->PciDev, 0x0177); /* 2e ro. */
2596	}
2597	else if (pThis->uCodecModel == Codec_AD1981B)
2598	{
2599	PCIDevSetSubSystemVendorId(&pThis->PciDev, 0x1028); /* 2c ro - Dell.) */
2600	PCIDevSetSubSystemId (&pThis->PciDev, 0x01ad); /* 2e ro. */
2601	}
2602	else
2603	{
2604	PCIDevSetSubSystemVendorId(&pThis->PciDev, 0x8086); /* 2c ro - Intel.) */
2605	PCIDevSetSubSystemId (&pThis->PciDev, 0x0000); /* 2e ro. */
2606	}
2607
2608	/*
2609	* Register the PCI device, it's I/O regions, the timer and the
2610	* saved state item.
2611	*/
2612	rc = PDMDevHlpPCIRegister(pDevIns, &pThis->PciDev);
2613	if (RT_FAILURE(rc))
2614	return rc;
2615
2616	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 256, PCI_ADDRESS_SPACE_IO, ichac97IOPortMap);
2617	if (RT_FAILURE(rc))
2618	return rc;
2619
2620	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 64, PCI_ADDRESS_SPACE_IO, ichac97IOPortMap);
2621	if (RT_FAILURE(rc))
2622	return rc;
2623
2624	rc = PDMDevHlpSSMRegister(pDevIns, AC97_SSM_VERSION, sizeof(*pThis), ichac97SaveExec, ichac97LoadExec);
2625	if (RT_FAILURE(rc))
2626	return rc;
2627
2628	/*
2629	* Attach driver.
2630	*/
2631	uint8_t uLUN;
2632	for (uLUN = 0; uLUN < UINT8_MAX; ++uLUN)
2633	{
2634	LogFunc(("Trying to attach driver for LUN #%RU8 ...\n", uLUN));
2635	rc = ichac97AttachInternal(pDevIns, NULL /* pDrv /, uLUN, 0 / fFlags */);
2636	if (RT_FAILURE(rc))
2637	{
2638	if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
2639	rc = VINF_SUCCESS;
2640	else if (rc == VERR_AUDIO_BACKEND_INIT_FAILED)
2641	{
2642	ichac97Reattach(pThis, NULL /* pDrv */, uLUN, "NullAudio");
2643	PDMDevHlpVMSetRuntimeError(pDevIns, 0 /fFlags/, "HostAudioNotResponding",
2644	N_("No audio devices could be opened. Selecting the NULL audio backend "
2645	"with the consequence that no sound is audible"));
2646	/* attaching to the NULL audio backend will never fail */
2647	rc = VINF_SUCCESS;
2648	}
2649	break;
2650	}
2651	}
2652
2653	LogFunc(("cLUNs=%RU8, rc=%Rrc\n", uLUN, rc));
2654
2655	if (RT_SUCCESS(rc))
2656	{
2657	rc = AudioMixerCreate("AC'97 Mixer", 0 /* uFlags */, &pThis->pMixer);
2658	if (RT_SUCCESS(rc))
2659	{
2660	/* Set a default audio format for our mixer. */
2661	PDMAUDIOSTREAMCFG streamCfg;
2662	streamCfg.uHz = 44100;
2663	streamCfg.cChannels = 2;
2664	streamCfg.enmFormat = PDMAUDIOFMT_S16;
2665	streamCfg.enmEndianness = PDMAUDIOHOSTENDIANNESS;
2666
2667	rc = AudioMixerSetDeviceFormat(pThis->pMixer, &streamCfg);
2668	AssertRC(rc);
2669
2670	/* Add all required audio sinks. */
2671	int rc2 = AudioMixerCreateSink(pThis->pMixer, "[Playback] PCM Output", AUDMIXSINKDIR_OUTPUT, &pThis->pSinkOutput);
2672	AssertRC(rc2);
2673
2674	rc2 = AudioMixerCreateSink(pThis->pMixer, "[Recording] Line In", AUDMIXSINKDIR_INPUT, &pThis->pSinkLineIn);
2675	AssertRC(rc2);
2676
2677	rc2 = AudioMixerCreateSink(pThis->pMixer, "[Recording] Microphone In", AUDMIXSINKDIR_INPUT, &pThis->pSinkMicIn);
2678	AssertRC(rc2);
2679	}
2680	}
2681
2682	ichac97Reset(pDevIns);
2683
2684	if (RT_SUCCESS(rc))
2685	{
2686	ichac97StreamsInit(pThis);
2687
2688	PAC97DRIVER pDrv;
2689	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
2690	{
2691	/*
2692	* Only primary drivers are critical for the VM to run. Everything else
2693	* might not worth showing an own error message box in the GUI.
2694	*/
2695	if (!(pDrv->Flags & PDMAUDIODRVFLAG_PRIMARY))
2696	continue;
2697
2698	PPDMIAUDIOCONNECTOR pCon = pDrv->pConnector;
2699	AssertPtr(pCon);
2700
2701	bool fValidLineIn = AudioMixerStreamIsValid(pDrv->LineIn.pMixStrm);
2702	bool fValidMicIn = AudioMixerStreamIsValid(pDrv->MicIn.pMixStrm);
2703	bool fValidOut = AudioMixerStreamIsValid(pDrv->Out.pMixStrm);
2704
2705	if ( !fValidLineIn
2706	&& !fValidMicIn
2707	&& !fValidOut)
2708	{
2709	LogRel(("AC97: Falling back to NULL backend (no sound audible)\n"));
2710
2711	/* Destroy the streams before re-attaching the NULL driver. */
2712	ichac97StreamsDestroy(pThis);
2713
2714	ichac97Reset(pDevIns);
2715	ichac97Reattach(pThis, pDrv, pDrv->uLUN, "NullAudio");
2716
2717	ichac97StreamsInit(pThis);
2718
2719	PDMDevHlpVMSetRuntimeError(pDevIns, 0 /fFlags/, "HostAudioNotResponding",
2720	N_("No audio devices could be opened. Selecting the NULL audio backend "
2721	"with the consequence that no sound is audible"));
2722	}
2723	else
2724	{
2725	bool fWarn = false;
2726
2727	PDMAUDIOBACKENDCFG backendCfg;
2728	int rc2 = pCon->pfnGetConfig(pCon, &backendCfg);
2729	if (RT_SUCCESS(rc2))
2730	{
2731	if (backendCfg.cSources)
2732	{
2733	/* If the audio backend supports two or more input streams at once,
2734	* warn if one of our two inputs (microphone-in and line-in) failed to initialize. */
2735	if (backendCfg.cMaxStreamsIn >= 2)
2736	fWarn = !fValidLineIn \|\| !fValidMicIn;
2737	/* If the audio backend only supports one input stream at once (e.g. pure ALSA, and
2738	* not ALSA via PulseAudio plugin!), only warn if both of our inputs failed to initialize.
2739	* One of the two simply is not in use then. */
2740	else if (backendCfg.cMaxStreamsIn == 1)
2741	fWarn = !fValidLineIn && !fValidMicIn;
2742	/* Don't warn if our backend is not able of supporting any input streams at all. */
2743	}
2744
2745	if ( !fWarn
2746	&& backendCfg.cSinks)
2747	{
2748	fWarn = !fValidOut;
2749	}
2750	}
2751	else
2752	{
2753	LogRel(("AC97: Unable to retrieve audio backend configuration for LUN #%RU8, rc=%Rrc\n", pDrv->uLUN, rc2));
2754	fWarn = true;
2755	}
2756
2757	if (fWarn)
2758	{
2759	char szMissingStreams[255];
2760	size_t len = 0;
2761	if (!fValidLineIn)
2762	{
2763	LogRel(("AC97: WARNING: Unable to open PCM line input for LUN #%RU8!\n", pDrv->uLUN));
2764	len = RTStrPrintf(szMissingStreams, sizeof(szMissingStreams), "PCM Input");
2765	}
2766	if (!fValidMicIn)
2767	{
2768	LogRel(("AC97: WARNING: Unable to open PCM microphone input for LUN #%RU8!\n", pDrv->uLUN));
2769	len += RTStrPrintf(szMissingStreams + len,
2770	sizeof(szMissingStreams) - len, len ? ", PCM Microphone" : "PCM Microphone");
2771	}
2772	if (!fValidOut)
2773	{
2774	LogRel(("AC97: WARNING: Unable to open PCM output for LUN #%RU8!\n", pDrv->uLUN));
2775	len += RTStrPrintf(szMissingStreams + len,
2776	sizeof(szMissingStreams) - len, len ? ", PCM Output" : "PCM Output");
2777	}
2778
2779	PDMDevHlpVMSetRuntimeError(pDevIns, 0 /fFlags/, "HostAudioNotResponding",
2780	N_("Some AC'97 audio streams (%s) could not be opened. Guest applications generating audio "
2781	"output or depending on audio input may hang. Make sure your host audio device "
2782	"is working properly. Check the logfile for error messages of the audio "
2783	"subsystem"), szMissingStreams);
2784	}
2785	}
2786	}
2787	}
2788
2789	# ifndef VBOX_WITH_AUDIO_CALLBACKS
2790	if (RT_SUCCESS(rc))
2791	{
2792	/* Start the emulation timer. */
2793	rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL, ichac97Timer, pThis,
2794	TMTIMER_FLAGS_NO_CRIT_SECT, "DevIchAc97", &pThis->pTimer);
2795	AssertRCReturn(rc, rc);
2796
2797	if (RT_SUCCESS(rc))
2798	{
2799	pThis->cTimerTicks = TMTimerGetFreq(pThis->pTimer) / uTimerHz;
2800	pThis->uTimerTS = TMTimerGet(pThis->pTimer);
2801	LogFunc(("Timer ticks=%RU64 (%RU16 Hz)\n", pThis->cTimerTicks, uTimerHz));
2802
2803	ichac97TimerMaybeStart(pThis);
2804	}
2805	}
2806	# else
2807	if (RT_SUCCESS(rc))
2808	{
2809	PAC97DRIVER pDrv;
2810	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
2811	{
2812	/* Only register primary driver.
2813	* The device emulation does the output multiplexing then. */
2814	if (!(pDrv->Flags & PDMAUDIODRVFLAG_PRIMARY))
2815	continue;
2816
2817	PDMAUDIOCALLBACK AudioCallbacks[2];
2818
2819	AC97CALLBACKCTX Ctx = { pThis, pDrv };
2820
2821	AudioCallbacks[0].enmType = PDMAUDIOCALLBACKTYPE_INPUT;
2822	AudioCallbacks[0].pfnCallback = ac97CallbackInput;
2823	AudioCallbacks[0].pvCtx = &Ctx;
2824	AudioCallbacks[0].cbCtx = sizeof(AC97CALLBACKCTX);
2825
2826	AudioCallbacks[1].enmType = PDMAUDIOCALLBACKTYPE_OUTPUT;
2827	AudioCallbacks[1].pfnCallback = ac97CallbackOutput;
2828	AudioCallbacks[1].pvCtx = &Ctx;
2829	AudioCallbacks[1].cbCtx = sizeof(AC97CALLBACKCTX);
2830
2831	rc = pDrv->pConnector->pfnRegisterCallbacks(pDrv->pConnector, AudioCallbacks, RT_ELEMENTS(AudioCallbacks));
2832	if (RT_FAILURE(rc))
2833	break;
2834	}
2835	}
2836	# endif
2837
2838	# ifdef VBOX_WITH_STATISTICS
2839	if (RT_SUCCESS(rc))
2840	{
2841	/*
2842	* Register statistics.
2843	*/
2844	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatTimer, STAMTYPE_PROFILE, "/Devices/AC97/Timer", STAMUNIT_TICKS_PER_CALL, "Profiling ichac97Timer.");
2845	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatBytesRead, STAMTYPE_COUNTER, "/Devices/AC97/BytesRead" , STAMUNIT_BYTES, "Bytes read from AC97 emulation.");
2846	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatBytesWritten, STAMTYPE_COUNTER, "/Devices/AC97/BytesWritten", STAMUNIT_BYTES, "Bytes written to AC97 emulation.");
2847	}
2848	# endif
2849
2850	LogFlowFuncLeaveRC(rc);
2851	return rc;
2852	}
2853
2854	/**
2855	* The device registration structure.
2856	*/
2857	const PDMDEVREG g_DeviceICHAC97 =
2858	{
2859	/* u32Version */
2860	PDM_DEVREG_VERSION,
2861	/* szName */
2862	"ichac97",
2863	/* szRCMod */
2864	"",
2865	/* szR0Mod */
2866	"",
2867	/* pszDescription */
2868	"ICH AC'97 Audio Controller",
2869	/* fFlags */
2870	PDM_DEVREG_FLAGS_DEFAULT_BITS,
2871	/* fClass */
2872	PDM_DEVREG_CLASS_AUDIO,
2873	/* cMaxInstances */
2874	1,
2875	/* cbInstance */
2876	sizeof(AC97STATE),
2877	/* pfnConstruct */
2878	ichac97Construct,
2879	/* pfnDestruct */
2880	ichac97Destruct,
2881	/* pfnRelocate */
2882	NULL,
2883	/* pfnMemSetup */
2884	NULL,
2885	/* pfnPowerOn */
2886	NULL,
2887	/* pfnReset */
2888	ichac97Reset,
2889	/* pfnSuspend */
2890	NULL,
2891	/* pfnResume */
2892	NULL,
2893	/* pfnAttach */
2894	ichac97Attach,
2895	/* pfnDetach */
2896	ichac97Detach,
2897	/* pfnQueryInterface. */
2898	NULL,
2899	/* pfnInitComplete */
2900	NULL,
2901	/* pfnPowerOff */
2902	ichac97PowerOff,
2903	/* pfnSoftReset */
2904	NULL,
2905	/* u32VersionEnd */
2906	PDM_DEVREG_VERSION
2907	};
2908
2909	#endif /* !IN_RING3 */
2910	#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */

注意: 瀏覽 TracBrowser 來幫助您使用儲存庫瀏覽器

source: vbox/trunk/src/VBox/Devices/Audio/DevIchAc97.cpp@ 61706

以其他格式下載: