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source: vbox/trunk/include/iprt/nt/hyperv.h@ 72197

最後變更 在這個檔案從72197是 71293,由 vboxsync 提交於 7 年 前

NEM: Some stats; doc updates. bugref:9044
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1/** @file
2 * Hyper-V related types and definitions.
3 */
4
5/*
6 * Copyright (C) 2018 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.alldomusa.eu.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26
27#ifndef ___iprt_nt_hyperv_h
28#define ___iprt_nt_hyperv_h
29
30
31#ifndef IN_IDA_PRO
32# include <iprt/types.h>
33# include <iprt/assertcompile.h>
34#else
35# define RT_FLEXIBLE_ARRAY
36# define AssertCompile(expr)
37# define AssertCompileSize(type, size)
38# define AssertCompileMemberOffset(type, member, off)
39#endif
40
41
42/** Hyper-V partition ID. */
43typedef uint64_t HV_PARTITION_ID;
44/** Invalid Hyper-V partition ID. */
45#define HV_PARTITION_ID_INVALID UINT64_C(0)
46/** Hyper-V virtual processor index (== VMCPUID). */
47typedef uint32_t HV_VP_INDEX;
48/** Guest physical address (== RTGCPHYS). */
49typedef uint64_t HV_GPA;
50/** Guest physical page number. */
51typedef uint64_t HV_GPA_PAGE_NUMBER;
52/** System(/parent) physical page number. */
53typedef uint64_t HV_SPA_PAGE_NUMBER;
54/** Hyper-V unsigned 128-bit integer type. */
55typedef struct { uint64_t Low64, High64; } HV_UINT128;
56/** Hyper-V port ID. */
57typedef union
58{
59 uint32_t AsUINT32;
60 struct
61 {
62 uint32_t Id : 24;
63 uint32_t Reserved : 8;
64 };
65} HV_PORT_ID;
66/** Pointer to a Hyper-V port ID. */
67typedef HV_PORT_ID *PHV_PORT_ID;
68
69
70/**
71 * Hypercall IDs.
72 */
73typedef enum
74{
75 HvCallReserved0000 = 0,
76
77 HvCallSwitchVirtualAddressSpace,
78 HvCallFlushVirtualAddressSpace,
79 HvCallFlushVirtualAddressList,
80 HvCallGetLogicalProcessorRunTime,
81 /* 5, 6 & 7 are deprecated / reserved. */
82 HvCallNotifyLongSpinWait = 8,
83 HvCallParkLogicalProcessors, /**< @since v2 */
84 HvCallInvokeHypervisorDebugger, /**< @since v2 - not mentioned in TLFS v5.0b */
85 HvCallSendSyntheticClusterIpi, /**< @since v? */
86 HvCallModifyVtlProtectionMask, /**< @since v? */
87 HvCallEnablePartitionVtl, /**< @since v? */
88 HvCallDisablePartitionVtl, /**< @since v? */
89 HvCallEnableVpVtl, /**< @since v? */
90 HvCallDisableVpVtl, /**< @since v? */
91 HvCallVtlCall, /**< @since v? */
92 HvCallVtlReturn, /**< @since v? */
93 HvCallFlushVirtualAddressSpaceEx, /**< @since v? */
94 HvCallFlushVirtualAddressListEx, /**< @since v? */
95 HvCallSendSyntheticClusterIpiEx, /**< @since v? */
96 /* Reserved: 0x16..0x3f */
97
98 HvCallCreatePartition = 0x40,
99 HvCallInitializePartition,
100 HvCallFinalizePartition,
101 HvCallDeletePartition,
102 HvCallGetPartitionProperty,
103 HvCallSetPartitionProperty,
104 HvCallGetPartitionId,
105 HvCallGetNextChildPartition,
106 HvCallDepositMemory, /**< 0x48 - Repeat call. */
107 HvCallWithdrawMemory, /**< 0x49 - Repeat call. */
108 HvCallGetMemoryBalance,
109 HvCallMapGpaPages, /**< 0X4b - Repeat call. */
110 HvCallUnmapGpaPages, /**< 0X4c - Repeat call. */
111 HvCallInstallIntercept,
112 HvCallCreateVp,
113 HvCallDeleteVp, /**< 0x4f - Fast call. */
114 HvCallGetVpRegisters, /**< 0x50 - Repeat call. */
115 HvCallSetVpRegisters, /**< 0x51 - Repeat call. */
116 HvCallTranslateVirtualAddress,
117 HvCallReadGpa,
118 HvCallWriteGpa,
119 HvCallAssertVirtualInterruptV1,
120 HvCallClearVirtualInterrupt, /**< 0x56 - Fast call. */
121 HvCallCreatePortV1,
122 HvCallDeletePort, /**< 0x58 - Fast call. */
123 HvCallConnectPortV1,
124 HvCallGetPortProperty,
125 HvCallDisconnectPort,
126 HvCallPostMessage,
127 HvCallSignalEvent,
128 HvCallSavePartitionState,
129 HvCallRestorePartitionState,
130 HvCallInitializeEventLogBufferGroup,
131 HvCallFinalizeEventLogBufferGroup,
132 HvCallCreateEventLogBuffer,
133 HvCallDeleteEventLogBuffer,
134 HvCallMapEventLogBuffer,
135 HvCallUnmapEventLogBuffer,
136 HvCallSetEventLogGroupSources,
137 HvCallReleaseEventLogBuffer,
138 HvCallFlushEventLogBuffer,
139 HvCallPostDebugData,
140 HvCallRetrieveDebugData,
141 HvCallResetDebugSession,
142 HvCallMapStatsPage,
143 HvCallUnmapStatsPage,
144 HvCallMapSparseGpaPages, /**< @since v2 */
145 HvCallSetSystemProperty, /**< @since v2 */
146 HvCallSetPortProperty, /**< @since v2 */
147 /* 0x71..0x75 reserved/deprecated (was v2 test IDs). */
148 HvCallAddLogicalProcessor = 0x76,
149 HvCallRemoveLogicalProcessor,
150 HvCallQueryNumaDistance,
151 HvCallSetLogicalProcessorProperty,
152 HvCallGetLogicalProcessorProperty,
153 HvCallGetSystemProperty,
154 HvCallMapDeviceInterrupt,
155 HvCallUnmapDeviceInterrupt,
156 HvCallRetargetDeviceInterrupt,
157 /* 0x7f is reserved. */
158 HvCallMapDevicePages = 0x80,
159 HvCallUnmapDevicePages,
160 HvCallAttachDevice,
161 HvCallDetachDevice,
162 HvCallNotifyStandbyTransition,
163 HvCallPrepareForSleep,
164 HvCallPrepareForHibernate,
165 HvCallNotifyPartitionEvent,
166 HvCallGetLogicalProcessorRegisters,
167 HvCallSetLogicalProcessorRegisters,
168 HvCallQueryAssociatedLpsforMca,
169 HvCallNotifyRingEmpty,
170 HvCallInjectSyntheticMachineCheck,
171 HvCallScrubPartition,
172 HvCallCollectLivedump,
173 HvCallDisableHypervisor,
174 HvCallModifySparseGpaPages,
175 HvCallRegisterInterceptResult,
176 HvCallUnregisterInterceptResult,
177 /* 0x93 is reserved/undocumented. */
178 HvCallAssertVirtualInterrupt = 0x94,
179 HvCallCreatePort,
180 HvCallConnectPort,
181 HvCallGetSpaPageList,
182 /* 0x98 is reserved. */
183 HvCallStartVirtualProcessor = 0x99,
184 HvCallGetVpIndexFromApicId,
185 /* 0x9b..0xae are reserved/undocumented.
186 0xad: New version of HvCallGetVpRegisters? Perhaps on logical CPU or smth. */
187 HvCallFlushGuestPhysicalAddressSpace = 0xaf,
188 HvCallFlushGuestPhysicalAddressList,
189 /* 0xb1..0xb4 are unknown */
190 HvCallCreateCpuGroup = 0xb5,
191 HvCallDeleteCpuGroup,
192 HvCallGetCpuGroupProperty,
193 HvCallSetCpuGroupProperty,
194 HvCallGetCpuGroupAffinit,
195 HvCallGetNextCpuGroup = 0xba,
196 HvCallGetNextCpuGroupPartition,
197 HvCallPrecommitGpaPages = 0xbe,
198 HvCallUncommitGpaPages, /**< Happens when VidDestroyGpaRangeCheckSecure/WHvUnmapGpaRange is called. */
199 /* 0xc0..0xcb are unknown */
200 HvCallVpRunloopRelated = 0xc2, /**< Fast */
201 HvCallQueryVtlProtectionMaskRange = 0xcc,
202 HvCallModifyVtlProtectionMaskRange,
203 /* 0xce..0xd1 are unknown */
204 HvCallAcquireSparseGpaPageHostAccess = 0xd2,
205 HvCallReleaseSparseGpaPageHostAccess,
206 HvCallCheckSparseGpaPageVtlAccess,
207 HvCallAcquireSparseSpaPageHostAccess = 0xd7,
208 HvCallReleaseSparseSpaPageHostAccess,
209 HvCallAcceptGpaPages, /**< 0x18 byte input, zero rep, no output. */
210
211 /** Number of defined hypercalls (varies with version). */
212 HvCallCount
213} HV_CALL_CODE;
214AssertCompile(HvCallSendSyntheticClusterIpiEx == 0x15);
215AssertCompile(HvCallMapGpaPages == 0x4b);
216AssertCompile(HvCallSetPortProperty == 0x70);
217AssertCompile(HvCallRetargetDeviceInterrupt == 0x7e);
218AssertCompile(HvCallUnregisterInterceptResult == 0x92);
219AssertCompile(HvCallGetSpaPageList == 0x97);
220AssertCompile(HvCallFlushGuestPhysicalAddressList == 0xb0);
221AssertCompile(HvCallUncommitGpaPages == 0xbf);
222AssertCompile(HvCallCount == 0xda);
223
224/** Makes the first parameter to a hypercall (rcx). */
225#define HV_MAKE_CALL_INFO(a_enmCallCode, a_cReps) ( (uint64_t)(a_enmCallCode) | ((uint64_t)(a_cReps) << 32) )
226/** Makes the return value (success) for a rep hypercall. */
227#define HV_MAKE_CALL_REP_RET(a_cReps) ((uint64_t)(a_cReps) << 32)
228
229/** Hypercall status code. */
230typedef uint16_t HV_STATUS;
231
232/** @name Hyper-V Hypercall status codes
233 * @{ */
234#define HV_STATUS_SUCCESS (0x0000)
235#define HV_STATUS_RESERVED_1 (0x0001)
236#define HV_STATUS_INVALID_HYPERCALL_CODE (0x0002)
237#define HV_STATUS_INVALID_HYPERCALL_INPUT (0x0003)
238#define HV_STATUS_INVALID_ALIGNMENT (0x0004)
239#define HV_STATUS_INVALID_PARAMETER (0x0005)
240#define HV_STATUS_ACCESS_DENIED (0x0006)
241#define HV_STATUS_INVALID_PARTITION_STATE (0x0007)
242#define HV_STATUS_OPERATION_DENIED (0x0008)
243#define HV_STATUS_UNKNOWN_PROPERTY (0x0009)
244#define HV_STATUS_PROPERTY_VALUE_OUT_OF_RANGE (0x000a)
245#define HV_STATUS_INSUFFICIENT_MEMORY (0x000b)
246#define HV_STATUS_PARTITION_TOO_DEEP (0x000c)
247#define HV_STATUS_INVALID_PARTITION_ID (0x000d)
248#define HV_STATUS_INVALID_VP_INDEX (0x000e)
249#define HV_STATUS_RESERVED_F (0x000f)
250#define HV_STATUS_NOT_FOUND (0x0010)
251#define HV_STATUS_INVALID_PORT_ID (0x0011)
252#define HV_STATUS_INVALID_CONNECTION_ID (0x0012)
253#define HV_STATUS_INSUFFICIENT_BUFFERS (0x0013)
254#define HV_STATUS_NOT_ACKNOWLEDGED (0x0014)
255#define HV_STATUS_INVALID_VP_STATE (0x0015)
256#define HV_STATUS_ACKNOWLEDGED (0x0016)
257#define HV_STATUS_INVALID_SAVE_RESTORE_STATE (0x0017)
258#define HV_STATUS_INVALID_SYNIC_STATE (0x0018)
259#define HV_STATUS_OBJECT_IN_USE (0x0019)
260#define HV_STATUS_INVALID_PROXIMITY_DOMAIN_INFO (0x001a)
261#define HV_STATUS_NO_DATA (0x001b)
262#define HV_STATUS_INACTIVE (0x001c)
263#define HV_STATUS_NO_RESOURCES (0x001d)
264#define HV_STATUS_FEATURE_UNAVAILABLE (0x001e)
265#define HV_STATUS_PARTIAL_PACKET (0x001f)
266#define HV_STATUS_PROCESSOR_FEATURE_SSE3_NOT_SUPPORTED (0x0020)
267#define HV_STATUS_PROCESSOR_FEATURE_LAHFSAHF_NOT_SUPPORTED (0x0021)
268#define HV_STATUS_PROCESSOR_FEATURE_SSSE3_NOT_SUPPORTED (0x0022)
269#define HV_STATUS_PROCESSOR_FEATURE_SSE4_1_NOT_SUPPORTED (0x0023)
270#define HV_STATUS_PROCESSOR_FEATURE_SSE4_2_NOT_SUPPORTED (0x0024)
271#define HV_STATUS_PROCESSOR_FEATURE_SSE4A_NOT_SUPPORTED (0x0025)
272#define HV_STATUS_PROCESSOR_FEATURE_XOP_NOT_SUPPORTED (0x0026)
273#define HV_STATUS_PROCESSOR_FEATURE_POPCNT_NOT_SUPPORTED (0x0027)
274#define HV_STATUS_PROCESSOR_FEATURE_CMPXCHG16B_NOT_SUPPORTED (0x0028)
275#define HV_STATUS_PROCESSOR_FEATURE_ALTMOVCR8_NOT_SUPPORTED (0x0029)
276#define HV_STATUS_PROCESSOR_FEATURE_LZCNT_NOT_SUPPORTED (0x002a)
277#define HV_STATUS_PROCESSOR_FEATURE_MISALIGNED_SSE_NOT_SUPPORTED (0x002b)
278#define HV_STATUS_PROCESSOR_FEATURE_MMX_EXT_NOT_SUPPORTED (0x002c)
279#define HV_STATUS_PROCESSOR_FEATURE_3DNOW_NOT_SUPPORTED (0x002d)
280#define HV_STATUS_PROCESSOR_FEATURE_EXTENDED_3DNOW_NOT_SUPPORTED (0x002e)
281#define HV_STATUS_PROCESSOR_FEATURE_PAGE_1GB_NOT_SUPPORTED (0x002f)
282#define HV_STATUS_PROCESSOR_CACHE_LINE_FLUSH_SIZE_INCOMPATIBLE (0x0030)
283#define HV_STATUS_PROCESSOR_FEATURE_XSAVE_NOT_SUPPORTED (0x0031)
284#define HV_STATUS_PROCESSOR_FEATURE_XSAVEOPT_NOT_SUPPORTED (0x0032)
285#define HV_STATUS_INSUFFICIENT_BUFFER (0x0033)
286#define HV_STATUS_PROCESSOR_FEATURE_XSAVE_AVX_NOT_SUPPORTED (0x0034)
287#define HV_STATUS_PROCESSOR_FEATURE_XSAVE_ FEATURE_NOT_SUPPORTED (0x0035)
288#define HV_STATUS_PROCESSOR_XSAVE_SAVE_AREA_INCOMPATIBLE (0x0036)
289#define HV_STATUS_INCOMPATIBLE_PROCESSOR (0x0037)
290#define HV_STATUS_INSUFFICIENT_DEVICE_DOMAINS (0x0038)
291#define HV_STATUS_PROCESSOR_FEATURE_AES_NOT_SUPPORTED (0x0039)
292#define HV_STATUS_PROCESSOR_FEATURE_PCLMULQDQ_NOT_SUPPORTED (0x003a)
293#define HV_STATUS_PROCESSOR_FEATURE_INCOMPATIBLE_XSAVE_FEATURES (0x003b)
294#define HV_STATUS_CPUID_FEATURE_VALIDATION_ERROR (0x003c)
295#define HV_STATUS_CPUID_XSAVE_FEATURE_VALIDATION_ERROR (0x003d)
296#define HV_STATUS_PROCESSOR_STARTUP_TIMEOUT (0x003e)
297#define HV_STATUS_SMX_ENABLED (0x003f)
298#define HV_STATUS_PROCESSOR_FEATURE_PCID_NOT_SUPPORTED (0x0040)
299#define HV_STATUS_INVALID_LP_INDEX (0x0041)
300#define HV_STATUS_FEATURE_FMA4_NOT_SUPPORTED (0x0042)
301#define HV_STATUS_FEATURE_F16C_NOT_SUPPORTED (0x0043)
302#define HV_STATUS_PROCESSOR_FEATURE_RDRAND_NOT_SUPPORTED (0x0044)
303#define HV_STATUS_PROCESSOR_FEATURE_RDWRFSGS_NOT_SUPPORTED (0x0045)
304#define HV_STATUS_PROCESSOR_FEATURE_SMEP_NOT_SUPPORTED (0x0046)
305#define HV_STATUS_PROCESSOR_FEATURE_ENHANCED_FAST_STRING_NOT_SUPPORTED (0x0047)
306#define HV_STATUS_PROCESSOR_FEATURE_MOVBE_NOT_SUPPORTED (0x0048)
307#define HV_STATUS_PROCESSOR_FEATURE_BMI1_NOT_SUPPORTED (0x0049)
308#define HV_STATUS_PROCESSOR_FEATURE_BMI2_NOT_SUPPORTED (0x004a)
309#define HV_STATUS_PROCESSOR_FEATURE_HLE_NOT_SUPPORTED (0x004b)
310#define HV_STATUS_PROCESSOR_FEATURE_RTM_NOT_SUPPORTED (0x004c)
311#define HV_STATUS_PROCESSOR_FEATURE_XSAVE_FMA_NOT_SUPPORTED (0x004d)
312#define HV_STATUS_PROCESSOR_FEATURE_XSAVE_AVX2_NOT_SUPPORTED (0x004e)
313#define HV_STATUS_PROCESSOR_FEATURE_NPIEP1_NOT_SUPPORTED (0x004f)
314#define HV_STATUS_INVALID_REGISTER_VALUE (0x0050)
315#define HV_STATUS_PROCESSOR_FEATURE_RDSEED_NOT_SUPPORTED (0x0052)
316#define HV_STATUS_PROCESSOR_FEATURE_ADX_NOT_SUPPORTED (0x0053)
317#define HV_STATUS_PROCESSOR_FEATURE_SMAP_NOT_SUPPORTED (0x0054)
318#define HV_STATUS_NX_NOT_DETECTED (0x0055)
319#define HV_STATUS_PROCESSOR_FEATURE_INTEL_PREFETCH_NOT_SUPPORTED (0x0056)
320#define HV_STATUS_INVALID_DEVICE_ID (0x0057)
321#define HV_STATUS_INVALID_DEVICE_STATE (0x0058)
322#define HV_STATUS_PENDING_PAGE_REQUESTS (0x0059)
323#define HV_STATUS_PAGE_REQUEST_INVALID (0x0060)
324#define HV_STATUS_OPERATION_FAILED (0x0071)
325#define HV_STATUS_NOT_ALLOWED_WITH_NESTED_VIRT_ACTIVE (0x0072)
326/** @} */
327
328
329/** @name Flags used with HvCallMapGpaPages and HvCallMapSparseGpaPages.
330 * @note There seems to be a more flags defined after v2.
331 * @{ */
332typedef uint32_t HV_MAP_GPA_FLAGS;
333#define HV_MAP_GPA_READABLE UINT32_C(0x0001)
334#define HV_MAP_GPA_WRITABLE UINT32_C(0x0002)
335#define HV_MAP_GPA_EXECUTABLE UINT32_C(0x0004)
336/** Seems this have to be set when HV_MAP_GPA_EXECUTABLE is (17101). */
337#define HV_MAP_GPA_EXECUTABLE_AGAIN UINT32_C(0x0008)
338/** Dunno what this is yet, but it requires HV_MAP_GPA_DUNNO_1000.
339 * The readable bit gets put here when both HV_MAP_GPA_DUNNO_1000 and
340 * HV_MAP_GPA_DUNNO_MASK_0700 are clear. */
341#define HV_MAP_GPA_DUNNO_ACCESS UINT32_C(0x0010)
342/** Guess work. */
343#define HV_MAP_GPA_MAYBE_ACCESS_MASK UINT32_C(0x001f)
344/** Some kind of mask. */
345#define HV_MAP_GPA_DUNNO_MASK_0700 UINT32_C(0x0700)
346/** Dunno what this is, but required for HV_MAP_GPA_DUNNO_ACCESS. */
347#define HV_MAP_GPA_DUNNO_1000 UINT32_C(0x1000)
348/** Working with large 2MB pages. */
349#define HV_MAP_GPA_LARGE UINT32_C(0x2000)
350/** Valid mask as per build 17101. */
351#define HV_MAP_GPA_VALID_MASK UINT32_C(0x7f1f)
352/** @} */
353
354/** Input for HvCallMapGpaPages. */
355typedef struct
356{
357 HV_PARTITION_ID TargetPartitionId;
358 HV_GPA_PAGE_NUMBER TargetGpaBase;
359 HV_MAP_GPA_FLAGS MapFlags;
360 uint32_t u32ExplicitPadding;
361 /* The repeating part: */
362 HV_SPA_PAGE_NUMBER PageList[RT_FLEXIBLE_ARRAY];
363} HV_INPUT_MAP_GPA_PAGES;
364AssertCompileMemberOffset(HV_INPUT_MAP_GPA_PAGES, PageList, 24);
365/** Pointer to the input for HvCallMapGpaPages. */
366typedef HV_INPUT_MAP_GPA_PAGES *PHV_INPUT_MAP_GPA_PAGES;
367
368
369/** A parent to guest mapping pair for HvCallMapSparseGpaPages. */
370typedef struct
371{
372 HV_GPA_PAGE_NUMBER TargetGpaPageNumber;
373 HV_SPA_PAGE_NUMBER SourceSpaPageNumber;
374} HV_GPA_MAPPING;
375/** Pointer to a parent->guest mapping pair for HvCallMapSparseGpaPages. */
376typedef HV_GPA_MAPPING *PHV_GPA_MAPPING;
377
378/** Input for HvCallMapSparseGpaPages. */
379typedef struct
380{
381 HV_PARTITION_ID TargetPartitionId;
382 HV_MAP_GPA_FLAGS MapFlags;
383 uint32_t u32ExplicitPadding;
384 /* The repeating part: */
385 HV_GPA_MAPPING PageList[RT_FLEXIBLE_ARRAY];
386} HV_INPUT_MAP_SPARSE_GPA_PAGES;
387AssertCompileMemberOffset(HV_INPUT_MAP_SPARSE_GPA_PAGES, PageList, 16);
388/** Pointer to the input for HvCallMapSparseGpaPages. */
389typedef HV_INPUT_MAP_SPARSE_GPA_PAGES *PHV_INPUT_MAP_SPARSE_GPA_PAGES;
390
391
392/** Input for HvCallUnmapGpaPages. */
393typedef struct
394{
395 HV_PARTITION_ID TargetPartitionId;
396 HV_GPA_PAGE_NUMBER TargetGpaBase;
397 /** This field is either an omission in the 7600 WDK or a later additions.
398 * Anyway, not quite sure what it does. Bit 2 seems to indicate 2MB pages. */
399 uint64_t fFlags;
400} HV_INPUT_UNMAP_GPA_PAGES;
401AssertCompileSize(HV_INPUT_UNMAP_GPA_PAGES, 24);
402/** Pointer to the input for HvCallUnmapGpaPages. */
403typedef HV_INPUT_UNMAP_GPA_PAGES *PHV_INPUT_UNMAP_GPA_PAGES;
404
405
406
407/** Cache types used by HvCallReadGpa and HvCallWriteGpa. */
408typedef enum
409{
410 HvCacheTypeX64Uncached = 0,
411 HvCacheTypeX64WriteCombining,
412 /* 2 & 3 are undefined. */
413 HvCacheTypeX64WriteThrough = 4,
414 HvCacheTypeX64WriteProtected,
415 HvCacheTypeX64WriteBack
416} HV_CACHE_TYPE;
417
418/** Control flags for HvCallReadGpa and HvCallWriteGpa. */
419typedef union
420{
421 uint64_t AsUINT64;
422 struct
423 {
424 uint64_t CacheType : 8; /**< HV_CACHE_TYPE */
425 uint64_t Reserved : 56;
426 };
427} HV_ACCESS_GPA_CONTROL_FLAGS;
428
429/** Results codes for HvCallReadGpa and HvCallWriteGpa. */
430typedef enum
431{
432 HvAccessGpaSuccess = 0,
433 HvAccessGpaUnmapped,
434 HvAccessGpaReadIntercept,
435 HvAccessGpaWriteIntercept,
436 HvAccessGpaIllegalOverlayAccess
437} HV_ACCESS_GPA_RESULT_CODE;
438
439/** The result of HvCallReadGpa and HvCallWriteGpa. */
440typedef union
441{
442 uint64_t AsUINT64;
443 struct
444 {
445 HV_ACCESS_GPA_RESULT_CODE ResultCode;
446 uint32_t Reserved;
447 };
448} HV_ACCESS_GPA_RESULT;
449
450
451/** Input for HvCallReadGpa. */
452typedef struct
453{
454 HV_PARTITION_ID PartitionId;
455 HV_VP_INDEX VpIndex;
456 uint32_t ByteCount;
457 HV_GPA BaseGpa;
458 HV_ACCESS_GPA_CONTROL_FLAGS ControlFlags;
459} HV_INPUT_READ_GPA;
460AssertCompileSize(HV_INPUT_READ_GPA, 32);
461/** Pointer to the input for HvCallReadGpa. */
462typedef HV_INPUT_READ_GPA *PHV_INPUT_READ_GPA;
463
464/** Output for HvCallReadGpa. */
465typedef struct
466{
467 HV_ACCESS_GPA_RESULT AccessResult;
468 uint8_t Data[16];
469} HV_OUTPUT_READ_GPA;
470AssertCompileSize(HV_OUTPUT_READ_GPA, 24);
471/** Pointer to the output for HvCallReadGpa. */
472typedef HV_OUTPUT_READ_GPA *PHV_OUTPUT_READ_GPA;
473
474
475/** Input for HvCallWriteGpa. */
476typedef struct
477{
478 HV_PARTITION_ID PartitionId;
479 HV_VP_INDEX VpIndex;
480 uint32_t ByteCount;
481 HV_GPA BaseGpa;
482 HV_ACCESS_GPA_CONTROL_FLAGS ControlFlags;
483 uint8_t Data[16];
484} HV_INPUT_WRITE_GPA;
485AssertCompileSize(HV_INPUT_READ_GPA, 32);
486/** Pointer to the input for HvCallWriteGpa. */
487typedef HV_INPUT_READ_GPA *PHV_INPUT_READ_GPA;
488
489/** Output for HvCallWriteGpa. */
490typedef struct
491{
492 HV_ACCESS_GPA_RESULT AccessResult;
493} HV_OUTPUT_WRITE_GPA;
494AssertCompileSize(HV_OUTPUT_WRITE_GPA, 8);
495/** Pointer to the output for HvCallWriteGpa. */
496typedef HV_OUTPUT_WRITE_GPA *PHV_OUTPUT_WRITE_GPA;
497
498
499/**
500 * Register names used by HvCallGetVpRegisters and HvCallSetVpRegisters.
501 */
502typedef enum _HV_REGISTER_NAME
503{
504 HvRegisterExplicitSuspend = 0x00000000,
505 HvRegisterInterceptSuspend,
506
507 HvRegisterHypervisorVersion = 0x00000100, /**< @since v5 */
508
509 HvRegisterPrivilegesAndFeaturesInfo = 0x00000200, /**< @since v5 */
510 HvRegisterFeaturesInfo, /**< @since v5 */
511 HvRegisterImplementationLimitsInfo, /**< @since v5 */
512 HvRegisterHardwareFeaturesInfo, /**< @since v5 */
513
514 HvRegisterGuestCrashP0 = 0x00000210, /**< @since v5 */
515 HvRegisterGuestCrashP1, /**< @since v5 */
516 HvRegisterGuestCrashP2, /**< @since v5 */
517 HvRegisterGuestCrashP3, /**< @since v5 */
518 HvRegisterGuestCrashP4, /**< @since v5 */
519 HvRegisterGuestCrashCtl, /**< @since v5 */
520
521 HvRegisterPowerStateConfigC1 = 0x00000220, /**< @since v5 */
522 HvRegisterPowerStateTriggerC1, /**< @since v5 */
523 HvRegisterPowerStateConfigC2, /**< @since v5 */
524 HvRegisterPowerStateTriggerC2, /**< @since v5 */
525 HvRegisterPowerStateConfigC3, /**< @since v5 */
526 HvRegisterPowerStateTriggerC3, /**< @since v5 */
527
528 HvRegisterSystemReset = 0x00000230, /**< @since v5 */
529
530 HvRegisterProcessorClockFrequency = 0x00000240, /**< @since v5 */
531 HvRegisterInterruptClockFrequency, /**< @since v5 */
532
533 HvRegisterGuestIdle = 0x00000250, /**< @since v5 */
534
535 HvRegisterDebugDeviceOptions = 0x00000260, /**< @since v5 */
536
537 HvRegisterPendingInterruption = 0x00010002,
538 HvRegisterInterruptState,
539 HvRegisterPendingEvent0, /**< @since v5 */
540 HvRegisterPendingEvent1, /**< @since v5 */
541
542 HvX64RegisterRax = 0x00020000,
543 HvX64RegisterRcx,
544 HvX64RegisterRdx,
545 HvX64RegisterRbx,
546 HvX64RegisterRsp,
547 HvX64RegisterRbp,
548 HvX64RegisterRsi,
549 HvX64RegisterRdi,
550 HvX64RegisterR8,
551 HvX64RegisterR9,
552 HvX64RegisterR10,
553 HvX64RegisterR11,
554 HvX64RegisterR12,
555 HvX64RegisterR13,
556 HvX64RegisterR14,
557 HvX64RegisterR15,
558 HvX64RegisterRip,
559 HvX64RegisterRflags,
560
561 HvX64RegisterXmm0 = 0x00030000,
562 HvX64RegisterXmm1,
563 HvX64RegisterXmm2,
564 HvX64RegisterXmm3,
565 HvX64RegisterXmm4,
566 HvX64RegisterXmm5,
567 HvX64RegisterXmm6,
568 HvX64RegisterXmm7,
569 HvX64RegisterXmm8,
570 HvX64RegisterXmm9,
571 HvX64RegisterXmm10,
572 HvX64RegisterXmm11,
573 HvX64RegisterXmm12,
574 HvX64RegisterXmm13,
575 HvX64RegisterXmm14,
576 HvX64RegisterXmm15,
577 HvX64RegisterFpMmx0,
578 HvX64RegisterFpMmx1,
579 HvX64RegisterFpMmx2,
580 HvX64RegisterFpMmx3,
581 HvX64RegisterFpMmx4,
582 HvX64RegisterFpMmx5,
583 HvX64RegisterFpMmx6,
584 HvX64RegisterFpMmx7,
585 HvX64RegisterFpControlStatus,
586 HvX64RegisterXmmControlStatus,
587
588 HvX64RegisterCr0 = 0x00040000,
589 HvX64RegisterCr2,
590 HvX64RegisterCr3,
591 HvX64RegisterCr4,
592 HvX64RegisterCr8,
593 HvX64RegisterXfem,
594
595 HvX64RegisterIntermediateCr0 = 0x00041000, /**< @since v5 */
596 HvX64RegisterIntermediateCr4 = 0x00041003, /**< @since v5 */
597 HvX64RegisterIntermediateCr8, /**< @since v5 */
598
599 HvX64RegisterDr0 = 0x00050000,
600 HvX64RegisterDr1,
601 HvX64RegisterDr2,
602 HvX64RegisterDr3,
603 HvX64RegisterDr6,
604 HvX64RegisterDr7,
605
606 HvX64RegisterEs = 0x00060000,
607 HvX64RegisterCs,
608 HvX64RegisterSs,
609 HvX64RegisterDs,
610 HvX64RegisterFs,
611 HvX64RegisterGs,
612 HvX64RegisterLdtr,
613 HvX64RegisterTr,
614
615 HvX64RegisterIdtr = 0x00070000,
616 HvX64RegisterGdtr,
617
618 HvX64RegisterTsc = 0x00080000,
619 HvX64RegisterEfer,
620 HvX64RegisterKernelGsBase,
621 HvX64RegisterApicBase,
622 HvX64RegisterPat,
623 HvX64RegisterSysenterCs,
624 HvX64RegisterSysenterEip,
625 HvX64RegisterSysenterEsp,
626 HvX64RegisterStar,
627 HvX64RegisterLstar,
628 HvX64RegisterCstar,
629 HvX64RegisterSfmask,
630 HvX64RegisterInitialApicId,
631
632 HvX64RegisterMtrrCap,
633 HvX64RegisterMtrrDefType,
634
635 HvX64RegisterMtrrPhysBase0 = 0x00080010,
636 HvX64RegisterMtrrPhysBase1,
637 HvX64RegisterMtrrPhysBase2,
638 HvX64RegisterMtrrPhysBase3,
639 HvX64RegisterMtrrPhysBase4,
640 HvX64RegisterMtrrPhysBase5,
641 HvX64RegisterMtrrPhysBase6,
642 HvX64RegisterMtrrPhysBase7,
643 HvX64RegisterMtrrPhysBase8, /**< @since v4 */
644 HvX64RegisterMtrrPhysBase9, /**< @since v4 */
645 HvX64RegisterMtrrPhysBaseA, /**< @since v4 */
646 HvX64RegisterMtrrPhysBaseB, /**< @since v4 */
647 HvX64RegisterMtrrPhysBaseC, /**< @since v4 */
648 HvX64RegisterMtrrPhysBaseD, /**< @since v4 */
649 HvX64RegisterMtrrPhysBaseE, /**< @since v4 */
650 HvX64RegisterMtrrPhysBaseF, /**< @since v4 */
651
652 HvX64RegisterMtrrPhysMask0 = 0x00080040,
653 HvX64RegisterMtrrPhysMask1,
654 HvX64RegisterMtrrPhysMask2,
655 HvX64RegisterMtrrPhysMask3,
656 HvX64RegisterMtrrPhysMask4,
657 HvX64RegisterMtrrPhysMask5,
658 HvX64RegisterMtrrPhysMask6,
659 HvX64RegisterMtrrPhysMask7,
660 HvX64RegisterMtrrPhysMask8, /**< @since v4 */
661 HvX64RegisterMtrrPhysMask9, /**< @since v4 */
662 HvX64RegisterMtrrPhysMaskA, /**< @since v4 */
663 HvX64RegisterMtrrPhysMaskB, /**< @since v4 */
664 HvX64RegisterMtrrPhysMaskC, /**< @since v4 */
665 HvX64RegisterMtrrPhysMaskD, /**< @since v4 */
666 HvX64RegisterMtrrPhysMaskE, /**< @since v4 */
667 HvX64RegisterMtrrPhysMaskF, /**< @since v4 */
668
669 HvX64RegisterMtrrFix64k00000 = 0x00080070,
670 HvX64RegisterMtrrFix16k80000,
671 HvX64RegisterMtrrFix16kA0000,
672 HvX64RegisterMtrrFix4kC0000,
673 HvX64RegisterMtrrFix4kC8000,
674 HvX64RegisterMtrrFix4kD0000,
675 HvX64RegisterMtrrFix4kD8000,
676 HvX64RegisterMtrrFix4kE0000,
677 HvX64RegisterMtrrFix4kE8000,
678 HvX64RegisterMtrrFix4kF0000,
679 HvX64RegisterMtrrFix4kF8000,
680
681 HvX64RegisterIa32MiscEnable = 0x000800a0, /**< @since v5 */
682 HvX64RegisterIa32FeatureControl, /**< @since v5 */
683
684 HvX64RegisterVpRuntime = 0x00090000,
685 HvX64RegisterHypercall,
686 HvRegisterGuestOsId,
687 HvRegisterVpIndex,
688 HvRegisterTimeRefCount,
689
690 HvRegisterCpuManagementVersion = 0x00090007, /**< @since v5 */
691
692 HvX64RegisterEoi = 0x00090010,
693 HvX64RegisterIcr,
694 HvX64RegisterTpr,
695 HvRegisterVpAssistPage,
696
697 HvRegisterStatsPartitionRetail = 0x00090020,
698 HvRegisterStatsPartitionInternal,
699 HvRegisterStatsVpRetail,
700 HvRegisterStatsVpInternal,
701
702 HvRegisterSint0 = 0x000a0000,
703 HvRegisterSint1,
704 HvRegisterSint2,
705 HvRegisterSint3,
706 HvRegisterSint4,
707 HvRegisterSint5,
708 HvRegisterSint6,
709 HvRegisterSint7,
710 HvRegisterSint8,
711 HvRegisterSint9,
712 HvRegisterSint10,
713 HvRegisterSint11,
714 HvRegisterSint12,
715 HvRegisterSint13,
716 HvRegisterSint14,
717 HvRegisterSint15,
718 HvRegisterScontrol,
719 HvRegisterSversion,
720 HvRegisterSifp,
721 HvRegisterSipp,
722 HvRegisterEom,
723 HvRegisterSirbp, /**< @since v4 */
724
725 HvRegisterStimer0Config = 0x000b0000,
726 HvRegisterStimer0Count,
727 HvRegisterStimer1Config,
728 HvRegisterStimer1Count,
729 HvRegisterStimer2Config,
730 HvRegisterStimer2Count,
731 HvRegisterStimer3Config,
732 HvRegisterStimer3Count,
733
734 HvX64RegisterYmm0Low = 0x000c0000,
735 HvX64RegisterYmm1Low,
736 HvX64RegisterYmm2Low,
737 HvX64RegisterYmm3Low,
738 HvX64RegisterYmm4Low,
739 HvX64RegisterYmm5Low,
740 HvX64RegisterYmm6Low,
741 HvX64RegisterYmm7Low,
742 HvX64RegisterYmm8Low,
743 HvX64RegisterYmm9Low,
744 HvX64RegisterYmm10Low,
745 HvX64RegisterYmm11Low,
746 HvX64RegisterYmm12Low,
747 HvX64RegisterYmm13Low,
748 HvX64RegisterYmm14Low,
749 HvX64RegisterYmm15Low,
750 HvX64RegisterYmm0High,
751 HvX64RegisterYmm1High,
752 HvX64RegisterYmm2High,
753 HvX64RegisterYmm3High,
754 HvX64RegisterYmm4High,
755 HvX64RegisterYmm5High,
756 HvX64RegisterYmm6High,
757 HvX64RegisterYmm7High,
758 HvX64RegisterYmm8High,
759 HvX64RegisterYmm9High,
760 HvX64RegisterYmm10High,
761 HvX64RegisterYmm11High,
762 HvX64RegisterYmm12High,
763 HvX64RegisterYmm13High,
764 HvX64RegisterYmm14High,
765 HvX64RegisterYmm15High,
766
767 HvRegisterVsmVpVtlControl = 0x000d0000,
768
769 HvRegisterVsmCodePageOffsets = 0x000d0002,
770 HvRegisterVsmVpStatus,
771 HvRegisterVsmPartitionStatus,
772 HvRegisterVsmVina,
773 HvRegisterVsmCapabilities,
774 HvRegisterVsmPartitionConfig,
775
776 HvRegisterVsmVpSecureConfigVtl0 = 0x000d0010, /**< @since v5 */
777 HvRegisterVsmVpSecureConfigVtl1, /**< @since v5 */
778 HvRegisterVsmVpSecureConfigVtl2, /**< @since v5 */
779 HvRegisterVsmVpSecureConfigVtl3, /**< @since v5 */
780 HvRegisterVsmVpSecureConfigVtl4, /**< @since v5 */
781 HvRegisterVsmVpSecureConfigVtl5, /**< @since v5 */
782 HvRegisterVsmVpSecureConfigVtl6, /**< @since v5 */
783 HvRegisterVsmVpSecureConfigVtl7, /**< @since v5 */
784 HvRegisterVsmVpSecureConfigVtl8, /**< @since v5 */
785 HvRegisterVsmVpSecureConfigVtl9, /**< @since v5 */
786 HvRegisterVsmVpSecureConfigVtl10, /**< @since v5 */
787 HvRegisterVsmVpSecureConfigVtl11, /**< @since v5 */
788 HvRegisterVsmVpSecureConfigVtl12, /**< @since v5 */
789 HvRegisterVsmVpSecureConfigVtl13, /**< @since v5 */
790 HvRegisterVsmVpSecureConfigVtl14 /**< @since v5 */
791
792} HV_REGISTER_NAME;
793AssertCompile(HvRegisterInterceptSuspend == 0x00000001);
794AssertCompile(HvRegisterPendingEvent1 == 0x00010005);
795AssertCompile(HvX64RegisterRflags == 0x00020011);
796AssertCompile(HvX64RegisterXmmControlStatus == 0x00030019);
797AssertCompile(HvX64RegisterXfem == 0x00040005);
798AssertCompile(HvX64RegisterIntermediateCr0 == 0x00041000);
799AssertCompile(HvX64RegisterIntermediateCr4 == 0x00041003);
800AssertCompile(HvX64RegisterDr7 == 0x00050005);
801AssertCompile(HvX64RegisterTr == 0x00060007);
802AssertCompile(HvX64RegisterGdtr == 0x00070001);
803AssertCompile(HvX64RegisterInitialApicId == 0x0008000c);
804AssertCompile(HvX64RegisterMtrrDefType == 0x0008000e);
805AssertCompile(HvX64RegisterMtrrPhysBaseF == 0x0008001f);
806AssertCompile(HvX64RegisterMtrrPhysMaskF == 0x0008004f);
807AssertCompile(HvX64RegisterMtrrFix4kF8000 == 0x0008007a);
808AssertCompile(HvRegisterTimeRefCount == 0x00090004);
809AssertCompile(HvRegisterCpuManagementVersion == 0x00090007);
810AssertCompile(HvRegisterVpAssistPage == 0x00090013);
811AssertCompile(HvRegisterStatsVpInternal == 0x00090023);
812AssertCompile(HvRegisterSirbp == 0x000a0015);
813AssertCompile(HvRegisterStimer3Count == 0x000b0007);
814AssertCompile(HvX64RegisterYmm15High == 0x000c001f);
815AssertCompile(HvRegisterVsmVpSecureConfigVtl14 == 0x000d001e);
816AssertCompileSize(HV_REGISTER_NAME, 4);
817
818
819/** Value format for HvRegisterExplicitSuspend. */
820typedef union
821{
822 uint64_t AsUINT64;
823 struct
824 {
825 uint64_t Suspended : 1;
826 uint64_t Reserved : 63;
827 };
828} HV_EXPLICIT_SUSPEND_REGISTER;
829/** Pointer to a value of HvRegisterExplicitSuspend. */
830typedef HV_EXPLICIT_SUSPEND_REGISTER *PHV_EXPLICIT_SUSPEND_REGISTER;
831
832/** Value format for HvRegisterInterceptSuspend. */
833typedef union
834{
835 uint64_t AsUINT64;
836 struct
837 {
838 uint64_t Suspended : 1;
839 uint64_t TlbLocked : 1;
840 uint64_t Reserved : 62;
841 };
842} HV_INTERCEPT_SUSPEND_REGISTER;
843/** Pointer to a value of HvRegisterInterceptSuspend. */
844typedef HV_INTERCEPT_SUSPEND_REGISTER *PHV_INTERCEPT_SUSPEND_REGISTER;
845
846/** Value format for HvRegisterInterruptState.
847 * @sa WHV_X64_INTERRUPT_STATE_REGISTER */
848typedef union
849{
850 uint64_t AsUINT64;
851 struct
852 {
853 uint64_t InterruptShadow : 1;
854 uint64_t NmiMasked : 1;
855 uint64_t Reserved : 62;
856 };
857} HV_X64_INTERRUPT_STATE_REGISTER;
858/** Pointer to a value of HvRegisterInterruptState. */
859typedef HV_X64_INTERRUPT_STATE_REGISTER *PHV_X64_INTERRUPT_STATE_REGISTER;
860
861/** Pending exception type for HvRegisterPendingInterruption.
862 * @sa WHV_X64_PENDING_INTERRUPTION_TYPE */
863typedef enum
864{
865 HvX64PendingInterrupt = 0,
866 /* what is/was 1? */
867 HvX64PendingNmi = 2,
868 HvX64PendingException
869 /* any more? */
870} HV_X64_PENDING_INTERRUPTION_TYPE;
871
872/** Value format for HvRegisterPendingInterruption.
873 * @sa WHV_X64_PENDING_INTERRUPTION_REGISTER */
874typedef union
875{
876 uint64_t AsUINT64;
877 struct
878 {
879 uint32_t InterruptionPending : 1;
880 uint32_t InterruptionType : 3; /**< HV_X64_PENDING_INTERRUPTION_TYPE */
881 uint32_t DeliverErrorCode : 1;
882 uint32_t InstructionLength : 4; /**< @since v5? Wasn't in 7600 WDK */
883 uint32_t NestedEvent : 1; /**< @since v5? Wasn't in 7600 WDK */
884 uint32_t Reserved : 6;
885 uint32_t InterruptionVector : 16;
886 uint32_t ErrorCode;
887 };
888} HV_X64_PENDING_INTERRUPTION_REGISTER;
889/** Pointer to a value of HvRegisterPendingInterruption. */
890typedef HV_X64_PENDING_INTERRUPTION_REGISTER *PHV_X64_PENDING_INTERRUPTION_REGISTER;
891
892/** Value format for HvRegisterPendingEvent0/1.
893 * @sa WHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER */
894typedef union
895{
896 uint64_t AsUINT64;
897 struct
898 {
899 uint64_t NmiNotification : 1;
900 uint64_t InterruptNotification : 1;
901 uint64_t InterruptPriority : 4;
902 uint64_t Reserved : 58;
903 };
904} HV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER;
905/** Pointer to a value of HvRegisterPendingEvent0/1. */
906typedef HV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER *PHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER;
907
908
909/** Value format for HvX64RegisterEs..Tr.
910 * @sa WHV_X64_SEGMENT_REGISTER */
911typedef struct _HV_X64_SEGMENT_REGISTER
912{
913 uint64_t Base;
914 uint32_t Limit;
915 uint16_t Selector;
916 union
917 {
918 struct
919 {
920 uint16_t SegmentType : 4;
921 uint16_t NonSystemSegment : 1;
922 uint16_t DescriptorPrivilegeLevel : 2;
923 uint16_t Present : 1;
924 uint16_t Reserved : 4;
925 uint16_t Available : 1;
926 uint16_t Long : 1;
927 uint16_t Default : 1;
928 uint16_t Granularity : 1;
929 };
930 uint16_t Attributes;
931 };
932} HV_X64_SEGMENT_REGISTER;
933AssertCompileSize(HV_X64_SEGMENT_REGISTER, 16);
934/** Pointer to a value of HvX64RegisterEs..Tr. */
935typedef HV_X64_SEGMENT_REGISTER *PHV_X64_SEGMENT_REGISTER;
936
937/** Value format for HvX64RegisterIdtr/Gdtr.
938 * @sa WHV_X64_TABLE_REGISTER */
939typedef struct
940{
941 uint16_t Pad[3];
942 uint16_t Limit;
943 uint64_t Base;
944} HV_X64_TABLE_REGISTER;
945AssertCompileSize(HV_X64_TABLE_REGISTER, 16);
946/** Pointer to a value of HvX64RegisterIdtr/Gdtrr. */
947typedef HV_X64_TABLE_REGISTER *PHV_X64_TABLE_REGISTER;
948
949/** Value format for HvX64RegisterFpMmx0..7 in floating pointer mode.
950 * @sa WHV_X64_FP_REGISTER, RTFLOAT80U2 */
951typedef union
952{
953 HV_UINT128 AsUINT128;
954 struct
955 {
956 uint64_t Mantissa;
957 uint64_t BiasedExponent : 15;
958 uint64_t Sign : 1;
959 uint64_t Reserved : 48;
960 };
961} HV_X64_FP_REGISTER;
962/** Pointer to a value of HvX64RegisterFpMmx0..7 in floating point mode. */
963typedef HV_X64_FP_REGISTER *PHV_X64_FP_REGISTER;
964
965/** Value union for HvX64RegisterFpMmx0..7. */
966typedef union
967{
968 HV_UINT128 AsUINT128;
969 HV_X64_FP_REGISTER Fp;
970 uint64_t Mmx;
971} HV_X64_FP_MMX_REGISTER;
972/** Pointer to a value of HvX64RegisterFpMmx0..7. */
973typedef HV_X64_FP_MMX_REGISTER *PHV_X64_FP_MMX_REGISTER;
974
975/** Value format for HvX64RegisterFpControlStatus.
976 * @sa WHV_X64_FP_CONTROL_STATUS_REGISTER */
977typedef union
978{
979 HV_UINT128 AsUINT128;
980 struct
981 {
982 uint16_t FpControl;
983 uint16_t FpStatus;
984 uint8_t FpTag;
985 uint8_t IgnNe : 1;
986 uint8_t Reserved : 7;
987 uint16_t LastFpOp;
988 union
989 {
990 uint64_t LastFpRip;
991 struct
992 {
993 uint32_t LastFpEip;
994 uint16_t LastFpCs;
995 };
996 };
997 };
998} HV_X64_FP_CONTROL_STATUS_REGISTER;
999/** Pointer to a value of HvX64RegisterFpControlStatus. */
1000typedef HV_X64_FP_CONTROL_STATUS_REGISTER *PHV_X64_FP_CONTROL_STATUS_REGISTER;
1001
1002/** Value format for HvX64RegisterXmmControlStatus.
1003 * @sa WHV_X64_XMM_CONTROL_STATUS_REGISTER */
1004typedef union
1005{
1006 HV_UINT128 AsUINT128;
1007 struct
1008 {
1009 union
1010 {
1011 uint64_t LastFpRdp;
1012 struct
1013 {
1014 uint32_t LastFpDp;
1015 uint16_t LastFpDs;
1016 };
1017 };
1018 uint32_t XmmStatusControl;
1019 uint32_t XmmStatusControlMask;
1020 };
1021} HV_X64_XMM_CONTROL_STATUS_REGISTER;
1022/** Pointer to a value of HvX64RegisterXmmControlStatus. */
1023typedef HV_X64_XMM_CONTROL_STATUS_REGISTER *PHV_X64_XMM_CONTROL_STATUS_REGISTER;
1024
1025/** Register value union.
1026 * @sa WHV_REGISTER_VALUE */
1027typedef union
1028{
1029 HV_UINT128 Reg128;
1030 uint64_t Reg64;
1031 uint32_t Reg32;
1032 uint16_t Reg16;
1033 uint8_t Reg8;
1034 HV_EXPLICIT_SUSPEND_REGISTER ExplicitSuspend;
1035 HV_INTERCEPT_SUSPEND_REGISTER InterceptSuspend;
1036 HV_X64_INTERRUPT_STATE_REGISTER InterruptState;
1037 HV_X64_PENDING_INTERRUPTION_REGISTER PendingInterruption;
1038 HV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER DeliverabilityNotifications;
1039 HV_X64_TABLE_REGISTER Table;
1040 HV_X64_SEGMENT_REGISTER Segment;
1041 HV_X64_FP_REGISTER Fp;
1042 HV_X64_FP_CONTROL_STATUS_REGISTER FpControlStatus;
1043 HV_X64_XMM_CONTROL_STATUS_REGISTER XmmControlStatus;
1044} HV_REGISTER_VALUE;
1045AssertCompileSize(HV_REGISTER_VALUE, 16);
1046/** Pointer to a Hyper-V register value union. */
1047typedef HV_REGISTER_VALUE *PHV_REGISTER_VALUE;
1048/** Pointer to a const Hyper-V register value union. */
1049typedef HV_REGISTER_VALUE const *PCHV_REGISTER_VALUE;
1050
1051
1052/** Input for HvCallGetVpRegister. */
1053typedef struct
1054{
1055 HV_PARTITION_ID PartitionId;
1056 HV_VP_INDEX VpIndex;
1057 /** Was this introduced after v2? Dunno what it it really is. */
1058 uint32_t fFlags;
1059 /* The repeating part: */
1060 HV_REGISTER_NAME Names[RT_FLEXIBLE_ARRAY];
1061} HV_INPUT_GET_VP_REGISTERS;
1062AssertCompileMemberOffset(HV_INPUT_GET_VP_REGISTERS, Names, 16);
1063/** Pointer to input for HvCallGetVpRegister. */
1064typedef HV_INPUT_GET_VP_REGISTERS *PHV_INPUT_GET_VP_REGISTERS;
1065/* Output for HvCallGetVpRegister is an array of HV_REGISTER_VALUE parallel to HV_INPUT_GET_VP_REGISTERS::Names. */
1066
1067
1068/** Register and value pair for HvCallSetVpRegister. */
1069typedef struct
1070{
1071 HV_REGISTER_NAME Name;
1072 uint32_t Pad0;
1073 uint64_t Pad1;
1074 HV_REGISTER_VALUE Value;
1075} HV_REGISTER_ASSOC;
1076AssertCompileSize(HV_REGISTER_ASSOC, 32);
1077AssertCompileMemberOffset(HV_REGISTER_ASSOC, Value, 16);
1078/** Pointer to a register and value pair for HvCallSetVpRegister. */
1079typedef HV_REGISTER_ASSOC *PHV_REGISTER_ASSOC;
1080/** Helper for clearing the alignment padding members. */
1081#define HV_REGISTER_ASSOC_ZERO_PADDING(a_pRegAssoc) do { (a_pRegAssoc)->Pad0 = 0; (a_pRegAssoc)->Pad1 = 0; } while (0)
1082/** Helper for clearing the alignment padding members and the high 64-bit
1083 * part of the value. */
1084#define HV_REGISTER_ASSOC_ZERO_PADDING_AND_HI64(a_pRegAssoc) \
1085 do { (a_pRegAssoc)->Pad0 = 0; (a_pRegAssoc)->Pad1 = 0; (a_pRegAssoc)->Value.Reg128.High64 = 0; } while (0)
1086
1087/** Input for HvCallSetVpRegister. */
1088typedef struct
1089{
1090 HV_PARTITION_ID PartitionId;
1091 HV_VP_INDEX VpIndex;
1092 uint32_t RsvdZ;
1093 /* The repeating part: */
1094 HV_REGISTER_ASSOC Elements[RT_FLEXIBLE_ARRAY];
1095} HV_INPUT_SET_VP_REGISTERS;
1096AssertCompileMemberOffset(HV_INPUT_SET_VP_REGISTERS, Elements, 16);
1097/** Pointer to input for HvCallSetVpRegister. */
1098typedef HV_INPUT_SET_VP_REGISTERS *PHV_INPUT_SET_VP_REGISTERS;
1099
1100
1101
1102/**
1103 * Hyper-V SyncIC message types.
1104 */
1105typedef enum
1106{
1107 HvMessageTypeNone = 0x00000000,
1108
1109 HvMessageTypeUnmappedGpa = 0x80000000,
1110 HvMessageTypeGpaIntercept,
1111
1112 HvMessageTimerExpired = 0x80000010,
1113
1114 HvMessageTypeInvalidVpRegisterValue = 0x80000020,
1115 HvMessageTypeUnrecoverableException,
1116 HvMessageTypeUnsupportedFeature,
1117 HvMessageTypeTlbPageSizeMismatch, /**< @since v5 */
1118
1119 /** @note Same as HvMessageTypeX64ApicEoi? Gone in 5.0. Missing from 7600 WDK
1120 * headers even if it's in the 2.0 docs. */
1121 HvMessageTypeApicEoi = 0x80000030,
1122 /** @note Same as HvMessageTypeX64LegacyFpError? Gone in 5.0, whereas 4.0b
1123 * calls it HvMessageTypeX64LegacyFpError. Missing from 7600 WDK
1124 * headers even if it's in the 2.0 docs. */
1125 HvMessageTypeFerrAsserted,
1126
1127 HvMessageTypeEventLogBufferComplete = 0x80000040,
1128
1129 HvMessageTypeX64IoPortIntercept = 0x80010000,
1130 HvMessageTypeX64MsrIntercept,
1131 HvMessageTypeX64CpuidIntercept,
1132 HvMessageTypeX64ExceptionIntercept,
1133 /** @note Appeared in 5.0 docs, but were here in 7600 WDK headers already. */
1134 HvMessageTypeX64ApicEoi,
1135 /** @note Appeared in 5.0 docs, but were here in 7600 WDK headers already. */
1136 HvMessageTypeX64LegacyFpError,
1137 /** @since v5 */
1138 HvMessageTypeX64RegisterIntercept,
1139 /** @since WinHvPlatform? */
1140 HvMessageTypeX64Halt,
1141 /** @since WinHvPlatform? */
1142 HvMessageTypeX64InterruptWindow
1143
1144} HV_MESSAGE_TYPE;
1145AssertCompileSize(HV_MESSAGE_TYPE, 4);
1146AssertCompile(HvMessageTypeX64RegisterIntercept == 0x80010006);
1147AssertCompile(HvMessageTypeX64Halt == 0x80010007);
1148AssertCompile(HvMessageTypeX64InterruptWindow == 0x80010008);
1149/** Pointer to a Hyper-V SyncIC message type. */
1150typedef HV_MESSAGE_TYPE *PHV_MESSAGE_TYPE;
1151
1152/** Flag set for hypervisor messages, guest cannot send messages with this
1153 * flag set. */
1154#define HV_MESSAGE_TYPE_HYPERVISOR_MASK UINT32_C(0x80000000)
1155
1156/** Hyper-V SynIC message size (they are fixed sized). */
1157#define HV_MESSAGE_SIZE 256
1158/** Maximum Hyper-V SynIC message payload size in bytes. */
1159#define HV_MESSAGE_MAX_PAYLOAD_BYTE_COUNT (HV_MESSAGE_SIZE - 16)
1160/** Maximum Hyper-V SynIC message payload size in QWORDs (uint64_t). */
1161#define HV_MESSAGE_MAX_PAYLOAD_QWORD_COUNT (HV_MESSAGE_MAX_PAYLOAD_BYTE_COUNT / 8)
1162
1163/** SynIC message flags. */
1164typedef union
1165{
1166 uint8_t AsUINT8;
1167 struct
1168 {
1169 /** Messages are pending in the queue. */
1170 uint8_t MessagePending : 1;
1171 uint8_t Reserved : 7;
1172 };
1173} HV_MESSAGE_FLAGS;
1174AssertCompileSize(HV_MESSAGE_FLAGS, 1);
1175
1176/** SynIC message header. */
1177typedef struct
1178{
1179 HV_MESSAGE_TYPE MessageType;
1180 /** The 2.0-5.0b docs all have this incorrectly switched with 'Reserved', WDK 7600 got it right. */
1181 uint8_t PayloadSize;
1182 HV_MESSAGE_FLAGS MessageFlags;
1183 uint16_t Reserved;
1184 union
1185 {
1186 uint64_t OriginationId;
1187 HV_PARTITION_ID Sender;
1188 HV_PORT_ID Port;
1189 };
1190} HV_MESSAGE_HEADER;
1191AssertCompileSize(HV_MESSAGE_HEADER, 16);
1192/** Pointer to a Hyper-V message header. */
1193typedef HV_MESSAGE_HEADER *PHV_MESSAGE_HEADER;
1194/** Pointer to a const Hyper-V message header. */
1195typedef HV_MESSAGE_HEADER const *PCHV_MESSAGE_HEADER;
1196
1197
1198
1199/** @name Intercept access type.
1200 * @{ */
1201typedef uint8_t HV_INTERCEPT_ACCESS_TYPE;
1202#define HV_INTERCEPT_ACCESS_READ 0
1203#define HV_INTERCEPT_ACCESS_WRITE 1
1204#define HV_INTERCEPT_ACCESS_EXECUTE 2
1205/** @} */
1206
1207/** @name Intercept access type mask.
1208 * @{ */
1209typedef uint32_t HV_INTERCEPT_ACCESS_TYPE_MASK;
1210#define HV_INTERCEPT_ACCESS_MASK_NONE 0
1211#define HV_INTERCEPT_ACCESS_MASK_READ 1
1212#define HV_INTERCEPT_ACCESS_MASK_WRITE 2
1213#define HV_INTERCEPT_ACCESS_MASK_EXECUTE 4
1214/** @} */
1215
1216/** X64 intercept execution state.
1217 * @sa WHV_X64_VP_EXECUTION_STATE */
1218typedef union
1219{
1220 uint16_t AsUINT16;
1221 struct
1222 {
1223 uint16_t Cpl : 2;
1224 uint16_t Cr0Pe : 1;
1225 uint16_t Cr0Am : 1;
1226 uint16_t EferLma : 1;
1227 uint16_t DebugActive : 1;
1228 uint16_t InterruptionPending : 1;
1229 uint16_t Reserved0 : 5;
1230 uint16_t InterruptShadow : 1;
1231 uint16_t Reserved1 : 3;
1232 };
1233} HV_X64_VP_EXECUTION_STATE;
1234AssertCompileSize(HV_X64_VP_EXECUTION_STATE, 2);
1235/** Pointer to X86 intercept execution state. */
1236typedef HV_X64_VP_EXECUTION_STATE *PHV_X64_VP_EXECUTION_STATE;
1237/** Pointer to const X86 intercept execution state. */
1238typedef HV_X64_VP_EXECUTION_STATE const *PCHV_X64_VP_EXECUTION_STATE;
1239
1240/** X64 intercept message header. */
1241typedef struct
1242{
1243 HV_VP_INDEX VpIndex; /**< 0x00 */
1244 uint8_t InstructionLength; /**< 0x04: Zero if not available, instruction fetch exit, ... */
1245 HV_INTERCEPT_ACCESS_TYPE InterceptAccessType; /**< 0x05 */
1246 HV_X64_VP_EXECUTION_STATE ExecutionState; /**< 0x06 */
1247 HV_X64_SEGMENT_REGISTER CsSegment; /**< 0x08 */
1248 uint64_t Rip; /**< 0x18 */
1249 uint64_t Rflags; /**< 0x20 */
1250} HV_X64_INTERCEPT_MESSAGE_HEADER;
1251AssertCompileSize(HV_X64_INTERCEPT_MESSAGE_HEADER, 40);
1252/** Pointer to a x86 intercept message header. */
1253typedef HV_X64_INTERCEPT_MESSAGE_HEADER *PHV_X64_INTERCEPT_MESSAGE_HEADER;
1254
1255
1256/** X64 memory access flags (HvMessageTypeGpaIntercept, HvMessageTypeUnmappedGpa).
1257 * @sa WHV_MEMORY_ACCESS_INFO */
1258typedef union
1259{
1260 uint8_t AsUINT8;
1261 struct
1262 {
1263 uint8_t GvaValid : 1;
1264 uint8_t Reserved : 7;
1265 };
1266} HV_X64_MEMORY_ACCESS_INFO;
1267AssertCompileSize(HV_X64_MEMORY_ACCESS_INFO, 1);
1268
1269/** The payload format for HvMessageTypeGpaIntercept and HvMessageTypeUnmappedGpa.
1270 * @sa WHV_MEMORY_ACCESS_CONTEXT
1271 * @note max message size. */
1272typedef struct
1273{
1274 HV_X64_INTERCEPT_MESSAGE_HEADER Header; /**< 0x00 */
1275 HV_CACHE_TYPE CacheType; /**< 0x28 */
1276 uint8_t InstructionByteCount; /**< 0x2c */
1277 HV_X64_MEMORY_ACCESS_INFO MemoryAccessInfo; /**< 0x2d */
1278 uint16_t Reserved1; /**< 0x2e */
1279 uint64_t GuestVirtualAddress; /**< 0x30 */
1280 uint64_t GuestPhysicalAddress; /**< 0x38 */
1281 uint8_t InstructionBytes[16]; /**< 0x40 */
1282 /* We don't the following (v5 / WinHvPlatform): */
1283 HV_X64_SEGMENT_REGISTER DsSegment; /**< 0x50 */
1284 HV_X64_SEGMENT_REGISTER SsSegment; /**< 0x60 */
1285 uint64_t Rax; /**< 0x70 */
1286 uint64_t Rcx; /**< 0x78 */
1287 uint64_t Rdx; /**< 0x80 */
1288 uint64_t Rbx; /**< 0x88 */
1289 uint64_t Rsp; /**< 0x90 */
1290 uint64_t Rbp; /**< 0x98 */
1291 uint64_t Rsi; /**< 0xa0 */
1292 uint64_t Rdi; /**< 0xa8 */
1293 uint64_t R8; /**< 0xb0 */
1294 uint64_t R9; /**< 0xb8 */
1295 uint64_t R10; /**< 0xc0 */
1296 uint64_t R11; /**< 0xc8 */
1297 uint64_t R12; /**< 0xd0 */
1298 uint64_t R13; /**< 0xd8 */
1299 uint64_t R14; /**< 0xe0 */
1300 uint64_t R15; /**< 0xe8 */
1301} HV_X64_MEMORY_INTERCEPT_MESSAGE;
1302AssertCompileSize(HV_X64_MEMORY_INTERCEPT_MESSAGE, 0xf0);
1303AssertCompileMemberOffset(HV_X64_MEMORY_INTERCEPT_MESSAGE, DsSegment, 0x50);
1304/** Pointer to a HvMessageTypeGpaIntercept or HvMessageTypeUnmappedGpa payload. */
1305typedef HV_X64_MEMORY_INTERCEPT_MESSAGE *PHV_X64_MEMORY_INTERCEPT_MESSAGE;
1306/** Pointer to a const HvMessageTypeGpaIntercept or HvMessageTypeUnmappedGpa payload. */
1307typedef HV_X64_MEMORY_INTERCEPT_MESSAGE const *PCHV_X64_MEMORY_INTERCEPT_MESSAGE;
1308
1309
1310/** X64 I/O port access information (HvMessageTypeX64IoPortIntercept). */
1311typedef union HV_X64_IO_PORT_ACCESS_INFO
1312{
1313 uint8_t AsUINT8;
1314 struct
1315 {
1316 uint8_t AccessSize : 3;
1317 uint8_t StringOp : 1;
1318 uint8_t RepPrefix : 1;
1319 uint8_t Reserved : 3;
1320 };
1321} HV_X64_IO_PORT_ACCESS_INFO;
1322AssertCompileSize(HV_X64_IO_PORT_ACCESS_INFO, 1);
1323
1324/** The payload format for HvMessageTypeX64IoPortIntercept. */
1325typedef struct _HV_X64_IO_PORT_INTERCEPT_MESSAGE
1326{
1327 HV_X64_INTERCEPT_MESSAGE_HEADER Header; /**< 0x00 */
1328 uint16_t PortNumber; /**< 0x28 */
1329 HV_X64_IO_PORT_ACCESS_INFO AccessInfo; /**< 0x2a */
1330 uint8_t InstructionByteCount; /**< 0x2b */
1331 uint32_t Reserved; /**< 0x2c */
1332 uint64_t Rax; /**< 0x30 */
1333 uint8_t InstructionBytes[16]; /**< 0x38 */
1334 HV_X64_SEGMENT_REGISTER DsSegment; /**< 0x48 */
1335 HV_X64_SEGMENT_REGISTER EsSegment; /**< 0x58 */
1336 uint64_t Rcx; /**< 0x68 */
1337 uint64_t Rsi; /**< 0x70 */
1338 uint64_t Rdi; /**< 0x78 */
1339} HV_X64_IO_PORT_INTERCEPT_MESSAGE;
1340AssertCompileSize(HV_X64_IO_PORT_INTERCEPT_MESSAGE, 128);
1341/** Pointer to a HvMessageTypeX64IoPortIntercept payload. */
1342typedef HV_X64_IO_PORT_INTERCEPT_MESSAGE *PHV_X64_IO_PORT_INTERCEPT_MESSAGE;
1343/** Pointer to a const HvMessageTypeX64IoPortIntercept payload. */
1344typedef HV_X64_IO_PORT_INTERCEPT_MESSAGE const *PCHV_X64_IO_PORT_INTERCEPT_MESSAGE;
1345
1346/** Full I/O port message. */
1347typedef struct
1348{
1349 HV_MESSAGE_HEADER MsgHdr;
1350 HV_X64_IO_PORT_INTERCEPT_MESSAGE Payload;
1351} HV_X64_IO_PORT_INTERCEPT_MESSAGE_FULL;
1352
1353
1354/** X64 exception information (HvMessageTypeX64ExceptionIntercept).
1355 * @sa WHV_VP_EXCEPTION_INFO */
1356typedef union
1357{
1358 uint8_t AsUINT8;
1359 struct
1360 {
1361 uint8_t ErrorCodeValid : 1;
1362 /** @todo WHV_VP_EXCEPTION_INFO::SoftwareException */
1363 uint8_t Reserved : 7;
1364 };
1365} HV_X64_EXCEPTION_INFO;
1366AssertCompileSize(HV_X64_EXCEPTION_INFO, 1);
1367
1368/** The payload format for HvMessageTypeX64ExceptionIntercept.
1369 * @sa WHV_VP_EXCEPTION_CONTEXT
1370 * @note max message size. */
1371typedef struct
1372{
1373 HV_X64_INTERCEPT_MESSAGE_HEADER Header; /**< 0x00 */
1374 uint16_t ExceptionVector; /**< 0x28 */
1375 HV_X64_EXCEPTION_INFO ExceptionInfo; /**< 0x2a */
1376 uint8_t InstructionByteCount; /**< 0x2b */
1377 uint32_t ErrorCode; /**< 0x2c */
1378 uint64_t ExceptionParameter; /**< 0x30 */
1379 uint64_t Reserved; /**< 0x38 */
1380 uint8_t InstructionBytes[16]; /**< 0x40 */
1381 HV_X64_SEGMENT_REGISTER DsSegment; /**< 0x50 */
1382 HV_X64_SEGMENT_REGISTER SsSegment; /**< 0x60 */
1383 uint64_t Rax; /**< 0x70 */
1384 uint64_t Rcx; /**< 0x78 */
1385 uint64_t Rdx; /**< 0x80 */
1386 uint64_t Rbx; /**< 0x88 */
1387 uint64_t Rsp; /**< 0x90 */
1388 uint64_t Rbp; /**< 0x98 */
1389 uint64_t Rsi; /**< 0xa0 */
1390 uint64_t Rdi; /**< 0xa8 */
1391 uint64_t R8; /**< 0xb0 */
1392 uint64_t R9; /**< 0xb8 */
1393 uint64_t R10; /**< 0xc0 */
1394 uint64_t R11; /**< 0xc8 */
1395 uint64_t R12; /**< 0xd0 */
1396 uint64_t R13; /**< 0xd8 */
1397 uint64_t R14; /**< 0xe0 */
1398 uint64_t R15; /**< 0xe8 */
1399} HV_X64_EXCEPTION_INTERCEPT_MESSAGE;
1400AssertCompileSize(HV_X64_EXCEPTION_INTERCEPT_MESSAGE, 0xf0);
1401/** Pointer to a HvMessageTypeX64ExceptionIntercept payload. */
1402typedef HV_X64_EXCEPTION_INTERCEPT_MESSAGE *PHV_X64_EXCEPTION_INTERCEPT_MESSAGE;
1403/** Pointer to a ocnst HvMessageTypeX64ExceptionIntercept payload. */
1404typedef HV_X64_EXCEPTION_INTERCEPT_MESSAGE const *PCHV_X64_EXCEPTION_INTERCEPT_MESSAGE;
1405
1406
1407/**
1408 * The payload format for HvMessageTypeX64Halt,
1409 *
1410 * @note This message does not include HV_X64_INTERCEPT_MESSAGE_HEADER!
1411 */
1412typedef struct
1413{
1414 /** Seems to be a zero 64-bit field here. */
1415 uint64_t u64Reserved;
1416} HV_X64_HALT_MESSAGE;
1417/** Pointer to a HvMessageTypeX64Halt payload. */
1418typedef HV_X64_HALT_MESSAGE *PHV_X64_HALT_MESSAGE;
1419/** Pointer to a const HvMessageTypeX64Halt payload. */
1420typedef HV_X64_HALT_MESSAGE const *PCHV_X64_HALT_MESSAGE;
1421
1422/** Full HvMessageTypeX64Halt message. */
1423typedef struct
1424{
1425 HV_MESSAGE_HEADER MsgHdr;
1426 HV_X64_HALT_MESSAGE Payload;
1427} HV_X64_HALT_MESSAGE_FULL;
1428
1429
1430
1431/** Hyper-V SynIC message. */
1432typedef struct
1433{
1434 HV_MESSAGE_HEADER Header;
1435 /** 0x10 */
1436 union
1437 {
1438 uint64_t Payload[HV_MESSAGE_MAX_PAYLOAD_QWORD_COUNT];
1439
1440 /** Common header for X64 intercept messages. */
1441 HV_X64_INTERCEPT_MESSAGE_HEADER X64InterceptHeader;
1442 /** HvMessageTypeGpaIntercept, HvMessageTypeUnmappedGpa. */
1443 HV_X64_MEMORY_INTERCEPT_MESSAGE X64MemoryIntercept;
1444 /** HvMessageTypeX64IoPortIntercept */
1445 HV_X64_IO_PORT_INTERCEPT_MESSAGE X64IoPortIntercept;
1446 /** HvMessageTypeX64ExceptionIntercept */
1447 HV_X64_EXCEPTION_INTERCEPT_MESSAGE X64ExceptionIntercept;
1448 /** HvMessageTypeX64Halt. */
1449 HV_X64_HALT_MESSAGE X64Halt;
1450 };
1451} HV_MESSAGE;
1452AssertCompileSize(HV_MESSAGE, HV_MESSAGE_SIZE);
1453/** Pointer to a Hyper-V SynIC message. */
1454typedef HV_MESSAGE *PHV_MESSAGE;
1455/** Pointer to const a Hyper-V SynIC message. */
1456typedef HV_MESSAGE const *PCHV_MESSAGE;
1457
1458#endif
1459
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