vm.h@ 70953

最後變更在這個檔案從70953是 70953,由 vboxsync 提交於 7 年前
VMM: Clarified docs on fRecompilerUser/Supervisor and did some related cleanups.
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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2017 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.alldomusa.eu.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef ___VBox_vmm_vm_h
27	#define ___VBox_vmm_vm_h
28
29	#ifndef VBOX_FOR_DTRACE_LIB
30	# include <iprt/param.h>
31	# include <VBox/types.h>
32	# include <VBox/vmm/cpum.h>
33	# include <VBox/vmm/stam.h>
34	# include <VBox/vmm/vmapi.h>
35	# include <VBox/vmm/vmm.h>
36	# include <VBox/sup.h>
37	#else
38	# pragma D depends_on library vbox-types.d
39	# pragma D depends_on library CPUMInternal.d
40	# define ___CPUMInternal_h
41	#endif
42
43
44
45	/** @defgroup grp_vm The Virtual Machine
46	* @ingroup grp_vmm
47	* @{
48	*/
49
50	/**
51	* The state of a Virtual CPU.
52	*
53	* The basic state indicated here is whether the CPU has been started or not. In
54	* addition, there are sub-states when started for assisting scheduling (GVMM
55	* mostly).
56	*
57	* The transition out of the STOPPED state is done by a vmR3PowerOn.
58	* The transition back to the STOPPED state is done by vmR3PowerOff.
59	*
60	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
61	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
62	*/
63	typedef enum VMCPUSTATE
64	{
65	/** The customary invalid zero. */
66	VMCPUSTATE_INVALID = 0,
67
68	/** Virtual CPU has not yet been started. */
69	VMCPUSTATE_STOPPED,
70
71	/** CPU started. */
72	VMCPUSTATE_STARTED,
73	/** CPU started in HM context. */
74	VMCPUSTATE_STARTED_HM,
75	/** Executing guest code and can be poked (RC or STI bits of HM). */
76	VMCPUSTATE_STARTED_EXEC,
77	/** Executing guest code in the recompiler. */
78	VMCPUSTATE_STARTED_EXEC_REM,
79	/** Halted. */
80	VMCPUSTATE_STARTED_HALTED,
81
82	/** The end of valid virtual CPU states. */
83	VMCPUSTATE_END,
84
85	/** Ensure 32-bit type. */
86	VMCPUSTATE_32BIT_HACK = 0x7fffffff
87	} VMCPUSTATE;
88
89
90	/**
91	* The cross context virtual CPU structure.
92	*
93	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
94	*/
95	typedef struct VMCPU
96	{
97	/** Per CPU forced action.
98	* See the VMCPU_FF_* \#defines. Updated atomically. */
99	uint32_t volatile fLocalForcedActions; /* 0 */
100	/** The CPU state. */
101	VMCPUSTATE volatile enmState; /* 4 */
102
103	/** Pointer to the ring-3 UVMCPU structure. */
104	PUVMCPU pUVCpu; /* 8 */
105	/** Ring-3 Host Context VM Pointer. */
106	PVMR3 pVMR3; /* 16 / 12 */
107	/** Ring-0 Host Context VM Pointer. */
108	PVMR0 pVMR0; /* 24 / 16 */
109	/** Raw-mode Context VM Pointer. */
110	PVMRC pVMRC; /* 32 / 20 */
111	/** The CPU ID.
112	* This is the index into the VM::aCpu array. */
113	VMCPUID idCpu; /* 36 / 24 */
114	/** The native thread handle. */
115	RTNATIVETHREAD hNativeThread; /* 40 / 28 */
116	/** The native R0 thread handle. (different from the R3 handle!) */
117	RTNATIVETHREAD hNativeThreadR0; /* 48 / 32 */
118	/** Which host CPU ID is this EMT running on.
119	* Only valid when in RC or HMR0 with scheduling disabled. */
120	RTCPUID volatile idHostCpu; /* 56 / 36 */
121	/** The CPU set index corresponding to idHostCpu, UINT32_MAX if not valid.
122	* @remarks Best to make sure iHostCpuSet shares cache line with idHostCpu! */
123	uint32_t volatile iHostCpuSet; /* 60 / 40 */
124
125	#if HC_ARCH_BITS == 32
126	/** Align the structures below bit on a 64-byte boundary and make sure it starts
127	* at the same offset in both 64-bit and 32-bit builds.
128	*
129	* @remarks The alignments of the members that are larger than 48 bytes should be
130	* 64-byte for cache line reasons. structs containing small amounts of
131	* data could be lumped together at the end with a < 64 byte padding
132	* following it (to grow into and align the struct size).
133	*/
134	uint8_t abAlignment1[HC_ARCH_BITS == 64 ? 0 : 20];
135	#endif
136
137	/** IEM part.
138	* @remarks This comes first as it allows the use of 8-bit immediates for the
139	* first 64 bytes of the structure, reducing code size a wee bit. */
140	#ifdef ___IEMInternal_h /* For PDB hacking. */
141	union VMCPUUNIONIEMFULL
142	#else
143	union VMCPUUNIONIEMSTUB
144	#endif
145	{
146	#ifdef ___IEMInternal_h
147	struct IEMCPU s;
148	#endif
149	uint8_t padding[18496]; /* multiple of 64 */
150	} iem;
151
152	/** HM part. */
153	union VMCPUUNIONHM
154	{
155	#ifdef ___HMInternal_h
156	struct HMCPU s;
157	#endif
158	uint8_t padding[5824]; /* multiple of 64 */
159	} hm;
160
161	/** EM part. */
162	union VMCPUUNIONEM
163	{
164	#ifdef ___EMInternal_h
165	struct EMCPU s;
166	#endif
167	uint8_t padding[1408]; /* multiple of 64 */
168	} em;
169
170	/** NEM part. */
171	union VMCPUUNIONNEM
172	{
173	#ifdef ___NEMInternal_h
174	struct NEMCPU s;
175	#endif
176	uint8_t padding[128]; /* multiple of 64 */
177	} nem;
178
179	/** TRPM part. */
180	union VMCPUUNIONTRPM
181	{
182	#ifdef ___TRPMInternal_h
183	struct TRPMCPU s;
184	#endif
185	uint8_t padding[128]; /* multiple of 64 */
186	} trpm;
187
188	/** TM part. */
189	union VMCPUUNIONTM
190	{
191	#ifdef ___TMInternal_h
192	struct TMCPU s;
193	#endif
194	uint8_t padding[384]; /* multiple of 64 */
195	} tm;
196
197	/** VMM part. */
198	union VMCPUUNIONVMM
199	{
200	#ifdef ___VMMInternal_h
201	struct VMMCPU s;
202	#endif
203	uint8_t padding[704]; /* multiple of 64 */
204	} vmm;
205
206	/** PDM part. */
207	union VMCPUUNIONPDM
208	{
209	#ifdef ___PDMInternal_h
210	struct PDMCPU s;
211	#endif
212	uint8_t padding[256]; /* multiple of 64 */
213	} pdm;
214
215	/** IOM part. */
216	union VMCPUUNIONIOM
217	{
218	#ifdef ___IOMInternal_h
219	struct IOMCPU s;
220	#endif
221	uint8_t padding[512]; /* multiple of 64 */
222	} iom;
223
224	/** DBGF part.
225	* @todo Combine this with other tiny structures. */
226	union VMCPUUNIONDBGF
227	{
228	#ifdef ___DBGFInternal_h
229	struct DBGFCPU s;
230	#endif
231	uint8_t padding[256]; /* multiple of 64 */
232	} dbgf;
233
234	/** GIM part. */
235	union VMCPUUNIONGIM
236	{
237	#ifdef ___GIMInternal_h
238	struct GIMCPU s;
239	#endif
240	uint8_t padding[512]; /* multiple of 64 */
241	} gim;
242
243	/** APIC part. */
244	union VMCPUUNIONAPIC
245	{
246	#ifdef ___APICInternal_h
247	struct APICCPU s;
248	#endif
249	uint8_t padding[1792]; /* multiple of 64 */
250	} apic;
251
252	/*
253	* Some less frequently used global members that doesn't need to take up
254	* precious space at the head of the structure.
255	*/
256
257	/** Trace groups enable flags. */
258	uint32_t fTraceGroups; /* 64 / 44 */
259	/** State data for use by ad hoc profiling. */
260	uint32_t uAdHoc;
261	/** Profiling samples for use by ad hoc profiling. */
262	STAMPROFILEADV aStatAdHoc[8]; /* size: 408 = 320 /
263
264	/** Align the following members on page boundary. */
265	uint8_t abAlignment2[1976];
266
267	/** PGM part. */
268	union VMCPUUNIONPGM
269	{
270	#ifdef ___PGMInternal_h
271	struct PGMCPU s;
272	#endif
273	uint8_t padding[4096]; /* multiple of 4096 */
274	} pgm;
275
276	/** CPUM part. */
277	union VMCPUUNIONCPUM
278	{
279	#ifdef ___CPUMInternal_h
280	struct CPUMCPU s;
281	#endif
282	#ifdef VMCPU_INCL_CPUM_GST_CTX
283	/** The guest CPUM context for direct use by execution engines.
284	* This is not for general consumption, but for HM, REM, IEM, and maybe a few
285	* others. The rest will use the function based CPUM API. */
286	CPUMCTX GstCtx;
287	#endif
288	uint8_t padding[4096]; /* multiple of 4096 */
289	} cpum;
290	} VMCPU;
291
292
293	#ifndef VBOX_FOR_DTRACE_LIB
294
295	/** @name Operations on VMCPU::enmState
296	* @{ */
297	/** Gets the VMCPU state. */
298	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
299	/** Sets the VMCPU state. */
300	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
301	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
302	/** Cmpares and sets the VMCPU state. */
303	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
304	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
305	/** Checks the VMCPU state. */
306	#ifdef VBOX_STRICT
307	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
308	do { \
309	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
310	AssertMsg(enmState == (enmExpectedState), \
311	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
312	enmState, enmExpectedState, (pVCpu)->idCpu)); \
313	} while (0)
314	#else
315	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
316	#endif
317	/** Tests if the state means that the CPU is started. */
318	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
319	/** Tests if the state means that the CPU is stopped. */
320	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
321	/** @} */
322
323
324	/** The name of the raw-mode context VMM Core module. */
325	#define VMMRC_MAIN_MODULE_NAME "VMMRC.rc"
326	/** The name of the ring-0 context VMM Core module. */
327	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
328
329	/**
330	* Wrapper macro for avoiding too much \#ifdef VBOX_WITH_RAW_MODE.
331	*/
332	#ifdef VBOX_WITH_RAW_MODE
333	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithExpr
334	#else
335	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithoutExpr
336	#endif
337
338
339	/** VM Forced Action Flags.
340	*
341	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
342	* action mask of a VM.
343	*
344	* Available VM bits:
345	* 0, 1, 5, 6, 7, 13, 14, 15, 16, 17, 21, 22, 23, 24, 25, 26, 27, 28, 30
346	*
347	*
348	* Available VMCPU bits:
349	* 11, 14, 15, 31
350	*
351	* @todo If we run low on VMCPU, we may consider merging the SELM bits
352	*
353	* @{
354	*/
355	/** The virtual sync clock has been stopped, go to TM until it has been
356	* restarted... */
357	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
358	/** PDM Queues are pending. */
359	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
360	/** The bit number for VM_FF_PDM_QUEUES. */
361	#define VM_FF_PDM_QUEUES_BIT 3
362	/** PDM DMA transfers are pending. */
363	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
364	/** The bit number for VM_FF_PDM_DMA. */
365	#define VM_FF_PDM_DMA_BIT 4
366	/** This action forces the VM to call DBGF so DBGF can service debugger
367	* requests in the emulation thread.
368	* This action flag stays asserted till DBGF clears it.*/
369	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
370	/** The bit number for VM_FF_DBGF. */
371	#define VM_FF_DBGF_BIT 8
372	/** This action forces the VM to service pending requests from other
373	* thread or requests which must be executed in another context. */
374	#define VM_FF_REQUEST RT_BIT_32(9)
375	/** Check for VM state changes and take appropriate action. */
376	#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
377	/** The bit number for VM_FF_CHECK_VM_STATE. */
378	#define VM_FF_CHECK_VM_STATE_BIT 10
379	/** Reset the VM. (postponed) */
380	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
381	/** The bit number for VM_FF_RESET. */
382	#define VM_FF_RESET_BIT 11
383	/** EMT rendezvous in VMM. */
384	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
385	/** The bit number for VM_FF_EMT_RENDEZVOUS. */
386	#define VM_FF_EMT_RENDEZVOUS_BIT 12
387
388	/** PGM needs to allocate handy pages. */
389	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
390	/** PGM is out of memory.
391	* Abandon all loops and code paths which can be resumed and get up to the EM
392	* loops. */
393	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
394	/** PGM is about to perform a lightweight pool flush
395	* Guest SMP: all EMT threads should return to ring 3
396	*/
397	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(20)
398	/** REM needs to be informed about handler changes. */
399	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
400	/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
401	#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
402	/** Suspend the VM - debug only. */
403	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
404
405
406	/** This action forces the VM to check any pending interrupts on the APIC. */
407	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
408	/** This action forces the VM to check any pending interrups on the PIC. */
409	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
410	/** This action forces the VM to schedule and run pending timer (TM).
411	* @remarks Don't move - PATM compatibility. */
412	#define VMCPU_FF_TIMER RT_BIT_32(2)
413	/** This action forces the VM to check any pending NMIs. */
414	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
415	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_32(VMCPU_FF_INTERRUPT_NMI_BIT)
416	/** This action forces the VM to check any pending SMIs. */
417	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
418	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_32(VMCPU_FF_INTERRUPT_SMI_BIT)
419	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
420	#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
421	/** Special EM internal force flag that is used by EMUnhaltAndWakeUp() to force
422	* the virtual CPU out of the next (/current) halted state. It is not processed
423	* nor cleared by emR3ForcedActions (similar to VMCPU_FF_BLOCK_NMIS), instead it
424	* is cleared the next time EM leaves the HALTED state. */
425	#define VMCPU_FF_UNHALT RT_BIT_32(6)
426	/** Pending IEM action (bit number). */
427	#define VMCPU_FF_IEM_BIT 7
428	/** Pending IEM action (mask). */
429	#define VMCPU_FF_IEM RT_BIT_32(VMCPU_FF_IEM_BIT)
430	/** Pending APIC action (bit number). */
431	#define VMCPU_FF_UPDATE_APIC_BIT 8
432	/** This action forces the VM to update APIC's asynchronously arrived
433	* interrupts as pending interrupts. */
434	#define VMCPU_FF_UPDATE_APIC RT_BIT_32(VMCPU_FF_UPDATE_APIC_BIT)
435	/** This action forces the VM to service pending requests from other
436	* thread or requests which must be executed in another context. */
437	#define VMCPU_FF_REQUEST RT_BIT_32(9)
438	/** Pending DBGF event (alternative to passing VINF_EM_DBG_EVENT around). */
439	#define VMCPU_FF_DBGF RT_BIT_32(VMCPU_FF_DBGF_BIT)
440	/** The bit number for VMCPU_FF_DBGF. */
441	#define VMCPU_FF_DBGF_BIT 10
442	/** This action forces the VM to service any pending updates to CR3 (used only
443	* by HM). */
444	#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_32(12)
445	/** This action forces the VM to service any pending updates to PAE PDPEs (used
446	* only by HM). */
447	#define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_32(13)
448	/** This action forces the VM to resync the page tables before going
449	* back to execute guest code. (GLOBAL FLUSH) */
450	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
451	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
452	* (NON-GLOBAL FLUSH) */
453	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
454	/** Check for pending TLB shootdown actions (deprecated)
455	* Reserved for furture HM re-use if necessary / safe.
456	* Consumer: HM */
457	#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED RT_BIT_32(18)
458	/** Check for pending TLB flush action.
459	* Consumer: HM
460	* @todo rename to VMCPU_FF_HM_TLB_FLUSH */
461	#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
462	/** The bit number for VMCPU_FF_TLB_FLUSH. */
463	#define VMCPU_FF_TLB_FLUSH_BIT 19
464	#ifdef VBOX_WITH_RAW_MODE
465	/** Check the interrupt and trap gates */
466	# define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
467	/** Check Guest's TSS ring 0 stack */
468	# define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
469	/** Check Guest's GDT table */
470	# define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
471	/** Check Guest's LDT table */
472	# define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
473	#endif /* VBOX_WITH_RAW_MODE */
474	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
475	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
476	/** Block injection of non-maskable interrupts to the guest. */
477	#define VMCPU_FF_BLOCK_NMIS RT_BIT_32(25)
478	#ifdef VBOX_WITH_RAW_MODE
479	/** CSAM needs to scan the page that's being executed */
480	# define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
481	/** CSAM needs to do some homework. */
482	# define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
483	#endif /* VBOX_WITH_RAW_MODE */
484	/** Force return to Ring-3. */
485	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
486	/** Force return to ring-3 to service pending I/O or MMIO write.
487	* This is a backup for mechanism VINF_IOM_R3_IOPORT_COMMIT_WRITE and
488	* VINF_IOM_R3_MMIO_COMMIT_WRITE, allowing VINF_EM_DBG_BREAKPOINT and similar
489	* status codes to be propagated at the same time without loss. */
490	#define VMCPU_FF_IOM RT_BIT_32(29)
491	#ifdef VBOX_WITH_RAW_MODE
492	/** CPUM need to adjust CR0.TS/EM before executing raw-mode code again. */
493	# define VMCPU_FF_CPUM RT_BIT_32(VMCPU_FF_CPUM_BIT)
494	/** The bit number for VMCPU_FF_CPUM. */
495	# define VMCPU_FF_CPUM_BIT 30
496	#endif /* VBOX_WITH_RAW_MODE */
497	/** Hardware virtualized nested-guest interrupt pending. */
498	#define VMCPU_FF_INTERRUPT_NESTED_GUEST RT_BIT_32(31)
499
500	/** Externally VM forced actions. Used to quit the idle/wait loop. */
501	#define VM_FF_EXTERNAL_SUSPENDED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS )
502	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
503	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK ( VMCPU_FF_REQUEST \| VMCPU_FF_DBGF )
504
505	/** Externally forced VM actions. Used to quit the idle/wait loop. */
506	#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \
507	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS )
508	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
509	#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
510	\| VMCPU_FF_REQUEST \| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \
511	\| VMCPU_FF_UNHALT \| VMCPU_FF_TIMER \| VMCPU_FF_DBGF )
512
513	/** High priority VM pre-execution actions. */
514	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \
515	\| VM_FF_DEBUG_SUSPEND \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
516	\| VM_FF_EMT_RENDEZVOUS )
517	/** High priority VMCPU pre-execution actions. */
518	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
519	\| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INHIBIT_INTERRUPTS \| VMCPU_FF_DBGF \
520	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
521	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
522	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0 ) )
523
524	/** High priority VM pre raw-mode execution mask. */
525	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY )
526	/** High priority VMCPU pre raw-mode execution mask. */
527	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
528	\| VMCPU_FF_INHIBIT_INTERRUPTS \
529	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
530	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0) )
531
532	/** High priority post-execution actions. */
533	#define VM_FF_HIGH_PRIORITY_POST_MASK ( VM_FF_PGM_NO_MEMORY )
534	/** High priority post-execution actions. */
535	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) \
536	\| VMCPU_FF_HM_UPDATE_CR3 \| VMCPU_FF_HM_UPDATE_PAE_PDPES \
537	\| VMCPU_FF_IEM \| VMCPU_FF_IOM )
538
539	/** Normal priority VM post-execution actions. */
540	#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_RESET \
541	\| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
542	/** Normal priority VMCPU post-execution actions. */
543	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK ( VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_SCAN_PAGE, 0) \| VMCPU_FF_DBGF )
544
545	/** Normal priority VM actions. */
546	#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \
547	\| VM_FF_REM_HANDLER_NOTIFY \| VM_FF_EMT_RENDEZVOUS)
548	/** Normal priority VMCPU actions. */
549	#define VMCPU_FF_NORMAL_PRIORITY_MASK ( VMCPU_FF_REQUEST )
550
551	/** Flags to clear before resuming guest execution. */
552	#define VMCPU_FF_RESUME_GUEST_MASK ( VMCPU_FF_TO_R3 )
553
554
555	/** VM flags that cause the REP[\|NE\|E] STRINS loops to yield immediately. */
556	#define VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
557	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_RESET)
558	/** VM flags that cause the REP[\|NE\|E] STRINS loops to yield. */
559	#define VM_FF_YIELD_REPSTR_MASK ( VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
560	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_DBGF \| VM_FF_DEBUG_SUSPEND )
561	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield immediately. */
562	#ifdef IN_RING3
563	# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_DBGF )
564	#else
565	# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_TO_R3 \| VMCPU_FF_IEM \| VMCPU_FF_IOM \| VMCPU_FF_PGM_SYNC_CR3 \
566	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_DBGF )
567	#endif
568	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield, interrupts
569	* enabled. */
570	#define VMCPU_FF_YIELD_REPSTR_MASK ( VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
571	\| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_PIC \
572	\| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \| VMCPU_FF_PDM_CRITSECT \
573	\| VMCPU_FF_TIMER \| VMCPU_FF_REQUEST )
574	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield, interrupts
575	* disabled. */
576	#define VMCPU_FF_YIELD_REPSTR_NOINT_MASK ( VMCPU_FF_YIELD_REPSTR_MASK \
577	& ~(VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_PIC) )
578
579	/** VM Flags that cause the HM loops to go back to ring-3. */
580	#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
581	\| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
582	/** VMCPU Flags that cause the HM loops to go back to ring-3. */
583	#define VMCPU_FF_HM_TO_R3_MASK ( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \| VMCPU_FF_PDM_CRITSECT \
584	\| VMCPU_FF_IEM \| VMCPU_FF_IOM)
585
586	/** High priority ring-0 VM pre HM-mode execution mask. */
587	#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK \| VM_FF_REQUEST \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_PDM_DMA)
588	/** High priority ring-0 VMCPU pre HM-mode execution mask. */
589	#define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK \| VMCPU_FF_PGM_SYNC_CR3 \
590	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_REQUEST)
591	/** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
592	#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PDM_QUEUES \
593	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_REQUEST \
594	\| VM_FF_PDM_DMA) )
595	/** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
596	#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \
597	\| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_REQUEST) )
598
599	/** All the forced VM flags. */
600	#define VM_FF_ALL_MASK (UINT32_MAX)
601	/** All the forced VMCPU flags. */
602	#define VMCPU_FF_ALL_MASK (UINT32_MAX)
603
604	/** All the forced VM flags except those related to raw-mode and hardware
605	* assisted execution. */
606	#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
607	/** All the forced VMCPU flags except those related to raw-mode and hardware
608	* assisted execution. */
609	#define VMCPU_FF_ALL_REM_MASK (~( VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_PDM_CRITSECT \
610	\| VMCPU_FF_TLB_FLUSH \| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) ))
611	/** @} */
612
613	/** @def VM_FF_SET
614	* Sets a force action flag.
615	*
616	* @param pVM The cross context VM structure.
617	* @param fFlag The flag to set.
618	*/
619	#if 1
620	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
621	#else
622	# define VM_FF_SET(pVM, fFlag) \
623	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
624	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
625	} while (0)
626	#endif
627
628	/** @def VMCPU_FF_SET
629	* Sets a force action flag for the given VCPU.
630	*
631	* @param pVCpu The cross context virtual CPU structure.
632	* @param fFlag The flag to set.
633	*/
634	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
635
636	/** @def VM_FF_CLEAR
637	* Clears a force action flag.
638	*
639	* @param pVM The cross context VM structure.
640	* @param fFlag The flag to clear.
641	*/
642	#if 1
643	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
644	#else
645	# define VM_FF_CLEAR(pVM, fFlag) \
646	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
647	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
648	} while (0)
649	#endif
650
651	/** @def VMCPU_FF_CLEAR
652	* Clears a force action flag for the given VCPU.
653	*
654	* @param pVCpu The cross context virtual CPU structure.
655	* @param fFlag The flag to clear.
656	*/
657	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
658
659	/** @def VM_FF_IS_SET
660	* Checks if a force action flag is set.
661	*
662	* @param pVM The cross context VM structure.
663	* @param fFlag The flag to check.
664	*/
665	#define VM_FF_IS_SET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
666
667	/** @def VMCPU_FF_IS_SET
668	* Checks if a force action flag is set for the given VCPU.
669	*
670	* @param pVCpu The cross context virtual CPU structure.
671	* @param fFlag The flag to check.
672	*/
673	#define VMCPU_FF_IS_SET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
674
675	/** @def VM_FF_IS_PENDING
676	* Checks if one or more force action in the specified set is pending.
677	*
678	* @param pVM The cross context VM structure.
679	* @param fFlags The flags to check for.
680	*/
681	#define VM_FF_IS_PENDING(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
682
683	/** @def VM_FF_TEST_AND_CLEAR
684	* Checks if one (!) force action in the specified set is pending and clears it atomically
685	*
686	* @returns true if the bit was set.
687	* @returns false if the bit was clear.
688	* @param pVM The cross context VM structure.
689	* @param iBit Bit position to check and clear
690	*/
691	#define VM_FF_TEST_AND_CLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
692
693	/** @def VMCPU_FF_TEST_AND_CLEAR
694	* Checks if one (!) force action in the specified set is pending and clears it atomically
695	*
696	* @returns true if the bit was set.
697	* @returns false if the bit was clear.
698	* @param pVCpu The cross context virtual CPU structure.
699	* @param iBit Bit position to check and clear
700	*/
701	#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
702
703	/** @def VMCPU_FF_IS_PENDING
704	* Checks if one or more force action in the specified set is pending for the given VCPU.
705	*
706	* @param pVCpu The cross context virtual CPU structure.
707	* @param fFlags The flags to check for.
708	*/
709	#define VMCPU_FF_IS_PENDING(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
710
711	/** @def VM_FF_IS_PENDING_EXCEPT
712	* Checks if one or more force action in the specified set is pending while one
713	* or more other ones are not.
714	*
715	* @param pVM The cross context VM structure.
716	* @param fFlags The flags to check for.
717	* @param fExcpt The flags that should not be set.
718	*/
719	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
720
721	/** @def VMCPU_FF_IS_PENDING_EXCEPT
722	* Checks if one or more force action in the specified set is pending for the given
723	* VCPU while one or more other ones are not.
724	*
725	* @param pVCpu The cross context virtual CPU structure.
726	* @param fFlags The flags to check for.
727	* @param fExcpt The flags that should not be set.
728	*/
729	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
730
731	/** @def VM_IS_EMT
732	* Checks if the current thread is the emulation thread (EMT).
733	*
734	* @remark The ring-0 variation will need attention if we expand the ring-0
735	* code to let threads other than EMT mess around with the VM.
736	*/
737	#ifdef IN_RC
738	# define VM_IS_EMT(pVM) true
739	#else
740	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
741	#endif
742
743	/** @def VMCPU_IS_EMT
744	* Checks if the current thread is the emulation thread (EMT) for the specified
745	* virtual CPU.
746	*/
747	#ifdef IN_RC
748	# define VMCPU_IS_EMT(pVCpu) true
749	#else
750	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
751	#endif
752
753	/** @def VM_ASSERT_EMT
754	* Asserts that the current thread IS the emulation thread (EMT).
755	*/
756	#ifdef IN_RC
757	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
758	#elif defined(IN_RING0)
759	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
760	#else
761	# define VM_ASSERT_EMT(pVM) \
762	AssertMsg(VM_IS_EMT(pVM), \
763	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
764	#endif
765
766	/** @def VMCPU_ASSERT_EMT
767	* Asserts that the current thread IS the emulation thread (EMT) of the
768	* specified virtual CPU.
769	*/
770	#ifdef IN_RC
771	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
772	#elif defined(IN_RING0)
773	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
774	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
775	RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
776	(pVCpu) ? (pVCpu)->idCpu : 0))
777	#else
778	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
779	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
780	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
781	#endif
782
783	/** @def VM_ASSERT_EMT_RETURN
784	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
785	*/
786	#ifdef IN_RC
787	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
788	#elif defined(IN_RING0)
789	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
790	#else
791	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
792	AssertMsgReturn(VM_IS_EMT(pVM), \
793	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
794	(rc))
795	#endif
796
797	/** @def VMCPU_ASSERT_EMT_RETURN
798	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
799	*/
800	#ifdef IN_RC
801	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
802	#elif defined(IN_RING0)
803	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
804	#else
805	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
806	AssertMsgReturn(VMCPU_IS_EMT(pVCpu), \
807	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
808	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
809	(rc))
810	#endif
811
812	/** @def VMCPU_ASSERT_EMT_OR_GURU
813	* Asserts that the current thread IS the emulation thread (EMT) of the
814	* specified virtual CPU.
815	*/
816	#if defined(IN_RC) \|\| defined(IN_RING0)
817	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
818	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
819	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
820	#else
821	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
822	AssertMsg( VMCPU_IS_EMT(pVCpu) \
823	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
824	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
825	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
826	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
827	#endif
828
829	/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
830	* Asserts that the current thread IS the emulation thread (EMT) of the
831	* specified virtual CPU or the VM is not running.
832	*/
833	#if defined(IN_RC) \|\| defined(IN_RING0)
834	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
835	Assert( VMCPU_IS_EMT(pVCpu) \
836	\|\| !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)) )
837	#else
838	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
839	AssertMsg( VMCPU_IS_EMT(pVCpu) \
840	\|\| !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)), \
841	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
842	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
843	#endif
844
845	/** @def VM_IS_RUNNING_FOR_ASSERTIONS_ONLY
846	* Checks if the the VM is running.
847	* @note Thie is only for pure debug assertions. No AssertReturn or similar!
848	*/
849	#define VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM) \
850	( (pVM)->enmVMState == VMSTATE_RUNNING \
851	\|\| (pVM)->enmVMState == VMSTATE_RUNNING_LS \
852	\|\| (pVM)->enmVMState == VMSTATE_RUNNING_FT )
853
854	/** @def VM_ASSERT_IS_NOT_RUNNING
855	* Asserts that the VM is not running.
856	*/
857	#if defined(IN_RC) \|\| defined(IN_RING0)
858	#define VM_ASSERT_IS_NOT_RUNNING(pVM) Assert(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM))
859	#else
860	#define VM_ASSERT_IS_NOT_RUNNING(pVM) AssertMsg(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM), \
861	("VM is running. enmVMState=%d\n", (pVM)->enmVMState))
862	#endif
863
864	/** @def VM_ASSERT_EMT0
865	* Asserts that the current thread IS emulation thread \#0 (EMT0).
866	*/
867	#define VM_ASSERT_EMT0(pVM) VMCPU_ASSERT_EMT(&(pVM)->aCpus[0])
868
869	/** @def VM_ASSERT_EMT0_RETURN
870	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
871	* it isn't.
872	*/
873	#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
874
875
876	/**
877	* Asserts that the current thread is NOT the emulation thread.
878	*/
879	#define VM_ASSERT_OTHER_THREAD(pVM) \
880	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
881
882
883	/** @def VM_ASSERT_STATE
884	* Asserts a certain VM state.
885	*/
886	#define VM_ASSERT_STATE(pVM, _enmState) \
887	AssertMsg((pVM)->enmVMState == (_enmState), \
888	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
889
890	/** @def VM_ASSERT_STATE_RETURN
891	* Asserts a certain VM state and returns if it doesn't match.
892	*/
893	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
894	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
895	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
896	(rc))
897
898	/** @def VM_IS_VALID_EXT
899	* Asserts a the VM handle is valid for external access, i.e. not being destroy
900	* or terminated. */
901	#define VM_IS_VALID_EXT(pVM) \
902	( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
903	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
904	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
905	&& VM_IS_EMT(pVM))) )
906
907	/** @def VM_ASSERT_VALID_EXT_RETURN
908	* Asserts a the VM handle is valid for external access, i.e. not being
909	* destroy or terminated.
910	*/
911	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
912	AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
913	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
914	? VMGetStateName(pVM->enmVMState) : ""), \
915	(rc))
916
917	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
918	* Asserts a the VMCPU handle is valid for external access, i.e. not being
919	* destroy or terminated.
920	*/
921	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
922	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
923	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
924	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
925	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
926	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
927	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
928	(rc))
929
930	#endif /* !VBOX_FOR_DTRACE_LIB */
931
932
933	/** @name VM_EXEC_ENGINE_XXX - VM::bMainExecutionEngine values.
934	* @{ */
935	/** Has not yet been set. */
936	#define VM_EXEC_ENGINE_NOT_SET UINT8_C(0)
937	/** Raw-mode. */
938	#define VM_EXEC_ENGINE_RAW_MODE UINT8_C(1)
939	/** Hardware assisted virtualization thru HM. */
940	#define VM_EXEC_ENGINE_HW_VIRT UINT8_C(2)
941	/** Hardware assisted virtualization thru native API (NEM). */
942	#define VM_EXEC_ENGINE_NATIVE_API UINT8_C(3)
943	/** @} */
944
945	/**
946	* Helper that HM and NEM uses for safely modifying VM::bMainExecutionEngine.
947	*
948	* ONLY HM and NEM MAY USE THIS!
949	*
950	* @param a_pVM The cross context VM structure.
951	* @param a_bValue The new value.
952	* @internal
953	*/
954	#define VM_SET_MAIN_EXECUTION_ENGINE(a_pVM, a_bValue) \
955	do { \
956	const_cast<uint8_t >(&(a_pVM)->bMainExecutionEngine) = (a_bValue); \
957	ASMCompilerBarrier(); /* just to be on the safe side */ \
958	} while (0)
959
960	/**
961	* Checks whether raw-mode is used.
962	*
963	* @retval true if either is used.
964	* @retval false if software virtualization (raw-mode) is used.
965	*
966	* @param a_pVM The cross context VM structure.
967	* @sa HMR3IsEnabled, HMIsEnabled
968	* @internal
969	*/
970	#ifdef VBOX_WITH_RAW_MODE
971	# define VM_IS_RAW_MODE_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_RAW_MODE)
972	#else
973	# define VM_IS_RAW_MODE_ENABLED(a_pVM) (false)
974	#endif
975
976	/**
977	* Checks whether HM (VT-x/AMD-V) or NEM is being used by this VM.
978	*
979	* @retval true if either is used.
980	* @retval false if software virtualization (raw-mode) is used.
981	*
982	* @param a_pVM The cross context VM structure.
983	* @sa VM_IS_RAW_MODE_ENABLED, HMIsEnabled, HMR3IsEnabled
984	* @internal
985	*/
986	#define VM_IS_HM_OR_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine != VM_EXEC_ENGINE_RAW_MODE)
987
988
989	/**
990	* The cross context VM structure.
991	*
992	* It contains all the VM data which have to be available in all contexts.
993	* Even if it contains all the data the idea is to use APIs not to modify all
994	* the members all around the place. Therefore we make use of unions to hide
995	* everything which isn't local to the current source module. This means we'll
996	* have to pay a little bit of attention when adding new members to structures
997	* in the unions and make sure to keep the padding sizes up to date.
998	*
999	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
1000	*/
1001	typedef struct VM
1002	{
1003	/** The state of the VM.
1004	* This field is read only to everyone except the VM and EM. */
1005	VMSTATE volatile enmVMState;
1006	/** Forced action flags.
1007	* See the VM_FF_* \#defines. Updated atomically.
1008	*/
1009	volatile uint32_t fGlobalForcedActions;
1010	/** Pointer to the array of page descriptors for the VM structure allocation. */
1011	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
1012	/** Session handle. For use when calling SUPR0 APIs. */
1013	PSUPDRVSESSION pSession;
1014	/** Pointer to the ring-3 VM structure. */
1015	PUVM pUVM;
1016	/** Ring-3 Host Context VM Pointer. */
1017	R3PTRTYPE(struct VM *) pVMR3;
1018	/** Ring-0 Host Context VM Pointer. */
1019	R0PTRTYPE(struct VM *) pVMR0;
1020	/** Raw-mode Context VM Pointer. */
1021	RCPTRTYPE(struct VM *) pVMRC;
1022
1023	/** The GVM VM handle. Only the GVM should modify this field. */
1024	uint32_t hSelf;
1025	/** Number of virtual CPUs. */
1026	uint32_t cCpus;
1027	/** CPU excution cap (1-100) */
1028	uint32_t uCpuExecutionCap;
1029
1030	/** Size of the VM structure including the VMCPU array. */
1031	uint32_t cbSelf;
1032
1033	/** Offset to the VMCPU array starting from beginning of this structure. */
1034	uint32_t offVMCPU;
1035
1036	/**
1037	* VMMSwitcher assembly entry point returning to host context.
1038	*
1039	* Depending on how the host handles the rc status given in @a eax, this may
1040	* return and let the caller resume whatever it was doing prior to the call.
1041	*
1042	*
1043	* @param eax The return code, register.
1044	* @remark Assume interrupts disabled.
1045	* @remark This method pointer lives here because TRPM needs it.
1046	*/
1047	RTRCPTR pfnVMMRCToHostAsm/(int32_t eax)/;
1048
1049	/**
1050	* VMMSwitcher assembly entry point returning to host context without saving the
1051	* raw-mode context (hyper) registers.
1052	*
1053	* Unlike pfnVMMRC2HCAsm, this will not return to the caller. Instead it
1054	* expects the caller to save a RC context in CPUM where one might return if the
1055	* return code indicate that this is possible.
1056	*
1057	* This method pointer lives here because TRPM needs it.
1058	*
1059	* @param eax The return code, register.
1060	* @remark Assume interrupts disabled.
1061	* @remark This method pointer lives here because TRPM needs it.
1062	*/
1063	RTRCPTR pfnVMMRCToHostAsmNoReturn/(int32_t eax)/;
1064
1065	/** @name Various items that are frequently accessed.
1066	* @{ */
1067	/** The main execution engine, VM_EXEC_ENGINE_XXX.
1068	* This is set early during vmR3InitRing3 by HM or NEM. */
1069	uint8_t const bMainExecutionEngine;
1070
1071	/** Whether to recompile user mode code or run it raw/hm/nem.
1072	* In non-raw-mode both fRecompileUser and fRecompileSupervisor must be set
1073	* to recompiler stuff. */
1074	bool fRecompileUser;
1075	/** Whether to recompile supervisor mode code or run it raw/hm/nem.
1076	* In non-raw-mode both fRecompileUser and fRecompileSupervisor must be set
1077	* to recompiler stuff. */
1078	bool fRecompileSupervisor;
1079	/** Whether raw mode supports ring-1 code or not.
1080	* This will be cleared when not in raw-mode. */
1081	bool fRawRing1Enabled;
1082	/** PATM enabled flag.
1083	* This is placed here for performance reasons.
1084	* This will be cleared when not in raw-mode. */
1085	bool fPATMEnabled;
1086	/** CSAM enabled flag.
1087	* This is placed here for performance reasons.
1088	* This will be cleared when not in raw-mode. */
1089	bool fCSAMEnabled;
1090
1091	/** Hardware VM support is available and enabled.
1092	* Determined very early during init.
1093	* This is placed here for performance reasons.
1094	* @todo obsoleted by bMainExecutionEngine, eliminate. */
1095	bool fHMEnabled;
1096	/** Hardware VM support requires a minimal raw-mode context.
1097	* This is never set on 64-bit hosts, only 32-bit hosts requires it. */
1098	bool fHMNeedRawModeCtx;
1099
1100	/** Set when this VM is the master FT node.
1101	* @todo This doesn't need to be here, FTM should store it in it's own
1102	* structures instead. */
1103	bool fFaultTolerantMaster;
1104	/** Large page enabled flag.
1105	* @todo This doesn't need to be here, PGM should store it in it's own
1106	* structures instead. */
1107	bool fUseLargePages;
1108	/** @} */
1109
1110	/** Alignment padding. */
1111	uint8_t uPadding1[2];
1112
1113	/** @name Debugging
1114	* @{ */
1115	/** Raw-mode Context VM Pointer. */
1116	RCPTRTYPE(RTTRACEBUF) hTraceBufRC;
1117	/** Ring-3 Host Context VM Pointer. */
1118	R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
1119	/** Ring-0 Host Context VM Pointer. */
1120	R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
1121	/** @} */
1122
1123	#if HC_ARCH_BITS == 32
1124	/** Alignment padding. */
1125	uint32_t uPadding2;
1126	#endif
1127
1128	/** @name Switcher statistics (remove)
1129	* @{ */
1130	/** Profiling the total time from Qemu to GC. */
1131	STAMPROFILEADV StatTotalQemuToGC;
1132	/** Profiling the total time from GC to Qemu. */
1133	STAMPROFILEADV StatTotalGCToQemu;
1134	/** Profiling the total time spent in GC. */
1135	STAMPROFILEADV StatTotalInGC;
1136	/** Profiling the total time spent not in Qemu. */
1137	STAMPROFILEADV StatTotalInQemu;
1138	/** Profiling the VMMSwitcher code for going to GC. */
1139	STAMPROFILEADV StatSwitcherToGC;
1140	/** Profiling the VMMSwitcher code for going to HC. */
1141	STAMPROFILEADV StatSwitcherToHC;
1142	STAMPROFILEADV StatSwitcherSaveRegs;
1143	STAMPROFILEADV StatSwitcherSysEnter;
1144	STAMPROFILEADV StatSwitcherDebug;
1145	STAMPROFILEADV StatSwitcherCR0;
1146	STAMPROFILEADV StatSwitcherCR4;
1147	STAMPROFILEADV StatSwitcherJmpCR3;
1148	STAMPROFILEADV StatSwitcherRstrRegs;
1149	STAMPROFILEADV StatSwitcherLgdt;
1150	STAMPROFILEADV StatSwitcherLidt;
1151	STAMPROFILEADV StatSwitcherLldt;
1152	STAMPROFILEADV StatSwitcherTSS;
1153	/** @} */
1154
1155	/** Padding - the unions must be aligned on a 64 bytes boundary and the unions
1156	* must start at the same offset on both 64-bit and 32-bit hosts. */
1157	uint8_t abAlignment3[(HC_ARCH_BITS == 32 ? 24 : 0) + 40];
1158
1159	/** CPUM part. */
1160	union
1161	{
1162	#ifdef ___CPUMInternal_h
1163	struct CPUM s;
1164	#endif
1165	#ifdef ___VBox_vmm_cpum_h
1166	/** Read only info exposed about the host and guest CPUs. */
1167	struct
1168	{
1169	/** Padding for hidden fields. */
1170	uint8_t abHidden0[64];
1171	/** Host CPU feature information. */
1172	CPUMFEATURES HostFeatures;
1173	/** Guest CPU feature information. */
1174	CPUMFEATURES GuestFeatures;
1175	} const ro;
1176	#endif
1177	uint8_t padding[1536]; /* multiple of 64 */
1178	} cpum;
1179
1180	/** VMM part. */
1181	union
1182	{
1183	#ifdef ___VMMInternal_h
1184	struct VMM s;
1185	#endif
1186	uint8_t padding[1600]; /* multiple of 64 */
1187	} vmm;
1188
1189	/** PGM part. */
1190	union
1191	{
1192	#ifdef ___PGMInternal_h
1193	struct PGM s;
1194	#endif
1195	uint8_t padding[40962+6080]; / multiple of 64 */
1196	} pgm;
1197
1198	/** HM part. */
1199	union
1200	{
1201	#ifdef ___HMInternal_h
1202	struct HM s;
1203	#endif
1204	uint8_t padding[5440]; /* multiple of 64 */
1205	} hm;
1206
1207	/** TRPM part. */
1208	union
1209	{
1210	#ifdef ___TRPMInternal_h
1211	struct TRPM s;
1212	#endif
1213	uint8_t padding[5248]; /* multiple of 64 */
1214	} trpm;
1215
1216	/** SELM part. */
1217	union
1218	{
1219	#ifdef ___SELMInternal_h
1220	struct SELM s;
1221	#endif
1222	uint8_t padding[768]; /* multiple of 64 */
1223	} selm;
1224
1225	/** MM part. */
1226	union
1227	{
1228	#ifdef ___MMInternal_h
1229	struct MM s;
1230	#endif
1231	uint8_t padding[192]; /* multiple of 64 */
1232	} mm;
1233
1234	/** PDM part. */
1235	union
1236	{
1237	#ifdef ___PDMInternal_h
1238	struct PDM s;
1239	#endif
1240	uint8_t padding[1920]; /* multiple of 64 */
1241	} pdm;
1242
1243	/** IOM part. */
1244	union
1245	{
1246	#ifdef ___IOMInternal_h
1247	struct IOM s;
1248	#endif
1249	uint8_t padding[896]; /* multiple of 64 */
1250	} iom;
1251
1252	/** EM part. */
1253	union
1254	{
1255	#ifdef ___EMInternal_h
1256	struct EM s;
1257	#endif
1258	uint8_t padding[256]; /* multiple of 64 */
1259	} em;
1260
1261	/** NEM part. */
1262	union
1263	{
1264	#ifdef ___NEMInternal_h
1265	struct NEM s;
1266	#endif
1267	uint8_t padding[128]; /* multiple of 64 */
1268	} nem;
1269
1270	/** TM part. */
1271	union
1272	{
1273	#ifdef ___TMInternal_h
1274	struct TM s;
1275	#endif
1276	uint8_t padding[2496]; /* multiple of 64 */
1277	} tm;
1278
1279	/** DBGF part. */
1280	union
1281	{
1282	#ifdef ___DBGFInternal_h
1283	struct DBGF s;
1284	#endif
1285	#ifdef ___VBox_vmm_dbgf_h
1286	/** Read only info exposed about interrupt breakpoints and selected events. */
1287	struct
1288	{
1289	/** Bitmap of enabled hardware interrupt breakpoints. */
1290	uint32_t bmHardIntBreakpoints[256 / 32];
1291	/** Bitmap of enabled software interrupt breakpoints. */
1292	uint32_t bmSoftIntBreakpoints[256 / 32];
1293	/** Bitmap of selected events.
1294	* This includes non-selectable events too for simplicity, we maintain the
1295	* state for some of these, as it may come in handy. */
1296	uint64_t bmSelectedEvents[(DBGFEVENT_END + 63) / 64];
1297	/** Enabled hardware interrupt breakpoints. */
1298	uint32_t cHardIntBreakpoints;
1299	/** Enabled software interrupt breakpoints. */
1300	uint32_t cSoftIntBreakpoints;
1301	/** The number of selected events. */
1302	uint32_t cSelectedEvents;
1303	/** The number of enabled hardware breakpoints. */
1304	uint8_t cEnabledHwBreakpoints;
1305	/** The number of enabled hardware I/O breakpoints. */
1306	uint8_t cEnabledHwIoBreakpoints;
1307	/** The number of enabled INT3 breakpoints. */
1308	uint8_t cEnabledInt3Breakpoints;
1309	uint8_t abPadding[1]; /*< Unused padding space up for grabs. /
1310	} const ro;
1311	#endif
1312	uint8_t padding[2368]; /* multiple of 64 */
1313	} dbgf;
1314
1315	/** SSM part. */
1316	union
1317	{
1318	#ifdef ___SSMInternal_h
1319	struct SSM s;
1320	#endif
1321	uint8_t padding[128]; /* multiple of 64 */
1322	} ssm;
1323
1324	/** FTM part. */
1325	union
1326	{
1327	#ifdef ___FTMInternal_h
1328	struct FTM s;
1329	#endif
1330	uint8_t padding[512]; /* multiple of 64 */
1331	} ftm;
1332
1333	#ifdef VBOX_WITH_RAW_MODE
1334	/** PATM part. */
1335	union
1336	{
1337	# ifdef ___PATMInternal_h
1338	struct PATM s;
1339	# endif
1340	uint8_t padding[768]; /* multiple of 64 */
1341	} patm;
1342
1343	/** CSAM part. */
1344	union
1345	{
1346	# ifdef ___CSAMInternal_h
1347	struct CSAM s;
1348	# endif
1349	uint8_t padding[1088]; /* multiple of 64 */
1350	} csam;
1351	#endif
1352
1353	#ifdef VBOX_WITH_REM
1354	/** REM part. */
1355	union
1356	{
1357	# ifdef ___REMInternal_h
1358	struct REM s;
1359	# endif
1360	uint8_t padding[0x11100]; /* multiple of 64 */
1361	} rem;
1362	#endif
1363
1364	union
1365	{
1366	#ifdef ___GIMInternal_h
1367	struct GIM s;
1368	#endif
1369	uint8_t padding[448]; /* multiple of 64 */
1370	} gim;
1371
1372	union
1373	{
1374	#ifdef ___APICInternal_h
1375	struct APIC s;
1376	#endif
1377	uint8_t padding[128]; /* multiple of 8 */
1378	} apic;
1379
1380	/* ---- begin small stuff ---- */
1381
1382	/** VM part. */
1383	union
1384	{
1385	#ifdef ___VMInternal_h
1386	struct VMINT s;
1387	#endif
1388	uint8_t padding[24]; /* multiple of 8 */
1389	} vm;
1390
1391	/** CFGM part. */
1392	union
1393	{
1394	#ifdef ___CFGMInternal_h
1395	struct CFGM s;
1396	#endif
1397	uint8_t padding[8]; /* multiple of 8 */
1398	} cfgm;
1399
1400	/** Padding for aligning the cpu array on a page boundary. */
1401	#if defined(VBOX_WITH_REM) && defined(VBOX_WITH_RAW_MODE)
1402	uint8_t abAlignment2[3742];
1403	#elif defined(VBOX_WITH_REM) && !defined(VBOX_WITH_RAW_MODE)
1404	uint8_t abAlignment2[1502];
1405	#elif !defined(VBOX_WITH_REM) && defined(VBOX_WITH_RAW_MODE)
1406	uint8_t abAlignment2[3998];
1407	#else
1408	uint8_t abAlignment2[1758];
1409	#endif
1410
1411	/* ---- end small stuff ---- */
1412
1413	/** VMCPU array for the configured number of virtual CPUs.
1414	* Must be aligned on a page boundary for TLB hit reasons as well as
1415	* alignment of VMCPU members. */
1416	VMCPU aCpus[1];
1417	} VM;
1418
1419
1420	#ifdef IN_RC
1421	RT_C_DECLS_BEGIN
1422
1423	/** The VM structure.
1424	* This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1425	* globals which we should avoid using.
1426	*/
1427	extern DECLIMPORT(VM) g_VM;
1428
1429	RT_C_DECLS_END
1430	#endif
1431
1432	/** @} */
1433
1434	#endif
1435

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