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source: vbox/trunk/include/VBox/vmm/hm.h@ 80268

最後變更 在這個檔案從80268是 80268,由 vboxsync 提交於 6 年 前

VMM: Refactoring VMMAll/* to use VMCC & VMMCPUCC. bugref:9217
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1/** @file
2 * HM - Intel/AMD VM Hardware Assisted Virtualization Manager (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2019 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.alldomusa.eu.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef VBOX_INCLUDED_vmm_hm_h
27#define VBOX_INCLUDED_vmm_hm_h
28#ifndef RT_WITHOUT_PRAGMA_ONCE
29# pragma once
30#endif
31
32#include <VBox/vmm/pgm.h>
33#include <VBox/vmm/cpum.h>
34#include <VBox/vmm/vmm.h>
35#include <VBox/vmm/hm_svm.h>
36#include <VBox/vmm/hm_vmx.h>
37#include <VBox/vmm/trpm.h>
38#include <iprt/mp.h>
39
40
41/** @defgroup grp_hm The Hardware Assisted Virtualization Manager API
42 * @ingroup grp_vmm
43 * @{
44 */
45
46RT_C_DECLS_BEGIN
47
48/**
49 * Checks whether HM (VT-x/AMD-V) is being used by this VM.
50 *
51 * @retval true if used.
52 * @retval false if software virtualization (raw-mode) or NEM is used.
53 *
54 * @param a_pVM The cross context VM structure.
55 * @deprecated Please use VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED, or
56 * VM_IS_HM_ENABLED instead.
57 * @internal
58 */
59#if defined(VBOX_STRICT) && defined(IN_RING3)
60# define HMIsEnabled(a_pVM) HMIsEnabledNotMacro(a_pVM)
61#else
62# define HMIsEnabled(a_pVM) ((a_pVM)->fHMEnabled)
63#endif
64
65/**
66 * Checks whether raw-mode context is required for HM purposes
67 *
68 * @retval true if required by HM for doing switching the cpu to 64-bit mode.
69 * @retval false if not required by HM.
70 *
71 * @param a_pVM The cross context VM structure.
72 * @internal
73 */
74#if HC_ARCH_BITS == 64
75# define HMIsRawModeCtxNeeded(a_pVM) (false)
76#else
77# define HMIsRawModeCtxNeeded(a_pVM) ((a_pVM)->fHMNeedRawModeCtx)
78#endif
79
80/**
81 * Checks whether we're in the special hardware virtualization context.
82 * @returns true / false.
83 * @param a_pVCpu The caller's cross context virtual CPU structure.
84 * @thread EMT
85 */
86#ifdef IN_RING0
87# define HMIsInHwVirtCtx(a_pVCpu) (VMCPU_GET_STATE(a_pVCpu) == VMCPUSTATE_STARTED_HM)
88#else
89# define HMIsInHwVirtCtx(a_pVCpu) (false)
90#endif
91
92/**
93 * Checks whether we're in the special hardware virtualization context and we
94 * cannot perform long jump without guru meditating and possibly messing up the
95 * host and/or guest state.
96 *
97 * This is after we've turned interrupts off and such.
98 *
99 * @returns true / false.
100 * @param a_pVCpu The caller's cross context virtual CPU structure.
101 * @thread EMT
102 */
103#ifdef IN_RING0
104# define HMIsInHwVirtNoLongJmpCtx(a_pVCpu) (VMCPU_GET_STATE(a_pVCpu) == VMCPUSTATE_STARTED_EXEC)
105#else
106# define HMIsInHwVirtNoLongJmpCtx(a_pVCpu) (false)
107#endif
108
109/** @name All-context HM API.
110 * @{ */
111VMMDECL(bool) HMIsEnabledNotMacro(PVM pVM);
112VMMDECL(bool) HMCanExecuteGuest(PVMCPUCC pVCpu, PCCPUMCTX pCtx);
113VMM_INT_DECL(int) HMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt);
114VMM_INT_DECL(bool) HMHasPendingIrq(PVM pVM);
115VMM_INT_DECL(PX86PDPE) HMGetPaePdpes(PVMCPU pVCpu);
116VMM_INT_DECL(bool) HMSetSingleInstruction(PVMCC pVM, PVMCPUCC pVCpu, bool fEnable);
117VMM_INT_DECL(bool) HMIsSvmActive(PVM pVM);
118VMM_INT_DECL(bool) HMIsVmxActive(PVM pVM);
119VMM_INT_DECL(const char *) HMGetVmxDiagDesc(VMXVDIAG enmDiag);
120VMM_INT_DECL(const char *) HMGetVmxAbortDesc(VMXABORT enmAbort);
121VMM_INT_DECL(const char *) HMGetVmxVmcsStateDesc(uint8_t fVmcsState);
122VMM_INT_DECL(const char *) HMGetVmxIdtVectoringInfoTypeDesc(uint8_t uType);
123VMM_INT_DECL(const char *) HMGetVmxExitIntInfoTypeDesc(uint8_t uType);
124VMM_INT_DECL(const char *) HMGetVmxEntryIntInfoTypeDesc(uint8_t uType);
125VMM_INT_DECL(const char *) HMGetVmxExitName(uint32_t uExit);
126VMM_INT_DECL(const char *) HMGetSvmExitName(uint32_t uExit);
127VMM_INT_DECL(void) HMDumpHwvirtVmxState(PVMCPU pVCpu);
128VMM_INT_DECL(void) HMHCChangedPagingMode(PVM pVM, PVMCPU pVCpu, PGMMODE enmShadowMode, PGMMODE enmGuestMode);
129VMM_INT_DECL(void) HMGetVmxMsrsFromHwvirtMsrs(PCSUPHWVIRTMSRS pMsrs, PVMXMSRS pVmxMsrs);
130VMM_INT_DECL(void) HMGetSvmMsrsFromHwvirtMsrs(PCSUPHWVIRTMSRS pMsrs, PSVMMSRS pSvmMsrs);
131/** @} */
132
133/** @name All-context VMX helpers.
134 *
135 * These are hardware-assisted VMX functions (used by IEM/REM/CPUM and HM). Helpers
136 * based purely on the Intel VT-x specification (used by IEM/REM and HM) can be
137 * found in CPUM.
138 * @{ */
139VMM_INT_DECL(bool) HMCanExecuteVmxGuest(PVM pVM, PVMCPU pVCpu, PCCPUMCTX pCtx);
140VMM_INT_DECL(TRPMEVENT) HMVmxEventTypeToTrpmEventType(uint32_t uIntInfo);
141VMM_INT_DECL(uint32_t) HMTrpmEventTypeToVmxEventType(uint8_t uVector, TRPMEVENT enmTrpmEvent);
142/** @} */
143
144/** @name All-context SVM helpers.
145 *
146 * These are hardware-assisted SVM functions (used by IEM/REM/CPUM and HM). Helpers
147 * based purely on the AMD SVM specification (used by IEM/REM and HM) can be found
148 * in CPUM.
149 * @{ */
150VMM_INT_DECL(TRPMEVENT) HMSvmEventToTrpmEventType(PCSVMEVENT pSvmEvent, uint8_t uVector);
151/** @} */
152
153#ifndef IN_RC
154
155/** @name R0, R3 HM (VMX/SVM agnostic) handlers.
156 * @{ */
157VMM_INT_DECL(int) HMFlushTlb(PVMCPU pVCpu);
158VMM_INT_DECL(int) HMFlushTlbOnAllVCpus(PVMCC pVM);
159VMM_INT_DECL(int) HMInvalidatePageOnAllVCpus(PVM pVM, RTGCPTR GCVirt);
160VMM_INT_DECL(int) HMInvalidatePhysPage(PVMCC pVM, RTGCPHYS GCPhys);
161VMM_INT_DECL(bool) HMAreNestedPagingAndFullGuestExecEnabled(PVM pVM);
162VMM_INT_DECL(bool) HMIsLongModeAllowed(PVM pVM);
163VMM_INT_DECL(bool) HMIsNestedPagingActive(PVM pVM);
164VMM_INT_DECL(bool) HMIsMsrBitmapActive(PVM pVM);
165# ifdef VBOX_WITH_NESTED_HWVIRT_VMX
166VMM_INT_DECL(void) HMNotifyVmxNstGstVmexit(PVMCPU pVCpu);
167VMM_INT_DECL(void) HMNotifyVmxNstGstCurrentVmcsChanged(PVMCPU pVCpu);
168# endif
169/** @} */
170
171/** @name R0, R3 SVM handlers.
172 * @{ */
173VMM_INT_DECL(bool) HMIsSvmVGifActive(PVM pVM);
174# ifdef VBOX_WITH_NESTED_HWVIRT_SVM
175VMM_INT_DECL(void) HMNotifySvmNstGstVmexit(PVMCPU pVCpu, PCPUMCTX pCtx);
176# endif
177VMM_INT_DECL(int) HMIsSubjectToSvmErratum170(uint32_t *pu32Family, uint32_t *pu32Model, uint32_t *pu32Stepping);
178VMM_INT_DECL(int) HMHCMaybeMovTprSvmHypercall(PVMCC pVM, PVMCPUCC pVCpu);
179/** @} */
180
181#else /* Nops in RC: */
182
183/** @name RC HM (VMX/SVM agnostic) handlers.
184 * @{ */
185# define HMFlushTlb(pVCpu) do { } while (0)
186# define HMFlushTlbOnAllVCpus(pVM) do { } while (0)
187# define HMInvalidatePageOnAllVCpus(pVM, GCVirt) do { } while (0)
188# define HMInvalidatePhysPage(pVM, GCVirt) do { } while (0)
189# define HMAreNestedPagingAndFullGuestExecEnabled(pVM) false
190# define HMIsLongModeAllowed(pVM) false
191# define HMIsNestedPagingActive(pVM) false
192# define HMIsMsrBitmapsActive(pVM) false
193/** @} */
194
195/** @name RC SVM handlers.
196 * @{ */
197# define HMIsSvmVGifActive(pVM) false
198# define HMNotifySvmNstGstVmexit(pVCpu, pCtx) do { } while (0)
199# define HMIsSubjectToSvmErratum170(puFamily, puModel, puStepping) false
200# define HMHCMaybeMovTprSvmHypercall(pVM, pVCpu) do { } while (0)
201/** @} */
202
203#endif
204
205#ifdef IN_RING0
206/** @defgroup grp_hm_r0 The HM ring-0 Context API
207 * @{
208 */
209VMMR0_INT_DECL(int) HMR0Init(void);
210VMMR0_INT_DECL(int) HMR0Term(void);
211VMMR0_INT_DECL(int) HMR0InitVM(PVM pVM);
212VMMR0_INT_DECL(int) HMR0TermVM(PVM pVM);
213VMMR0_INT_DECL(int) HMR0EnableAllCpus(PVM pVM);
214# ifdef VBOX_WITH_RAW_MODE
215VMMR0_INT_DECL(int) HMR0EnterSwitcher(PVM pVM, VMMSWITCHER enmSwitcher, bool *pfVTxDisabled);
216VMMR0_INT_DECL(void) HMR0LeaveSwitcher(PVM pVM, bool fVTxDisabled);
217# endif
218
219VMMR0_INT_DECL(int) HMR0SetupVM(PVM pVM);
220VMMR0_INT_DECL(int) HMR0RunGuestCode(PVM pVM, PVMCPU pVCpu);
221VMMR0_INT_DECL(int) HMR0Enter(PVMCPU pVCpu);
222VMMR0_INT_DECL(int) HMR0LeaveCpu(PVMCPU pVCpu);
223VMMR0_INT_DECL(void) HMR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, void *pvUser);
224VMMR0_INT_DECL(void) HMR0NotifyCpumUnloadedGuestFpuState(PVMCPU VCpu);
225VMMR0_INT_DECL(void) HMR0NotifyCpumModifiedHostCr0(PVMCPU VCpu);
226VMMR0_INT_DECL(bool) HMR0SuspendPending(void);
227VMMR0_INT_DECL(int) HMR0InvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt);
228VMMR0_INT_DECL(int) HMR0ImportStateOnDemand(PVMCPU pVCpu, uint64_t fWhat);
229
230/** @} */
231#endif /* IN_RING0 */
232
233
234#ifdef IN_RING3
235/** @defgroup grp_hm_r3 The HM ring-3 Context API
236 * @{
237 */
238VMMR3DECL(bool) HMR3IsEnabled(PUVM pUVM);
239VMMR3DECL(bool) HMR3IsNestedPagingActive(PUVM pUVM);
240VMMR3DECL(bool) HMR3IsVirtApicRegsEnabled(PUVM pUVM);
241VMMR3DECL(bool) HMR3IsPostedIntrsEnabled(PUVM pUVM);
242VMMR3DECL(bool) HMR3IsVpidActive(PUVM pUVM);
243VMMR3DECL(bool) HMR3IsUXActive(PUVM pUVM);
244VMMR3DECL(bool) HMR3IsSvmEnabled(PUVM pUVM);
245VMMR3DECL(bool) HMR3IsVmxEnabled(PUVM pUVM);
246
247VMMR3_INT_DECL(int) HMR3Init(PVM pVM);
248VMMR3_INT_DECL(int) HMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
249VMMR3_INT_DECL(void) HMR3Relocate(PVM pVM);
250VMMR3_INT_DECL(int) HMR3Term(PVM pVM);
251VMMR3_INT_DECL(void) HMR3Reset(PVM pVM);
252VMMR3_INT_DECL(void) HMR3ResetCpu(PVMCPU pVCpu);
253VMMR3_INT_DECL(void) HMR3CheckError(PVM pVM, int iStatusCode);
254VMMR3_INT_DECL(void) HMR3NotifyDebugEventChanged(PVM pVM);
255VMMR3_INT_DECL(void) HMR3NotifyDebugEventChangedPerCpu(PVM pVM, PVMCPU pVCpu);
256VMMR3_INT_DECL(bool) HMR3IsActive(PCVMCPU pVCpu);
257VMMR3_INT_DECL(int) HMR3EnablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
258VMMR3_INT_DECL(int) HMR3DisablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
259VMMR3_INT_DECL(int) HMR3PatchTprInstr(PVM pVM, PVMCPU pVCpu);
260VMMR3_INT_DECL(bool) HMR3IsRescheduleRequired(PVM pVM, PCCPUMCTX pCtx);
261VMMR3_INT_DECL(bool) HMR3IsVmxPreemptionTimerUsed(PVM pVM);
262/** @} */
263#endif /* IN_RING3 */
264
265/** @} */
266RT_C_DECLS_END
267
268
269#endif /* !VBOX_INCLUDED_vmm_hm_h */
270
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