VirtualBox

source: vbox/trunk/include/VBox/dis.h@ 99232

最後變更 在這個檔案從99232是 99232,由 vboxsync 提交於 2 年 前

Disassember,*: Start separating the disassembler into a architecture specific and common part, bugref:10394 [build fixes]
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1/** @file
2 * DIS - The VirtualBox Disassembler.
3 */
4
5/*
6 * Copyright (C) 2006-2023 Oracle and/or its affiliates.
7 *
8 * This file is part of VirtualBox base platform packages, as
9 * available from https://www.alldomusa.eu.org.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation, in version 3 of the
14 * License.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, see <https://www.gnu.org/licenses>.
23 *
24 * The contents of this file may alternatively be used under the terms
25 * of the Common Development and Distribution License Version 1.0
26 * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
27 * in the VirtualBox distribution, in which case the provisions of the
28 * CDDL are applicable instead of those of the GPL.
29 *
30 * You may elect to license modified versions of this file under the
31 * terms and conditions of either the GPL or the CDDL or both.
32 *
33 * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
34 */
35
36#ifndef VBOX_INCLUDED_dis_h
37#define VBOX_INCLUDED_dis_h
38#ifndef RT_WITHOUT_PRAGMA_ONCE
39# pragma once
40#endif
41
42#include <VBox/types.h>
43#include <VBox/dis-x86-amd64.h>
44#include <iprt/assert.h>
45
46
47RT_C_DECLS_BEGIN
48
49/** @defgroup grp_dis VBox Disassembler
50 * @{ */
51
52/** @name Operand type (DISOPCODEX86::fOpType).
53 * @{
54 */
55#define DISOPTYPE_INVALID RT_BIT_32(0)
56#define DISOPTYPE_HARMLESS RT_BIT_32(1)
57#define DISOPTYPE_CONTROLFLOW RT_BIT_32(2)
58#define DISOPTYPE_POTENTIALLY_DANGEROUS RT_BIT_32(3)
59#define DISOPTYPE_DANGEROUS RT_BIT_32(4)
60#define DISOPTYPE_PORTIO RT_BIT_32(5)
61#define DISOPTYPE_PRIVILEGED RT_BIT_32(6)
62#define DISOPTYPE_PRIVILEGED_NOTRAP RT_BIT_32(7)
63#define DISOPTYPE_UNCOND_CONTROLFLOW RT_BIT_32(8)
64#define DISOPTYPE_RELATIVE_CONTROLFLOW RT_BIT_32(9)
65#define DISOPTYPE_COND_CONTROLFLOW RT_BIT_32(10)
66#define DISOPTYPE_INTERRUPT RT_BIT_32(11)
67#define DISOPTYPE_ILLEGAL RT_BIT_32(12)
68#define DISOPTYPE_RRM_DANGEROUS RT_BIT_32(14) /**< Some additional dangerous ones when recompiling raw r0. */
69#define DISOPTYPE_RRM_DANGEROUS_16 RT_BIT_32(15) /**< Some additional dangerous ones when recompiling 16-bit raw r0. */
70#define DISOPTYPE_RRM_MASK (DISOPTYPE_RRM_DANGEROUS | DISOPTYPE_RRM_DANGEROUS_16)
71#define DISOPTYPE_INHIBIT_IRQS RT_BIT_32(16) /**< Will or can inhibit irqs (sti, pop ss, mov ss) */
72
73#define DISOPTYPE_X86_PORTIO_READ RT_BIT_32(17)
74#define DISOPTYPE_X86_PORTIO_WRITE RT_BIT_32(18)
75#define DISOPTYPE_X86_INVALID_64 RT_BIT_32(19) /**< Invalid in 64 bits mode */
76#define DISOPTYPE_X86_ONLY_64 RT_BIT_32(20) /**< Only valid in 64 bits mode */
77#define DISOPTYPE_X86_DEFAULT_64_OP_SIZE RT_BIT_32(21) /**< Default 64 bits operand size */
78#define DISOPTYPE_X86_FORCED_64_OP_SIZE RT_BIT_32(22) /**< Forced 64 bits operand size; regardless of prefix bytes */
79#define DISOPTYPE_X86_REXB_EXTENDS_OPREG RT_BIT_32(23) /**< REX.B extends the register field in the opcode byte */
80#define DISOPTYPE_X86_MOD_FIXED_11 RT_BIT_32(24) /**< modrm.mod is always 11b */
81#define DISOPTYPE_X86_FORCED_32_OP_SIZE_X86 RT_BIT_32(25) /**< Forced 32 bits operand size; regardless of prefix bytes (only in 16 & 32 bits mode!) */
82#define DISOPTYPE_X86_AVX RT_BIT_32(28) /**< AVX,AVX2,++ instruction. Not implemented yet! */
83#define DISOPTYPE_X86_SSE RT_BIT_32(29) /**< SSE,SSE2,SSE3,SSE4,++ instruction. Not implemented yet! */
84#define DISOPTYPE_X86_MMX RT_BIT_32(30) /**< MMX,MMXExt,3DNow,++ instruction. Not implemented yet! */
85#define DISOPTYPE_X86_FPU RT_BIT_32(31) /**< FPU instruction. Not implemented yet! */
86#define DISOPTYPE_ALL UINT32_C(0xffffffff)
87/** @} */
88
89
90/**
91 * Opcode descriptor.
92 */
93#if !defined(DIS_CORE_ONLY) || defined(DOXYGEN_RUNNING)
94typedef struct DISOPCODE
95{
96# define DISOPCODE_FORMAT 0
97 /** Mnemonic and operand formatting. */
98 const char *pszOpcode;
99 /** Parameter \#1 parser index. */
100 uint8_t idxParse1;
101 /** Parameter \#2 parser index. */
102 uint8_t idxParse2;
103 /** Parameter \#3 parser index. */
104 uint8_t idxParse3;
105 /** Parameter \#4 parser index. */
106 uint8_t idxParse4;
107 /** The opcode identifier. This DIS specific, @see grp_dis_opcodes and
108 * VBox/disopcode-x86-amd64.h. */
109 uint16_t uOpcode;
110 /** Parameter \#1 info, @see grp_dis_opparam. */
111 uint16_t fParam1;
112 /** Parameter \#2 info, @see grp_dis_opparam. */
113 uint16_t fParam2;
114 /** Parameter \#3 info, @see grp_dis_opparam. */
115 uint16_t fParam3;
116 /** Parameter \#4 info, @see grp_dis_opparam. */
117 uint16_t fParam4;
118 /** padding unused */
119 uint16_t uPadding;
120 /** Operand type flags, DISOPTYPE_XXX. */
121 uint32_t fOpType;
122} DISOPCODE;
123#else
124# pragma pack(1)
125typedef struct DISOPCODE
126{
127#if 1 /*!defined(RT_ARCH_X86) && !defined(RT_ARCH_AMD64) - probably not worth it for ~4K, costs 2-3% speed. */
128 /* 16 bytes (trick is to make sure the bitfields doesn't cross dwords): */
129# define DISOPCODE_FORMAT 16
130 uint32_t fOpType;
131 uint16_t uOpcode;
132 uint8_t idxParse1;
133 uint8_t idxParse2;
134 uint32_t fParam1 : 12; /* 1st dword: 12+12+8 = 0x20 (32) */
135 uint32_t fParam2 : 12;
136 uint32_t idxParse3 : 8;
137 uint32_t fParam3 : 12; /* 2nd dword: 12+12+8 = 0x20 (32) */
138 uint32_t fParam4 : 12;
139 uint32_t idxParse4 : 8;
140#else /* 15 bytes: */
141# define DISOPCODE_FORMAT 15
142 uint64_t uOpcode : 10; /* 1st qword: 10+12+12+12+6+6+6 = 0x40 (64) */
143 uint64_t idxParse1 : 6;
144 uint64_t idxParse2 : 6;
145 uint64_t idxParse3 : 6;
146 uint64_t fParam1 : 12;
147 uint64_t fParam2 : 12;
148 uint64_t fParam3 : 12;
149 uint32_t fOpType;
150 uint16_t fParam4;
151 uint8_t idxParse4;
152#endif
153} DISOPCODE;
154# pragma pack()
155AssertCompile(sizeof(DISOPCODE) == DISOPCODE_FORMAT);
156#endif
157AssertCompile(DISOPCODE_FORMAT != 15); /* Needs fixing before use as disopcode.h now has more than 1024 opcode values. */
158
159
160/** @name Parameter usage flags.
161 * @{
162 */
163#define DISUSE_BASE RT_BIT_64(0)
164#define DISUSE_INDEX RT_BIT_64(1)
165#define DISUSE_SCALE RT_BIT_64(2)
166#define DISUSE_REG_GEN8 RT_BIT_64(3)
167#define DISUSE_REG_GEN16 RT_BIT_64(4)
168#define DISUSE_REG_GEN32 RT_BIT_64(5)
169#define DISUSE_REG_GEN64 RT_BIT_64(6)
170#define DISUSE_REG_FP RT_BIT_64(7)
171#define DISUSE_REG_MMX RT_BIT_64(8)
172#define DISUSE_REG_XMM RT_BIT_64(9)
173#define DISUSE_REG_YMM RT_BIT_64(10)
174#define DISUSE_REG_CR RT_BIT_64(11)
175#define DISUSE_REG_DBG RT_BIT_64(12)
176#define DISUSE_REG_SEG RT_BIT_64(13)
177#define DISUSE_REG_TEST RT_BIT_64(14)
178#define DISUSE_DISPLACEMENT8 RT_BIT_64(15)
179#define DISUSE_DISPLACEMENT16 RT_BIT_64(16)
180#define DISUSE_DISPLACEMENT32 RT_BIT_64(17)
181#define DISUSE_DISPLACEMENT64 RT_BIT_64(18)
182#define DISUSE_RIPDISPLACEMENT32 RT_BIT_64(19)
183#define DISUSE_IMMEDIATE8 RT_BIT_64(20)
184#define DISUSE_IMMEDIATE8_REL RT_BIT_64(21)
185#define DISUSE_IMMEDIATE16 RT_BIT_64(22)
186#define DISUSE_IMMEDIATE16_REL RT_BIT_64(23)
187#define DISUSE_IMMEDIATE32 RT_BIT_64(24)
188#define DISUSE_IMMEDIATE32_REL RT_BIT_64(25)
189#define DISUSE_IMMEDIATE64 RT_BIT_64(26)
190#define DISUSE_IMMEDIATE64_REL RT_BIT_64(27)
191#define DISUSE_IMMEDIATE_ADDR_0_32 RT_BIT_64(28)
192#define DISUSE_IMMEDIATE_ADDR_16_32 RT_BIT_64(29)
193#define DISUSE_IMMEDIATE_ADDR_0_16 RT_BIT_64(30)
194#define DISUSE_IMMEDIATE_ADDR_16_16 RT_BIT_64(31)
195/** DS:ESI */
196#define DISUSE_POINTER_DS_BASED RT_BIT_64(32)
197/** ES:EDI */
198#define DISUSE_POINTER_ES_BASED RT_BIT_64(33)
199#define DISUSE_IMMEDIATE16_SX8 RT_BIT_64(34)
200#define DISUSE_IMMEDIATE32_SX8 RT_BIT_64(35)
201#define DISUSE_IMMEDIATE64_SX8 RT_BIT_64(36)
202
203/** Mask of immediate use flags. */
204#define DISUSE_IMMEDIATE ( DISUSE_IMMEDIATE8 \
205 | DISUSE_IMMEDIATE16 \
206 | DISUSE_IMMEDIATE32 \
207 | DISUSE_IMMEDIATE64 \
208 | DISUSE_IMMEDIATE8_REL \
209 | DISUSE_IMMEDIATE16_REL \
210 | DISUSE_IMMEDIATE32_REL \
211 | DISUSE_IMMEDIATE64_REL \
212 | DISUSE_IMMEDIATE_ADDR_0_32 \
213 | DISUSE_IMMEDIATE_ADDR_16_32 \
214 | DISUSE_IMMEDIATE_ADDR_0_16 \
215 | DISUSE_IMMEDIATE_ADDR_16_16 \
216 | DISUSE_IMMEDIATE16_SX8 \
217 | DISUSE_IMMEDIATE32_SX8 \
218 | DISUSE_IMMEDIATE64_SX8)
219/** Check if the use flags indicates an effective address. */
220#define DISUSE_IS_EFFECTIVE_ADDR(a_fUseFlags) (!!( (a_fUseFlags) \
221 & ( DISUSE_BASE \
222 | DISUSE_INDEX \
223 | DISUSE_DISPLACEMENT32 \
224 | DISUSE_DISPLACEMENT64 \
225 | DISUSE_DISPLACEMENT16 \
226 | DISUSE_DISPLACEMENT8 \
227 | DISUSE_RIPDISPLACEMENT32) ))
228/** @} */
229
230
231/**
232 * Opcode parameter (operand) details.
233 */
234typedef struct DISOPPARAM
235{
236 /** A combination of DISUSE_XXX. */
237 uint64_t fUse;
238 /** Immediate value or address, applicable if any of the flags included in
239 * DISUSE_IMMEDIATE are set in fUse. */
240 uint64_t uValue;
241
242 /** Architecture specific parameter state. */
243 union
244 {
245 /** x86/amd64 specific state. */
246 DISOPPARAMX86 x86;
247 } arch;
248
249} DISOPPARAM;
250AssertCompileSize(DISOPPARAM, 32);
251/** Pointer to opcode parameter. */
252typedef const DISOPPARAM *PCDISOPPARAM;
253
254
255/**
256 * Callback for reading instruction bytes.
257 *
258 * @returns VBox status code, bytes in DISSTATE::u::abInstr and byte count in
259 * DISSTATE::cbCachedInstr.
260 * @param pDis Pointer to the disassembler state. The user
261 * argument can be found in DISSTATE::pvUser if needed.
262 * @param offInstr The offset relative to the start of the instruction.
263 *
264 * To get the source address, add this to
265 * DISSTATE::uInstrAddr.
266 *
267 * To calculate the destination buffer address, use it
268 * as an index into DISSTATE::abInstr.
269 *
270 * @param cbMinRead The minimum number of bytes to read.
271 * @param cbMaxRead The maximum number of bytes that may be read.
272 */
273typedef DECLCALLBACKTYPE(int, FNDISREADBYTES,(PDISSTATE pDis, uint8_t offInstr, uint8_t cbMinRead, uint8_t cbMaxRead));
274/** Pointer to a opcode byte reader. */
275typedef FNDISREADBYTES *PFNDISREADBYTES;
276
277
278/**
279 * The diassembler state and result.
280 */
281typedef struct DISSTATE
282{
283 /** The instruction as different views. */
284 union
285 {
286 /** The instruction bytes. */
287 uint8_t abInstr[16];
288 /** Single 16-bit view. */
289 uint16_t u16;
290 /** Single 32-bit view. */
291 uint32_t u32;
292 /** 16-bit view. */
293 uint16_t au16Instr[8];
294 /** 32-bit view. */
295 uint32_t au32Instr[4];
296 /** 64-bit view. */
297 uint64_t au64Instr[2];
298 } u;
299
300 /** Pointer to the current instruction. */
301 PCDISOPCODE pCurInstr;
302#if ARCH_BITS == 32
303 uint32_t uPtrPadding2;
304#endif
305
306 DISOPPARAM Param1;
307 DISOPPARAM Param2;
308 DISOPPARAM Param3;
309 DISOPPARAM Param4;
310
311 /** The number of valid bytes in abInstr. */
312 uint8_t cbCachedInstr;
313 /** The CPU mode (DISCPUMODE). */
314 uint8_t uCpuMode;
315 /** The instruction size. */
316 uint8_t cbInstr;
317 /** Unused bytes. */
318 uint8_t abUnused[1];
319
320 /** Return code set by a worker function like the opcode bytes readers. */
321 int32_t rc;
322 /** The address of the instruction. */
323 RTUINTPTR uInstrAddr;
324 /** Optional read function */
325 PFNDISREADBYTES pfnReadBytes;
326#if ARCH_BITS == 32
327 uint32_t uPadding3;
328#endif
329 /** User data supplied as an argument to the APIs. */
330 void *pvUser;
331#if ARCH_BITS == 32
332 uint32_t uPadding4;
333#endif
334
335 /** Architecture specific state. */
336 union
337 {
338 /** x86/amd64 specific state. */
339 DISSTATEX86 x86;
340 } arch;
341
342} DISSTATE;
343AssertCompileMemberAlignment(DISSTATE, arch, 8);
344AssertCompileSize(DISSTATE, 0xd8);
345
346
347
348DISDECL(int) DISInstrToStr(void const *pvInstr, DISCPUMODE enmCpuMode,
349 PDISSTATE pDis, uint32_t *pcbInstr, char *pszOutput, size_t cbOutput);
350DISDECL(int) DISInstrToStrWithReader(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, PFNDISREADBYTES pfnReadBytes, void *pvUser,
351 PDISSTATE pDis, uint32_t *pcbInstr, char *pszOutput, size_t cbOutput);
352DISDECL(int) DISInstrToStrEx(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode,
353 PFNDISREADBYTES pfnReadBytes, void *pvUser, uint32_t uFilter,
354 PDISSTATE pDis, uint32_t *pcbInstr, char *pszOutput, size_t cbOutput);
355
356DISDECL(int) DISInstr(void const *pvInstr, DISCPUMODE enmCpuMode, PDISSTATE pDis, uint32_t *pcbInstr);
357DISDECL(int) DISInstrWithReader(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, PFNDISREADBYTES pfnReadBytes, void *pvUser,
358 PDISSTATE pDis, uint32_t *pcbInstr);
359DISDECL(int) DISInstrEx(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, uint32_t uFilter,
360 PFNDISREADBYTES pfnReadBytes, void *pvUser,
361 PDISSTATE pDis, uint32_t *pcbInstr);
362DISDECL(int) DISInstrWithPrefetchedBytes(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, uint32_t fFilter,
363 void const *pvPrefetched, size_t cbPretched,
364 PFNDISREADBYTES pfnReadBytes, void *pvUser,
365 PDISSTATE pDis, uint32_t *pcbInstr);
366
367DISDECL(uint8_t) DISGetParamSize(PCDISSTATE pDis, PCDISOPPARAM pParam);
368#if 0 /* unused */
369DISDECL(DISSELREG) DISDetectSegReg(PCDISSTATE pDis, PCDISOPPARAM pParam);
370DISDECL(uint8_t) DISQuerySegPrefixByte(PCDISSTATE pDis);
371#endif
372
373#if 0 /* Needs refactoring if we want to use this again, CPUMCTXCORE is history. */
374/** @name Flags returned by DISQueryParamVal (DISQPVPARAMVAL::flags).
375 * @{
376 */
377#define DISQPV_FLAG_8 UINT8_C(0x01)
378#define DISQPV_FLAG_16 UINT8_C(0x02)
379#define DISQPV_FLAG_32 UINT8_C(0x04)
380#define DISQPV_FLAG_64 UINT8_C(0x08)
381#define DISQPV_FLAG_FARPTR16 UINT8_C(0x10)
382#define DISQPV_FLAG_FARPTR32 UINT8_C(0x20)
383/** @} */
384
385/** @name Types returned by DISQueryParamVal (DISQPVPARAMVAL::flags).
386 * @{ */
387#define DISQPV_TYPE_REGISTER UINT8_C(1)
388#define DISQPV_TYPE_ADDRESS UINT8_C(2)
389#define DISQPV_TYPE_IMMEDIATE UINT8_C(3)
390/** @} */
391
392typedef struct
393{
394 union
395 {
396 uint8_t val8;
397 uint16_t val16;
398 uint32_t val32;
399 uint64_t val64;
400
401 int8_t i8;
402 int16_t i16;
403 int32_t i32;
404 int64_t i64;
405
406 struct
407 {
408 uint16_t sel;
409 uint32_t offset;
410 } farptr;
411 } val;
412
413 uint8_t type;
414 uint8_t size;
415 uint8_t flags;
416} DISQPVPARAMVAL;
417/** Pointer to opcode parameter value. */
418typedef DISQPVPARAMVAL *PDISQPVPARAMVAL;
419
420/** Indicates which parameter DISQueryParamVal should operate on. */
421typedef enum DISQPVWHICH
422{
423 DISQPVWHICH_DST = 1,
424 DISQPVWHICH_SRC,
425 DISQPVWHAT_32_BIT_HACK = 0x7fffffff
426} DISQPVWHICH;
427DISDECL(int) DISQueryParamVal(PCPUMCTXCORE pCtx, PCDISSTATE pDis, PCDISOPPARAM pParam, PDISQPVPARAMVAL pParamVal, DISQPVWHICH parmtype);
428DISDECL(int) DISQueryParamRegPtr(PCPUMCTXCORE pCtx, PCDISSTATE pDis, PCDISOPPARAM pParam, void **ppReg, size_t *pcbSize);
429
430DISDECL(int) DISFetchReg8(PCCPUMCTXCORE pCtx, unsigned reg8, uint8_t *pVal);
431DISDECL(int) DISFetchReg16(PCCPUMCTXCORE pCtx, unsigned reg16, uint16_t *pVal);
432DISDECL(int) DISFetchReg32(PCCPUMCTXCORE pCtx, unsigned reg32, uint32_t *pVal);
433DISDECL(int) DISFetchReg64(PCCPUMCTXCORE pCtx, unsigned reg64, uint64_t *pVal);
434DISDECL(int) DISFetchRegSeg(PCCPUMCTXCORE pCtx, DISSELREG sel, RTSEL *pVal);
435DISDECL(int) DISWriteReg8(PCPUMCTXCORE pRegFrame, unsigned reg8, uint8_t val8);
436DISDECL(int) DISWriteReg16(PCPUMCTXCORE pRegFrame, unsigned reg32, uint16_t val16);
437DISDECL(int) DISWriteReg32(PCPUMCTXCORE pRegFrame, unsigned reg32, uint32_t val32);
438DISDECL(int) DISWriteReg64(PCPUMCTXCORE pRegFrame, unsigned reg64, uint64_t val64);
439DISDECL(int) DISWriteRegSeg(PCPUMCTXCORE pCtx, DISSELREG sel, RTSEL val);
440DISDECL(int) DISPtrReg8(PCPUMCTXCORE pCtx, unsigned reg8, uint8_t **ppReg);
441DISDECL(int) DISPtrReg16(PCPUMCTXCORE pCtx, unsigned reg16, uint16_t **ppReg);
442DISDECL(int) DISPtrReg32(PCPUMCTXCORE pCtx, unsigned reg32, uint32_t **ppReg);
443DISDECL(int) DISPtrReg64(PCPUMCTXCORE pCtx, unsigned reg64, uint64_t **ppReg);
444#endif /* obsolete */
445
446
447/**
448 * Try resolve an address into a symbol name.
449 *
450 * For use with DISFormatYasmEx(), DISFormatMasmEx() and DISFormatGasEx().
451 *
452 * @returns VBox status code.
453 * @retval VINF_SUCCESS on success, pszBuf contains the full symbol name.
454 * @retval VINF_BUFFER_OVERFLOW if pszBuf is too small the symbol name. The
455 * content of pszBuf is truncated and zero terminated.
456 * @retval VERR_SYMBOL_NOT_FOUND if no matching symbol was found for the address.
457 *
458 * @param pDis Pointer to the disassembler CPU state.
459 * @param u32Sel The selector value. Use DIS_FMT_SEL_IS_REG, DIS_FMT_SEL_GET_VALUE,
460 * DIS_FMT_SEL_GET_REG to access this.
461 * @param uAddress The segment address.
462 * @param pszBuf Where to store the symbol name
463 * @param cchBuf The size of the buffer.
464 * @param poff If not a perfect match, then this is where the offset from the return
465 * symbol to the specified address is returned.
466 * @param pvUser The user argument.
467 */
468typedef DECLCALLBACKTYPE(int, FNDISGETSYMBOL,(PCDISSTATE pDis, uint32_t u32Sel, RTUINTPTR uAddress, char *pszBuf, size_t cchBuf,
469 RTINTPTR *poff, void *pvUser));
470/** Pointer to a FNDISGETSYMBOL(). */
471typedef FNDISGETSYMBOL *PFNDISGETSYMBOL;
472
473/**
474 * Checks if the FNDISGETSYMBOL argument u32Sel is a register or not.
475 */
476#define DIS_FMT_SEL_IS_REG(u32Sel) ( !!((u32Sel) & RT_BIT(31)) )
477
478/**
479 * Extracts the selector value from the FNDISGETSYMBOL argument u32Sel.
480 * @returns Selector value.
481 */
482#define DIS_FMT_SEL_GET_VALUE(u32Sel) ( (RTSEL)(u32Sel) )
483
484/**
485 * Extracts the register number from the FNDISGETSYMBOL argument u32Sel.
486 * @returns USE_REG_CS, USE_REG_SS, USE_REG_DS, USE_REG_ES, USE_REG_FS or USE_REG_FS.
487 */
488#define DIS_FMT_SEL_GET_REG(u32Sel) ( ((u32Sel) >> 16) & 0xf )
489
490/** @internal */
491#define DIS_FMT_SEL_FROM_REG(uReg) ( ((uReg) << 16) | RT_BIT(31) | 0xffff )
492/** @internal */
493#define DIS_FMT_SEL_FROM_VALUE(Sel) ( (Sel) & 0xffff )
494
495
496/** @name Flags for use with DISFormatYasmEx(), DISFormatMasmEx() and DISFormatGasEx().
497 * @{
498 */
499/** Put the address to the right. */
500#define DIS_FMT_FLAGS_ADDR_RIGHT RT_BIT_32(0)
501/** Put the address to the left. */
502#define DIS_FMT_FLAGS_ADDR_LEFT RT_BIT_32(1)
503/** Put the address in comments.
504 * For some assemblers this implies placing it to the right. */
505#define DIS_FMT_FLAGS_ADDR_COMMENT RT_BIT_32(2)
506/** Put the instruction bytes to the right of the disassembly. */
507#define DIS_FMT_FLAGS_BYTES_RIGHT RT_BIT_32(3)
508/** Put the instruction bytes to the left of the disassembly. */
509#define DIS_FMT_FLAGS_BYTES_LEFT RT_BIT_32(4)
510/** Put the instruction bytes in comments.
511 * For some assemblers this implies placing the bytes to the right. */
512#define DIS_FMT_FLAGS_BYTES_COMMENT RT_BIT_32(5)
513/** Put the bytes in square brackets. */
514#define DIS_FMT_FLAGS_BYTES_BRACKETS RT_BIT_32(6)
515/** Put spaces between the bytes. */
516#define DIS_FMT_FLAGS_BYTES_SPACED RT_BIT_32(7)
517/** Display the relative +/- offset of branch instructions that uses relative addresses,
518 * and put the target address in parenthesis. */
519#define DIS_FMT_FLAGS_RELATIVE_BRANCH RT_BIT_32(8)
520/** Strict assembly. The assembly should, when ever possible, make the
521 * assembler reproduce the exact same binary. (Refers to the yasm
522 * strict keyword.) */
523#define DIS_FMT_FLAGS_STRICT RT_BIT_32(9)
524/** Checks if the given flags are a valid combination. */
525#define DIS_FMT_FLAGS_IS_VALID(fFlags) \
526 ( !((fFlags) & ~UINT32_C(0x000003ff)) \
527 && ((fFlags) & (DIS_FMT_FLAGS_ADDR_RIGHT | DIS_FMT_FLAGS_ADDR_LEFT)) != (DIS_FMT_FLAGS_ADDR_RIGHT | DIS_FMT_FLAGS_ADDR_LEFT) \
528 && ( !((fFlags) & DIS_FMT_FLAGS_ADDR_COMMENT) \
529 || (fFlags & (DIS_FMT_FLAGS_ADDR_RIGHT | DIS_FMT_FLAGS_ADDR_LEFT)) ) \
530 && ((fFlags) & (DIS_FMT_FLAGS_BYTES_RIGHT | DIS_FMT_FLAGS_BYTES_LEFT)) != (DIS_FMT_FLAGS_BYTES_RIGHT | DIS_FMT_FLAGS_BYTES_LEFT) \
531 && ( !((fFlags) & (DIS_FMT_FLAGS_BYTES_COMMENT | DIS_FMT_FLAGS_BYTES_BRACKETS)) \
532 || (fFlags & (DIS_FMT_FLAGS_BYTES_RIGHT | DIS_FMT_FLAGS_BYTES_LEFT)) ) \
533 )
534/** @} */
535
536DISDECL(size_t) DISFormatYasm( PCDISSTATE pDis, char *pszBuf, size_t cchBuf);
537DISDECL(size_t) DISFormatYasmEx(PCDISSTATE pDis, char *pszBuf, size_t cchBuf, uint32_t fFlags, PFNDISGETSYMBOL pfnGetSymbol, void *pvUser);
538DISDECL(size_t) DISFormatMasm( PCDISSTATE pDis, char *pszBuf, size_t cchBuf);
539DISDECL(size_t) DISFormatMasmEx(PCDISSTATE pDis, char *pszBuf, size_t cchBuf, uint32_t fFlags, PFNDISGETSYMBOL pfnGetSymbol, void *pvUser);
540DISDECL(size_t) DISFormatGas( PCDISSTATE pDis, char *pszBuf, size_t cchBuf);
541DISDECL(size_t) DISFormatGasEx( PCDISSTATE pDis, char *pszBuf, size_t cchBuf, uint32_t fFlags, PFNDISGETSYMBOL pfnGetSymbol, void *pvUser);
542
543/** @todo DISAnnotate(PCDISSTATE pDis, char *pszBuf, size_t cchBuf, register
544 * reader, memory reader); */
545
546/** @} */
547
548RT_C_DECLS_END
549
550#endif /* !VBOX_INCLUDED_dis_h */
551
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